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Diffstat (limited to 'drivers/usb/musb/musb_dma.h')
-rw-r--r-- | drivers/usb/musb/musb_dma.h | 172 |
1 files changed, 172 insertions, 0 deletions
diff --git a/drivers/usb/musb/musb_dma.h b/drivers/usb/musb/musb_dma.h new file mode 100644 index 000000000000..0a2c4e3602c1 --- /dev/null +++ b/drivers/usb/musb/musb_dma.h | |||
@@ -0,0 +1,172 @@ | |||
1 | /* | ||
2 | * MUSB OTG driver DMA controller abstraction | ||
3 | * | ||
4 | * Copyright 2005 Mentor Graphics Corporation | ||
5 | * Copyright (C) 2005-2006 by Texas Instruments | ||
6 | * Copyright (C) 2006-2007 Nokia Corporation | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * version 2 as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, but | ||
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
15 | * General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
20 | * 02110-1301 USA | ||
21 | * | ||
22 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED | ||
23 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
24 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
25 | * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
26 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
27 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
28 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
29 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
30 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
31 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
32 | * | ||
33 | */ | ||
34 | |||
35 | #ifndef __MUSB_DMA_H__ | ||
36 | #define __MUSB_DMA_H__ | ||
37 | |||
38 | struct musb_hw_ep; | ||
39 | |||
40 | /* | ||
41 | * DMA Controller Abstraction | ||
42 | * | ||
43 | * DMA Controllers are abstracted to allow use of a variety of different | ||
44 | * implementations of DMA, as allowed by the Inventra USB cores. On the | ||
45 | * host side, usbcore sets up the DMA mappings and flushes caches; on the | ||
46 | * peripheral side, the gadget controller driver does. Responsibilities | ||
47 | * of a DMA controller driver include: | ||
48 | * | ||
49 | * - Handling the details of moving multiple USB packets | ||
50 | * in cooperation with the Inventra USB core, including especially | ||
51 | * the correct RX side treatment of short packets and buffer-full | ||
52 | * states (both of which terminate transfers). | ||
53 | * | ||
54 | * - Knowing the correlation between dma channels and the | ||
55 | * Inventra core's local endpoint resources and data direction. | ||
56 | * | ||
57 | * - Maintaining a list of allocated/available channels. | ||
58 | * | ||
59 | * - Updating channel status on interrupts, | ||
60 | * whether shared with the Inventra core or separate. | ||
61 | */ | ||
62 | |||
63 | #define DMA_ADDR_INVALID (~(dma_addr_t)0) | ||
64 | |||
65 | #ifndef CONFIG_MUSB_PIO_ONLY | ||
66 | #define is_dma_capable() (1) | ||
67 | #else | ||
68 | #define is_dma_capable() (0) | ||
69 | #endif | ||
70 | |||
71 | #ifdef CONFIG_USB_TI_CPPI_DMA | ||
72 | #define is_cppi_enabled() 1 | ||
73 | #else | ||
74 | #define is_cppi_enabled() 0 | ||
75 | #endif | ||
76 | |||
77 | #ifdef CONFIG_USB_TUSB_OMAP_DMA | ||
78 | #define tusb_dma_omap() 1 | ||
79 | #else | ||
80 | #define tusb_dma_omap() 0 | ||
81 | #endif | ||
82 | |||
83 | /* | ||
84 | * DMA channel status ... updated by the dma controller driver whenever that | ||
85 | * status changes, and protected by the overall controller spinlock. | ||
86 | */ | ||
87 | enum dma_channel_status { | ||
88 | /* unallocated */ | ||
89 | MUSB_DMA_STATUS_UNKNOWN, | ||
90 | /* allocated ... but not busy, no errors */ | ||
91 | MUSB_DMA_STATUS_FREE, | ||
92 | /* busy ... transactions are active */ | ||
93 | MUSB_DMA_STATUS_BUSY, | ||
94 | /* transaction(s) aborted due to ... dma or memory bus error */ | ||
95 | MUSB_DMA_STATUS_BUS_ABORT, | ||
96 | /* transaction(s) aborted due to ... core error or USB fault */ | ||
97 | MUSB_DMA_STATUS_CORE_ABORT | ||
98 | }; | ||
99 | |||
100 | struct dma_controller; | ||
101 | |||
102 | /** | ||
103 | * struct dma_channel - A DMA channel. | ||
104 | * @private_data: channel-private data | ||
105 | * @max_len: the maximum number of bytes the channel can move in one | ||
106 | * transaction (typically representing many USB maximum-sized packets) | ||
107 | * @actual_len: how many bytes have been transferred | ||
108 | * @status: current channel status (updated e.g. on interrupt) | ||
109 | * @desired_mode: true if mode 1 is desired; false if mode 0 is desired | ||
110 | * | ||
111 | * channels are associated with an endpoint for the duration of at least | ||
112 | * one usb transfer. | ||
113 | */ | ||
114 | struct dma_channel { | ||
115 | void *private_data; | ||
116 | /* FIXME not void* private_data, but a dma_controller * */ | ||
117 | size_t max_len; | ||
118 | size_t actual_len; | ||
119 | enum dma_channel_status status; | ||
120 | bool desired_mode; | ||
121 | }; | ||
122 | |||
123 | /* | ||
124 | * dma_channel_status - return status of dma channel | ||
125 | * @c: the channel | ||
126 | * | ||
127 | * Returns the software's view of the channel status. If that status is BUSY | ||
128 | * then it's possible that the hardware has completed (or aborted) a transfer, | ||
129 | * so the driver needs to update that status. | ||
130 | */ | ||
131 | static inline enum dma_channel_status | ||
132 | dma_channel_status(struct dma_channel *c) | ||
133 | { | ||
134 | return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN; | ||
135 | } | ||
136 | |||
137 | /** | ||
138 | * struct dma_controller - A DMA Controller. | ||
139 | * @start: call this to start a DMA controller; | ||
140 | * return 0 on success, else negative errno | ||
141 | * @stop: call this to stop a DMA controller | ||
142 | * return 0 on success, else negative errno | ||
143 | * @channel_alloc: call this to allocate a DMA channel | ||
144 | * @channel_release: call this to release a DMA channel | ||
145 | * @channel_abort: call this to abort a pending DMA transaction, | ||
146 | * returning it to FREE (but allocated) state | ||
147 | * | ||
148 | * Controllers manage dma channels. | ||
149 | */ | ||
150 | struct dma_controller { | ||
151 | int (*start)(struct dma_controller *); | ||
152 | int (*stop)(struct dma_controller *); | ||
153 | struct dma_channel *(*channel_alloc)(struct dma_controller *, | ||
154 | struct musb_hw_ep *, u8 is_tx); | ||
155 | void (*channel_release)(struct dma_channel *); | ||
156 | int (*channel_program)(struct dma_channel *channel, | ||
157 | u16 maxpacket, u8 mode, | ||
158 | dma_addr_t dma_addr, | ||
159 | u32 length); | ||
160 | int (*channel_abort)(struct dma_channel *); | ||
161 | }; | ||
162 | |||
163 | /* called after channel_program(), may indicate a fault */ | ||
164 | extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit); | ||
165 | |||
166 | |||
167 | extern struct dma_controller *__init | ||
168 | dma_controller_create(struct musb *, void __iomem *); | ||
169 | |||
170 | extern void dma_controller_destroy(struct dma_controller *); | ||
171 | |||
172 | #endif /* __MUSB_DMA_H__ */ | ||