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path: root/drivers/usb/musb/cppi_dma.c
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Diffstat (limited to 'drivers/usb/musb/cppi_dma.c')
-rw-r--r--drivers/usb/musb/cppi_dma.c27
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/usb/musb/cppi_dma.c b/drivers/usb/musb/cppi_dma.c
index de55a3c3259a..ab434fbd8c35 100644
--- a/drivers/usb/musb/cppi_dma.c
+++ b/drivers/usb/musb/cppi_dma.c
@@ -597,12 +597,12 @@ cppi_next_tx_segment(struct musb *musb, struct cppi_channel *tx)
597 length = min(n_bds * maxpacket, length); 597 length = min(n_bds * maxpacket, length);
598 } 598 }
599 599
600 DBG(4, "TX DMA%d, pktSz %d %s bds %d dma 0x%x len %u\n", 600 DBG(4, "TX DMA%d, pktSz %d %s bds %d dma 0x%llx len %u\n",
601 tx->index, 601 tx->index,
602 maxpacket, 602 maxpacket,
603 rndis ? "rndis" : "transparent", 603 rndis ? "rndis" : "transparent",
604 n_bds, 604 n_bds,
605 addr, length); 605 (unsigned long long)addr, length);
606 606
607 cppi_rndis_update(tx, 0, musb->ctrl_base, rndis); 607 cppi_rndis_update(tx, 0, musb->ctrl_base, rndis);
608 608
@@ -820,7 +820,7 @@ cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)
820 length = min(n_bds * maxpacket, length); 820 length = min(n_bds * maxpacket, length);
821 821
822 DBG(4, "RX DMA%d seg, maxp %d %s bds %d (cnt %d) " 822 DBG(4, "RX DMA%d seg, maxp %d %s bds %d (cnt %d) "
823 "dma 0x%x len %u %u/%u\n", 823 "dma 0x%llx len %u %u/%u\n",
824 rx->index, maxpacket, 824 rx->index, maxpacket,
825 onepacket 825 onepacket
826 ? (is_rndis ? "rndis" : "onepacket") 826 ? (is_rndis ? "rndis" : "onepacket")
@@ -829,7 +829,8 @@ cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)
829 musb_readl(tibase, 829 musb_readl(tibase,
830 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4)) 830 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
831 & 0xffff, 831 & 0xffff,
832 addr, length, rx->channel.actual_len, rx->buf_len); 832 (unsigned long long)addr, length,
833 rx->channel.actual_len, rx->buf_len);
833 834
834 /* only queue one segment at a time, since the hardware prevents 835 /* only queue one segment at a time, since the hardware prevents
835 * correct queue shutdown after unexpected short packets 836 * correct queue shutdown after unexpected short packets
@@ -1039,9 +1040,9 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
1039 if (!completed && (bd->hw_options & CPPI_OWN_SET)) 1040 if (!completed && (bd->hw_options & CPPI_OWN_SET))
1040 break; 1041 break;
1041 1042
1042 DBG(5, "C/RXBD %08x: nxt %08x buf %08x " 1043 DBG(5, "C/RXBD %llx: nxt %08x buf %08x "
1043 "off.len %08x opt.len %08x (%d)\n", 1044 "off.len %08x opt.len %08x (%d)\n",
1044 bd->dma, bd->hw_next, bd->hw_bufp, 1045 (unsigned long long)bd->dma, bd->hw_next, bd->hw_bufp,
1045 bd->hw_off_len, bd->hw_options, 1046 bd->hw_off_len, bd->hw_options,
1046 rx->channel.actual_len); 1047 rx->channel.actual_len);
1047 1048
@@ -1111,11 +1112,12 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
1111 musb_ep_select(cppi->mregs, rx->index + 1); 1112 musb_ep_select(cppi->mregs, rx->index + 1);
1112 csr = musb_readw(regs, MUSB_RXCSR); 1113 csr = musb_readw(regs, MUSB_RXCSR);
1113 if (csr & MUSB_RXCSR_DMAENAB) { 1114 if (csr & MUSB_RXCSR_DMAENAB) {
1114 DBG(4, "list%d %p/%p, last %08x%s, csr %04x\n", 1115 DBG(4, "list%d %p/%p, last %llx%s, csr %04x\n",
1115 rx->index, 1116 rx->index,
1116 rx->head, rx->tail, 1117 rx->head, rx->tail,
1117 rx->last_processed 1118 rx->last_processed
1118 ? rx->last_processed->dma 1119 ? (unsigned long long)
1120 rx->last_processed->dma
1119 : 0, 1121 : 0,
1120 completed ? ", completed" : "", 1122 completed ? ", completed" : "",
1121 csr); 1123 csr);
@@ -1167,8 +1169,11 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
1167 tx = musb_readl(tibase, DAVINCI_TXCPPI_MASKED_REG); 1169 tx = musb_readl(tibase, DAVINCI_TXCPPI_MASKED_REG);
1168 rx = musb_readl(tibase, DAVINCI_RXCPPI_MASKED_REG); 1170 rx = musb_readl(tibase, DAVINCI_RXCPPI_MASKED_REG);
1169 1171
1170 if (!tx && !rx) 1172 if (!tx && !rx) {
1173 if (cppi->irq)
1174 spin_unlock_irqrestore(&musb->lock, flags);
1171 return IRQ_NONE; 1175 return IRQ_NONE;
1176 }
1172 1177
1173 DBG(4, "CPPI IRQ Tx%x Rx%x\n", tx, rx); 1178 DBG(4, "CPPI IRQ Tx%x Rx%x\n", tx, rx);
1174 1179
@@ -1199,7 +1204,7 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
1199 */ 1204 */
1200 if (NULL == bd) { 1205 if (NULL == bd) {
1201 DBG(1, "null BD\n"); 1206 DBG(1, "null BD\n");
1202 tx_ram->tx_complete = 0; 1207 musb_writel(&tx_ram->tx_complete, 0, 0);
1203 continue; 1208 continue;
1204 } 1209 }
1205 1210
@@ -1452,7 +1457,7 @@ static int cppi_channel_abort(struct dma_channel *channel)
1452 * compare mode by writing 1 to the tx_complete register. 1457 * compare mode by writing 1 to the tx_complete register.
1453 */ 1458 */
1454 cppi_reset_tx(tx_ram, 1); 1459 cppi_reset_tx(tx_ram, 1);
1455 cppi_ch->head = 0; 1460 cppi_ch->head = NULL;
1456 musb_writel(&tx_ram->tx_complete, 0, 1); 1461 musb_writel(&tx_ram->tx_complete, 0, 1);
1457 cppi_dump_tx(5, cppi_ch, " (done teardown)"); 1462 cppi_dump_tx(5, cppi_ch, " (done teardown)");
1458 1463