diff options
Diffstat (limited to 'drivers/usb/musb/cppi_dma.c')
-rw-r--r-- | drivers/usb/musb/cppi_dma.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/usb/musb/cppi_dma.c b/drivers/usb/musb/cppi_dma.c index ab434fbd8c35..149f3f310a0a 100644 --- a/drivers/usb/musb/cppi_dma.c +++ b/drivers/usb/musb/cppi_dma.c | |||
@@ -236,7 +236,7 @@ static int cppi_controller_stop(struct dma_controller *c) | |||
236 | musb_writel(tibase, DAVINCI_RXCPPI_INTCLR_REG, | 236 | musb_writel(tibase, DAVINCI_RXCPPI_INTCLR_REG, |
237 | DAVINCI_DMA_ALL_CHANNELS_ENABLE); | 237 | DAVINCI_DMA_ALL_CHANNELS_ENABLE); |
238 | 238 | ||
239 | DBG(1, "Tearing down RX and TX Channels\n"); | 239 | dev_dbg(musb->controller, "Tearing down RX and TX Channels\n"); |
240 | for (i = 0; i < ARRAY_SIZE(controller->tx); i++) { | 240 | for (i = 0; i < ARRAY_SIZE(controller->tx); i++) { |
241 | /* FIXME restructure of txdma to use bds like rxdma */ | 241 | /* FIXME restructure of txdma to use bds like rxdma */ |
242 | controller->tx[i].last_processed = NULL; | 242 | controller->tx[i].last_processed = NULL; |
@@ -301,13 +301,13 @@ cppi_channel_allocate(struct dma_controller *c, | |||
301 | */ | 301 | */ |
302 | if (transmit) { | 302 | if (transmit) { |
303 | if (index >= ARRAY_SIZE(controller->tx)) { | 303 | if (index >= ARRAY_SIZE(controller->tx)) { |
304 | DBG(1, "no %cX%d CPPI channel\n", 'T', index); | 304 | dev_dbg(musb->controller, "no %cX%d CPPI channel\n", 'T', index); |
305 | return NULL; | 305 | return NULL; |
306 | } | 306 | } |
307 | cppi_ch = controller->tx + index; | 307 | cppi_ch = controller->tx + index; |
308 | } else { | 308 | } else { |
309 | if (index >= ARRAY_SIZE(controller->rx)) { | 309 | if (index >= ARRAY_SIZE(controller->rx)) { |
310 | DBG(1, "no %cX%d CPPI channel\n", 'R', index); | 310 | dev_dbg(musb->controller, "no %cX%d CPPI channel\n", 'R', index); |
311 | return NULL; | 311 | return NULL; |
312 | } | 312 | } |
313 | cppi_ch = controller->rx + index; | 313 | cppi_ch = controller->rx + index; |
@@ -318,13 +318,13 @@ cppi_channel_allocate(struct dma_controller *c, | |||
318 | * with the other DMA engine too | 318 | * with the other DMA engine too |
319 | */ | 319 | */ |
320 | if (cppi_ch->hw_ep) | 320 | if (cppi_ch->hw_ep) |
321 | DBG(1, "re-allocating DMA%d %cX channel %p\n", | 321 | dev_dbg(musb->controller, "re-allocating DMA%d %cX channel %p\n", |
322 | index, transmit ? 'T' : 'R', cppi_ch); | 322 | index, transmit ? 'T' : 'R', cppi_ch); |
323 | cppi_ch->hw_ep = ep; | 323 | cppi_ch->hw_ep = ep; |
324 | cppi_ch->channel.status = MUSB_DMA_STATUS_FREE; | 324 | cppi_ch->channel.status = MUSB_DMA_STATUS_FREE; |
325 | cppi_ch->channel.max_len = 0x7fffffff; | 325 | cppi_ch->channel.max_len = 0x7fffffff; |
326 | 326 | ||
327 | DBG(4, "Allocate CPPI%d %cX\n", index, transmit ? 'T' : 'R'); | 327 | dev_dbg(musb->controller, "Allocate CPPI%d %cX\n", index, transmit ? 'T' : 'R'); |
328 | return &cppi_ch->channel; | 328 | return &cppi_ch->channel; |
329 | } | 329 | } |
330 | 330 | ||
@@ -339,7 +339,7 @@ static void cppi_channel_release(struct dma_channel *channel) | |||
339 | c = container_of(channel, struct cppi_channel, channel); | 339 | c = container_of(channel, struct cppi_channel, channel); |
340 | tibase = c->controller->tibase; | 340 | tibase = c->controller->tibase; |
341 | if (!c->hw_ep) | 341 | if (!c->hw_ep) |
342 | DBG(1, "releasing idle DMA channel %p\n", c); | 342 | dev_dbg(musb->controller, "releasing idle DMA channel %p\n", c); |
343 | else if (!c->transmit) | 343 | else if (!c->transmit) |
344 | core_rxirq_enable(tibase, c->index + 1); | 344 | core_rxirq_enable(tibase, c->index + 1); |
345 | 345 | ||
@@ -597,7 +597,7 @@ cppi_next_tx_segment(struct musb *musb, struct cppi_channel *tx) | |||
597 | length = min(n_bds * maxpacket, length); | 597 | length = min(n_bds * maxpacket, length); |
598 | } | 598 | } |
599 | 599 | ||
600 | DBG(4, "TX DMA%d, pktSz %d %s bds %d dma 0x%llx len %u\n", | 600 | dev_dbg(musb->controller, "TX DMA%d, pktSz %d %s bds %d dma 0x%llx len %u\n", |
601 | tx->index, | 601 | tx->index, |
602 | maxpacket, | 602 | maxpacket, |
603 | rndis ? "rndis" : "transparent", | 603 | rndis ? "rndis" : "transparent", |
@@ -654,7 +654,7 @@ cppi_next_tx_segment(struct musb *musb, struct cppi_channel *tx) | |||
654 | bd->hw_options |= CPPI_ZERO_SET; | 654 | bd->hw_options |= CPPI_ZERO_SET; |
655 | } | 655 | } |
656 | 656 | ||
657 | DBG(5, "TXBD %p: nxt %08x buf %08x len %04x opt %08x\n", | 657 | dev_dbg(musb->controller, "TXBD %p: nxt %08x buf %08x len %04x opt %08x\n", |
658 | bd, bd->hw_next, bd->hw_bufp, | 658 | bd, bd->hw_next, bd->hw_bufp, |
659 | bd->hw_off_len, bd->hw_options); | 659 | bd->hw_off_len, bd->hw_options); |
660 | 660 | ||
@@ -819,7 +819,7 @@ cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket) | |||
819 | 819 | ||
820 | length = min(n_bds * maxpacket, length); | 820 | length = min(n_bds * maxpacket, length); |
821 | 821 | ||
822 | DBG(4, "RX DMA%d seg, maxp %d %s bds %d (cnt %d) " | 822 | dev_dbg(musb->controller, "RX DMA%d seg, maxp %d %s bds %d (cnt %d) " |
823 | "dma 0x%llx len %u %u/%u\n", | 823 | "dma 0x%llx len %u %u/%u\n", |
824 | rx->index, maxpacket, | 824 | rx->index, maxpacket, |
825 | onepacket | 825 | onepacket |
@@ -936,7 +936,7 @@ cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket) | |||
936 | DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4)) | 936 | DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4)) |
937 | & 0xffff; | 937 | & 0xffff; |
938 | if (i < (2 + n_bds)) { | 938 | if (i < (2 + n_bds)) { |
939 | DBG(2, "bufcnt%d underrun - %d (for %d)\n", | 939 | dev_dbg(musb->controller, "bufcnt%d underrun - %d (for %d)\n", |
940 | rx->index, i, n_bds); | 940 | rx->index, i, n_bds); |
941 | musb_writel(tibase, | 941 | musb_writel(tibase, |
942 | DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4), | 942 | DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4), |
@@ -985,7 +985,7 @@ static int cppi_channel_program(struct dma_channel *ch, | |||
985 | /* WARN_ON(1); */ | 985 | /* WARN_ON(1); */ |
986 | break; | 986 | break; |
987 | case MUSB_DMA_STATUS_UNKNOWN: | 987 | case MUSB_DMA_STATUS_UNKNOWN: |
988 | DBG(1, "%cX DMA%d not allocated!\n", | 988 | dev_dbg(musb->controller, "%cX DMA%d not allocated!\n", |
989 | cppi_ch->transmit ? 'T' : 'R', | 989 | cppi_ch->transmit ? 'T' : 'R', |
990 | cppi_ch->index); | 990 | cppi_ch->index); |
991 | /* FALLTHROUGH */ | 991 | /* FALLTHROUGH */ |
@@ -1040,7 +1040,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch) | |||
1040 | if (!completed && (bd->hw_options & CPPI_OWN_SET)) | 1040 | if (!completed && (bd->hw_options & CPPI_OWN_SET)) |
1041 | break; | 1041 | break; |
1042 | 1042 | ||
1043 | DBG(5, "C/RXBD %llx: nxt %08x buf %08x " | 1043 | dev_dbg(musb->controller, "C/RXBD %llx: nxt %08x buf %08x " |
1044 | "off.len %08x opt.len %08x (%d)\n", | 1044 | "off.len %08x opt.len %08x (%d)\n", |
1045 | (unsigned long long)bd->dma, bd->hw_next, bd->hw_bufp, | 1045 | (unsigned long long)bd->dma, bd->hw_next, bd->hw_bufp, |
1046 | bd->hw_off_len, bd->hw_options, | 1046 | bd->hw_off_len, bd->hw_options, |
@@ -1062,7 +1062,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch) | |||
1062 | * CPPI ignores those BDs even though OWN is still set. | 1062 | * CPPI ignores those BDs even though OWN is still set. |
1063 | */ | 1063 | */ |
1064 | completed = true; | 1064 | completed = true; |
1065 | DBG(3, "rx short %d/%d (%d)\n", | 1065 | dev_dbg(musb->controller, "rx short %d/%d (%d)\n", |
1066 | len, bd->buflen, | 1066 | len, bd->buflen, |
1067 | rx->channel.actual_len); | 1067 | rx->channel.actual_len); |
1068 | } | 1068 | } |
@@ -1112,7 +1112,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch) | |||
1112 | musb_ep_select(cppi->mregs, rx->index + 1); | 1112 | musb_ep_select(cppi->mregs, rx->index + 1); |
1113 | csr = musb_readw(regs, MUSB_RXCSR); | 1113 | csr = musb_readw(regs, MUSB_RXCSR); |
1114 | if (csr & MUSB_RXCSR_DMAENAB) { | 1114 | if (csr & MUSB_RXCSR_DMAENAB) { |
1115 | DBG(4, "list%d %p/%p, last %llx%s, csr %04x\n", | 1115 | dev_dbg(musb->controller, "list%d %p/%p, last %llx%s, csr %04x\n", |
1116 | rx->index, | 1116 | rx->index, |
1117 | rx->head, rx->tail, | 1117 | rx->head, rx->tail, |
1118 | rx->last_processed | 1118 | rx->last_processed |
@@ -1175,7 +1175,7 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id) | |||
1175 | return IRQ_NONE; | 1175 | return IRQ_NONE; |
1176 | } | 1176 | } |
1177 | 1177 | ||
1178 | DBG(4, "CPPI IRQ Tx%x Rx%x\n", tx, rx); | 1178 | dev_dbg(musb->controller, "CPPI IRQ Tx%x Rx%x\n", tx, rx); |
1179 | 1179 | ||
1180 | /* process TX channels */ | 1180 | /* process TX channels */ |
1181 | for (index = 0; tx; tx = tx >> 1, index++) { | 1181 | for (index = 0; tx; tx = tx >> 1, index++) { |
@@ -1203,7 +1203,7 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id) | |||
1203 | * that needs to be acknowledged. | 1203 | * that needs to be acknowledged. |
1204 | */ | 1204 | */ |
1205 | if (NULL == bd) { | 1205 | if (NULL == bd) { |
1206 | DBG(1, "null BD\n"); | 1206 | dev_dbg(musb->controller, "null BD\n"); |
1207 | musb_writel(&tx_ram->tx_complete, 0, 0); | 1207 | musb_writel(&tx_ram->tx_complete, 0, 0); |
1208 | continue; | 1208 | continue; |
1209 | } | 1209 | } |
@@ -1218,7 +1218,7 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id) | |||
1218 | if (bd->hw_options & CPPI_OWN_SET) | 1218 | if (bd->hw_options & CPPI_OWN_SET) |
1219 | break; | 1219 | break; |
1220 | 1220 | ||
1221 | DBG(5, "C/TXBD %p n %x b %x off %x opt %x\n", | 1221 | dev_dbg(musb->controller, "C/TXBD %p n %x b %x off %x opt %x\n", |
1222 | bd, bd->hw_next, bd->hw_bufp, | 1222 | bd, bd->hw_next, bd->hw_bufp, |
1223 | bd->hw_off_len, bd->hw_options); | 1223 | bd->hw_off_len, bd->hw_options); |
1224 | 1224 | ||