2 files changed, 5 insertions, 2 deletions

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 177e78ed241b..49a91c5ee51b 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -156,7 +156,7 @@ config USB_OHCI_HCD_PCI
 
 config USB_OHCI_HCD_SSB
         bool "OHCI support for Broadcom SSB OHCI core"
-        depends on USB_OHCI_HCD && (SSB = y || SSB = CONFIG_USB_OHCI_HCD) && EXPERIMENTAL
+        depends on USB_OHCI_HCD && (SSB = y || SSB = USB_OHCI_HCD) && EXPERIMENTAL
         default n
         ---help---
           Support for the Sonics Silicon Backplane (SSB) attached
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index c1514442883e..5f2d74ed5ad7 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -575,12 +575,15 @@ static int ehci_run (struct usb_hcd *hcd)
          * from the companions to the EHCI controller.  If any of the
          * companions are in the middle of a port reset at the time, it
          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
-         * guarantees that no resets are in progress.
+         * guarantees that no resets are in progress.  After we set CF,
+         * a short delay lets the hardware catch up; new resets shouldn't
+         * be started before the port switching actions could complete.
          */
         down_write(&ehci_cf_port_reset_rwsem);
         hcd->state = HC_STATE_RUNNING;
         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
+        msleep(5);
         up_write(&ehci_cf_port_reset_rwsem);
 
         temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));