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-rw-r--r--drivers/usb/host/ehci-fsl.c6
-rw-r--r--drivers/usb/host/ehci-fsl.h1
-rw-r--r--drivers/usb/host/ehci-hcd.c15
-rw-r--r--drivers/usb/host/ehci-mxc.c13
4 files changed, 20 insertions, 15 deletions
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index a416421abfa2..8600317bd60b 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -233,8 +233,6 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
233 mpc83xx_setup_phy(ehci, pdata->phy_mode, 1); 233 mpc83xx_setup_phy(ehci, pdata->phy_mode, 1);
234 } 234 }
235 235
236 /* put controller in host mode. */
237 ehci_writel(ehci, 0x00000003, non_ehci + FSL_SOC_USB_USBMODE);
238#ifdef CONFIG_PPC_85xx 236#ifdef CONFIG_PPC_85xx
239 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008); 237 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
240 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080); 238 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
@@ -270,6 +268,8 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
270 /* cache this readonly data; minimize chip reads */ 268 /* cache this readonly data; minimize chip reads */
271 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 269 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
272 270
271 hcd->has_tt = 1;
272
273 retval = ehci_halt(ehci); 273 retval = ehci_halt(ehci);
274 if (retval) 274 if (retval)
275 return retval; 275 return retval;
@@ -279,8 +279,6 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
279 if (retval) 279 if (retval)
280 return retval; 280 return retval;
281 281
282 hcd->has_tt = 1;
283
284 ehci->sbrn = 0x20; 282 ehci->sbrn = 0x20;
285 283
286 ehci_reset(ehci); 284 ehci_reset(ehci);
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index b5e59db53347..eb537aa54610 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -27,7 +27,6 @@
27#define PORT_PTS_SERIAL (3<<30) 27#define PORT_PTS_SERIAL (3<<30)
28#define PORT_PTS_PTW (1<<28) 28#define PORT_PTS_PTW (1<<28)
29#define FSL_SOC_USB_PORTSC2 0x188 29#define FSL_SOC_USB_PORTSC2 0x188
30#define FSL_SOC_USB_USBMODE 0x1a8
31#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ 30#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
32#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ 31#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
33#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ 32#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 34a928d3b7d2..15fe3ecd203b 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -194,6 +194,17 @@ static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
194 return -ETIMEDOUT; 194 return -ETIMEDOUT;
195} 195}
196 196
197/* check TDI/ARC silicon is in host mode */
198static int tdi_in_host_mode (struct ehci_hcd *ehci)
199{
200 u32 __iomem *reg_ptr;
201 u32 tmp;
202
203 reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
204 tmp = ehci_readl(ehci, reg_ptr);
205 return (tmp & 3) == USBMODE_CM_HC;
206}
207
197/* force HC to halt state from unknown (EHCI spec section 2.3) */ 208/* force HC to halt state from unknown (EHCI spec section 2.3) */
198static int ehci_halt (struct ehci_hcd *ehci) 209static int ehci_halt (struct ehci_hcd *ehci)
199{ 210{
@@ -202,6 +213,10 @@ static int ehci_halt (struct ehci_hcd *ehci)
202 /* disable any irqs left enabled by previous code */ 213 /* disable any irqs left enabled by previous code */
203 ehci_writel(ehci, 0, &ehci->regs->intr_enable); 214 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
204 215
216 if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
217 return 0;
218 }
219
205 if ((temp & STS_HALT) != 0) 220 if ((temp & STS_HALT) != 0)
206 return 0; 221 return 0;
207 222
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index a8ad8ac120a2..ac9c4d7c44af 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -26,9 +26,6 @@
26#include <mach/mxc_ehci.h> 26#include <mach/mxc_ehci.h>
27 27
28#define ULPI_VIEWPORT_OFFSET 0x170 28#define ULPI_VIEWPORT_OFFSET 0x170
29#define PORTSC_OFFSET 0x184
30#define USBMODE_OFFSET 0x1a8
31#define USBMODE_CM_HOST 3
32 29
33struct ehci_mxc_priv { 30struct ehci_mxc_priv {
34 struct clk *usbclk, *ahbclk; 31 struct clk *usbclk, *ahbclk;
@@ -51,6 +48,8 @@ static int ehci_mxc_setup(struct usb_hcd *hcd)
51 /* cache this readonly data; minimize chip reads */ 48 /* cache this readonly data; minimize chip reads */
52 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 49 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
53 50
51 hcd->has_tt = 1;
52
54 retval = ehci_halt(ehci); 53 retval = ehci_halt(ehci);
55 if (retval) 54 if (retval)
56 return retval; 55 return retval;
@@ -60,8 +59,6 @@ static int ehci_mxc_setup(struct usb_hcd *hcd)
60 if (retval) 59 if (retval)
61 return retval; 60 return retval;
62 61
63 hcd->has_tt = 1;
64
65 ehci->sbrn = 0x20; 62 ehci->sbrn = 0x20;
66 63
67 ehci_reset(ehci); 64 ehci_reset(ehci);
@@ -191,12 +188,8 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev)
191 clk_enable(priv->ahbclk); 188 clk_enable(priv->ahbclk);
192 } 189 }
193 190
194 /* set USBMODE to host mode */
195 temp = readl(hcd->regs + USBMODE_OFFSET);
196 writel(temp | USBMODE_CM_HOST, hcd->regs + USBMODE_OFFSET);
197
198 /* set up the PORTSCx register */ 191 /* set up the PORTSCx register */
199 writel(pdata->portsc, hcd->regs + PORTSC_OFFSET); 192 ehci_writel(ehci, pdata->portsc, &ehci->regs->port_status[0]);
200 mdelay(10); 193 mdelay(10);
201 194
202 /* setup specific usb hw */ 195 /* setup specific usb hw */