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path: root/drivers/usb/host/xhci.h
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Diffstat (limited to 'drivers/usb/host/xhci.h')
-rw-r--r--drivers/usb/host/xhci.h94
1 files changed, 74 insertions, 20 deletions
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 059c659d3f39..4ef6b9e88504 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -285,12 +285,21 @@ struct xhci_op_regs {
285 * 4 - super speed 285 * 4 - super speed
286 * 5-15 reserved 286 * 5-15 reserved
287 */ 287 */
288#define DEV_SPEED_MASK (0xf<<10) 288#define DEV_SPEED_MASK (0xf << 10)
289#define XDEV_FS (0x1 << 10)
290#define XDEV_LS (0x2 << 10)
291#define XDEV_HS (0x3 << 10)
292#define XDEV_SS (0x4 << 10)
289#define DEV_UNDEFSPEED(p) (((p) & DEV_SPEED_MASK) == (0x0<<10)) 293#define DEV_UNDEFSPEED(p) (((p) & DEV_SPEED_MASK) == (0x0<<10))
290#define DEV_FULLSPEED(p) (((p) & DEV_SPEED_MASK) == (0x1<<10)) 294#define DEV_FULLSPEED(p) (((p) & DEV_SPEED_MASK) == XDEV_FS)
291#define DEV_LOWSPEED(p) (((p) & DEV_SPEED_MASK) == (0x2<<10)) 295#define DEV_LOWSPEED(p) (((p) & DEV_SPEED_MASK) == XDEV_LS)
292#define DEV_HIGHSPEED(p) (((p) & DEV_SPEED_MASK) == (0x3<<10)) 296#define DEV_HIGHSPEED(p) (((p) & DEV_SPEED_MASK) == XDEV_HS)
293#define DEV_SUPERSPEED(p) (((p) & DEV_SPEED_MASK) == (0x4<<10)) 297#define DEV_SUPERSPEED(p) (((p) & DEV_SPEED_MASK) == XDEV_SS)
298/* Bits 20:23 in the Slot Context are the speed for the device */
299#define SLOT_SPEED_FS (XDEV_FS << 10)
300#define SLOT_SPEED_LS (XDEV_LS << 10)
301#define SLOT_SPEED_HS (XDEV_HS << 10)
302#define SLOT_SPEED_SS (XDEV_SS << 10)
294/* Port Indicator Control */ 303/* Port Indicator Control */
295#define PORT_LED_OFF (0 << 14) 304#define PORT_LED_OFF (0 << 14)
296#define PORT_LED_AMBER (1 << 14) 305#define PORT_LED_AMBER (1 << 14)
@@ -471,14 +480,19 @@ struct xhci_slot_ctx {
471/* Set if the device is a hub - bit 26 */ 480/* Set if the device is a hub - bit 26 */
472#define DEV_HUB (0x1 << 26) 481#define DEV_HUB (0x1 << 26)
473/* Index of the last valid endpoint context in this device context - 27:31 */ 482/* Index of the last valid endpoint context in this device context - 27:31 */
474#define LAST_EP_MASK (0x1f << 27) 483#define LAST_CTX_MASK (0x1f << 27)
475#define LAST_EP(p) ((p) << 27) 484#define LAST_CTX(p) ((p) << 27)
485#define LAST_CTX_TO_EP_NUM(p) (((p) >> 27) - 1)
486/* Plus one for the slot context flag */
487#define EPI_TO_FLAG(p) (1 << ((p) + 1))
488#define SLOT_FLAG (1 << 0)
489#define EP0_FLAG (1 << 1)
476 490
477/* dev_info2 bitmasks */ 491/* dev_info2 bitmasks */
478/* Max Exit Latency (ms) - worst case time to wake up all links in dev path */ 492/* Max Exit Latency (ms) - worst case time to wake up all links in dev path */
479#define MAX_EXIT (0xffff) 493#define MAX_EXIT (0xffff)
480/* Root hub port number that is needed to access the USB device */ 494/* Root hub port number that is needed to access the USB device */
481#define ROOT_HUB_PORT (0xff << 16) 495#define ROOT_HUB_PORT(p) (((p) & 0xff) << 16)
482 496
483/* tt_info bitmasks */ 497/* tt_info bitmasks */
484/* 498/*
@@ -495,7 +509,7 @@ struct xhci_slot_ctx {
495 509
496/* dev_state bitmasks */ 510/* dev_state bitmasks */
497/* USB device address - assigned by the HC */ 511/* USB device address - assigned by the HC */
498#define DEV_ADDR (0xff) 512#define DEV_ADDR_MASK (0xff)
499/* bits 8:26 reserved */ 513/* bits 8:26 reserved */
500/* Slot state */ 514/* Slot state */
501#define SLOT_STATE (0x1f << 27) 515#define SLOT_STATE (0x1f << 27)
@@ -507,12 +521,13 @@ struct xhci_slot_ctx {
507 * @ep_info2: information on endpoint type, max packet size, max burst size, 521 * @ep_info2: information on endpoint type, max packet size, max burst size,
508 * error count, and whether the HC will force an event for all 522 * error count, and whether the HC will force an event for all
509 * transactions. 523 * transactions.
510 * @ep_ring: 64-bit ring address. If the endpoint only defines one flow, 524 * @deq: 64-bit ring dequeue pointer address. If the endpoint only
511 * this points to the endpoint transfer ring. Otherwise, it points 525 * defines one stream, this points to the endpoint transfer ring.
512 * to a flow context array, which has a ring pointer for each flow. 526 * Otherwise, it points to a stream context array, which has a
513 * @intr_target: 527 * ring pointer for each flow.
514 * 64-bit address of the Interrupter Target that will receive 528 * @tx_info:
515 * events from this endpoint. 529 * Average TRB lengths for the endpoint ring and
530 * max payload within an Endpoint Service Interval Time (ESIT).
516 * 531 *
517 * Endpoint Context - section 6.2.1.2. This assumes the HC uses 32-byte context 532 * Endpoint Context - section 6.2.1.2. This assumes the HC uses 32-byte context
518 * structures. If the HC uses 64-byte contexts, there is an additional 32 bytes 533 * structures. If the HC uses 64-byte contexts, there is an additional 32 bytes
@@ -521,12 +536,10 @@ struct xhci_slot_ctx {
521struct xhci_ep_ctx { 536struct xhci_ep_ctx {
522 u32 ep_info; 537 u32 ep_info;
523 u32 ep_info2; 538 u32 ep_info2;
524 /* 64-bit endpoint ring address */ 539 u32 deq[2];
525 u32 ep_ring[2]; 540 u32 tx_info;
526 /* 64-bit address of the interrupter target */
527 u32 intr_target[2];
528 /* offset 0x14 - 0x1f reserved for HC internal use */ 541 /* offset 0x14 - 0x1f reserved for HC internal use */
529 u32 reserved[2]; 542 u32 reserved[3];
530} __attribute__ ((packed)); 543} __attribute__ ((packed));
531 544
532/* ep_info bitmasks */ 545/* ep_info bitmasks */
@@ -589,6 +602,28 @@ struct xhci_device_control {
589#define ADD_EP(x) (0x1 << x) 602#define ADD_EP(x) (0x1 << x)
590 603
591 604
605struct xhci_virt_device {
606 /*
607 * Commands to the hardware are passed an "input context" that
608 * tells the hardware what to change in its data structures.
609 * The hardware will return changes in an "output context" that
610 * software must allocate for the hardware. We need to keep
611 * track of input and output contexts separately because
612 * these commands might fail and we don't trust the hardware.
613 */
614 struct xhci_device_control *out_ctx;
615 dma_addr_t out_ctx_dma;
616 /* Used for addressing devices and configuration changes */
617 struct xhci_device_control *in_ctx;
618 dma_addr_t in_ctx_dma;
619 /* FIXME when stream support is added */
620 struct xhci_ring *ep_rings[31];
621 dma_addr_t ep_dma[31];
622 /* Status of the last command issued for this device */
623 u32 cmd_status;
624};
625
626
592/** 627/**
593 * struct xhci_device_context_array 628 * struct xhci_device_context_array
594 * @dev_context_ptr array of 64-bit DMA addresses for device contexts 629 * @dev_context_ptr array of 64-bit DMA addresses for device contexts
@@ -711,6 +746,11 @@ struct xhci_event_cmd {
711 u32 flags; 746 u32 flags;
712} __attribute__ ((packed)); 747} __attribute__ ((packed));
713 748
749/* flags bitmasks */
750/* bits 16:23 are the virtual function ID */
751/* bits 24:31 are the slot ID */
752#define TRB_TO_SLOT_ID(p) (((p) & (0xff<<24)) >> 24)
753#define SLOT_ID_FOR_TRB(p) (((p) & 0xff) << 24)
714 754
715/* Port Status Change Event TRB fields */ 755/* Port Status Change Event TRB fields */
716/* Port ID - bits 31:24 */ 756/* Port ID - bits 31:24 */
@@ -931,6 +971,11 @@ struct xhci_hcd {
931 struct xhci_ring *cmd_ring; 971 struct xhci_ring *cmd_ring;
932 struct xhci_ring *event_ring; 972 struct xhci_ring *event_ring;
933 struct xhci_erst erst; 973 struct xhci_erst erst;
974 /* slot enabling and address device helpers */
975 struct completion addr_dev;
976 int slot_id;
977 /* Internal mirror of the HW's dcbaa */
978 struct xhci_virt_device *devs[MAX_HC_SLOTS];
934 979
935 /* DMA pools */ 980 /* DMA pools */
936 struct dma_pool *device_pool; 981 struct dma_pool *device_pool;
@@ -1002,10 +1047,14 @@ void xhci_debug_ring(struct xhci_hcd *xhci, struct xhci_ring *ring);
1002void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst); 1047void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst);
1003void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci); 1048void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci);
1004void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring); 1049void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring);
1050void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_device_control *ctx, dma_addr_t dma, unsigned int last_ep);
1005 1051
1006/* xHCI memory managment */ 1052/* xHCI memory managment */
1007void xhci_mem_cleanup(struct xhci_hcd *xhci); 1053void xhci_mem_cleanup(struct xhci_hcd *xhci);
1008int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags); 1054int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags);
1055void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id);
1056int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, struct usb_device *udev, gfp_t flags);
1057int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev);
1009 1058
1010#ifdef CONFIG_PCI 1059#ifdef CONFIG_PCI
1011/* xHCI PCI glue */ 1060/* xHCI PCI glue */
@@ -1022,6 +1071,9 @@ void xhci_stop(struct usb_hcd *hcd);
1022void xhci_shutdown(struct usb_hcd *hcd); 1071void xhci_shutdown(struct usb_hcd *hcd);
1023int xhci_get_frame(struct usb_hcd *hcd); 1072int xhci_get_frame(struct usb_hcd *hcd);
1024irqreturn_t xhci_irq(struct usb_hcd *hcd); 1073irqreturn_t xhci_irq(struct usb_hcd *hcd);
1074int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev);
1075void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev);
1076int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev);
1025 1077
1026/* xHCI ring, segment, TRB, and TD functions */ 1078/* xHCI ring, segment, TRB, and TD functions */
1027dma_addr_t trb_virt_to_dma(struct xhci_segment *seg, union xhci_trb *trb); 1079dma_addr_t trb_virt_to_dma(struct xhci_segment *seg, union xhci_trb *trb);
@@ -1029,6 +1081,8 @@ void ring_cmd_db(struct xhci_hcd *xhci);
1029void *setup_one_noop(struct xhci_hcd *xhci); 1081void *setup_one_noop(struct xhci_hcd *xhci);
1030void handle_event(struct xhci_hcd *xhci); 1082void handle_event(struct xhci_hcd *xhci);
1031void set_hc_event_deq(struct xhci_hcd *xhci); 1083void set_hc_event_deq(struct xhci_hcd *xhci);
1084int queue_slot_control(struct xhci_hcd *xhci, u32 trb_type, u32 slot_id);
1085int queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, u32 slot_id);
1032 1086
1033/* xHCI roothub code */ 1087/* xHCI roothub code */
1034int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, 1088int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex,