diff options
Diffstat (limited to 'drivers/usb/host/xhci-ring.c')
-rw-r--r-- | drivers/usb/host/xhci-ring.c | 131 |
1 files changed, 74 insertions, 57 deletions
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index df558f6f84e3..3289bf4832c9 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
@@ -308,11 +308,8 @@ static int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring, | |||
308 | /* Ring the host controller doorbell after placing a command on the ring */ | 308 | /* Ring the host controller doorbell after placing a command on the ring */ |
309 | void xhci_ring_cmd_db(struct xhci_hcd *xhci) | 309 | void xhci_ring_cmd_db(struct xhci_hcd *xhci) |
310 | { | 310 | { |
311 | u32 temp; | ||
312 | |||
313 | xhci_dbg(xhci, "// Ding dong!\n"); | 311 | xhci_dbg(xhci, "// Ding dong!\n"); |
314 | temp = xhci_readl(xhci, &xhci->dba->doorbell[0]) & DB_MASK; | 312 | xhci_writel(xhci, DB_VALUE_HOST, &xhci->dba->doorbell[0]); |
315 | xhci_writel(xhci, temp | DB_TARGET_HOST, &xhci->dba->doorbell[0]); | ||
316 | /* Flush PCI posted writes */ | 313 | /* Flush PCI posted writes */ |
317 | xhci_readl(xhci, &xhci->dba->doorbell[0]); | 314 | xhci_readl(xhci, &xhci->dba->doorbell[0]); |
318 | } | 315 | } |
@@ -322,26 +319,24 @@ void xhci_ring_ep_doorbell(struct xhci_hcd *xhci, | |||
322 | unsigned int ep_index, | 319 | unsigned int ep_index, |
323 | unsigned int stream_id) | 320 | unsigned int stream_id) |
324 | { | 321 | { |
325 | struct xhci_virt_ep *ep; | ||
326 | unsigned int ep_state; | ||
327 | u32 field; | ||
328 | __u32 __iomem *db_addr = &xhci->dba->doorbell[slot_id]; | 322 | __u32 __iomem *db_addr = &xhci->dba->doorbell[slot_id]; |
323 | struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index]; | ||
324 | unsigned int ep_state = ep->ep_state; | ||
329 | 325 | ||
330 | ep = &xhci->devs[slot_id]->eps[ep_index]; | ||
331 | ep_state = ep->ep_state; | ||
332 | /* Don't ring the doorbell for this endpoint if there are pending | 326 | /* Don't ring the doorbell for this endpoint if there are pending |
333 | * cancellations because the we don't want to interrupt processing. | 327 | * cancellations because we don't want to interrupt processing. |
334 | * We don't want to restart any stream rings if there's a set dequeue | 328 | * We don't want to restart any stream rings if there's a set dequeue |
335 | * pointer command pending because the device can choose to start any | 329 | * pointer command pending because the device can choose to start any |
336 | * stream once the endpoint is on the HW schedule. | 330 | * stream once the endpoint is on the HW schedule. |
337 | * FIXME - check all the stream rings for pending cancellations. | 331 | * FIXME - check all the stream rings for pending cancellations. |
338 | */ | 332 | */ |
339 | if (!(ep_state & EP_HALT_PENDING) && !(ep_state & SET_DEQ_PENDING) | 333 | if ((ep_state & EP_HALT_PENDING) || (ep_state & SET_DEQ_PENDING) || |
340 | && !(ep_state & EP_HALTED)) { | 334 | (ep_state & EP_HALTED)) |
341 | field = xhci_readl(xhci, db_addr) & DB_MASK; | 335 | return; |
342 | field |= EPI_TO_DB(ep_index) | STREAM_ID_TO_DB(stream_id); | 336 | xhci_writel(xhci, DB_VALUE(ep_index, stream_id), db_addr); |
343 | xhci_writel(xhci, field, db_addr); | 337 | /* The CPU has better things to do at this point than wait for a |
344 | } | 338 | * write-posting flush. It'll get there soon enough. |
339 | */ | ||
345 | } | 340 | } |
346 | 341 | ||
347 | /* Ring the doorbell for any rings with pending URBs */ | 342 | /* Ring the doorbell for any rings with pending URBs */ |
@@ -479,8 +474,11 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, | |||
479 | state->new_deq_seg = find_trb_seg(cur_td->start_seg, | 474 | state->new_deq_seg = find_trb_seg(cur_td->start_seg, |
480 | dev->eps[ep_index].stopped_trb, | 475 | dev->eps[ep_index].stopped_trb, |
481 | &state->new_cycle_state); | 476 | &state->new_cycle_state); |
482 | if (!state->new_deq_seg) | 477 | if (!state->new_deq_seg) { |
483 | BUG(); | 478 | WARN_ON(1); |
479 | return; | ||
480 | } | ||
481 | |||
484 | /* Dig out the cycle state saved by the xHC during the stop ep cmd */ | 482 | /* Dig out the cycle state saved by the xHC during the stop ep cmd */ |
485 | xhci_dbg(xhci, "Finding endpoint context\n"); | 483 | xhci_dbg(xhci, "Finding endpoint context\n"); |
486 | ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); | 484 | ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); |
@@ -491,8 +489,10 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, | |||
491 | state->new_deq_seg = find_trb_seg(state->new_deq_seg, | 489 | state->new_deq_seg = find_trb_seg(state->new_deq_seg, |
492 | state->new_deq_ptr, | 490 | state->new_deq_ptr, |
493 | &state->new_cycle_state); | 491 | &state->new_cycle_state); |
494 | if (!state->new_deq_seg) | 492 | if (!state->new_deq_seg) { |
495 | BUG(); | 493 | WARN_ON(1); |
494 | return; | ||
495 | } | ||
496 | 496 | ||
497 | trb = &state->new_deq_ptr->generic; | 497 | trb = &state->new_deq_ptr->generic; |
498 | if ((trb->field[3] & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK) && | 498 | if ((trb->field[3] & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK) && |
@@ -1188,7 +1188,7 @@ static void handle_port_status(struct xhci_hcd *xhci, | |||
1188 | 1188 | ||
1189 | addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS * (port_id - 1); | 1189 | addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS * (port_id - 1); |
1190 | temp = xhci_readl(xhci, addr); | 1190 | temp = xhci_readl(xhci, addr); |
1191 | if ((temp & PORT_CONNECT) && (hcd->state == HC_STATE_SUSPENDED)) { | 1191 | if (hcd->state == HC_STATE_SUSPENDED) { |
1192 | xhci_dbg(xhci, "resume root hub\n"); | 1192 | xhci_dbg(xhci, "resume root hub\n"); |
1193 | usb_hcd_resume_root_hub(hcd); | 1193 | usb_hcd_resume_root_hub(hcd); |
1194 | } | 1194 | } |
@@ -1710,8 +1710,7 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, | |||
1710 | /* Others already handled above */ | 1710 | /* Others already handled above */ |
1711 | break; | 1711 | break; |
1712 | } | 1712 | } |
1713 | dev_dbg(&td->urb->dev->dev, | 1713 | xhci_dbg(xhci, "ep %#x - asked for %d bytes, " |
1714 | "ep %#x - asked for %d bytes, " | ||
1715 | "%d bytes untransferred\n", | 1714 | "%d bytes untransferred\n", |
1716 | td->urb->ep->desc.bEndpointAddress, | 1715 | td->urb->ep->desc.bEndpointAddress, |
1717 | td->urb->transfer_buffer_length, | 1716 | td->urb->transfer_buffer_length, |
@@ -2369,12 +2368,13 @@ static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb) | |||
2369 | 2368 | ||
2370 | /* Scatter gather list entries may cross 64KB boundaries */ | 2369 | /* Scatter gather list entries may cross 64KB boundaries */ |
2371 | running_total = TRB_MAX_BUFF_SIZE - | 2370 | running_total = TRB_MAX_BUFF_SIZE - |
2372 | (sg_dma_address(sg) & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2371 | (sg_dma_address(sg) & (TRB_MAX_BUFF_SIZE - 1)); |
2372 | running_total &= TRB_MAX_BUFF_SIZE - 1; | ||
2373 | if (running_total != 0) | 2373 | if (running_total != 0) |
2374 | num_trbs++; | 2374 | num_trbs++; |
2375 | 2375 | ||
2376 | /* How many more 64KB chunks to transfer, how many more TRBs? */ | 2376 | /* How many more 64KB chunks to transfer, how many more TRBs? */ |
2377 | while (running_total < sg_dma_len(sg)) { | 2377 | while (running_total < sg_dma_len(sg) && running_total < temp) { |
2378 | num_trbs++; | 2378 | num_trbs++; |
2379 | running_total += TRB_MAX_BUFF_SIZE; | 2379 | running_total += TRB_MAX_BUFF_SIZE; |
2380 | } | 2380 | } |
@@ -2389,7 +2389,8 @@ static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb) | |||
2389 | } | 2389 | } |
2390 | xhci_dbg(xhci, "\n"); | 2390 | xhci_dbg(xhci, "\n"); |
2391 | if (!in_interrupt()) | 2391 | if (!in_interrupt()) |
2392 | dev_dbg(&urb->dev->dev, "ep %#x - urb len = %d, sglist used, num_trbs = %d\n", | 2392 | xhci_dbg(xhci, "ep %#x - urb len = %d, sglist used, " |
2393 | "num_trbs = %d\n", | ||
2393 | urb->ep->desc.bEndpointAddress, | 2394 | urb->ep->desc.bEndpointAddress, |
2394 | urb->transfer_buffer_length, | 2395 | urb->transfer_buffer_length, |
2395 | num_trbs); | 2396 | num_trbs); |
@@ -2399,11 +2400,11 @@ static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb) | |||
2399 | static void check_trb_math(struct urb *urb, int num_trbs, int running_total) | 2400 | static void check_trb_math(struct urb *urb, int num_trbs, int running_total) |
2400 | { | 2401 | { |
2401 | if (num_trbs != 0) | 2402 | if (num_trbs != 0) |
2402 | dev_dbg(&urb->dev->dev, "%s - ep %#x - Miscalculated number of " | 2403 | dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated number of " |
2403 | "TRBs, %d left\n", __func__, | 2404 | "TRBs, %d left\n", __func__, |
2404 | urb->ep->desc.bEndpointAddress, num_trbs); | 2405 | urb->ep->desc.bEndpointAddress, num_trbs); |
2405 | if (running_total != urb->transfer_buffer_length) | 2406 | if (running_total != urb->transfer_buffer_length) |
2406 | dev_dbg(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, " | 2407 | dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, " |
2407 | "queued %#x (%d), asked for %#x (%d)\n", | 2408 | "queued %#x (%d), asked for %#x (%d)\n", |
2408 | __func__, | 2409 | __func__, |
2409 | urb->ep->desc.bEndpointAddress, | 2410 | urb->ep->desc.bEndpointAddress, |
@@ -2414,14 +2415,17 @@ static void check_trb_math(struct urb *urb, int num_trbs, int running_total) | |||
2414 | 2415 | ||
2415 | static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id, | 2416 | static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id, |
2416 | unsigned int ep_index, unsigned int stream_id, int start_cycle, | 2417 | unsigned int ep_index, unsigned int stream_id, int start_cycle, |
2417 | struct xhci_generic_trb *start_trb, struct xhci_td *td) | 2418 | struct xhci_generic_trb *start_trb) |
2418 | { | 2419 | { |
2419 | /* | 2420 | /* |
2420 | * Pass all the TRBs to the hardware at once and make sure this write | 2421 | * Pass all the TRBs to the hardware at once and make sure this write |
2421 | * isn't reordered. | 2422 | * isn't reordered. |
2422 | */ | 2423 | */ |
2423 | wmb(); | 2424 | wmb(); |
2424 | start_trb->field[3] |= start_cycle; | 2425 | if (start_cycle) |
2426 | start_trb->field[3] |= start_cycle; | ||
2427 | else | ||
2428 | start_trb->field[3] &= ~0x1; | ||
2425 | xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id); | 2429 | xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id); |
2426 | } | 2430 | } |
2427 | 2431 | ||
@@ -2449,7 +2453,7 @@ int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2449 | * to set the polling interval (once the API is added). | 2453 | * to set the polling interval (once the API is added). |
2450 | */ | 2454 | */ |
2451 | if (xhci_interval != ep_interval) { | 2455 | if (xhci_interval != ep_interval) { |
2452 | if (!printk_ratelimit()) | 2456 | if (printk_ratelimit()) |
2453 | dev_dbg(&urb->dev->dev, "Driver uses different interval" | 2457 | dev_dbg(&urb->dev->dev, "Driver uses different interval" |
2454 | " (%d microframe%s) than xHCI " | 2458 | " (%d microframe%s) than xHCI " |
2455 | "(%d microframe%s)\n", | 2459 | "(%d microframe%s)\n", |
@@ -2535,8 +2539,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2535 | sg = urb->sg; | 2539 | sg = urb->sg; |
2536 | addr = (u64) sg_dma_address(sg); | 2540 | addr = (u64) sg_dma_address(sg); |
2537 | this_sg_len = sg_dma_len(sg); | 2541 | this_sg_len = sg_dma_len(sg); |
2538 | trb_buff_len = TRB_MAX_BUFF_SIZE - | 2542 | trb_buff_len = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1)); |
2539 | (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | ||
2540 | trb_buff_len = min_t(int, trb_buff_len, this_sg_len); | 2543 | trb_buff_len = min_t(int, trb_buff_len, this_sg_len); |
2541 | if (trb_buff_len > urb->transfer_buffer_length) | 2544 | if (trb_buff_len > urb->transfer_buffer_length) |
2542 | trb_buff_len = urb->transfer_buffer_length; | 2545 | trb_buff_len = urb->transfer_buffer_length; |
@@ -2551,9 +2554,11 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2551 | u32 remainder = 0; | 2554 | u32 remainder = 0; |
2552 | 2555 | ||
2553 | /* Don't change the cycle bit of the first TRB until later */ | 2556 | /* Don't change the cycle bit of the first TRB until later */ |
2554 | if (first_trb) | 2557 | if (first_trb) { |
2555 | first_trb = false; | 2558 | first_trb = false; |
2556 | else | 2559 | if (start_cycle == 0) |
2560 | field |= 0x1; | ||
2561 | } else | ||
2557 | field |= ep_ring->cycle_state; | 2562 | field |= ep_ring->cycle_state; |
2558 | 2563 | ||
2559 | /* Chain all the TRBs together; clear the chain bit in the last | 2564 | /* Chain all the TRBs together; clear the chain bit in the last |
@@ -2572,7 +2577,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2572 | (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), | 2577 | (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), |
2573 | (unsigned int) addr + trb_buff_len); | 2578 | (unsigned int) addr + trb_buff_len); |
2574 | if (TRB_MAX_BUFF_SIZE - | 2579 | if (TRB_MAX_BUFF_SIZE - |
2575 | (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)) < trb_buff_len) { | 2580 | (addr & (TRB_MAX_BUFF_SIZE - 1)) < trb_buff_len) { |
2576 | xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n"); | 2581 | xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n"); |
2577 | xhci_dbg(xhci, "Next boundary at %#x, end dma = %#x\n", | 2582 | xhci_dbg(xhci, "Next boundary at %#x, end dma = %#x\n", |
2578 | (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), | 2583 | (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), |
@@ -2616,7 +2621,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2616 | } | 2621 | } |
2617 | 2622 | ||
2618 | trb_buff_len = TRB_MAX_BUFF_SIZE - | 2623 | trb_buff_len = TRB_MAX_BUFF_SIZE - |
2619 | (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2624 | (addr & (TRB_MAX_BUFF_SIZE - 1)); |
2620 | trb_buff_len = min_t(int, trb_buff_len, this_sg_len); | 2625 | trb_buff_len = min_t(int, trb_buff_len, this_sg_len); |
2621 | if (running_total + trb_buff_len > urb->transfer_buffer_length) | 2626 | if (running_total + trb_buff_len > urb->transfer_buffer_length) |
2622 | trb_buff_len = | 2627 | trb_buff_len = |
@@ -2625,7 +2630,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2625 | 2630 | ||
2626 | check_trb_math(urb, num_trbs, running_total); | 2631 | check_trb_math(urb, num_trbs, running_total); |
2627 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, | 2632 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, |
2628 | start_cycle, start_trb, td); | 2633 | start_cycle, start_trb); |
2629 | return 0; | 2634 | return 0; |
2630 | } | 2635 | } |
2631 | 2636 | ||
@@ -2656,7 +2661,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2656 | num_trbs = 0; | 2661 | num_trbs = 0; |
2657 | /* How much data is (potentially) left before the 64KB boundary? */ | 2662 | /* How much data is (potentially) left before the 64KB boundary? */ |
2658 | running_total = TRB_MAX_BUFF_SIZE - | 2663 | running_total = TRB_MAX_BUFF_SIZE - |
2659 | (urb->transfer_dma & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2664 | (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1)); |
2665 | running_total &= TRB_MAX_BUFF_SIZE - 1; | ||
2660 | 2666 | ||
2661 | /* If there's some data on this 64KB chunk, or we have to send a | 2667 | /* If there's some data on this 64KB chunk, or we have to send a |
2662 | * zero-length transfer, we need at least one TRB | 2668 | * zero-length transfer, we need at least one TRB |
@@ -2671,7 +2677,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2671 | /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */ | 2677 | /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */ |
2672 | 2678 | ||
2673 | if (!in_interrupt()) | 2679 | if (!in_interrupt()) |
2674 | dev_dbg(&urb->dev->dev, "ep %#x - urb len = %#x (%d), addr = %#llx, num_trbs = %d\n", | 2680 | xhci_dbg(xhci, "ep %#x - urb len = %#x (%d), " |
2681 | "addr = %#llx, num_trbs = %d\n", | ||
2675 | urb->ep->desc.bEndpointAddress, | 2682 | urb->ep->desc.bEndpointAddress, |
2676 | urb->transfer_buffer_length, | 2683 | urb->transfer_buffer_length, |
2677 | urb->transfer_buffer_length, | 2684 | urb->transfer_buffer_length, |
@@ -2699,8 +2706,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2699 | /* How much data is in the first TRB? */ | 2706 | /* How much data is in the first TRB? */ |
2700 | addr = (u64) urb->transfer_dma; | 2707 | addr = (u64) urb->transfer_dma; |
2701 | trb_buff_len = TRB_MAX_BUFF_SIZE - | 2708 | trb_buff_len = TRB_MAX_BUFF_SIZE - |
2702 | (urb->transfer_dma & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2709 | (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1)); |
2703 | if (urb->transfer_buffer_length < trb_buff_len) | 2710 | if (trb_buff_len > urb->transfer_buffer_length) |
2704 | trb_buff_len = urb->transfer_buffer_length; | 2711 | trb_buff_len = urb->transfer_buffer_length; |
2705 | 2712 | ||
2706 | first_trb = true; | 2713 | first_trb = true; |
@@ -2711,9 +2718,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2711 | field = 0; | 2718 | field = 0; |
2712 | 2719 | ||
2713 | /* Don't change the cycle bit of the first TRB until later */ | 2720 | /* Don't change the cycle bit of the first TRB until later */ |
2714 | if (first_trb) | 2721 | if (first_trb) { |
2715 | first_trb = false; | 2722 | first_trb = false; |
2716 | else | 2723 | if (start_cycle == 0) |
2724 | field |= 0x1; | ||
2725 | } else | ||
2717 | field |= ep_ring->cycle_state; | 2726 | field |= ep_ring->cycle_state; |
2718 | 2727 | ||
2719 | /* Chain all the TRBs together; clear the chain bit in the last | 2728 | /* Chain all the TRBs together; clear the chain bit in the last |
@@ -2757,7 +2766,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2757 | 2766 | ||
2758 | check_trb_math(urb, num_trbs, running_total); | 2767 | check_trb_math(urb, num_trbs, running_total); |
2759 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, | 2768 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, |
2760 | start_cycle, start_trb, td); | 2769 | start_cycle, start_trb); |
2761 | return 0; | 2770 | return 0; |
2762 | } | 2771 | } |
2763 | 2772 | ||
@@ -2818,13 +2827,17 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2818 | /* Queue setup TRB - see section 6.4.1.2.1 */ | 2827 | /* Queue setup TRB - see section 6.4.1.2.1 */ |
2819 | /* FIXME better way to translate setup_packet into two u32 fields? */ | 2828 | /* FIXME better way to translate setup_packet into two u32 fields? */ |
2820 | setup = (struct usb_ctrlrequest *) urb->setup_packet; | 2829 | setup = (struct usb_ctrlrequest *) urb->setup_packet; |
2830 | field = 0; | ||
2831 | field |= TRB_IDT | TRB_TYPE(TRB_SETUP); | ||
2832 | if (start_cycle == 0) | ||
2833 | field |= 0x1; | ||
2821 | queue_trb(xhci, ep_ring, false, true, | 2834 | queue_trb(xhci, ep_ring, false, true, |
2822 | /* FIXME endianness is probably going to bite my ass here. */ | 2835 | /* FIXME endianness is probably going to bite my ass here. */ |
2823 | setup->bRequestType | setup->bRequest << 8 | setup->wValue << 16, | 2836 | setup->bRequestType | setup->bRequest << 8 | setup->wValue << 16, |
2824 | setup->wIndex | setup->wLength << 16, | 2837 | setup->wIndex | setup->wLength << 16, |
2825 | TRB_LEN(8) | TRB_INTR_TARGET(0), | 2838 | TRB_LEN(8) | TRB_INTR_TARGET(0), |
2826 | /* Immediate data in pointer */ | 2839 | /* Immediate data in pointer */ |
2827 | TRB_IDT | TRB_TYPE(TRB_SETUP)); | 2840 | field); |
2828 | 2841 | ||
2829 | /* If there's data, queue data TRBs */ | 2842 | /* If there's data, queue data TRBs */ |
2830 | field = 0; | 2843 | field = 0; |
@@ -2859,7 +2872,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2859 | field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state); | 2872 | field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state); |
2860 | 2873 | ||
2861 | giveback_first_trb(xhci, slot_id, ep_index, 0, | 2874 | giveback_first_trb(xhci, slot_id, ep_index, 0, |
2862 | start_cycle, start_trb, td); | 2875 | start_cycle, start_trb); |
2863 | return 0; | 2876 | return 0; |
2864 | } | 2877 | } |
2865 | 2878 | ||
@@ -2872,8 +2885,8 @@ static int count_isoc_trbs_needed(struct xhci_hcd *xhci, | |||
2872 | addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset); | 2885 | addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset); |
2873 | td_len = urb->iso_frame_desc[i].length; | 2886 | td_len = urb->iso_frame_desc[i].length; |
2874 | 2887 | ||
2875 | running_total = TRB_MAX_BUFF_SIZE - | 2888 | running_total = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1)); |
2876 | (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); | 2889 | running_total &= TRB_MAX_BUFF_SIZE - 1; |
2877 | if (running_total != 0) | 2890 | if (running_total != 0) |
2878 | num_trbs++; | 2891 | num_trbs++; |
2879 | 2892 | ||
@@ -2900,6 +2913,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2900 | int running_total, trb_buff_len, td_len, td_remain_len, ret; | 2913 | int running_total, trb_buff_len, td_len, td_remain_len, ret; |
2901 | u64 start_addr, addr; | 2914 | u64 start_addr, addr; |
2902 | int i, j; | 2915 | int i, j; |
2916 | bool more_trbs_coming; | ||
2903 | 2917 | ||
2904 | ep_ring = xhci->devs[slot_id]->eps[ep_index].ring; | 2918 | ep_ring = xhci->devs[slot_id]->eps[ep_index].ring; |
2905 | 2919 | ||
@@ -2910,7 +2924,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2910 | } | 2924 | } |
2911 | 2925 | ||
2912 | if (!in_interrupt()) | 2926 | if (!in_interrupt()) |
2913 | dev_dbg(&urb->dev->dev, "ep %#x - urb len = %#x (%d)," | 2927 | xhci_dbg(xhci, "ep %#x - urb len = %#x (%d)," |
2914 | " addr = %#llx, num_tds = %d\n", | 2928 | " addr = %#llx, num_tds = %d\n", |
2915 | urb->ep->desc.bEndpointAddress, | 2929 | urb->ep->desc.bEndpointAddress, |
2916 | urb->transfer_buffer_length, | 2930 | urb->transfer_buffer_length, |
@@ -2950,7 +2964,10 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2950 | field |= TRB_TYPE(TRB_ISOC); | 2964 | field |= TRB_TYPE(TRB_ISOC); |
2951 | /* Assume URB_ISO_ASAP is set */ | 2965 | /* Assume URB_ISO_ASAP is set */ |
2952 | field |= TRB_SIA; | 2966 | field |= TRB_SIA; |
2953 | if (i > 0) | 2967 | if (i == 0) { |
2968 | if (start_cycle == 0) | ||
2969 | field |= 0x1; | ||
2970 | } else | ||
2954 | field |= ep_ring->cycle_state; | 2971 | field |= ep_ring->cycle_state; |
2955 | first_trb = false; | 2972 | first_trb = false; |
2956 | } else { | 2973 | } else { |
@@ -2965,9 +2982,11 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2965 | */ | 2982 | */ |
2966 | if (j < trbs_per_td - 1) { | 2983 | if (j < trbs_per_td - 1) { |
2967 | field |= TRB_CHAIN; | 2984 | field |= TRB_CHAIN; |
2985 | more_trbs_coming = true; | ||
2968 | } else { | 2986 | } else { |
2969 | td->last_trb = ep_ring->enqueue; | 2987 | td->last_trb = ep_ring->enqueue; |
2970 | field |= TRB_IOC; | 2988 | field |= TRB_IOC; |
2989 | more_trbs_coming = false; | ||
2971 | } | 2990 | } |
2972 | 2991 | ||
2973 | /* Calculate TRB length */ | 2992 | /* Calculate TRB length */ |
@@ -2980,7 +2999,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2980 | length_field = TRB_LEN(trb_buff_len) | | 2999 | length_field = TRB_LEN(trb_buff_len) | |
2981 | remainder | | 3000 | remainder | |
2982 | TRB_INTR_TARGET(0); | 3001 | TRB_INTR_TARGET(0); |
2983 | queue_trb(xhci, ep_ring, false, false, | 3002 | queue_trb(xhci, ep_ring, false, more_trbs_coming, |
2984 | lower_32_bits(addr), | 3003 | lower_32_bits(addr), |
2985 | upper_32_bits(addr), | 3004 | upper_32_bits(addr), |
2986 | length_field, | 3005 | length_field, |
@@ -3003,10 +3022,8 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3003 | } | 3022 | } |
3004 | } | 3023 | } |
3005 | 3024 | ||
3006 | wmb(); | 3025 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, |
3007 | start_trb->field[3] |= start_cycle; | 3026 | start_cycle, start_trb); |
3008 | |||
3009 | xhci_ring_ep_doorbell(xhci, slot_id, ep_index, urb->stream_id); | ||
3010 | return 0; | 3027 | return 0; |
3011 | } | 3028 | } |
3012 | 3029 | ||
@@ -3064,7 +3081,7 @@ int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3064 | * to set the polling interval (once the API is added). | 3081 | * to set the polling interval (once the API is added). |
3065 | */ | 3082 | */ |
3066 | if (xhci_interval != ep_interval) { | 3083 | if (xhci_interval != ep_interval) { |
3067 | if (!printk_ratelimit()) | 3084 | if (printk_ratelimit()) |
3068 | dev_dbg(&urb->dev->dev, "Driver uses different interval" | 3085 | dev_dbg(&urb->dev->dev, "Driver uses different interval" |
3069 | " (%d microframe%s) than xHCI " | 3086 | " (%d microframe%s) than xHCI " |
3070 | "(%d microframe%s)\n", | 3087 | "(%d microframe%s)\n", |