diff options
Diffstat (limited to 'drivers/usb/host/xhci-ring.c')
-rw-r--r-- | drivers/usb/host/xhci-ring.c | 68 |
1 files changed, 54 insertions, 14 deletions
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 6a72d2022b45..a9379b3bebaf 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
@@ -675,7 +675,8 @@ static void handle_reset_ep_completion(struct xhci_hcd *xhci, | |||
675 | if (xhci->quirks & XHCI_RESET_EP_QUIRK) { | 675 | if (xhci->quirks & XHCI_RESET_EP_QUIRK) { |
676 | xhci_dbg(xhci, "Queueing configure endpoint command\n"); | 676 | xhci_dbg(xhci, "Queueing configure endpoint command\n"); |
677 | xhci_queue_configure_endpoint(xhci, | 677 | xhci_queue_configure_endpoint(xhci, |
678 | xhci->devs[slot_id]->in_ctx->dma, slot_id); | 678 | xhci->devs[slot_id]->in_ctx->dma, slot_id, |
679 | false); | ||
679 | xhci_ring_cmd_db(xhci); | 680 | xhci_ring_cmd_db(xhci); |
680 | } else { | 681 | } else { |
681 | /* Clear our internal halted state and restart the ring */ | 682 | /* Clear our internal halted state and restart the ring */ |
@@ -691,6 +692,7 @@ static void handle_cmd_completion(struct xhci_hcd *xhci, | |||
691 | u64 cmd_dma; | 692 | u64 cmd_dma; |
692 | dma_addr_t cmd_dequeue_dma; | 693 | dma_addr_t cmd_dequeue_dma; |
693 | struct xhci_input_control_ctx *ctrl_ctx; | 694 | struct xhci_input_control_ctx *ctrl_ctx; |
695 | struct xhci_virt_device *virt_dev; | ||
694 | unsigned int ep_index; | 696 | unsigned int ep_index; |
695 | struct xhci_ring *ep_ring; | 697 | struct xhci_ring *ep_ring; |
696 | unsigned int ep_state; | 698 | unsigned int ep_state; |
@@ -721,6 +723,25 @@ static void handle_cmd_completion(struct xhci_hcd *xhci, | |||
721 | xhci_free_virt_device(xhci, slot_id); | 723 | xhci_free_virt_device(xhci, slot_id); |
722 | break; | 724 | break; |
723 | case TRB_TYPE(TRB_CONFIG_EP): | 725 | case TRB_TYPE(TRB_CONFIG_EP): |
726 | virt_dev = xhci->devs[slot_id]; | ||
727 | /* Check to see if a command in the device's command queue | ||
728 | * matches this one. Signal the completion or free the command. | ||
729 | */ | ||
730 | if (!list_empty(&virt_dev->cmd_list)) { | ||
731 | struct xhci_command *command; | ||
732 | command = list_entry(virt_dev->cmd_list.next, | ||
733 | struct xhci_command, cmd_list); | ||
734 | if (xhci->cmd_ring->dequeue == command->command_trb) { | ||
735 | command->status = | ||
736 | GET_COMP_CODE(event->status); | ||
737 | list_del(&command->cmd_list); | ||
738 | if (command->completion) | ||
739 | complete(command->completion); | ||
740 | else | ||
741 | xhci_free_command(xhci, command); | ||
742 | } | ||
743 | break; | ||
744 | } | ||
724 | /* | 745 | /* |
725 | * Configure endpoint commands can come from the USB core | 746 | * Configure endpoint commands can come from the USB core |
726 | * configuration or alt setting changes, or because the HW | 747 | * configuration or alt setting changes, or because the HW |
@@ -729,7 +750,7 @@ static void handle_cmd_completion(struct xhci_hcd *xhci, | |||
729 | * not waiting on the configure endpoint command. | 750 | * not waiting on the configure endpoint command. |
730 | */ | 751 | */ |
731 | ctrl_ctx = xhci_get_input_control_ctx(xhci, | 752 | ctrl_ctx = xhci_get_input_control_ctx(xhci, |
732 | xhci->devs[slot_id]->in_ctx); | 753 | virt_dev->in_ctx); |
733 | /* Input ctx add_flags are the endpoint index plus one */ | 754 | /* Input ctx add_flags are the endpoint index plus one */ |
734 | ep_index = xhci_last_valid_endpoint(ctrl_ctx->add_flags) - 1; | 755 | ep_index = xhci_last_valid_endpoint(ctrl_ctx->add_flags) - 1; |
735 | ep_ring = xhci->devs[slot_id]->eps[ep_index].ring; | 756 | ep_ring = xhci->devs[slot_id]->eps[ep_index].ring; |
@@ -1858,12 +1879,27 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
1858 | 1879 | ||
1859 | /**** Command Ring Operations ****/ | 1880 | /**** Command Ring Operations ****/ |
1860 | 1881 | ||
1861 | /* Generic function for queueing a command TRB on the command ring */ | 1882 | /* Generic function for queueing a command TRB on the command ring. |
1862 | static int queue_command(struct xhci_hcd *xhci, u32 field1, u32 field2, u32 field3, u32 field4) | 1883 | * Check to make sure there's room on the command ring for one command TRB. |
1884 | * Also check that there's room reserved for commands that must not fail. | ||
1885 | * If this is a command that must not fail, meaning command_must_succeed = TRUE, | ||
1886 | * then only check for the number of reserved spots. | ||
1887 | * Don't decrement xhci->cmd_ring_reserved_trbs after we've queued the TRB | ||
1888 | * because the command event handler may want to resubmit a failed command. | ||
1889 | */ | ||
1890 | static int queue_command(struct xhci_hcd *xhci, u32 field1, u32 field2, | ||
1891 | u32 field3, u32 field4, bool command_must_succeed) | ||
1863 | { | 1892 | { |
1864 | if (!room_on_ring(xhci, xhci->cmd_ring, 1)) { | 1893 | int reserved_trbs = xhci->cmd_ring_reserved_trbs; |
1894 | if (!command_must_succeed) | ||
1895 | reserved_trbs++; | ||
1896 | |||
1897 | if (!room_on_ring(xhci, xhci->cmd_ring, reserved_trbs)) { | ||
1865 | if (!in_interrupt()) | 1898 | if (!in_interrupt()) |
1866 | xhci_err(xhci, "ERR: No room for command on command ring\n"); | 1899 | xhci_err(xhci, "ERR: No room for command on command ring\n"); |
1900 | if (command_must_succeed) | ||
1901 | xhci_err(xhci, "ERR: Reserved TRB counting for " | ||
1902 | "unfailable commands failed.\n"); | ||
1867 | return -ENOMEM; | 1903 | return -ENOMEM; |
1868 | } | 1904 | } |
1869 | queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3, | 1905 | queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3, |
@@ -1874,7 +1910,7 @@ static int queue_command(struct xhci_hcd *xhci, u32 field1, u32 field2, u32 fiel | |||
1874 | /* Queue a no-op command on the command ring */ | 1910 | /* Queue a no-op command on the command ring */ |
1875 | static int queue_cmd_noop(struct xhci_hcd *xhci) | 1911 | static int queue_cmd_noop(struct xhci_hcd *xhci) |
1876 | { | 1912 | { |
1877 | return queue_command(xhci, 0, 0, 0, TRB_TYPE(TRB_CMD_NOOP)); | 1913 | return queue_command(xhci, 0, 0, 0, TRB_TYPE(TRB_CMD_NOOP), false); |
1878 | } | 1914 | } |
1879 | 1915 | ||
1880 | /* | 1916 | /* |
@@ -1893,7 +1929,7 @@ void *xhci_setup_one_noop(struct xhci_hcd *xhci) | |||
1893 | int xhci_queue_slot_control(struct xhci_hcd *xhci, u32 trb_type, u32 slot_id) | 1929 | int xhci_queue_slot_control(struct xhci_hcd *xhci, u32 trb_type, u32 slot_id) |
1894 | { | 1930 | { |
1895 | return queue_command(xhci, 0, 0, 0, | 1931 | return queue_command(xhci, 0, 0, 0, |
1896 | TRB_TYPE(trb_type) | SLOT_ID_FOR_TRB(slot_id)); | 1932 | TRB_TYPE(trb_type) | SLOT_ID_FOR_TRB(slot_id), false); |
1897 | } | 1933 | } |
1898 | 1934 | ||
1899 | /* Queue an address device command TRB */ | 1935 | /* Queue an address device command TRB */ |
@@ -1902,16 +1938,18 @@ int xhci_queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, | |||
1902 | { | 1938 | { |
1903 | return queue_command(xhci, lower_32_bits(in_ctx_ptr), | 1939 | return queue_command(xhci, lower_32_bits(in_ctx_ptr), |
1904 | upper_32_bits(in_ctx_ptr), 0, | 1940 | upper_32_bits(in_ctx_ptr), 0, |
1905 | TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id)); | 1941 | TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id), |
1942 | false); | ||
1906 | } | 1943 | } |
1907 | 1944 | ||
1908 | /* Queue a configure endpoint command TRB */ | 1945 | /* Queue a configure endpoint command TRB */ |
1909 | int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, | 1946 | int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, |
1910 | u32 slot_id) | 1947 | u32 slot_id, bool command_must_succeed) |
1911 | { | 1948 | { |
1912 | return queue_command(xhci, lower_32_bits(in_ctx_ptr), | 1949 | return queue_command(xhci, lower_32_bits(in_ctx_ptr), |
1913 | upper_32_bits(in_ctx_ptr), 0, | 1950 | upper_32_bits(in_ctx_ptr), 0, |
1914 | TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id)); | 1951 | TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id), |
1952 | command_must_succeed); | ||
1915 | } | 1953 | } |
1916 | 1954 | ||
1917 | /* Queue an evaluate context command TRB */ | 1955 | /* Queue an evaluate context command TRB */ |
@@ -1920,7 +1958,8 @@ int xhci_queue_evaluate_context(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, | |||
1920 | { | 1958 | { |
1921 | return queue_command(xhci, lower_32_bits(in_ctx_ptr), | 1959 | return queue_command(xhci, lower_32_bits(in_ctx_ptr), |
1922 | upper_32_bits(in_ctx_ptr), 0, | 1960 | upper_32_bits(in_ctx_ptr), 0, |
1923 | TRB_TYPE(TRB_EVAL_CONTEXT) | SLOT_ID_FOR_TRB(slot_id)); | 1961 | TRB_TYPE(TRB_EVAL_CONTEXT) | SLOT_ID_FOR_TRB(slot_id), |
1962 | false); | ||
1924 | } | 1963 | } |
1925 | 1964 | ||
1926 | int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, int slot_id, | 1965 | int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, int slot_id, |
@@ -1931,7 +1970,7 @@ int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, int slot_id, | |||
1931 | u32 type = TRB_TYPE(TRB_STOP_RING); | 1970 | u32 type = TRB_TYPE(TRB_STOP_RING); |
1932 | 1971 | ||
1933 | return queue_command(xhci, 0, 0, 0, | 1972 | return queue_command(xhci, 0, 0, 0, |
1934 | trb_slot_id | trb_ep_index | type); | 1973 | trb_slot_id | trb_ep_index | type, false); |
1935 | } | 1974 | } |
1936 | 1975 | ||
1937 | /* Set Transfer Ring Dequeue Pointer command. | 1976 | /* Set Transfer Ring Dequeue Pointer command. |
@@ -1955,7 +1994,7 @@ static int queue_set_tr_deq(struct xhci_hcd *xhci, int slot_id, | |||
1955 | } | 1994 | } |
1956 | return queue_command(xhci, lower_32_bits(addr) | cycle_state, | 1995 | return queue_command(xhci, lower_32_bits(addr) | cycle_state, |
1957 | upper_32_bits(addr), 0, | 1996 | upper_32_bits(addr), 0, |
1958 | trb_slot_id | trb_ep_index | type); | 1997 | trb_slot_id | trb_ep_index | type, false); |
1959 | } | 1998 | } |
1960 | 1999 | ||
1961 | int xhci_queue_reset_ep(struct xhci_hcd *xhci, int slot_id, | 2000 | int xhci_queue_reset_ep(struct xhci_hcd *xhci, int slot_id, |
@@ -1965,5 +2004,6 @@ int xhci_queue_reset_ep(struct xhci_hcd *xhci, int slot_id, | |||
1965 | u32 trb_ep_index = EP_ID_FOR_TRB(ep_index); | 2004 | u32 trb_ep_index = EP_ID_FOR_TRB(ep_index); |
1966 | u32 type = TRB_TYPE(TRB_RESET_EP); | 2005 | u32 type = TRB_TYPE(TRB_RESET_EP); |
1967 | 2006 | ||
1968 | return queue_command(xhci, 0, 0, 0, trb_slot_id | trb_ep_index | type); | 2007 | return queue_command(xhci, 0, 0, 0, trb_slot_id | trb_ep_index | type, |
2008 | false); | ||
1969 | } | 2009 | } |