diff options
Diffstat (limited to 'drivers/usb/host/uhci-hcd.c')
-rw-r--r-- | drivers/usb/host/uhci-hcd.c | 773 |
1 files changed, 429 insertions, 344 deletions
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c index 49bd83ee0c75..0d5d2545bf07 100644 --- a/drivers/usb/host/uhci-hcd.c +++ b/drivers/usb/host/uhci-hcd.c | |||
@@ -13,18 +13,13 @@ | |||
13 | * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface | 13 | * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface |
14 | * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). | 14 | * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). |
15 | * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) | 15 | * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) |
16 | * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu | 16 | * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu |
17 | * | 17 | * |
18 | * Intel documents this fairly well, and as far as I know there | 18 | * Intel documents this fairly well, and as far as I know there |
19 | * are no royalties or anything like that, but even so there are | 19 | * are no royalties or anything like that, but even so there are |
20 | * people who decided that they want to do the same thing in a | 20 | * people who decided that they want to do the same thing in a |
21 | * completely different way. | 21 | * completely different way. |
22 | * | 22 | * |
23 | * WARNING! The USB documentation is downright evil. Most of it | ||
24 | * is just crap, written by a committee. You're better off ignoring | ||
25 | * most of it, the important stuff is: | ||
26 | * - the low-level protocol (fairly simple but lots of small details) | ||
27 | * - working around the horridness of the rest | ||
28 | */ | 23 | */ |
29 | 24 | ||
30 | #include <linux/config.h> | 25 | #include <linux/config.h> |
@@ -64,7 +59,7 @@ | |||
64 | /* | 59 | /* |
65 | * Version Information | 60 | * Version Information |
66 | */ | 61 | */ |
67 | #define DRIVER_VERSION "v2.2" | 62 | #define DRIVER_VERSION "v2.3" |
68 | #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ | 63 | #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ |
69 | Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ | 64 | Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ |
70 | Alan Stern" | 65 | Alan Stern" |
@@ -89,8 +84,9 @@ static char *errbuf; | |||
89 | 84 | ||
90 | static kmem_cache_t *uhci_up_cachep; /* urb_priv */ | 85 | static kmem_cache_t *uhci_up_cachep; /* urb_priv */ |
91 | 86 | ||
87 | static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state); | ||
88 | static void wakeup_rh(struct uhci_hcd *uhci); | ||
92 | static void uhci_get_current_frame_number(struct uhci_hcd *uhci); | 89 | static void uhci_get_current_frame_number(struct uhci_hcd *uhci); |
93 | static void hc_state_transitions(struct uhci_hcd *uhci); | ||
94 | 90 | ||
95 | /* If a transfer is still active after this much time, turn off FSBR */ | 91 | /* If a transfer is still active after this much time, turn off FSBR */ |
96 | #define IDLE_TIMEOUT msecs_to_jiffies(50) | 92 | #define IDLE_TIMEOUT msecs_to_jiffies(50) |
@@ -101,308 +97,352 @@ static void hc_state_transitions(struct uhci_hcd *uhci); | |||
101 | /* to make sure it doesn't hog all of the bandwidth */ | 97 | /* to make sure it doesn't hog all of the bandwidth */ |
102 | #define DEPTH_INTERVAL 5 | 98 | #define DEPTH_INTERVAL 5 |
103 | 99 | ||
100 | static inline void restart_timer(struct uhci_hcd *uhci) | ||
101 | { | ||
102 | mod_timer(&uhci->stall_timer, jiffies + msecs_to_jiffies(100)); | ||
103 | } | ||
104 | |||
104 | #include "uhci-hub.c" | 105 | #include "uhci-hub.c" |
105 | #include "uhci-debug.c" | 106 | #include "uhci-debug.c" |
106 | #include "uhci-q.c" | 107 | #include "uhci-q.c" |
107 | 108 | ||
108 | static int init_stall_timer(struct usb_hcd *hcd); | 109 | /* |
109 | 110 | * Make sure the controller is completely inactive, unable to | |
110 | static void stall_callback(unsigned long ptr) | 111 | * generate interrupts or do DMA. |
112 | */ | ||
113 | static void reset_hc(struct uhci_hcd *uhci) | ||
111 | { | 114 | { |
112 | struct usb_hcd *hcd = (struct usb_hcd *)ptr; | 115 | int port; |
113 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | ||
114 | struct urb_priv *up; | ||
115 | unsigned long flags; | ||
116 | 116 | ||
117 | spin_lock_irqsave(&uhci->lock, flags); | 117 | /* Turn off PIRQ enable and SMI enable. (This also turns off the |
118 | uhci_scan_schedule(uhci, NULL); | 118 | * BIOS's USB Legacy Support.) Turn off all the R/WC bits too. |
119 | 119 | */ | |
120 | list_for_each_entry(up, &uhci->urb_list, urb_list) { | 120 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, |
121 | struct urb *u = up->urb; | 121 | USBLEGSUP_RWC); |
122 | |||
123 | spin_lock(&u->lock); | ||
124 | |||
125 | /* Check if the FSBR timed out */ | ||
126 | if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT)) | ||
127 | uhci_fsbr_timeout(uhci, u); | ||
128 | 122 | ||
129 | spin_unlock(&u->lock); | 123 | /* Reset the HC - this will force us to get a |
130 | } | 124 | * new notification of any already connected |
125 | * ports due to the virtual disconnect that it | ||
126 | * implies. | ||
127 | */ | ||
128 | outw(USBCMD_HCRESET, uhci->io_addr + USBCMD); | ||
129 | mb(); | ||
130 | udelay(5); | ||
131 | if (inw(uhci->io_addr + USBCMD) & USBCMD_HCRESET) | ||
132 | dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n"); | ||
131 | 133 | ||
132 | /* Really disable FSBR */ | 134 | /* Just to be safe, disable interrupt requests and |
133 | if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) { | 135 | * make sure the controller is stopped. |
134 | uhci->fsbrtimeout = 0; | 136 | */ |
135 | uhci->skel_term_qh->link = UHCI_PTR_TERM; | 137 | outw(0, uhci->io_addr + USBINTR); |
136 | } | 138 | outw(0, uhci->io_addr + USBCMD); |
137 | 139 | ||
138 | /* Poll for and perform state transitions */ | 140 | /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect |
139 | hc_state_transitions(uhci); | 141 | * bits in the port status and control registers. |
140 | if (unlikely(uhci->suspended_ports && uhci->state != UHCI_SUSPENDED)) | 142 | * We have to clear them by hand. |
141 | uhci_check_ports(uhci); | 143 | */ |
144 | for (port = 0; port < uhci->rh_numports; ++port) | ||
145 | outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); | ||
142 | 146 | ||
143 | init_stall_timer(hcd); | 147 | uhci->port_c_suspend = uhci->suspended_ports = |
144 | spin_unlock_irqrestore(&uhci->lock, flags); | 148 | uhci->resuming_ports = 0; |
149 | uhci->rh_state = UHCI_RH_RESET; | ||
150 | uhci->is_stopped = UHCI_IS_STOPPED; | ||
151 | uhci_to_hcd(uhci)->state = HC_STATE_HALT; | ||
152 | uhci_to_hcd(uhci)->poll_rh = 0; | ||
145 | } | 153 | } |
146 | 154 | ||
147 | static int init_stall_timer(struct usb_hcd *hcd) | 155 | /* |
156 | * Last rites for a defunct/nonfunctional controller | ||
157 | * or one we don't want to use any more. | ||
158 | */ | ||
159 | static void hc_died(struct uhci_hcd *uhci) | ||
148 | { | 160 | { |
149 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 161 | reset_hc(uhci); |
150 | 162 | uhci->hc_inaccessible = 1; | |
151 | init_timer(&uhci->stall_timer); | 163 | del_timer(&uhci->stall_timer); |
152 | uhci->stall_timer.function = stall_callback; | ||
153 | uhci->stall_timer.data = (unsigned long)hcd; | ||
154 | uhci->stall_timer.expires = jiffies + msecs_to_jiffies(100); | ||
155 | add_timer(&uhci->stall_timer); | ||
156 | |||
157 | return 0; | ||
158 | } | 164 | } |
159 | 165 | ||
160 | static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs) | 166 | /* |
167 | * Initialize a controller that was newly discovered or has just been | ||
168 | * resumed. In either case we can't be sure of its previous state. | ||
169 | */ | ||
170 | static void check_and_reset_hc(struct uhci_hcd *uhci) | ||
161 | { | 171 | { |
162 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 172 | u16 legsup; |
163 | unsigned long io_addr = uhci->io_addr; | 173 | unsigned int cmd, intr; |
164 | unsigned short status; | ||
165 | 174 | ||
166 | /* | 175 | /* |
167 | * Read the interrupt status, and write it back to clear the | 176 | * When restarting a suspended controller, we expect all the |
168 | * interrupt cause. Contrary to the UHCI specification, the | 177 | * settings to be the same as we left them: |
169 | * "HC Halted" status bit is persistent: it is RO, not R/WC. | 178 | * |
179 | * PIRQ and SMI disabled, no R/W bits set in USBLEGSUP; | ||
180 | * Controller is stopped and configured with EGSM set; | ||
181 | * No interrupts enabled except possibly Resume Detect. | ||
182 | * | ||
183 | * If any of these conditions are violated we do a complete reset. | ||
170 | */ | 184 | */ |
171 | status = inw(io_addr + USBSTS); | 185 | pci_read_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, &legsup); |
172 | if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ | 186 | if (legsup & ~(USBLEGSUP_RO | USBLEGSUP_RWC)) { |
173 | return IRQ_NONE; | 187 | dev_dbg(uhci_dev(uhci), "%s: legsup = 0x%04x\n", |
174 | outw(status, io_addr + USBSTS); /* Clear it */ | 188 | __FUNCTION__, legsup); |
175 | 189 | goto reset_needed; | |
176 | if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { | ||
177 | if (status & USBSTS_HSE) | ||
178 | dev_err(uhci_dev(uhci), "host system error, " | ||
179 | "PCI problems?\n"); | ||
180 | if (status & USBSTS_HCPE) | ||
181 | dev_err(uhci_dev(uhci), "host controller process " | ||
182 | "error, something bad happened!\n"); | ||
183 | if ((status & USBSTS_HCH) && uhci->state > 0) { | ||
184 | dev_err(uhci_dev(uhci), "host controller halted, " | ||
185 | "very bad!\n"); | ||
186 | /* FIXME: Reset the controller, fix the offending TD */ | ||
187 | } | ||
188 | } | 190 | } |
189 | 191 | ||
190 | if (status & USBSTS_RD) | 192 | cmd = inw(uhci->io_addr + USBCMD); |
191 | uhci->resume_detect = 1; | 193 | if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) { |
194 | dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n", | ||
195 | __FUNCTION__, cmd); | ||
196 | goto reset_needed; | ||
197 | } | ||
192 | 198 | ||
193 | spin_lock(&uhci->lock); | 199 | intr = inw(uhci->io_addr + USBINTR); |
194 | uhci_scan_schedule(uhci, regs); | 200 | if (intr & (~USBINTR_RESUME)) { |
195 | spin_unlock(&uhci->lock); | 201 | dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n", |
202 | __FUNCTION__, intr); | ||
203 | goto reset_needed; | ||
204 | } | ||
205 | return; | ||
196 | 206 | ||
197 | return IRQ_HANDLED; | 207 | reset_needed: |
208 | dev_dbg(uhci_dev(uhci), "Performing full reset\n"); | ||
209 | reset_hc(uhci); | ||
198 | } | 210 | } |
199 | 211 | ||
200 | static void reset_hc(struct uhci_hcd *uhci) | 212 | /* |
213 | * Store the basic register settings needed by the controller. | ||
214 | */ | ||
215 | static void configure_hc(struct uhci_hcd *uhci) | ||
201 | { | 216 | { |
202 | unsigned long io_addr = uhci->io_addr; | 217 | /* Set the frame length to the default: 1 ms exactly */ |
218 | outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); | ||
203 | 219 | ||
204 | /* Turn off PIRQ, SMI, and all interrupts. This also turns off | 220 | /* Store the frame list base address */ |
205 | * the BIOS's USB Legacy Support. | 221 | outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD); |
206 | */ | ||
207 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0); | ||
208 | outw(0, uhci->io_addr + USBINTR); | ||
209 | 222 | ||
210 | /* Global reset for 50ms */ | 223 | /* Set the current frame number */ |
211 | uhci->state = UHCI_RESET; | 224 | outw(uhci->frame_number, uhci->io_addr + USBFRNUM); |
212 | outw(USBCMD_GRESET, io_addr + USBCMD); | ||
213 | msleep(50); | ||
214 | outw(0, io_addr + USBCMD); | ||
215 | 225 | ||
216 | /* Another 10ms delay */ | 226 | /* Mark controller as running before we enable interrupts */ |
217 | msleep(10); | 227 | uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; |
218 | uhci->resume_detect = 0; | 228 | mb(); |
219 | uhci->is_stopped = UHCI_IS_STOPPED; | 229 | |
230 | /* Enable PIRQ */ | ||
231 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, | ||
232 | USBLEGSUP_DEFAULT); | ||
220 | } | 233 | } |
221 | 234 | ||
222 | static void suspend_hc(struct uhci_hcd *uhci) | 235 | |
236 | static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) | ||
223 | { | 237 | { |
224 | unsigned long io_addr = uhci->io_addr; | 238 | int port; |
225 | 239 | ||
226 | dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); | 240 | switch (to_pci_dev(uhci_dev(uhci))->vendor) { |
227 | uhci->state = UHCI_SUSPENDED; | 241 | default: |
228 | uhci->resume_detect = 0; | 242 | break; |
229 | outw(USBCMD_EGSM, io_addr + USBCMD); | ||
230 | 243 | ||
231 | /* FIXME: Wait for the controller to actually stop */ | 244 | case PCI_VENDOR_ID_GENESYS: |
232 | uhci_get_current_frame_number(uhci); | 245 | /* Genesys Logic's GL880S controllers don't generate |
233 | uhci->is_stopped = UHCI_IS_STOPPED; | 246 | * resume-detect interrupts. |
247 | */ | ||
248 | return 1; | ||
234 | 249 | ||
235 | uhci_scan_schedule(uhci, NULL); | 250 | case PCI_VENDOR_ID_INTEL: |
251 | /* Some of Intel's USB controllers have a bug that causes | ||
252 | * resume-detect interrupts if any port has an over-current | ||
253 | * condition. To make matters worse, some motherboards | ||
254 | * hardwire unused USB ports' over-current inputs active! | ||
255 | * To prevent problems, we will not enable resume-detect | ||
256 | * interrupts if any ports are OC. | ||
257 | */ | ||
258 | for (port = 0; port < uhci->rh_numports; ++port) { | ||
259 | if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & | ||
260 | USBPORTSC_OC) | ||
261 | return 1; | ||
262 | } | ||
263 | break; | ||
264 | } | ||
265 | return 0; | ||
236 | } | 266 | } |
237 | 267 | ||
238 | static void wakeup_hc(struct uhci_hcd *uhci) | 268 | static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) |
269 | __releases(uhci->lock) | ||
270 | __acquires(uhci->lock) | ||
239 | { | 271 | { |
240 | unsigned long io_addr = uhci->io_addr; | 272 | int auto_stop; |
273 | int int_enable; | ||
241 | 274 | ||
242 | switch (uhci->state) { | 275 | auto_stop = (new_state == UHCI_RH_AUTO_STOPPED); |
243 | case UHCI_SUSPENDED: /* Start the resume */ | 276 | dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__, |
244 | dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); | 277 | (auto_stop ? " (auto-stop)" : "")); |
245 | |||
246 | /* Global resume for >= 20ms */ | ||
247 | outw(USBCMD_FGR | USBCMD_EGSM, io_addr + USBCMD); | ||
248 | uhci->state = UHCI_RESUMING_1; | ||
249 | uhci->state_end = jiffies + msecs_to_jiffies(20); | ||
250 | uhci->is_stopped = 0; | ||
251 | break; | ||
252 | 278 | ||
253 | case UHCI_RESUMING_1: /* End global resume */ | 279 | /* If we get a suspend request when we're already auto-stopped |
254 | uhci->state = UHCI_RESUMING_2; | 280 | * then there's nothing to do. |
255 | outw(0, io_addr + USBCMD); | 281 | */ |
256 | /* Falls through */ | 282 | if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) { |
257 | 283 | uhci->rh_state = new_state; | |
258 | case UHCI_RESUMING_2: /* Wait for EOP to be sent */ | 284 | return; |
259 | if (inw(io_addr + USBCMD) & USBCMD_FGR) | 285 | } |
260 | break; | ||
261 | |||
262 | /* Run for at least 1 second, and | ||
263 | * mark it configured with a 64-byte max packet */ | ||
264 | uhci->state = UHCI_RUNNING_GRACE; | ||
265 | uhci->state_end = jiffies + HZ; | ||
266 | outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, | ||
267 | io_addr + USBCMD); | ||
268 | break; | ||
269 | 286 | ||
270 | case UHCI_RUNNING_GRACE: /* Now allowed to suspend */ | 287 | /* Enable resume-detect interrupts if they work. |
271 | uhci->state = UHCI_RUNNING; | 288 | * Then enter Global Suspend mode, still configured. |
272 | break; | 289 | */ |
290 | int_enable = (resume_detect_interrupts_are_broken(uhci) ? | ||
291 | 0 : USBINTR_RESUME); | ||
292 | outw(int_enable, uhci->io_addr + USBINTR); | ||
293 | outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD); | ||
294 | mb(); | ||
295 | udelay(5); | ||
273 | 296 | ||
274 | default: | 297 | /* If we're auto-stopping then no devices have been attached |
275 | break; | 298 | * for a while, so there shouldn't be any active URBs and the |
299 | * controller should stop after a few microseconds. Otherwise | ||
300 | * we will give the controller one frame to stop. | ||
301 | */ | ||
302 | if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { | ||
303 | uhci->rh_state = UHCI_RH_SUSPENDING; | ||
304 | spin_unlock_irq(&uhci->lock); | ||
305 | msleep(1); | ||
306 | spin_lock_irq(&uhci->lock); | ||
307 | if (uhci->hc_inaccessible) /* Died */ | ||
308 | return; | ||
276 | } | 309 | } |
277 | } | 310 | if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) |
311 | dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n"); | ||
278 | 312 | ||
279 | static int ports_active(struct uhci_hcd *uhci) | 313 | uhci_get_current_frame_number(uhci); |
280 | { | 314 | smp_wmb(); |
281 | unsigned long io_addr = uhci->io_addr; | ||
282 | int connection = 0; | ||
283 | int i; | ||
284 | 315 | ||
285 | for (i = 0; i < uhci->rh_numports; i++) | 316 | uhci->rh_state = new_state; |
286 | connection |= (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_CCS); | 317 | uhci->is_stopped = UHCI_IS_STOPPED; |
318 | del_timer(&uhci->stall_timer); | ||
319 | uhci_to_hcd(uhci)->poll_rh = !int_enable; | ||
287 | 320 | ||
288 | return connection; | 321 | uhci_scan_schedule(uhci, NULL); |
289 | } | 322 | } |
290 | 323 | ||
291 | static int suspend_allowed(struct uhci_hcd *uhci) | 324 | static void start_rh(struct uhci_hcd *uhci) |
292 | { | 325 | { |
293 | unsigned long io_addr = uhci->io_addr; | 326 | uhci->is_stopped = 0; |
294 | int i; | 327 | smp_wmb(); |
295 | |||
296 | if (to_pci_dev(uhci_dev(uhci))->vendor != PCI_VENDOR_ID_INTEL) | ||
297 | return 1; | ||
298 | 328 | ||
299 | /* Some of Intel's USB controllers have a bug that causes false | 329 | /* Mark it configured and running with a 64-byte max packet. |
300 | * resume indications if any port has an over current condition. | 330 | * All interrupts are enabled, even though RESUME won't do anything. |
301 | * To prevent problems, we will not allow a global suspend if | ||
302 | * any ports are OC. | ||
303 | * | ||
304 | * Some motherboards using Intel's chipsets (but not using all | ||
305 | * the USB ports) appear to hardwire the over current inputs active | ||
306 | * to disable the USB ports. | ||
307 | */ | 331 | */ |
308 | 332 | outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); | |
309 | /* check for over current condition on any port */ | 333 | outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, |
310 | for (i = 0; i < uhci->rh_numports; i++) { | 334 | uhci->io_addr + USBINTR); |
311 | if (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_OC) | 335 | mb(); |
312 | return 0; | 336 | uhci->rh_state = UHCI_RH_RUNNING; |
313 | } | 337 | uhci_to_hcd(uhci)->poll_rh = 1; |
314 | 338 | restart_timer(uhci); | |
315 | return 1; | ||
316 | } | 339 | } |
317 | 340 | ||
318 | static void hc_state_transitions(struct uhci_hcd *uhci) | 341 | static void wakeup_rh(struct uhci_hcd *uhci) |
342 | __releases(uhci->lock) | ||
343 | __acquires(uhci->lock) | ||
319 | { | 344 | { |
320 | switch (uhci->state) { | 345 | dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__, |
321 | case UHCI_RUNNING: | 346 | uhci->rh_state == UHCI_RH_AUTO_STOPPED ? |
347 | " (auto-start)" : ""); | ||
322 | 348 | ||
323 | /* global suspend if nothing connected for 1 second */ | 349 | /* If we are auto-stopped then no devices are attached so there's |
324 | if (!ports_active(uhci) && suspend_allowed(uhci)) { | 350 | * no need for wakeup signals. Otherwise we send Global Resume |
325 | uhci->state = UHCI_SUSPENDING_GRACE; | 351 | * for 20 ms. |
326 | uhci->state_end = jiffies + HZ; | 352 | */ |
327 | } | 353 | if (uhci->rh_state == UHCI_RH_SUSPENDED) { |
328 | break; | 354 | uhci->rh_state = UHCI_RH_RESUMING; |
329 | 355 | outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF, | |
330 | case UHCI_SUSPENDING_GRACE: | 356 | uhci->io_addr + USBCMD); |
331 | if (ports_active(uhci)) | 357 | spin_unlock_irq(&uhci->lock); |
332 | uhci->state = UHCI_RUNNING; | 358 | msleep(20); |
333 | else if (time_after_eq(jiffies, uhci->state_end)) | 359 | spin_lock_irq(&uhci->lock); |
334 | suspend_hc(uhci); | 360 | if (uhci->hc_inaccessible) /* Died */ |
335 | break; | 361 | return; |
336 | 362 | ||
337 | case UHCI_SUSPENDED: | 363 | /* End Global Resume and wait for EOP to be sent */ |
338 | 364 | outw(USBCMD_CF, uhci->io_addr + USBCMD); | |
339 | /* wakeup if requested by a device */ | 365 | mb(); |
340 | if (uhci->resume_detect) | 366 | udelay(4); |
341 | wakeup_hc(uhci); | 367 | if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) |
342 | break; | 368 | dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); |
369 | } | ||
343 | 370 | ||
344 | case UHCI_RESUMING_1: | 371 | start_rh(uhci); |
345 | case UHCI_RESUMING_2: | ||
346 | case UHCI_RUNNING_GRACE: | ||
347 | if (time_after_eq(jiffies, uhci->state_end)) | ||
348 | wakeup_hc(uhci); | ||
349 | break; | ||
350 | 372 | ||
351 | default: | 373 | /* Restart root hub polling */ |
352 | break; | 374 | mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); |
353 | } | ||
354 | } | 375 | } |
355 | 376 | ||
356 | /* | 377 | static void stall_callback(unsigned long _uhci) |
357 | * Store the current frame number in uhci->frame_number if the controller | ||
358 | * is runnning | ||
359 | */ | ||
360 | static void uhci_get_current_frame_number(struct uhci_hcd *uhci) | ||
361 | { | 378 | { |
379 | struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci; | ||
380 | unsigned long flags; | ||
381 | |||
382 | spin_lock_irqsave(&uhci->lock, flags); | ||
383 | uhci_scan_schedule(uhci, NULL); | ||
384 | check_fsbr(uhci); | ||
385 | |||
362 | if (!uhci->is_stopped) | 386 | if (!uhci->is_stopped) |
363 | uhci->frame_number = inw(uhci->io_addr + USBFRNUM); | 387 | restart_timer(uhci); |
388 | spin_unlock_irqrestore(&uhci->lock, flags); | ||
364 | } | 389 | } |
365 | 390 | ||
366 | static int start_hc(struct uhci_hcd *uhci) | 391 | static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs) |
367 | { | 392 | { |
368 | unsigned long io_addr = uhci->io_addr; | 393 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
369 | int timeout = 10; | 394 | unsigned short status; |
395 | unsigned long flags; | ||
370 | 396 | ||
371 | /* | 397 | /* |
372 | * Reset the HC - this will force us to get a | 398 | * Read the interrupt status, and write it back to clear the |
373 | * new notification of any already connected | 399 | * interrupt cause. Contrary to the UHCI specification, the |
374 | * ports due to the virtual disconnect that it | 400 | * "HC Halted" status bit is persistent: it is RO, not R/WC. |
375 | * implies. | ||
376 | */ | 401 | */ |
377 | outw(USBCMD_HCRESET, io_addr + USBCMD); | 402 | status = inw(uhci->io_addr + USBSTS); |
378 | while (inw(io_addr + USBCMD) & USBCMD_HCRESET) { | 403 | if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ |
379 | if (--timeout < 0) { | 404 | return IRQ_NONE; |
380 | dev_err(uhci_dev(uhci), "USBCMD_HCRESET timed out!\n"); | 405 | outw(status, uhci->io_addr + USBSTS); /* Clear it */ |
381 | return -ETIMEDOUT; | 406 | |
407 | if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { | ||
408 | if (status & USBSTS_HSE) | ||
409 | dev_err(uhci_dev(uhci), "host system error, " | ||
410 | "PCI problems?\n"); | ||
411 | if (status & USBSTS_HCPE) | ||
412 | dev_err(uhci_dev(uhci), "host controller process " | ||
413 | "error, something bad happened!\n"); | ||
414 | if (status & USBSTS_HCH) { | ||
415 | spin_lock_irqsave(&uhci->lock, flags); | ||
416 | if (uhci->rh_state >= UHCI_RH_RUNNING) { | ||
417 | dev_err(uhci_dev(uhci), | ||
418 | "host controller halted, " | ||
419 | "very bad!\n"); | ||
420 | hc_died(uhci); | ||
421 | spin_unlock_irqrestore(&uhci->lock, flags); | ||
422 | return IRQ_HANDLED; | ||
423 | } | ||
424 | spin_unlock_irqrestore(&uhci->lock, flags); | ||
382 | } | 425 | } |
383 | msleep(1); | ||
384 | } | 426 | } |
385 | 427 | ||
386 | /* Mark controller as running before we enable interrupts */ | 428 | if (status & USBSTS_RD) |
387 | uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; | 429 | usb_hcd_poll_rh_status(hcd); |
388 | |||
389 | /* Turn on PIRQ and all interrupts */ | ||
390 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, | ||
391 | USBLEGSUP_DEFAULT); | ||
392 | outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, | ||
393 | io_addr + USBINTR); | ||
394 | 430 | ||
395 | /* Start at frame 0 */ | 431 | spin_lock_irqsave(&uhci->lock, flags); |
396 | outw(0, io_addr + USBFRNUM); | 432 | uhci_scan_schedule(uhci, regs); |
397 | outl(uhci->fl->dma_handle, io_addr + USBFLBASEADD); | 433 | spin_unlock_irqrestore(&uhci->lock, flags); |
398 | 434 | ||
399 | /* Run and mark it configured with a 64-byte max packet */ | 435 | return IRQ_HANDLED; |
400 | uhci->state = UHCI_RUNNING_GRACE; | 436 | } |
401 | uhci->state_end = jiffies + HZ; | ||
402 | outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, io_addr + USBCMD); | ||
403 | uhci->is_stopped = 0; | ||
404 | 437 | ||
405 | return 0; | 438 | /* |
439 | * Store the current frame number in uhci->frame_number if the controller | ||
440 | * is runnning | ||
441 | */ | ||
442 | static void uhci_get_current_frame_number(struct uhci_hcd *uhci) | ||
443 | { | ||
444 | if (!uhci->is_stopped) | ||
445 | uhci->frame_number = inw(uhci->io_addr + USBFRNUM); | ||
406 | } | 446 | } |
407 | 447 | ||
408 | /* | 448 | /* |
@@ -448,16 +488,58 @@ static void release_uhci(struct uhci_hcd *uhci) | |||
448 | static int uhci_reset(struct usb_hcd *hcd) | 488 | static int uhci_reset(struct usb_hcd *hcd) |
449 | { | 489 | { |
450 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 490 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
491 | unsigned io_size = (unsigned) hcd->rsrc_len; | ||
492 | int port; | ||
451 | 493 | ||
452 | uhci->io_addr = (unsigned long) hcd->rsrc_start; | 494 | uhci->io_addr = (unsigned long) hcd->rsrc_start; |
453 | 495 | ||
454 | /* Kick BIOS off this hardware and reset, so we won't get | 496 | /* The UHCI spec says devices must have 2 ports, and goes on to say |
455 | * interrupts from any previous setup. | 497 | * they may have more but gives no way to determine how many there |
498 | * are. However according to the UHCI spec, Bit 7 of the port | ||
499 | * status and control register is always set to 1. So we try to | ||
500 | * use this to our advantage. Another common failure mode when | ||
501 | * a nonexistent register is addressed is to return all ones, so | ||
502 | * we test for that also. | ||
456 | */ | 503 | */ |
457 | reset_hc(uhci); | 504 | for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) { |
505 | unsigned int portstatus; | ||
506 | |||
507 | portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2)); | ||
508 | if (!(portstatus & 0x0080) || portstatus == 0xffff) | ||
509 | break; | ||
510 | } | ||
511 | if (debug) | ||
512 | dev_info(uhci_dev(uhci), "detected %d ports\n", port); | ||
513 | |||
514 | /* Anything greater than 7 is weird so we'll ignore it. */ | ||
515 | if (port > UHCI_RH_MAXCHILD) { | ||
516 | dev_info(uhci_dev(uhci), "port count misdetected? " | ||
517 | "forcing to 2 ports\n"); | ||
518 | port = 2; | ||
519 | } | ||
520 | uhci->rh_numports = port; | ||
521 | |||
522 | /* Kick BIOS off this hardware and reset if the controller | ||
523 | * isn't already safely quiescent. | ||
524 | */ | ||
525 | check_and_reset_hc(uhci); | ||
458 | return 0; | 526 | return 0; |
459 | } | 527 | } |
460 | 528 | ||
529 | /* Make sure the controller is quiescent and that we're not using it | ||
530 | * any more. This is mainly for the benefit of programs which, like kexec, | ||
531 | * expect the hardware to be idle: not doing DMA or generating IRQs. | ||
532 | * | ||
533 | * This routine may be called in a damaged or failing kernel. Hence we | ||
534 | * do not acquire the spinlock before shutting down the controller. | ||
535 | */ | ||
536 | static void uhci_shutdown(struct pci_dev *pdev) | ||
537 | { | ||
538 | struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev); | ||
539 | |||
540 | hc_died(hcd_to_uhci(hcd)); | ||
541 | } | ||
542 | |||
461 | /* | 543 | /* |
462 | * Allocate a frame list, and then setup the skeleton | 544 | * Allocate a frame list, and then setup the skeleton |
463 | * | 545 | * |
@@ -478,17 +560,20 @@ static int uhci_start(struct usb_hcd *hcd) | |||
478 | { | 560 | { |
479 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 561 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
480 | int retval = -EBUSY; | 562 | int retval = -EBUSY; |
481 | int i, port; | 563 | int i; |
482 | unsigned io_size; | ||
483 | dma_addr_t dma_handle; | 564 | dma_addr_t dma_handle; |
484 | struct usb_device *udev; | ||
485 | struct dentry *dentry; | 565 | struct dentry *dentry; |
486 | 566 | ||
487 | io_size = (unsigned) hcd->rsrc_len; | 567 | hcd->uses_new_polling = 1; |
568 | if (pci_find_capability(to_pci_dev(uhci_dev(uhci)), PCI_CAP_ID_PM)) | ||
569 | hcd->can_wakeup = 1; /* Assume it supports PME# */ | ||
488 | 570 | ||
489 | dentry = debugfs_create_file(hcd->self.bus_name, S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, &uhci_debug_operations); | 571 | dentry = debugfs_create_file(hcd->self.bus_name, |
572 | S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, | ||
573 | &uhci_debug_operations); | ||
490 | if (!dentry) { | 574 | if (!dentry) { |
491 | dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n"); | 575 | dev_err(uhci_dev(uhci), |
576 | "couldn't create uhci debugfs entry\n"); | ||
492 | retval = -ENOMEM; | 577 | retval = -ENOMEM; |
493 | goto err_create_debug_entry; | 578 | goto err_create_debug_entry; |
494 | } | 579 | } |
@@ -510,6 +595,10 @@ static int uhci_start(struct usb_hcd *hcd) | |||
510 | 595 | ||
511 | init_waitqueue_head(&uhci->waitqh); | 596 | init_waitqueue_head(&uhci->waitqh); |
512 | 597 | ||
598 | init_timer(&uhci->stall_timer); | ||
599 | uhci->stall_timer.function = stall_callback; | ||
600 | uhci->stall_timer.data = (unsigned long) uhci; | ||
601 | |||
513 | uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl), | 602 | uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl), |
514 | &dma_handle, 0); | 603 | &dma_handle, 0); |
515 | if (!uhci->fl) { | 604 | if (!uhci->fl) { |
@@ -536,46 +625,14 @@ static int uhci_start(struct usb_hcd *hcd) | |||
536 | goto err_create_qh_pool; | 625 | goto err_create_qh_pool; |
537 | } | 626 | } |
538 | 627 | ||
539 | /* Initialize the root hub */ | 628 | uhci->term_td = uhci_alloc_td(uhci); |
540 | |||
541 | /* UHCI specs says devices must have 2 ports, but goes on to say */ | ||
542 | /* they may have more but give no way to determine how many they */ | ||
543 | /* have. However, according to the UHCI spec, Bit 7 is always set */ | ||
544 | /* to 1. So we try to use this to our advantage */ | ||
545 | for (port = 0; port < (io_size - 0x10) / 2; port++) { | ||
546 | unsigned int portstatus; | ||
547 | |||
548 | portstatus = inw(uhci->io_addr + 0x10 + (port * 2)); | ||
549 | if (!(portstatus & 0x0080)) | ||
550 | break; | ||
551 | } | ||
552 | if (debug) | ||
553 | dev_info(uhci_dev(uhci), "detected %d ports\n", port); | ||
554 | |||
555 | /* This is experimental so anything less than 2 or greater than 8 is */ | ||
556 | /* something weird and we'll ignore it */ | ||
557 | if (port < 2 || port > UHCI_RH_MAXCHILD) { | ||
558 | dev_info(uhci_dev(uhci), "port count misdetected? " | ||
559 | "forcing to 2 ports\n"); | ||
560 | port = 2; | ||
561 | } | ||
562 | |||
563 | uhci->rh_numports = port; | ||
564 | |||
565 | udev = usb_alloc_dev(NULL, &hcd->self, 0); | ||
566 | if (!udev) { | ||
567 | dev_err(uhci_dev(uhci), "unable to allocate root hub\n"); | ||
568 | goto err_alloc_root_hub; | ||
569 | } | ||
570 | |||
571 | uhci->term_td = uhci_alloc_td(uhci, udev); | ||
572 | if (!uhci->term_td) { | 629 | if (!uhci->term_td) { |
573 | dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); | 630 | dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); |
574 | goto err_alloc_term_td; | 631 | goto err_alloc_term_td; |
575 | } | 632 | } |
576 | 633 | ||
577 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { | 634 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { |
578 | uhci->skelqh[i] = uhci_alloc_qh(uhci, udev); | 635 | uhci->skelqh[i] = uhci_alloc_qh(uhci); |
579 | if (!uhci->skelqh[i]) { | 636 | if (!uhci->skelqh[i]) { |
580 | dev_err(uhci_dev(uhci), "unable to allocate QH\n"); | 637 | dev_err(uhci_dev(uhci), "unable to allocate QH\n"); |
581 | goto err_alloc_skelqh; | 638 | goto err_alloc_skelqh; |
@@ -641,32 +698,17 @@ static int uhci_start(struct usb_hcd *hcd) | |||
641 | 698 | ||
642 | /* | 699 | /* |
643 | * Some architectures require a full mb() to enforce completion of | 700 | * Some architectures require a full mb() to enforce completion of |
644 | * the memory writes above before the I/O transfers in start_hc(). | 701 | * the memory writes above before the I/O transfers in configure_hc(). |
645 | */ | 702 | */ |
646 | mb(); | 703 | mb(); |
647 | if ((retval = start_hc(uhci)) != 0) | ||
648 | goto err_alloc_skelqh; | ||
649 | |||
650 | init_stall_timer(hcd); | ||
651 | |||
652 | udev->speed = USB_SPEED_FULL; | ||
653 | |||
654 | if (usb_hcd_register_root_hub(udev, hcd) != 0) { | ||
655 | dev_err(uhci_dev(uhci), "unable to start root hub\n"); | ||
656 | retval = -ENOMEM; | ||
657 | goto err_start_root_hub; | ||
658 | } | ||
659 | 704 | ||
705 | configure_hc(uhci); | ||
706 | start_rh(uhci); | ||
660 | return 0; | 707 | return 0; |
661 | 708 | ||
662 | /* | 709 | /* |
663 | * error exits: | 710 | * error exits: |
664 | */ | 711 | */ |
665 | err_start_root_hub: | ||
666 | reset_hc(uhci); | ||
667 | |||
668 | del_timer_sync(&uhci->stall_timer); | ||
669 | |||
670 | err_alloc_skelqh: | 712 | err_alloc_skelqh: |
671 | for (i = 0; i < UHCI_NUM_SKELQH; i++) | 713 | for (i = 0; i < UHCI_NUM_SKELQH; i++) |
672 | if (uhci->skelqh[i]) { | 714 | if (uhci->skelqh[i]) { |
@@ -678,9 +720,6 @@ err_alloc_skelqh: | |||
678 | uhci->term_td = NULL; | 720 | uhci->term_td = NULL; |
679 | 721 | ||
680 | err_alloc_term_td: | 722 | err_alloc_term_td: |
681 | usb_put_dev(udev); | ||
682 | |||
683 | err_alloc_root_hub: | ||
684 | dma_pool_destroy(uhci->qh_pool); | 723 | dma_pool_destroy(uhci->qh_pool); |
685 | uhci->qh_pool = NULL; | 724 | uhci->qh_pool = NULL; |
686 | 725 | ||
@@ -705,73 +744,114 @@ static void uhci_stop(struct usb_hcd *hcd) | |||
705 | { | 744 | { |
706 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 745 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
707 | 746 | ||
708 | del_timer_sync(&uhci->stall_timer); | ||
709 | reset_hc(uhci); | ||
710 | |||
711 | spin_lock_irq(&uhci->lock); | 747 | spin_lock_irq(&uhci->lock); |
748 | reset_hc(uhci); | ||
712 | uhci_scan_schedule(uhci, NULL); | 749 | uhci_scan_schedule(uhci, NULL); |
713 | spin_unlock_irq(&uhci->lock); | 750 | spin_unlock_irq(&uhci->lock); |
714 | 751 | ||
752 | del_timer_sync(&uhci->stall_timer); | ||
715 | release_uhci(uhci); | 753 | release_uhci(uhci); |
716 | } | 754 | } |
717 | 755 | ||
718 | #ifdef CONFIG_PM | 756 | #ifdef CONFIG_PM |
757 | static int uhci_rh_suspend(struct usb_hcd *hcd) | ||
758 | { | ||
759 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | ||
760 | |||
761 | spin_lock_irq(&uhci->lock); | ||
762 | if (!uhci->hc_inaccessible) /* Not dead */ | ||
763 | suspend_rh(uhci, UHCI_RH_SUSPENDED); | ||
764 | spin_unlock_irq(&uhci->lock); | ||
765 | return 0; | ||
766 | } | ||
767 | |||
768 | static int uhci_rh_resume(struct usb_hcd *hcd) | ||
769 | { | ||
770 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | ||
771 | int rc = 0; | ||
772 | |||
773 | spin_lock_irq(&uhci->lock); | ||
774 | if (uhci->hc_inaccessible) { | ||
775 | if (uhci->rh_state == UHCI_RH_SUSPENDED) { | ||
776 | dev_warn(uhci_dev(uhci), "HC isn't running!\n"); | ||
777 | rc = -ENODEV; | ||
778 | } | ||
779 | /* Otherwise the HC is dead */ | ||
780 | } else | ||
781 | wakeup_rh(uhci); | ||
782 | spin_unlock_irq(&uhci->lock); | ||
783 | return rc; | ||
784 | } | ||
785 | |||
719 | static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message) | 786 | static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message) |
720 | { | 787 | { |
721 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 788 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
789 | int rc = 0; | ||
790 | |||
791 | dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); | ||
722 | 792 | ||
723 | spin_lock_irq(&uhci->lock); | 793 | spin_lock_irq(&uhci->lock); |
794 | if (uhci->hc_inaccessible) /* Dead or already suspended */ | ||
795 | goto done; | ||
724 | 796 | ||
725 | /* Don't try to suspend broken motherboards, reset instead */ | 797 | #ifndef CONFIG_USB_SUSPEND |
726 | if (suspend_allowed(uhci)) | 798 | /* Otherwise this would never happen */ |
727 | suspend_hc(uhci); | 799 | suspend_rh(uhci, UHCI_RH_SUSPENDED); |
728 | else { | 800 | #endif |
729 | spin_unlock_irq(&uhci->lock); | 801 | |
730 | reset_hc(uhci); | 802 | if (uhci->rh_state > UHCI_RH_SUSPENDED) { |
731 | spin_lock_irq(&uhci->lock); | 803 | dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n"); |
732 | uhci_scan_schedule(uhci, NULL); | 804 | hcd->state = HC_STATE_RUNNING; |
733 | } | 805 | rc = -EBUSY; |
806 | goto done; | ||
807 | }; | ||
734 | 808 | ||
809 | /* All PCI host controllers are required to disable IRQ generation | ||
810 | * at the source, so we must turn off PIRQ. | ||
811 | */ | ||
812 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0); | ||
813 | uhci->hc_inaccessible = 1; | ||
814 | |||
815 | /* FIXME: Enable non-PME# remote wakeup? */ | ||
816 | |||
817 | done: | ||
735 | spin_unlock_irq(&uhci->lock); | 818 | spin_unlock_irq(&uhci->lock); |
736 | return 0; | 819 | if (rc == 0) |
820 | del_timer_sync(&hcd->rh_timer); | ||
821 | return rc; | ||
737 | } | 822 | } |
738 | 823 | ||
739 | static int uhci_resume(struct usb_hcd *hcd) | 824 | static int uhci_resume(struct usb_hcd *hcd) |
740 | { | 825 | { |
741 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 826 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
742 | int rc; | ||
743 | 827 | ||
744 | pci_set_master(to_pci_dev(uhci_dev(uhci))); | 828 | dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); |
745 | 829 | ||
830 | if (uhci->rh_state == UHCI_RH_RESET) /* Dead */ | ||
831 | return 0; | ||
746 | spin_lock_irq(&uhci->lock); | 832 | spin_lock_irq(&uhci->lock); |
747 | 833 | ||
748 | if (uhci->state == UHCI_SUSPENDED) { | 834 | /* FIXME: Disable non-PME# remote wakeup? */ |
749 | 835 | ||
750 | /* | 836 | uhci->hc_inaccessible = 0; |
751 | * Some systems don't maintain the UHCI register values | 837 | |
752 | * during a PM suspend/resume cycle, so reinitialize | 838 | /* The BIOS may have changed the controller settings during a |
753 | * the Frame Number, Framelist Base Address, Interrupt | 839 | * system wakeup. Check it and reconfigure to avoid problems. |
754 | * Enable, and Legacy Support registers. | 840 | */ |
755 | */ | 841 | check_and_reset_hc(uhci); |
756 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, | 842 | configure_hc(uhci); |
757 | 0); | 843 | |
758 | outw(uhci->frame_number, uhci->io_addr + USBFRNUM); | 844 | #ifndef CONFIG_USB_SUSPEND |
759 | outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD); | 845 | /* Otherwise this would never happen */ |
760 | outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | | 846 | wakeup_rh(uhci); |
761 | USBINTR_SP, uhci->io_addr + USBINTR); | 847 | #endif |
762 | uhci->resume_detect = 1; | 848 | if (uhci->rh_state == UHCI_RH_RESET) |
763 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, | 849 | suspend_rh(uhci, UHCI_RH_SUSPENDED); |
764 | USBLEGSUP_DEFAULT); | ||
765 | } else { | ||
766 | spin_unlock_irq(&uhci->lock); | ||
767 | reset_hc(uhci); | ||
768 | if ((rc = start_hc(uhci)) != 0) | ||
769 | return rc; | ||
770 | spin_lock_irq(&uhci->lock); | ||
771 | } | ||
772 | hcd->state = HC_STATE_RUNNING; | ||
773 | 850 | ||
774 | spin_unlock_irq(&uhci->lock); | 851 | spin_unlock_irq(&uhci->lock); |
852 | |||
853 | if (hcd->poll_rh) | ||
854 | usb_hcd_poll_rh_status(hcd); | ||
775 | return 0; | 855 | return 0; |
776 | } | 856 | } |
777 | #endif | 857 | #endif |
@@ -788,13 +868,15 @@ static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, | |||
788 | static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) | 868 | static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) |
789 | { | 869 | { |
790 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 870 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
791 | int frame_number; | ||
792 | unsigned long flags; | 871 | unsigned long flags; |
872 | int is_stopped; | ||
873 | int frame_number; | ||
793 | 874 | ||
794 | /* Minimize latency by avoiding the spinlock */ | 875 | /* Minimize latency by avoiding the spinlock */ |
795 | local_irq_save(flags); | 876 | local_irq_save(flags); |
796 | rmb(); | 877 | is_stopped = uhci->is_stopped; |
797 | frame_number = (uhci->is_stopped ? uhci->frame_number : | 878 | smp_rmb(); |
879 | frame_number = (is_stopped ? uhci->frame_number : | ||
798 | inw(uhci->io_addr + USBFRNUM)); | 880 | inw(uhci->io_addr + USBFRNUM)); |
799 | local_irq_restore(flags); | 881 | local_irq_restore(flags); |
800 | return frame_number; | 882 | return frame_number; |
@@ -817,6 +899,8 @@ static const struct hc_driver uhci_driver = { | |||
817 | #ifdef CONFIG_PM | 899 | #ifdef CONFIG_PM |
818 | .suspend = uhci_suspend, | 900 | .suspend = uhci_suspend, |
819 | .resume = uhci_resume, | 901 | .resume = uhci_resume, |
902 | .hub_suspend = uhci_rh_suspend, | ||
903 | .hub_resume = uhci_rh_resume, | ||
820 | #endif | 904 | #endif |
821 | .stop = uhci_stop, | 905 | .stop = uhci_stop, |
822 | 906 | ||
@@ -845,6 +929,7 @@ static struct pci_driver uhci_pci_driver = { | |||
845 | 929 | ||
846 | .probe = usb_hcd_pci_probe, | 930 | .probe = usb_hcd_pci_probe, |
847 | .remove = usb_hcd_pci_remove, | 931 | .remove = usb_hcd_pci_remove, |
932 | .shutdown = uhci_shutdown, | ||
848 | 933 | ||
849 | #ifdef CONFIG_PM | 934 | #ifdef CONFIG_PM |
850 | .suspend = usb_hcd_pci_suspend, | 935 | .suspend = usb_hcd_pci_suspend, |