diff options
Diffstat (limited to 'drivers/usb/host/r8a66597.h')
-rw-r--r-- | drivers/usb/host/r8a66597.h | 51 |
1 files changed, 50 insertions, 1 deletions
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h index 57388252b693..84ee01417315 100644 --- a/drivers/usb/host/r8a66597.h +++ b/drivers/usb/host/r8a66597.h | |||
@@ -187,7 +187,11 @@ | |||
187 | #define REW 0x4000 /* b14: Buffer rewind */ | 187 | #define REW 0x4000 /* b14: Buffer rewind */ |
188 | #define DCLRM 0x2000 /* b13: DMA buffer clear mode */ | 188 | #define DCLRM 0x2000 /* b13: DMA buffer clear mode */ |
189 | #define DREQE 0x1000 /* b12: DREQ output enable */ | 189 | #define DREQE 0x1000 /* b12: DREQ output enable */ |
190 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | ||
191 | #define MBW 0x0800 | ||
192 | #else | ||
190 | #define MBW 0x0400 /* b10: Maximum bit width for FIFO access */ | 193 | #define MBW 0x0400 /* b10: Maximum bit width for FIFO access */ |
194 | #endif | ||
191 | #define MBW_8 0x0000 /* 8bit */ | 195 | #define MBW_8 0x0000 /* 8bit */ |
192 | #define MBW_16 0x0400 /* 16bit */ | 196 | #define MBW_16 0x0400 /* 16bit */ |
193 | #define BIGEND 0x0100 /* b8: Big endian mode */ | 197 | #define BIGEND 0x0100 /* b8: Big endian mode */ |
@@ -395,8 +399,13 @@ | |||
395 | #define R8A66597_MAX_NUM_PIPE 10 | 399 | #define R8A66597_MAX_NUM_PIPE 10 |
396 | #define R8A66597_BUF_BSIZE 8 | 400 | #define R8A66597_BUF_BSIZE 8 |
397 | #define R8A66597_MAX_DEVICE 10 | 401 | #define R8A66597_MAX_DEVICE 10 |
402 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | ||
403 | #define R8A66597_MAX_ROOT_HUB 1 | ||
404 | #else | ||
398 | #define R8A66597_MAX_ROOT_HUB 2 | 405 | #define R8A66597_MAX_ROOT_HUB 2 |
399 | #define R8A66597_MAX_SAMPLING 10 | 406 | #endif |
407 | #define R8A66597_MAX_SAMPLING 5 | ||
408 | #define R8A66597_RH_POLL_TIME 10 | ||
400 | #define R8A66597_MAX_DMA_CHANNEL 2 | 409 | #define R8A66597_MAX_DMA_CHANNEL 2 |
401 | #define R8A66597_PIPE_NO_DMA R8A66597_MAX_DMA_CHANNEL | 410 | #define R8A66597_PIPE_NO_DMA R8A66597_MAX_DMA_CHANNEL |
402 | #define check_bulk_or_isoc(pipenum) ((pipenum >= 1 && pipenum <= 5)) | 411 | #define check_bulk_or_isoc(pipenum) ((pipenum >= 1 && pipenum <= 5)) |
@@ -404,6 +413,7 @@ | |||
404 | #define make_devsel(addr) (addr << 12) | 413 | #define make_devsel(addr) (addr << 12) |
405 | 414 | ||
406 | struct r8a66597_pipe_info { | 415 | struct r8a66597_pipe_info { |
416 | unsigned long timer_interval; | ||
407 | u16 pipenum; | 417 | u16 pipenum; |
408 | u16 address; /* R8A66597 HCD usb address */ | 418 | u16 address; /* R8A66597 HCD usb address */ |
409 | u16 epnum; | 419 | u16 epnum; |
@@ -478,9 +488,11 @@ struct r8a66597 { | |||
478 | 488 | ||
479 | struct timer_list rh_timer; | 489 | struct timer_list rh_timer; |
480 | struct timer_list td_timer[R8A66597_MAX_NUM_PIPE]; | 490 | struct timer_list td_timer[R8A66597_MAX_NUM_PIPE]; |
491 | struct timer_list interval_timer[R8A66597_MAX_NUM_PIPE]; | ||
481 | 492 | ||
482 | unsigned short address_map; | 493 | unsigned short address_map; |
483 | unsigned short timeout_map; | 494 | unsigned short timeout_map; |
495 | unsigned short interval_map; | ||
484 | unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; | 496 | unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; |
485 | unsigned char dma_map; | 497 | unsigned char dma_map; |
486 | 498 | ||
@@ -526,8 +538,21 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, | |||
526 | unsigned long offset, u16 *buf, | 538 | unsigned long offset, u16 *buf, |
527 | int len) | 539 | int len) |
528 | { | 540 | { |
541 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | ||
542 | unsigned long fifoaddr = r8a66597->reg + offset; | ||
543 | unsigned long count; | ||
544 | |||
545 | count = len / 4; | ||
546 | insl(fifoaddr, buf, count); | ||
547 | |||
548 | if (len & 0x00000003) { | ||
549 | unsigned long tmp = inl(fifoaddr); | ||
550 | memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03); | ||
551 | } | ||
552 | #else | ||
529 | len = (len + 1) / 2; | 553 | len = (len + 1) / 2; |
530 | insw(r8a66597->reg + offset, buf, len); | 554 | insw(r8a66597->reg + offset, buf, len); |
555 | #endif | ||
531 | } | 556 | } |
532 | 557 | ||
533 | static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, | 558 | static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, |
@@ -541,6 +566,24 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, | |||
541 | int len) | 566 | int len) |
542 | { | 567 | { |
543 | unsigned long fifoaddr = r8a66597->reg + offset; | 568 | unsigned long fifoaddr = r8a66597->reg + offset; |
569 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | ||
570 | unsigned long count; | ||
571 | unsigned char *pb; | ||
572 | int i; | ||
573 | |||
574 | count = len / 4; | ||
575 | outsl(fifoaddr, buf, count); | ||
576 | |||
577 | if (len & 0x00000003) { | ||
578 | pb = (unsigned char *)buf + count * 4; | ||
579 | for (i = 0; i < (len & 0x00000003); i++) { | ||
580 | if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) | ||
581 | outb(pb[i], fifoaddr + i); | ||
582 | else | ||
583 | outb(pb[i], fifoaddr + 3 - i); | ||
584 | } | ||
585 | } | ||
586 | #else | ||
544 | int odd = len & 0x0001; | 587 | int odd = len & 0x0001; |
545 | 588 | ||
546 | len = len / 2; | 589 | len = len / 2; |
@@ -549,6 +592,7 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, | |||
549 | buf = &buf[len]; | 592 | buf = &buf[len]; |
550 | outb((unsigned char)*buf, fifoaddr); | 593 | outb((unsigned char)*buf, fifoaddr); |
551 | } | 594 | } |
595 | #endif | ||
552 | } | 596 | } |
553 | 597 | ||
554 | static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, | 598 | static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, |
@@ -581,6 +625,11 @@ static inline unsigned long get_dvstctr_reg(int port) | |||
581 | return port == 0 ? DVSTCTR0 : DVSTCTR1; | 625 | return port == 0 ? DVSTCTR0 : DVSTCTR1; |
582 | } | 626 | } |
583 | 627 | ||
628 | static inline unsigned long get_dmacfg_reg(int port) | ||
629 | { | ||
630 | return port == 0 ? DMA0CFG : DMA1CFG; | ||
631 | } | ||
632 | |||
584 | static inline unsigned long get_intenb_reg(int port) | 633 | static inline unsigned long get_intenb_reg(int port) |
585 | { | 634 | { |
586 | return port == 0 ? INTENB1 : INTENB2; | 635 | return port == 0 ? INTENB1 : INTENB2; |