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path: root/drivers/usb/host/r8a66597.h
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Diffstat (limited to 'drivers/usb/host/r8a66597.h')
-rw-r--r--drivers/usb/host/r8a66597.h76
1 files changed, 35 insertions, 41 deletions
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index d72680b433f9..eecbd917bc81 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -26,7 +26,7 @@
26#ifndef __R8A66597_H__ 26#ifndef __R8A66597_H__
27#define __R8A66597_H__ 27#define __R8A66597_H__
28 28
29#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 29#ifdef CONFIG_HAVE_CLK
30#include <linux/clk.h> 30#include <linux/clk.h>
31#endif 31#endif
32 32
@@ -193,13 +193,9 @@
193#define REW 0x4000 /* b14: Buffer rewind */ 193#define REW 0x4000 /* b14: Buffer rewind */
194#define DCLRM 0x2000 /* b13: DMA buffer clear mode */ 194#define DCLRM 0x2000 /* b13: DMA buffer clear mode */
195#define DREQE 0x1000 /* b12: DREQ output enable */ 195#define DREQE 0x1000 /* b12: DREQ output enable */
196#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
197#define MBW 0x0800
198#else
199#define MBW 0x0400 /* b10: Maximum bit width for FIFO access */
200#endif
201#define MBW_8 0x0000 /* 8bit */ 196#define MBW_8 0x0000 /* 8bit */
202#define MBW_16 0x0400 /* 16bit */ 197#define MBW_16 0x0400 /* 16bit */
198#define MBW_32 0x0800 /* 32bit */
203#define BIGEND 0x0100 /* b8: Big endian mode */ 199#define BIGEND 0x0100 /* b8: Big endian mode */
204#define BYTE_LITTLE 0x0000 /* little dendian */ 200#define BYTE_LITTLE 0x0000 /* little dendian */
205#define BYTE_BIG 0x0100 /* big endifan */ 201#define BYTE_BIG 0x0100 /* big endifan */
@@ -405,11 +401,7 @@
405#define R8A66597_MAX_NUM_PIPE 10 401#define R8A66597_MAX_NUM_PIPE 10
406#define R8A66597_BUF_BSIZE 8 402#define R8A66597_BUF_BSIZE 8
407#define R8A66597_MAX_DEVICE 10 403#define R8A66597_MAX_DEVICE 10
408#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
409#define R8A66597_MAX_ROOT_HUB 1
410#else
411#define R8A66597_MAX_ROOT_HUB 2 404#define R8A66597_MAX_ROOT_HUB 2
412#endif
413#define R8A66597_MAX_SAMPLING 5 405#define R8A66597_MAX_SAMPLING 5
414#define R8A66597_RH_POLL_TIME 10 406#define R8A66597_RH_POLL_TIME 10
415#define R8A66597_MAX_DMA_CHANNEL 2 407#define R8A66597_MAX_DMA_CHANNEL 2
@@ -487,7 +479,7 @@ struct r8a66597_root_hub {
487struct r8a66597 { 479struct r8a66597 {
488 spinlock_t lock; 480 spinlock_t lock;
489 unsigned long reg; 481 unsigned long reg;
490#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 482#ifdef CONFIG_HAVE_CLK
491 struct clk *clk; 483 struct clk *clk;
492#endif 484#endif
493 struct r8a66597_platdata *pdata; 485 struct r8a66597_platdata *pdata;
@@ -504,6 +496,7 @@ struct r8a66597 {
504 unsigned short interval_map; 496 unsigned short interval_map;
505 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; 497 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE];
506 unsigned char dma_map; 498 unsigned char dma_map;
499 unsigned int max_root_hub;
507 500
508 struct list_head child_device; 501 struct list_head child_device;
509 unsigned long child_connect_map[4]; 502 unsigned long child_connect_map[4];
@@ -550,21 +543,22 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
550 unsigned long offset, u16 *buf, 543 unsigned long offset, u16 *buf,
551 int len) 544 int len)
552{ 545{
553#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
554 unsigned long fifoaddr = r8a66597->reg + offset; 546 unsigned long fifoaddr = r8a66597->reg + offset;
555 unsigned long count; 547 unsigned long count;
556 548
557 count = len / 4; 549 if (r8a66597->pdata->on_chip) {
558 insl(fifoaddr, buf, count); 550 count = len / 4;
551 insl(fifoaddr, buf, count);
559 552
560 if (len & 0x00000003) { 553 if (len & 0x00000003) {
561 unsigned long tmp = inl(fifoaddr); 554 unsigned long tmp = inl(fifoaddr);
562 memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03); 555 memcpy((unsigned char *)buf + count * 4, &tmp,
556 len & 0x03);
557 }
558 } else {
559 len = (len + 1) / 2;
560 insw(fifoaddr, buf, len);
563 } 561 }
564#else
565 len = (len + 1) / 2;
566 insw(r8a66597->reg + offset, buf, len);
567#endif
568} 562}
569 563
570static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, 564static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
@@ -578,33 +572,33 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
578 int len) 572 int len)
579{ 573{
580 unsigned long fifoaddr = r8a66597->reg + offset; 574 unsigned long fifoaddr = r8a66597->reg + offset;
581#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
582 unsigned long count; 575 unsigned long count;
583 unsigned char *pb; 576 unsigned char *pb;
584 int i; 577 int i;
585 578
586 count = len / 4; 579 if (r8a66597->pdata->on_chip) {
587 outsl(fifoaddr, buf, count); 580 count = len / 4;
581 outsl(fifoaddr, buf, count);
582
583 if (len & 0x00000003) {
584 pb = (unsigned char *)buf + count * 4;
585 for (i = 0; i < (len & 0x00000003); i++) {
586 if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
587 outb(pb[i], fifoaddr + i);
588 else
589 outb(pb[i], fifoaddr + 3 - i);
590 }
591 }
592 } else {
593 int odd = len & 0x0001;
588 594
589 if (len & 0x00000003) { 595 len = len / 2;
590 pb = (unsigned char *)buf + count * 4; 596 outsw(fifoaddr, buf, len);
591 for (i = 0; i < (len & 0x00000003); i++) { 597 if (unlikely(odd)) {
592 if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) 598 buf = &buf[len];
593 outb(pb[i], fifoaddr + i); 599 outb((unsigned char)*buf, fifoaddr);
594 else
595 outb(pb[i], fifoaddr + 3 - i);
596 } 600 }
597 } 601 }
598#else
599 int odd = len & 0x0001;
600
601 len = len / 2;
602 outsw(fifoaddr, buf, len);
603 if (unlikely(odd)) {
604 buf = &buf[len];
605 outb((unsigned char)*buf, fifoaddr);
606 }
607#endif
608} 602}
609 603
610static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, 604static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,