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path: root/drivers/usb/host/isp1760-hcd.h
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Diffstat (limited to 'drivers/usb/host/isp1760-hcd.h')
-rw-r--r--drivers/usb/host/isp1760-hcd.h78
1 files changed, 37 insertions, 41 deletions
diff --git a/drivers/usb/host/isp1760-hcd.h b/drivers/usb/host/isp1760-hcd.h
index 870507690607..014a7dfadf91 100644
--- a/drivers/usb/host/isp1760-hcd.h
+++ b/drivers/usb/host/isp1760-hcd.h
@@ -49,10 +49,9 @@ void deinit_kmem_cache(void);
49#define SW_RESET_RESET_ALL (1 << 0) 49#define SW_RESET_RESET_ALL (1 << 0)
50 50
51#define HC_BUFFER_STATUS_REG 0x334 51#define HC_BUFFER_STATUS_REG 0x334
52#define ATL_BUFFER 0x1 52#define ISO_BUF_FILL (1 << 2)
53#define INT_BUFFER 0x2 53#define INT_BUF_FILL (1 << 1)
54#define ISO_BUFFER 0x4 54#define ATL_BUF_FILL (1 << 0)
55#define BUFFER_MAP 0x7
56 55
57#define HC_MEMORY_REG 0x33c 56#define HC_MEMORY_REG 0x33c
58#define ISP_BANK(x) ((x) << 16) 57#define ISP_BANK(x) ((x) << 16)
@@ -68,14 +67,13 @@ void deinit_kmem_cache(void);
68#define HC_INTERRUPT_REG 0x310 67#define HC_INTERRUPT_REG 0x310
69 68
70#define HC_INTERRUPT_ENABLE 0x314 69#define HC_INTERRUPT_ENABLE 0x314
71#define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT | HC_EOT_INT)
72#define INTERRUPT_ENABLE_SOT_MASK (HC_INTL_INT | HC_SOT_INT | HC_EOT_INT)
73
74#define HC_ISO_INT (1 << 9) 70#define HC_ISO_INT (1 << 9)
75#define HC_ATL_INT (1 << 8) 71#define HC_ATL_INT (1 << 8)
76#define HC_INTL_INT (1 << 7) 72#define HC_INTL_INT (1 << 7)
77#define HC_EOT_INT (1 << 3) 73#define HC_EOT_INT (1 << 3)
78#define HC_SOT_INT (1 << 1) 74#define HC_SOT_INT (1 << 1)
75#define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT)
76#define INTERRUPT_ENABLE_SOT_MASK (HC_SOT_INT)
79 77
80#define HC_ISO_IRQ_MASK_OR_REG 0x318 78#define HC_ISO_IRQ_MASK_OR_REG 0x318
81#define HC_INT_IRQ_MASK_OR_REG 0x31C 79#define HC_INT_IRQ_MASK_OR_REG 0x31C
@@ -106,7 +104,7 @@ struct ptd {
106#define ATL_PTD_OFFSET 0x0c00 104#define ATL_PTD_OFFSET 0x0c00
107#define PAYLOAD_OFFSET 0x1000 105#define PAYLOAD_OFFSET 0x1000
108 106
109struct inter_packet_info { 107struct slotinfo {
110 struct isp1760_qh *qh; 108 struct isp1760_qh *qh;
111 struct isp1760_qtd *qtd; 109 struct isp1760_qtd *qtd;
112}; 110};
@@ -156,54 +154,52 @@ struct memory_chunk {
156 154
157/* ATL */ 155/* ATL */
158/* DW0 */ 156/* DW0 */
159#define PTD_VALID 1 157#define DW0_VALID_BIT 1
160#define PTD_LENGTH(x) (((u32) x) << 3) 158#define FROM_DW0_VALID(x) ((x) & 0x01)
161#define PTD_MAXPACKET(x) (((u32) x) << 18) 159#define TO_DW0_LENGTH(x) (((u32) x) << 3)
162#define PTD_MULTI(x) (((u32) x) << 29) 160#define TO_DW0_MAXPACKET(x) (((u32) x) << 18)
163#define PTD_ENDPOINT(x) (((u32) x) << 31) 161#define TO_DW0_MULTI(x) (((u32) x) << 29)
162#define TO_DW0_ENDPOINT(x) (((u32) x) << 31)
164/* DW1 */ 163/* DW1 */
165#define PTD_DEVICE_ADDR(x) (((u32) x) << 3) 164#define TO_DW1_DEVICE_ADDR(x) (((u32) x) << 3)
166#define PTD_PID_TOKEN(x) (((u32) x) << 10) 165#define TO_DW1_PID_TOKEN(x) (((u32) x) << 10)
167#define PTD_TRANS_BULK ((u32) 2 << 12) 166#define DW1_TRANS_BULK ((u32) 2 << 12)
168#define PTD_TRANS_INT ((u32) 3 << 12) 167#define DW1_TRANS_INT ((u32) 3 << 12)
169#define PTD_TRANS_SPLIT ((u32) 1 << 14) 168#define DW1_TRANS_SPLIT ((u32) 1 << 14)
170#define PTD_SE_USB_LOSPEED ((u32) 2 << 16) 169#define DW1_SE_USB_LOSPEED ((u32) 2 << 16)
171#define PTD_PORT_NUM(x) (((u32) x) << 18) 170#define TO_DW1_PORT_NUM(x) (((u32) x) << 18)
172#define PTD_HUB_NUM(x) (((u32) x) << 25) 171#define TO_DW1_HUB_NUM(x) (((u32) x) << 25)
173#define PTD_PING(x) (((u32) x) << 26)
174/* DW2 */ 172/* DW2 */
175#define PTD_RL_CNT(x) (((u32) x) << 25) 173#define TO_DW2_DATA_START_ADDR(x) (((u32) x) << 8)
176#define PTD_DATA_START_ADDR(x) (((u32) x) << 8) 174#define TO_DW2_RL(x) ((x) << 25)
177#define BASE_ADDR 0x1000 175#define FROM_DW2_RL(x) (((x) >> 25) & 0xf)
178/* DW3 */ 176/* DW3 */
179#define PTD_CERR(x) (((u32) x) << 23) 177#define FROM_DW3_NRBYTESTRANSFERRED(x) ((x) & 0x7fff)
180#define PTD_NAC_CNT(x) (((u32) x) << 19) 178#define FROM_DW3_SCS_NRBYTESTRANSFERRED(x) ((x) & 0x07ff)
181#define PTD_ACTIVE ((u32) 1 << 31) 179#define TO_DW3_NAKCOUNT(x) ((x) << 19)
182#define PTD_DATA_TOGGLE(x) (((u32) x) << 25) 180#define FROM_DW3_NAKCOUNT(x) (((x) >> 19) & 0xf)
183 181#define TO_DW3_CERR(x) ((x) << 23)
184#define DW3_HALT_BIT (1 << 30) 182#define FROM_DW3_CERR(x) (((x) >> 23) & 0x3)
183#define TO_DW3_DATA_TOGGLE(x) ((x) << 25)
184#define FROM_DW3_DATA_TOGGLE(x) (((x) >> 25) & 0x1)
185#define TO_DW3_PING(x) ((x) << 26)
186#define FROM_DW3_PING(x) (((x) >> 26) & 0x1)
185#define DW3_ERROR_BIT (1 << 28) 187#define DW3_ERROR_BIT (1 << 28)
186#define DW3_QTD_ACTIVE (1 << 31) 188#define DW3_BABBLE_BIT (1 << 29)
189#define DW3_HALT_BIT (1 << 30)
190#define DW3_ACTIVE_BIT (1 << 31)
187 191
188#define INT_UNDERRUN (1 << 2) 192#define INT_UNDERRUN (1 << 2)
189#define INT_BABBLE (1 << 1) 193#define INT_BABBLE (1 << 1)
190#define INT_EXACT (1 << 0) 194#define INT_EXACT (1 << 0)
191 195
192#define DW1_GET_PID(x) (((x) >> 10) & 0x3)
193#define PTD_XFERRED_LENGTH(x) ((x) & 0x7fff)
194#define PTD_XFERRED_LENGTH_LO(x) ((x) & 0x7ff)
195
196#define SETUP_PID (2) 196#define SETUP_PID (2)
197#define IN_PID (1) 197#define IN_PID (1)
198#define OUT_PID (0) 198#define OUT_PID (0)
199#define GET_QTD_TOKEN_TYPE(x) ((x) & 0x3)
200
201#define DATA_TOGGLE (1 << 31)
202#define GET_DATA_TOGGLE(x) ((x) >> 31)
203 199
204/* Errata 1 */ 200/* Errata 1 */
205#define RL_COUNTER (0) 201#define RL_COUNTER (0)
206#define NAK_COUNTER (0) 202#define NAK_COUNTER (0)
207#define ERR_COUNTER (2) 203#define ERR_COUNTER (2)
208 204
209#endif 205#endif /* _ISP1760_HCD_H_ */