diff options
Diffstat (limited to 'drivers/usb/host/ehci.h')
| -rw-r--r-- | drivers/usb/host/ehci.h | 59 |
1 files changed, 33 insertions, 26 deletions
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index 679c1cdcc915..6aac39f50e07 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (c) 2001-2002 by David Brownell | 2 | * Copyright (c) 2001-2002 by David Brownell |
| 3 | * | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the | 5 | * under the terms of the GNU General Public License as published by the |
| 6 | * Free Software Foundation; either version 2 of the License, or (at your | 6 | * Free Software Foundation; either version 2 of the License, or (at your |
| @@ -58,7 +58,6 @@ struct ehci_hcd { /* one per controller */ | |||
| 58 | /* async schedule support */ | 58 | /* async schedule support */ |
| 59 | struct ehci_qh *async; | 59 | struct ehci_qh *async; |
| 60 | struct ehci_qh *reclaim; | 60 | struct ehci_qh *reclaim; |
| 61 | unsigned reclaim_ready : 1; | ||
| 62 | unsigned scanning : 1; | 61 | unsigned scanning : 1; |
| 63 | 62 | ||
| 64 | /* periodic schedule support */ | 63 | /* periodic schedule support */ |
| @@ -81,8 +80,8 @@ struct ehci_hcd { /* one per controller */ | |||
| 81 | struct dma_pool *itd_pool; /* itd per iso urb */ | 80 | struct dma_pool *itd_pool; /* itd per iso urb */ |
| 82 | struct dma_pool *sitd_pool; /* sitd per split iso urb */ | 81 | struct dma_pool *sitd_pool; /* sitd per split iso urb */ |
| 83 | 82 | ||
| 83 | struct timer_list iaa_watchdog; | ||
| 84 | struct timer_list watchdog; | 84 | struct timer_list watchdog; |
| 85 | struct notifier_block reboot_notifier; | ||
| 86 | unsigned long actions; | 85 | unsigned long actions; |
| 87 | unsigned stamp; | 86 | unsigned stamp; |
| 88 | unsigned long next_statechange; | 87 | unsigned long next_statechange; |
| @@ -104,7 +103,7 @@ struct ehci_hcd { /* one per controller */ | |||
| 104 | #endif | 103 | #endif |
| 105 | }; | 104 | }; |
| 106 | 105 | ||
| 107 | /* convert between an HCD pointer and the corresponding EHCI_HCD */ | 106 | /* convert between an HCD pointer and the corresponding EHCI_HCD */ |
| 108 | static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd) | 107 | static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd) |
| 109 | { | 108 | { |
| 110 | return (struct ehci_hcd *) (hcd->hcd_priv); | 109 | return (struct ehci_hcd *) (hcd->hcd_priv); |
| @@ -115,9 +114,21 @@ static inline struct usb_hcd *ehci_to_hcd (struct ehci_hcd *ehci) | |||
| 115 | } | 114 | } |
| 116 | 115 | ||
| 117 | 116 | ||
| 117 | static inline void | ||
| 118 | iaa_watchdog_start (struct ehci_hcd *ehci) | ||
| 119 | { | ||
| 120 | WARN_ON(timer_pending(&ehci->iaa_watchdog)); | ||
| 121 | mod_timer (&ehci->iaa_watchdog, | ||
| 122 | jiffies + msecs_to_jiffies(EHCI_IAA_MSECS)); | ||
| 123 | } | ||
| 124 | |||
| 125 | static inline void iaa_watchdog_done (struct ehci_hcd *ehci) | ||
| 126 | { | ||
| 127 | del_timer (&ehci->iaa_watchdog); | ||
| 128 | } | ||
| 129 | |||
| 118 | enum ehci_timer_action { | 130 | enum ehci_timer_action { |
| 119 | TIMER_IO_WATCHDOG, | 131 | TIMER_IO_WATCHDOG, |
| 120 | TIMER_IAA_WATCHDOG, | ||
| 121 | TIMER_ASYNC_SHRINK, | 132 | TIMER_ASYNC_SHRINK, |
| 122 | TIMER_ASYNC_OFF, | 133 | TIMER_ASYNC_OFF, |
| 123 | }; | 134 | }; |
| @@ -135,9 +146,6 @@ timer_action (struct ehci_hcd *ehci, enum ehci_timer_action action) | |||
| 135 | unsigned long t; | 146 | unsigned long t; |
| 136 | 147 | ||
| 137 | switch (action) { | 148 | switch (action) { |
| 138 | case TIMER_IAA_WATCHDOG: | ||
| 139 | t = EHCI_IAA_JIFFIES; | ||
| 140 | break; | ||
| 141 | case TIMER_IO_WATCHDOG: | 149 | case TIMER_IO_WATCHDOG: |
| 142 | t = EHCI_IO_JIFFIES; | 150 | t = EHCI_IO_JIFFIES; |
| 143 | break; | 151 | break; |
| @@ -154,8 +162,7 @@ timer_action (struct ehci_hcd *ehci, enum ehci_timer_action action) | |||
| 154 | // async queue SHRINK often precedes IAA. while it's ready | 162 | // async queue SHRINK often precedes IAA. while it's ready |
| 155 | // to go OFF neither can matter, and afterwards the IO | 163 | // to go OFF neither can matter, and afterwards the IO |
| 156 | // watchdog stops unless there's still periodic traffic. | 164 | // watchdog stops unless there's still periodic traffic. |
| 157 | if (action != TIMER_IAA_WATCHDOG | 165 | if (time_before_eq(t, ehci->watchdog.expires) |
| 158 | && t > ehci->watchdog.expires | ||
| 159 | && timer_pending (&ehci->watchdog)) | 166 | && timer_pending (&ehci->watchdog)) |
| 160 | return; | 167 | return; |
| 161 | mod_timer (&ehci->watchdog, t); | 168 | mod_timer (&ehci->watchdog, t); |
| @@ -179,8 +186,8 @@ struct ehci_caps { | |||
| 179 | #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */ | 186 | #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */ |
| 180 | #define HCS_N_CC(p) (((p)>>12)&0xf) /* bits 15:12, #companion HCs */ | 187 | #define HCS_N_CC(p) (((p)>>12)&0xf) /* bits 15:12, #companion HCs */ |
| 181 | #define HCS_N_PCC(p) (((p)>>8)&0xf) /* bits 11:8, ports per CC */ | 188 | #define HCS_N_PCC(p) (((p)>>8)&0xf) /* bits 11:8, ports per CC */ |
| 182 | #define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */ | 189 | #define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */ |
| 183 | #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */ | 190 | #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */ |
| 184 | #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */ | 191 | #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */ |
| 185 | 192 | ||
| 186 | u32 hcc_params; /* HCCPARAMS - offset 0x8 */ | 193 | u32 hcc_params; /* HCCPARAMS - offset 0x8 */ |
| @@ -205,7 +212,7 @@ struct ehci_regs { | |||
| 205 | #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */ | 212 | #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */ |
| 206 | #define CMD_IAAD (1<<6) /* "doorbell" interrupt async advance */ | 213 | #define CMD_IAAD (1<<6) /* "doorbell" interrupt async advance */ |
| 207 | #define CMD_ASE (1<<5) /* async schedule enable */ | 214 | #define CMD_ASE (1<<5) /* async schedule enable */ |
| 208 | #define CMD_PSE (1<<4) /* periodic schedule enable */ | 215 | #define CMD_PSE (1<<4) /* periodic schedule enable */ |
| 209 | /* 3:2 is periodic frame list size */ | 216 | /* 3:2 is periodic frame list size */ |
| 210 | #define CMD_RESET (1<<1) /* reset HC not bus */ | 217 | #define CMD_RESET (1<<1) /* reset HC not bus */ |
| 211 | #define CMD_RUN (1<<0) /* start/stop HC */ | 218 | #define CMD_RUN (1<<0) /* start/stop HC */ |
| @@ -231,9 +238,9 @@ struct ehci_regs { | |||
| 231 | /* FRINDEX: offset 0x0C */ | 238 | /* FRINDEX: offset 0x0C */ |
| 232 | u32 frame_index; /* current microframe number */ | 239 | u32 frame_index; /* current microframe number */ |
| 233 | /* CTRLDSSEGMENT: offset 0x10 */ | 240 | /* CTRLDSSEGMENT: offset 0x10 */ |
| 234 | u32 segment; /* address bits 63:32 if needed */ | 241 | u32 segment; /* address bits 63:32 if needed */ |
| 235 | /* PERIODICLISTBASE: offset 0x14 */ | 242 | /* PERIODICLISTBASE: offset 0x14 */ |
| 236 | u32 frame_list; /* points to periodic list */ | 243 | u32 frame_list; /* points to periodic list */ |
| 237 | /* ASYNCLISTADDR: offset 0x18 */ | 244 | /* ASYNCLISTADDR: offset 0x18 */ |
| 238 | u32 async_next; /* address of next async queue head */ | 245 | u32 async_next; /* address of next async queue head */ |
| 239 | 246 | ||
| @@ -302,7 +309,7 @@ struct ehci_dbg_port { | |||
| 302 | 309 | ||
| 303 | /* | 310 | /* |
| 304 | * EHCI Specification 0.95 Section 3.5 | 311 | * EHCI Specification 0.95 Section 3.5 |
| 305 | * QTD: describe data transfer components (buffer, direction, ...) | 312 | * QTD: describe data transfer components (buffer, direction, ...) |
| 306 | * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram". | 313 | * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram". |
| 307 | * | 314 | * |
| 308 | * These are associated only with "QH" (Queue Head) structures, | 315 | * These are associated only with "QH" (Queue Head) structures, |
| @@ -312,7 +319,7 @@ struct ehci_qtd { | |||
| 312 | /* first part defined by EHCI spec */ | 319 | /* first part defined by EHCI spec */ |
| 313 | __le32 hw_next; /* see EHCI 3.5.1 */ | 320 | __le32 hw_next; /* see EHCI 3.5.1 */ |
| 314 | __le32 hw_alt_next; /* see EHCI 3.5.2 */ | 321 | __le32 hw_alt_next; /* see EHCI 3.5.2 */ |
| 315 | __le32 hw_token; /* see EHCI 3.5.3 */ | 322 | __le32 hw_token; /* see EHCI 3.5.3 */ |
| 316 | #define QTD_TOGGLE (1 << 31) /* data toggle */ | 323 | #define QTD_TOGGLE (1 << 31) /* data toggle */ |
| 317 | #define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff) | 324 | #define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff) |
| 318 | #define QTD_IOC (1 << 15) /* interrupt on complete */ | 325 | #define QTD_IOC (1 << 15) /* interrupt on complete */ |
| @@ -349,8 +356,8 @@ struct ehci_qtd { | |||
| 349 | /* values for that type tag */ | 356 | /* values for that type tag */ |
| 350 | #define Q_TYPE_ITD __constant_cpu_to_le32 (0 << 1) | 357 | #define Q_TYPE_ITD __constant_cpu_to_le32 (0 << 1) |
| 351 | #define Q_TYPE_QH __constant_cpu_to_le32 (1 << 1) | 358 | #define Q_TYPE_QH __constant_cpu_to_le32 (1 << 1) |
| 352 | #define Q_TYPE_SITD __constant_cpu_to_le32 (2 << 1) | 359 | #define Q_TYPE_SITD __constant_cpu_to_le32 (2 << 1) |
| 353 | #define Q_TYPE_FSTN __constant_cpu_to_le32 (3 << 1) | 360 | #define Q_TYPE_FSTN __constant_cpu_to_le32 (3 << 1) |
| 354 | 361 | ||
| 355 | /* next async queue entry, or pointer to interrupt/periodic QH */ | 362 | /* next async queue entry, or pointer to interrupt/periodic QH */ |
| 356 | #define QH_NEXT(dma) (cpu_to_le32(((u32)dma)&~0x01f)|Q_TYPE_QH) | 363 | #define QH_NEXT(dma) (cpu_to_le32(((u32)dma)&~0x01f)|Q_TYPE_QH) |
| @@ -367,7 +374,7 @@ struct ehci_qtd { | |||
| 367 | * For entries in the async schedule, the type tag always says "qh". | 374 | * For entries in the async schedule, the type tag always says "qh". |
| 368 | */ | 375 | */ |
| 369 | union ehci_shadow { | 376 | union ehci_shadow { |
| 370 | struct ehci_qh *qh; /* Q_TYPE_QH */ | 377 | struct ehci_qh *qh; /* Q_TYPE_QH */ |
| 371 | struct ehci_itd *itd; /* Q_TYPE_ITD */ | 378 | struct ehci_itd *itd; /* Q_TYPE_ITD */ |
| 372 | struct ehci_sitd *sitd; /* Q_TYPE_SITD */ | 379 | struct ehci_sitd *sitd; /* Q_TYPE_SITD */ |
| 373 | struct ehci_fstn *fstn; /* Q_TYPE_FSTN */ | 380 | struct ehci_fstn *fstn; /* Q_TYPE_FSTN */ |
| @@ -397,7 +404,7 @@ struct ehci_qh { | |||
| 397 | #define QH_HUBPORT 0x3f800000 | 404 | #define QH_HUBPORT 0x3f800000 |
| 398 | #define QH_MULT 0xc0000000 | 405 | #define QH_MULT 0xc0000000 |
| 399 | __le32 hw_current; /* qtd list - see EHCI 3.6.4 */ | 406 | __le32 hw_current; /* qtd list - see EHCI 3.6.4 */ |
| 400 | 407 | ||
| 401 | /* qtd overlay (hardware parts of a struct ehci_qtd) */ | 408 | /* qtd overlay (hardware parts of a struct ehci_qtd) */ |
| 402 | __le32 hw_qtd_next; | 409 | __le32 hw_qtd_next; |
| 403 | __le32 hw_alt_next; | 410 | __le32 hw_alt_next; |
| @@ -472,7 +479,7 @@ struct ehci_iso_stream { | |||
| 472 | struct list_head td_list; /* queued itds/sitds */ | 479 | struct list_head td_list; /* queued itds/sitds */ |
| 473 | struct list_head free_list; /* list of unused itds/sitds */ | 480 | struct list_head free_list; /* list of unused itds/sitds */ |
| 474 | struct usb_device *udev; | 481 | struct usb_device *udev; |
| 475 | struct usb_host_endpoint *ep; | 482 | struct usb_host_endpoint *ep; |
| 476 | 483 | ||
| 477 | /* output of (re)scheduling */ | 484 | /* output of (re)scheduling */ |
| 478 | unsigned long start; /* jiffies */ | 485 | unsigned long start; /* jiffies */ |
| @@ -492,8 +499,8 @@ struct ehci_iso_stream { | |||
| 492 | unsigned bandwidth; | 499 | unsigned bandwidth; |
| 493 | 500 | ||
| 494 | /* This is used to initialize iTD's hw_bufp fields */ | 501 | /* This is used to initialize iTD's hw_bufp fields */ |
| 495 | __le32 buf0; | 502 | __le32 buf0; |
| 496 | __le32 buf1; | 503 | __le32 buf1; |
| 497 | __le32 buf2; | 504 | __le32 buf2; |
| 498 | 505 | ||
| 499 | /* this is used to initialize sITD's tt info */ | 506 | /* this is used to initialize sITD's tt info */ |
| @@ -521,7 +528,7 @@ struct ehci_itd { | |||
| 521 | 528 | ||
| 522 | #define ITD_ACTIVE __constant_cpu_to_le32(EHCI_ISOC_ACTIVE) | 529 | #define ITD_ACTIVE __constant_cpu_to_le32(EHCI_ISOC_ACTIVE) |
| 523 | 530 | ||
| 524 | __le32 hw_bufp [7]; /* see EHCI 3.3.3 */ | 531 | __le32 hw_bufp [7]; /* see EHCI 3.3.3 */ |
| 525 | __le32 hw_bufp_hi [7]; /* Appendix B */ | 532 | __le32 hw_bufp_hi [7]; /* Appendix B */ |
| 526 | 533 | ||
| 527 | /* the rest is HCD-private */ | 534 | /* the rest is HCD-private */ |
| @@ -542,7 +549,7 @@ struct ehci_itd { | |||
| 542 | /*-------------------------------------------------------------------------*/ | 549 | /*-------------------------------------------------------------------------*/ |
| 543 | 550 | ||
| 544 | /* | 551 | /* |
| 545 | * EHCI Specification 0.95 Section 3.4 | 552 | * EHCI Specification 0.95 Section 3.4 |
| 546 | * siTD, aka split-transaction isochronous Transfer Descriptor | 553 | * siTD, aka split-transaction isochronous Transfer Descriptor |
| 547 | * ... describe full speed iso xfers through TT in hubs | 554 | * ... describe full speed iso xfers through TT in hubs |
| 548 | * see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD) | 555 | * see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD) |
