diff options
Diffstat (limited to 'drivers/usb/host/ehci-q.c')
-rw-r--r-- | drivers/usb/host/ehci-q.c | 140 |
1 files changed, 102 insertions, 38 deletions
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c index 3192f683f807..9a1384747f3b 100644 --- a/drivers/usb/host/ehci-q.c +++ b/drivers/usb/host/ehci-q.c | |||
@@ -93,6 +93,22 @@ qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd) | |||
93 | qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma); | 93 | qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma); |
94 | qh->hw_alt_next = EHCI_LIST_END(ehci); | 94 | qh->hw_alt_next = EHCI_LIST_END(ehci); |
95 | 95 | ||
96 | /* Except for control endpoints, we make hardware maintain data | ||
97 | * toggle (like OHCI) ... here (re)initialize the toggle in the QH, | ||
98 | * and set the pseudo-toggle in udev. Only usb_clear_halt() will | ||
99 | * ever clear it. | ||
100 | */ | ||
101 | if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) { | ||
102 | unsigned is_out, epnum; | ||
103 | |||
104 | is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8)); | ||
105 | epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f; | ||
106 | if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) { | ||
107 | qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE); | ||
108 | usb_settoggle (qh->dev, epnum, is_out, 1); | ||
109 | } | ||
110 | } | ||
111 | |||
96 | /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */ | 112 | /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */ |
97 | wmb (); | 113 | wmb (); |
98 | qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING); | 114 | qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING); |
@@ -123,6 +139,55 @@ qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh) | |||
123 | 139 | ||
124 | /*-------------------------------------------------------------------------*/ | 140 | /*-------------------------------------------------------------------------*/ |
125 | 141 | ||
142 | static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh); | ||
143 | |||
144 | static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd, | ||
145 | struct usb_host_endpoint *ep) | ||
146 | { | ||
147 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
148 | struct ehci_qh *qh = ep->hcpriv; | ||
149 | unsigned long flags; | ||
150 | |||
151 | spin_lock_irqsave(&ehci->lock, flags); | ||
152 | qh->clearing_tt = 0; | ||
153 | if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list) | ||
154 | && HC_IS_RUNNING(hcd->state)) | ||
155 | qh_link_async(ehci, qh); | ||
156 | spin_unlock_irqrestore(&ehci->lock, flags); | ||
157 | } | ||
158 | |||
159 | static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh, | ||
160 | struct urb *urb, u32 token) | ||
161 | { | ||
162 | |||
163 | /* If an async split transaction gets an error or is unlinked, | ||
164 | * the TT buffer may be left in an indeterminate state. We | ||
165 | * have to clear the TT buffer. | ||
166 | * | ||
167 | * Note: this routine is never called for Isochronous transfers. | ||
168 | */ | ||
169 | if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) { | ||
170 | #ifdef DEBUG | ||
171 | struct usb_device *tt = urb->dev->tt->hub; | ||
172 | dev_dbg(&tt->dev, | ||
173 | "clear tt buffer port %d, a%d ep%d t%08x\n", | ||
174 | urb->dev->ttport, urb->dev->devnum, | ||
175 | usb_pipeendpoint(urb->pipe), token); | ||
176 | #endif /* DEBUG */ | ||
177 | if (!ehci_is_TDI(ehci) | ||
178 | || urb->dev->tt->hub != | ||
179 | ehci_to_hcd(ehci)->self.root_hub) { | ||
180 | if (usb_hub_clear_tt_buffer(urb) == 0) | ||
181 | qh->clearing_tt = 1; | ||
182 | } else { | ||
183 | |||
184 | /* REVISIT ARC-derived cores don't clear the root | ||
185 | * hub TT buffer in this way... | ||
186 | */ | ||
187 | } | ||
188 | } | ||
189 | } | ||
190 | |||
126 | static int qtd_copy_status ( | 191 | static int qtd_copy_status ( |
127 | struct ehci_hcd *ehci, | 192 | struct ehci_hcd *ehci, |
128 | struct urb *urb, | 193 | struct urb *urb, |
@@ -149,6 +214,14 @@ static int qtd_copy_status ( | |||
149 | if (token & QTD_STS_BABBLE) { | 214 | if (token & QTD_STS_BABBLE) { |
150 | /* FIXME "must" disable babbling device's port too */ | 215 | /* FIXME "must" disable babbling device's port too */ |
151 | status = -EOVERFLOW; | 216 | status = -EOVERFLOW; |
217 | /* CERR nonzero + halt --> stall */ | ||
218 | } else if (QTD_CERR(token)) { | ||
219 | status = -EPIPE; | ||
220 | |||
221 | /* In theory, more than one of the following bits can be set | ||
222 | * since they are sticky and the transaction is retried. | ||
223 | * Which to test first is rather arbitrary. | ||
224 | */ | ||
152 | } else if (token & QTD_STS_MMF) { | 225 | } else if (token & QTD_STS_MMF) { |
153 | /* fs/ls interrupt xfer missed the complete-split */ | 226 | /* fs/ls interrupt xfer missed the complete-split */ |
154 | status = -EPROTO; | 227 | status = -EPROTO; |
@@ -157,21 +230,15 @@ static int qtd_copy_status ( | |||
157 | ? -ENOSR /* hc couldn't read data */ | 230 | ? -ENOSR /* hc couldn't read data */ |
158 | : -ECOMM; /* hc couldn't write data */ | 231 | : -ECOMM; /* hc couldn't write data */ |
159 | } else if (token & QTD_STS_XACT) { | 232 | } else if (token & QTD_STS_XACT) { |
160 | /* timeout, bad crc, wrong PID, etc; retried */ | 233 | /* timeout, bad CRC, wrong PID, etc */ |
161 | if (QTD_CERR (token)) | 234 | ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n", |
162 | status = -EPIPE; | 235 | urb->dev->devpath, |
163 | else { | 236 | usb_pipeendpoint(urb->pipe), |
164 | ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n", | 237 | usb_pipein(urb->pipe) ? "in" : "out"); |
165 | urb->dev->devpath, | 238 | status = -EPROTO; |
166 | usb_pipeendpoint (urb->pipe), | 239 | } else { /* unknown */ |
167 | usb_pipein (urb->pipe) ? "in" : "out"); | ||
168 | status = -EPROTO; | ||
169 | } | ||
170 | /* CERR nonzero + no errors + halt --> stall */ | ||
171 | } else if (QTD_CERR (token)) | ||
172 | status = -EPIPE; | ||
173 | else /* unknown */ | ||
174 | status = -EPROTO; | 240 | status = -EPROTO; |
241 | } | ||
175 | 242 | ||
176 | ehci_vdbg (ehci, | 243 | ehci_vdbg (ehci, |
177 | "dev%d ep%d%s qtd token %08x --> status %d\n", | 244 | "dev%d ep%d%s qtd token %08x --> status %d\n", |
@@ -179,28 +246,6 @@ static int qtd_copy_status ( | |||
179 | usb_pipeendpoint (urb->pipe), | 246 | usb_pipeendpoint (urb->pipe), |
180 | usb_pipein (urb->pipe) ? "in" : "out", | 247 | usb_pipein (urb->pipe) ? "in" : "out", |
181 | token, status); | 248 | token, status); |
182 | |||
183 | /* if async CSPLIT failed, try cleaning out the TT buffer */ | ||
184 | if (status != -EPIPE | ||
185 | && urb->dev->tt | ||
186 | && !usb_pipeint(urb->pipe) | ||
187 | && ((token & QTD_STS_MMF) != 0 | ||
188 | || QTD_CERR(token) == 0) | ||
189 | && (!ehci_is_TDI(ehci) | ||
190 | || urb->dev->tt->hub != | ||
191 | ehci_to_hcd(ehci)->self.root_hub)) { | ||
192 | #ifdef DEBUG | ||
193 | struct usb_device *tt = urb->dev->tt->hub; | ||
194 | dev_dbg (&tt->dev, | ||
195 | "clear tt buffer port %d, a%d ep%d t%08x\n", | ||
196 | urb->dev->ttport, urb->dev->devnum, | ||
197 | usb_pipeendpoint (urb->pipe), token); | ||
198 | #endif /* DEBUG */ | ||
199 | /* REVISIT ARC-derived cores don't clear the root | ||
200 | * hub TT buffer in this way... | ||
201 | */ | ||
202 | usb_hub_tt_clear_buffer (urb->dev, urb->pipe); | ||
203 | } | ||
204 | } | 249 | } |
205 | 250 | ||
206 | return status; | 251 | return status; |
@@ -391,9 +436,16 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh) | |||
391 | /* qh unlinked; token in overlay may be most current */ | 436 | /* qh unlinked; token in overlay may be most current */ |
392 | if (state == QH_STATE_IDLE | 437 | if (state == QH_STATE_IDLE |
393 | && cpu_to_hc32(ehci, qtd->qtd_dma) | 438 | && cpu_to_hc32(ehci, qtd->qtd_dma) |
394 | == qh->hw_current) | 439 | == qh->hw_current) { |
395 | token = hc32_to_cpu(ehci, qh->hw_token); | 440 | token = hc32_to_cpu(ehci, qh->hw_token); |
396 | 441 | ||
442 | /* An unlink may leave an incomplete | ||
443 | * async transaction in the TT buffer. | ||
444 | * We have to clear it. | ||
445 | */ | ||
446 | ehci_clear_tt_buffer(ehci, qh, urb, token); | ||
447 | } | ||
448 | |||
397 | /* force halt for unlinked or blocked qh, so we'll | 449 | /* force halt for unlinked or blocked qh, so we'll |
398 | * patch the qh later and so that completions can't | 450 | * patch the qh later and so that completions can't |
399 | * activate it while we "know" it's stopped. | 451 | * activate it while we "know" it's stopped. |
@@ -419,6 +471,13 @@ halt: | |||
419 | && (qtd->hw_alt_next | 471 | && (qtd->hw_alt_next |
420 | & EHCI_LIST_END(ehci))) | 472 | & EHCI_LIST_END(ehci))) |
421 | last_status = -EINPROGRESS; | 473 | last_status = -EINPROGRESS; |
474 | |||
475 | /* As part of low/full-speed endpoint-halt processing | ||
476 | * we must clear the TT buffer (11.17.5). | ||
477 | */ | ||
478 | if (unlikely(last_status != -EINPROGRESS && | ||
479 | last_status != -EREMOTEIO)) | ||
480 | ehci_clear_tt_buffer(ehci, qh, urb, token); | ||
422 | } | 481 | } |
423 | 482 | ||
424 | /* if we're removing something not at the queue head, | 483 | /* if we're removing something not at the queue head, |
@@ -834,6 +893,7 @@ done: | |||
834 | qh->qh_state = QH_STATE_IDLE; | 893 | qh->qh_state = QH_STATE_IDLE; |
835 | qh->hw_info1 = cpu_to_hc32(ehci, info1); | 894 | qh->hw_info1 = cpu_to_hc32(ehci, info1); |
836 | qh->hw_info2 = cpu_to_hc32(ehci, info2); | 895 | qh->hw_info2 = cpu_to_hc32(ehci, info2); |
896 | usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1); | ||
837 | qh_refresh (ehci, qh); | 897 | qh_refresh (ehci, qh); |
838 | return qh; | 898 | return qh; |
839 | } | 899 | } |
@@ -847,6 +907,10 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh) | |||
847 | __hc32 dma = QH_NEXT(ehci, qh->qh_dma); | 907 | __hc32 dma = QH_NEXT(ehci, qh->qh_dma); |
848 | struct ehci_qh *head; | 908 | struct ehci_qh *head; |
849 | 909 | ||
910 | /* Don't link a QH if there's a Clear-TT-Buffer pending */ | ||
911 | if (unlikely(qh->clearing_tt)) | ||
912 | return; | ||
913 | |||
850 | /* (re)start the async schedule? */ | 914 | /* (re)start the async schedule? */ |
851 | head = ehci->async; | 915 | head = ehci->async; |
852 | timer_action_done (ehci, TIMER_ASYNC_OFF); | 916 | timer_action_done (ehci, TIMER_ASYNC_OFF); |
@@ -864,7 +928,7 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh) | |||
864 | } | 928 | } |
865 | } | 929 | } |
866 | 930 | ||
867 | /* clear halt and maybe recover from silicon quirk */ | 931 | /* clear halt and/or toggle; and maybe recover from silicon quirk */ |
868 | if (qh->qh_state == QH_STATE_IDLE) | 932 | if (qh->qh_state == QH_STATE_IDLE) |
869 | qh_refresh (ehci, qh); | 933 | qh_refresh (ehci, qh); |
870 | 934 | ||