diff options
Diffstat (limited to 'drivers/usb/host/ehci-pci.c')
-rw-r--r-- | drivers/usb/host/ehci-pci.c | 166 |
1 files changed, 79 insertions, 87 deletions
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index b654e3f800b4..441c26064b44 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c | |||
@@ -58,15 +58,76 @@ static int bios_handoff(struct ehci_hcd *ehci, int where, u32 cap) | |||
58 | return 0; | 58 | return 0; |
59 | } | 59 | } |
60 | 60 | ||
61 | /* called by khubd or root hub init threads */ | 61 | /* called after powerup, by probe or system-pm "wakeup" */ |
62 | static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev) | ||
63 | { | ||
64 | u32 temp; | ||
65 | int retval; | ||
66 | unsigned count = 256/4; | ||
67 | |||
68 | /* optional debug port, normally in the first BAR */ | ||
69 | temp = pci_find_capability(pdev, 0x0a); | ||
70 | if (temp) { | ||
71 | pci_read_config_dword(pdev, temp, &temp); | ||
72 | temp >>= 16; | ||
73 | if ((temp & (3 << 13)) == (1 << 13)) { | ||
74 | temp &= 0x1fff; | ||
75 | ehci->debug = ehci_to_hcd(ehci)->regs + temp; | ||
76 | temp = readl(&ehci->debug->control); | ||
77 | ehci_info(ehci, "debug port %d%s\n", | ||
78 | HCS_DEBUG_PORT(ehci->hcs_params), | ||
79 | (temp & DBGP_ENABLED) | ||
80 | ? " IN USE" | ||
81 | : ""); | ||
82 | if (!(temp & DBGP_ENABLED)) | ||
83 | ehci->debug = NULL; | ||
84 | } | ||
85 | } | ||
86 | |||
87 | temp = HCC_EXT_CAPS(readl(&ehci->caps->hcc_params)); | ||
88 | |||
89 | /* EHCI 0.96 and later may have "extended capabilities" */ | ||
90 | while (temp && count--) { | ||
91 | u32 cap; | ||
92 | |||
93 | pci_read_config_dword(pdev, temp, &cap); | ||
94 | ehci_dbg(ehci, "capability %04x at %02x\n", cap, temp); | ||
95 | switch (cap & 0xff) { | ||
96 | case 1: /* BIOS/SMM/... handoff */ | ||
97 | if (bios_handoff(ehci, temp, cap) != 0) | ||
98 | return -EOPNOTSUPP; | ||
99 | break; | ||
100 | case 0: /* illegal reserved capability */ | ||
101 | ehci_dbg(ehci, "illegal capability!\n"); | ||
102 | cap = 0; | ||
103 | /* FALLTHROUGH */ | ||
104 | default: /* unknown */ | ||
105 | break; | ||
106 | } | ||
107 | temp = (cap >> 8) & 0xff; | ||
108 | } | ||
109 | if (!count) { | ||
110 | ehci_err(ehci, "bogus capabilities ... PCI problems!\n"); | ||
111 | return -EIO; | ||
112 | } | ||
113 | |||
114 | /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */ | ||
115 | retval = pci_set_mwi(pdev); | ||
116 | if (!retval) | ||
117 | ehci_dbg(ehci, "MWI active\n"); | ||
118 | |||
119 | ehci_port_power(ehci, 0); | ||
120 | |||
121 | return 0; | ||
122 | } | ||
123 | |||
124 | /* called by khubd or root hub (re)init threads; leaves HC in halt state */ | ||
62 | static int ehci_pci_reset(struct usb_hcd *hcd) | 125 | static int ehci_pci_reset(struct usb_hcd *hcd) |
63 | { | 126 | { |
64 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | 127 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
65 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); | 128 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); |
66 | u32 temp; | 129 | u32 temp; |
67 | unsigned count = 256/4; | 130 | int retval; |
68 | |||
69 | spin_lock_init (&ehci->lock); | ||
70 | 131 | ||
71 | ehci->caps = hcd->regs; | 132 | ehci->caps = hcd->regs; |
72 | ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase)); | 133 | ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase)); |
@@ -76,6 +137,10 @@ static int ehci_pci_reset(struct usb_hcd *hcd) | |||
76 | /* cache this readonly data; minimize chip reads */ | 137 | /* cache this readonly data; minimize chip reads */ |
77 | ehci->hcs_params = readl(&ehci->caps->hcs_params); | 138 | ehci->hcs_params = readl(&ehci->caps->hcs_params); |
78 | 139 | ||
140 | retval = ehci_halt(ehci); | ||
141 | if (retval) | ||
142 | return retval; | ||
143 | |||
79 | /* NOTE: only the parts below this line are PCI-specific */ | 144 | /* NOTE: only the parts below this line are PCI-specific */ |
80 | 145 | ||
81 | switch (pdev->vendor) { | 146 | switch (pdev->vendor) { |
@@ -111,57 +176,9 @@ static int ehci_pci_reset(struct usb_hcd *hcd) | |||
111 | break; | 176 | break; |
112 | } | 177 | } |
113 | 178 | ||
114 | /* optional debug port, normally in the first BAR */ | ||
115 | temp = pci_find_capability(pdev, 0x0a); | ||
116 | if (temp) { | ||
117 | pci_read_config_dword(pdev, temp, &temp); | ||
118 | temp >>= 16; | ||
119 | if ((temp & (3 << 13)) == (1 << 13)) { | ||
120 | temp &= 0x1fff; | ||
121 | ehci->debug = hcd->regs + temp; | ||
122 | temp = readl(&ehci->debug->control); | ||
123 | ehci_info(ehci, "debug port %d%s\n", | ||
124 | HCS_DEBUG_PORT(ehci->hcs_params), | ||
125 | (temp & DBGP_ENABLED) | ||
126 | ? " IN USE" | ||
127 | : ""); | ||
128 | if (!(temp & DBGP_ENABLED)) | ||
129 | ehci->debug = NULL; | ||
130 | } | ||
131 | } | ||
132 | |||
133 | temp = HCC_EXT_CAPS(readl(&ehci->caps->hcc_params)); | ||
134 | |||
135 | /* EHCI 0.96 and later may have "extended capabilities" */ | ||
136 | while (temp && count--) { | ||
137 | u32 cap; | ||
138 | |||
139 | pci_read_config_dword(to_pci_dev(hcd->self.controller), | ||
140 | temp, &cap); | ||
141 | ehci_dbg(ehci, "capability %04x at %02x\n", cap, temp); | ||
142 | switch (cap & 0xff) { | ||
143 | case 1: /* BIOS/SMM/... handoff */ | ||
144 | if (bios_handoff(ehci, temp, cap) != 0) | ||
145 | return -EOPNOTSUPP; | ||
146 | break; | ||
147 | case 0: /* illegal reserved capability */ | ||
148 | ehci_warn(ehci, "illegal capability!\n"); | ||
149 | cap = 0; | ||
150 | /* FALLTHROUGH */ | ||
151 | default: /* unknown */ | ||
152 | break; | ||
153 | } | ||
154 | temp = (cap >> 8) & 0xff; | ||
155 | } | ||
156 | if (!count) { | ||
157 | ehci_err(ehci, "bogus capabilities ... PCI problems!\n"); | ||
158 | return -EIO; | ||
159 | } | ||
160 | if (ehci_is_TDI(ehci)) | 179 | if (ehci_is_TDI(ehci)) |
161 | ehci_reset(ehci); | 180 | ehci_reset(ehci); |
162 | 181 | ||
163 | ehci_port_power(ehci, 0); | ||
164 | |||
165 | /* at least the Genesys GL880S needs fixup here */ | 182 | /* at least the Genesys GL880S needs fixup here */ |
166 | temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); | 183 | temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); |
167 | temp &= 0x0f; | 184 | temp &= 0x0f; |
@@ -184,39 +201,15 @@ static int ehci_pci_reset(struct usb_hcd *hcd) | |||
184 | } | 201 | } |
185 | } | 202 | } |
186 | 203 | ||
187 | /* force HC to halt state */ | ||
188 | return ehci_halt(ehci); | ||
189 | } | ||
190 | |||
191 | static int ehci_pci_start(struct usb_hcd *hcd) | ||
192 | { | ||
193 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
194 | int result = 0; | ||
195 | struct pci_dev *pdev; | ||
196 | u16 port_wake; | ||
197 | |||
198 | pdev = to_pci_dev(hcd->self.controller); | ||
199 | |||
200 | /* Serial Bus Release Number is at PCI 0x60 offset */ | 204 | /* Serial Bus Release Number is at PCI 0x60 offset */ |
201 | pci_read_config_byte(pdev, 0x60, &ehci->sbrn); | 205 | pci_read_config_byte(pdev, 0x60, &ehci->sbrn); |
202 | 206 | ||
203 | /* port wake capability, reported by boot firmware */ | 207 | /* REVISIT: per-port wake capability (PCI 0x62) currently unused */ |
204 | pci_read_config_word(pdev, 0x62, &port_wake); | ||
205 | hcd->can_wakeup = (port_wake & 1) != 0; | ||
206 | |||
207 | /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */ | ||
208 | result = pci_set_mwi(pdev); | ||
209 | if (!result) | ||
210 | ehci_dbg(ehci, "MWI active\n"); | ||
211 | |||
212 | return ehci_run(hcd); | ||
213 | } | ||
214 | 208 | ||
215 | /* always called by thread; normally rmmod */ | 209 | retval = ehci_pci_reinit(ehci, pdev); |
216 | 210 | ||
217 | static void ehci_pci_stop(struct usb_hcd *hcd) | 211 | /* finish init */ |
218 | { | 212 | return ehci_init(hcd); |
219 | ehci_stop(hcd); | ||
220 | } | 213 | } |
221 | 214 | ||
222 | /*-------------------------------------------------------------------------*/ | 215 | /*-------------------------------------------------------------------------*/ |
@@ -250,6 +243,7 @@ static int ehci_pci_resume(struct usb_hcd *hcd) | |||
250 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | 243 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
251 | unsigned port; | 244 | unsigned port; |
252 | struct usb_device *root = hcd->self.root_hub; | 245 | struct usb_device *root = hcd->self.root_hub; |
246 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); | ||
253 | int retval = -EINVAL; | 247 | int retval = -EINVAL; |
254 | 248 | ||
255 | // maybe restore FLADJ | 249 | // maybe restore FLADJ |
@@ -258,7 +252,7 @@ static int ehci_pci_resume(struct usb_hcd *hcd) | |||
258 | msleep(100); | 252 | msleep(100); |
259 | 253 | ||
260 | /* If CF is clear, we lost PCI Vaux power and need to restart. */ | 254 | /* If CF is clear, we lost PCI Vaux power and need to restart. */ |
261 | if (readl(&ehci->regs->configured_flag) != cpu_to_le32(FLAG_CF)) | 255 | if (readl(&ehci->regs->configured_flag) != FLAG_CF) |
262 | goto restart; | 256 | goto restart; |
263 | 257 | ||
264 | /* If any port is suspended (or owned by the companion), | 258 | /* If any port is suspended (or owned by the companion), |
@@ -292,7 +286,7 @@ restart: | |||
292 | */ | 286 | */ |
293 | (void) ehci_halt(ehci); | 287 | (void) ehci_halt(ehci); |
294 | (void) ehci_reset(ehci); | 288 | (void) ehci_reset(ehci); |
295 | (void) ehci_pci_reset(hcd); | 289 | (void) ehci_pci_reinit(ehci, pdev); |
296 | 290 | ||
297 | /* emptying the schedule aborts any urbs */ | 291 | /* emptying the schedule aborts any urbs */ |
298 | spin_lock_irq(&ehci->lock); | 292 | spin_lock_irq(&ehci->lock); |
@@ -304,9 +298,7 @@ restart: | |||
304 | /* restart; khubd will disconnect devices */ | 298 | /* restart; khubd will disconnect devices */ |
305 | retval = ehci_run(hcd); | 299 | retval = ehci_run(hcd); |
306 | 300 | ||
307 | /* here we "know" root ports should always stay powered; | 301 | /* here we "know" root ports should always stay powered */ |
308 | * but some controllers may lose all power. | ||
309 | */ | ||
310 | ehci_port_power(ehci, 1); | 302 | ehci_port_power(ehci, 1); |
311 | 303 | ||
312 | return retval; | 304 | return retval; |
@@ -328,12 +320,12 @@ static const struct hc_driver ehci_pci_hc_driver = { | |||
328 | * basic lifecycle operations | 320 | * basic lifecycle operations |
329 | */ | 321 | */ |
330 | .reset = ehci_pci_reset, | 322 | .reset = ehci_pci_reset, |
331 | .start = ehci_pci_start, | 323 | .start = ehci_run, |
332 | #ifdef CONFIG_PM | 324 | #ifdef CONFIG_PM |
333 | .suspend = ehci_pci_suspend, | 325 | .suspend = ehci_pci_suspend, |
334 | .resume = ehci_pci_resume, | 326 | .resume = ehci_pci_resume, |
335 | #endif | 327 | #endif |
336 | .stop = ehci_pci_stop, | 328 | .stop = ehci_stop, |
337 | 329 | ||
338 | /* | 330 | /* |
339 | * managing i/o requests and associated device resources | 331 | * managing i/o requests and associated device resources |