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path: root/drivers/usb/host/ehci-pci.c
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Diffstat (limited to 'drivers/usb/host/ehci-pci.c')
-rw-r--r--drivers/usb/host/ehci-pci.c260
1 files changed, 125 insertions, 135 deletions
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 0f2be91e5e0e..b654e3f800b4 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -27,7 +27,7 @@
27/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/... 27/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
28 * off the controller (maybe it can boot from highspeed USB disks). 28 * off the controller (maybe it can boot from highspeed USB disks).
29 */ 29 */
30static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap) 30static int bios_handoff(struct ehci_hcd *ehci, int where, u32 cap)
31{ 31{
32 struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 32 struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
33 33
@@ -48,7 +48,7 @@ static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
48 where, cap); 48 where, cap);
49 // some BIOS versions seem buggy... 49 // some BIOS versions seem buggy...
50 // return 1; 50 // return 1;
51 ehci_warn (ehci, "continuing after BIOS bug...\n"); 51 ehci_warn(ehci, "continuing after BIOS bug...\n");
52 /* disable all SMIs, and clear "BIOS owns" flag */ 52 /* disable all SMIs, and clear "BIOS owns" flag */
53 pci_write_config_dword(pdev, where + 4, 0); 53 pci_write_config_dword(pdev, where + 4, 0);
54 pci_write_config_byte(pdev, where + 2, 0); 54 pci_write_config_byte(pdev, where + 2, 0);
@@ -59,95 +59,93 @@ static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
59} 59}
60 60
61/* called by khubd or root hub init threads */ 61/* called by khubd or root hub init threads */
62static int ehci_pci_reset (struct usb_hcd *hcd) 62static int ehci_pci_reset(struct usb_hcd *hcd)
63{ 63{
64 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 64 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
65 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
65 u32 temp; 66 u32 temp;
66 unsigned count = 256/4; 67 unsigned count = 256/4;
67 68
68 spin_lock_init (&ehci->lock); 69 spin_lock_init (&ehci->lock);
69 70
70 ehci->caps = hcd->regs; 71 ehci->caps = hcd->regs;
71 ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase)); 72 ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase));
72 dbg_hcs_params (ehci, "reset"); 73 dbg_hcs_params(ehci, "reset");
73 dbg_hcc_params (ehci, "reset"); 74 dbg_hcc_params(ehci, "reset");
74 75
75 /* cache this readonly data; minimize chip reads */ 76 /* cache this readonly data; minimize chip reads */
76 ehci->hcs_params = readl (&ehci->caps->hcs_params); 77 ehci->hcs_params = readl(&ehci->caps->hcs_params);
77 78
78 if (hcd->self.controller->bus == &pci_bus_type) { 79 /* NOTE: only the parts below this line are PCI-specific */
79 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
80 80
81 switch (pdev->vendor) { 81 switch (pdev->vendor) {
82 case PCI_VENDOR_ID_TDI: 82 case PCI_VENDOR_ID_TDI:
83 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { 83 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
84 ehci->is_tdi_rh_tt = 1; 84 ehci->is_tdi_rh_tt = 1;
85 tdi_reset (ehci); 85 tdi_reset(ehci);
86 } 86 }
87 break; 87 break;
88 case PCI_VENDOR_ID_AMD: 88 case PCI_VENDOR_ID_AMD:
89 /* AMD8111 EHCI doesn't work, according to AMD errata */ 89 /* AMD8111 EHCI doesn't work, according to AMD errata */
90 if (pdev->device == 0x7463) { 90 if (pdev->device == 0x7463) {
91 ehci_info (ehci, "ignoring AMD8111 (errata)\n"); 91 ehci_info(ehci, "ignoring AMD8111 (errata)\n");
92 return -EIO; 92 return -EIO;
93 } 93 }
94 break; 94 break;
95 case PCI_VENDOR_ID_NVIDIA: 95 case PCI_VENDOR_ID_NVIDIA:
96 /* NVidia reports that certain chips don't handle 96 /* NVidia reports that certain chips don't handle
97 * QH, ITD, or SITD addresses above 2GB. (But TD, 97 * QH, ITD, or SITD addresses above 2GB. (But TD,
98 * data buffer, and periodic schedule are normal.) 98 * data buffer, and periodic schedule are normal.)
99 */ 99 */
100 switch (pdev->device) { 100 switch (pdev->device) {
101 case 0x003c: /* MCP04 */ 101 case 0x003c: /* MCP04 */
102 case 0x005b: /* CK804 */ 102 case 0x005b: /* CK804 */
103 case 0x00d8: /* CK8 */ 103 case 0x00d8: /* CK8 */
104 case 0x00e8: /* CK8S */ 104 case 0x00e8: /* CK8S */
105 if (pci_set_consistent_dma_mask(pdev, 105 if (pci_set_consistent_dma_mask(pdev,
106 DMA_31BIT_MASK) < 0) 106 DMA_31BIT_MASK) < 0)
107 ehci_warn (ehci, "can't enable NVidia " 107 ehci_warn(ehci, "can't enable NVidia "
108 "workaround for >2GB RAM\n"); 108 "workaround for >2GB RAM\n");
109 break;
110 }
111 break; 109 break;
112 } 110 }
111 break;
112 }
113 113
114 /* optional debug port, normally in the first BAR */ 114 /* optional debug port, normally in the first BAR */
115 temp = pci_find_capability (pdev, 0x0a); 115 temp = pci_find_capability(pdev, 0x0a);
116 if (temp) { 116 if (temp) {
117 pci_read_config_dword(pdev, temp, &temp); 117 pci_read_config_dword(pdev, temp, &temp);
118 temp >>= 16; 118 temp >>= 16;
119 if ((temp & (3 << 13)) == (1 << 13)) { 119 if ((temp & (3 << 13)) == (1 << 13)) {
120 temp &= 0x1fff; 120 temp &= 0x1fff;
121 ehci->debug = hcd->regs + temp; 121 ehci->debug = hcd->regs + temp;
122 temp = readl (&ehci->debug->control); 122 temp = readl(&ehci->debug->control);
123 ehci_info (ehci, "debug port %d%s\n", 123 ehci_info(ehci, "debug port %d%s\n",
124 HCS_DEBUG_PORT(ehci->hcs_params), 124 HCS_DEBUG_PORT(ehci->hcs_params),
125 (temp & DBGP_ENABLED) 125 (temp & DBGP_ENABLED)
126 ? " IN USE" 126 ? " IN USE"
127 : ""); 127 : "");
128 if (!(temp & DBGP_ENABLED)) 128 if (!(temp & DBGP_ENABLED))
129 ehci->debug = NULL; 129 ehci->debug = NULL;
130 }
131 } 130 }
131 }
132 132
133 temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params)); 133 temp = HCC_EXT_CAPS(readl(&ehci->caps->hcc_params));
134 } else
135 temp = 0;
136 134
137 /* EHCI 0.96 and later may have "extended capabilities" */ 135 /* EHCI 0.96 and later may have "extended capabilities" */
138 while (temp && count--) { 136 while (temp && count--) {
139 u32 cap; 137 u32 cap;
140 138
141 pci_read_config_dword (to_pci_dev(hcd->self.controller), 139 pci_read_config_dword(to_pci_dev(hcd->self.controller),
142 temp, &cap); 140 temp, &cap);
143 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp); 141 ehci_dbg(ehci, "capability %04x at %02x\n", cap, temp);
144 switch (cap & 0xff) { 142 switch (cap & 0xff) {
145 case 1: /* BIOS/SMM/... handoff */ 143 case 1: /* BIOS/SMM/... handoff */
146 if (bios_handoff (ehci, temp, cap) != 0) 144 if (bios_handoff(ehci, temp, cap) != 0)
147 return -EOPNOTSUPP; 145 return -EOPNOTSUPP;
148 break; 146 break;
149 case 0: /* illegal reserved capability */ 147 case 0: /* illegal reserved capability */
150 ehci_warn (ehci, "illegal capability!\n"); 148 ehci_warn(ehci, "illegal capability!\n");
151 cap = 0; 149 cap = 0;
152 /* FALLTHROUGH */ 150 /* FALLTHROUGH */
153 default: /* unknown */ 151 default: /* unknown */
@@ -156,77 +154,69 @@ static int ehci_pci_reset (struct usb_hcd *hcd)
156 temp = (cap >> 8) & 0xff; 154 temp = (cap >> 8) & 0xff;
157 } 155 }
158 if (!count) { 156 if (!count) {
159 ehci_err (ehci, "bogus capabilities ... PCI problems!\n"); 157 ehci_err(ehci, "bogus capabilities ... PCI problems!\n");
160 return -EIO; 158 return -EIO;
161 } 159 }
162 if (ehci_is_TDI(ehci)) 160 if (ehci_is_TDI(ehci))
163 ehci_reset (ehci); 161 ehci_reset(ehci);
164 162
165 ehci_port_power (ehci, 0); 163 ehci_port_power(ehci, 0);
166 164
167 /* at least the Genesys GL880S needs fixup here */ 165 /* at least the Genesys GL880S needs fixup here */
168 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); 166 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
169 temp &= 0x0f; 167 temp &= 0x0f;
170 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { 168 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
171 ehci_dbg (ehci, "bogus port configuration: " 169 ehci_dbg(ehci, "bogus port configuration: "
172 "cc=%d x pcc=%d < ports=%d\n", 170 "cc=%d x pcc=%d < ports=%d\n",
173 HCS_N_CC(ehci->hcs_params), 171 HCS_N_CC(ehci->hcs_params),
174 HCS_N_PCC(ehci->hcs_params), 172 HCS_N_PCC(ehci->hcs_params),
175 HCS_N_PORTS(ehci->hcs_params)); 173 HCS_N_PORTS(ehci->hcs_params));
176 174
177 if (hcd->self.controller->bus == &pci_bus_type) { 175 switch (pdev->vendor) {
178 struct pci_dev *pdev; 176 case 0x17a0: /* GENESYS */
179 177 /* GL880S: should be PORTS=2 */
180 pdev = to_pci_dev(hcd->self.controller); 178 temp |= (ehci->hcs_params & ~0xf);
181 switch (pdev->vendor) { 179 ehci->hcs_params = temp;
182 case 0x17a0: /* GENESYS */ 180 break;
183 /* GL880S: should be PORTS=2 */ 181 case PCI_VENDOR_ID_NVIDIA:
184 temp |= (ehci->hcs_params & ~0xf); 182 /* NF4: should be PCC=10 */
185 ehci->hcs_params = temp; 183 break;
186 break;
187 case PCI_VENDOR_ID_NVIDIA:
188 /* NF4: should be PCC=10 */
189 break;
190 }
191 } 184 }
192 } 185 }
193 186
194 /* force HC to halt state */ 187 /* force HC to halt state */
195 return ehci_halt (ehci); 188 return ehci_halt(ehci);
196} 189}
197 190
198static int ehci_pci_start (struct usb_hcd *hcd) 191static int ehci_pci_start(struct usb_hcd *hcd)
199{ 192{
200 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 193 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
201 int result = 0; 194 int result = 0;
202 195 struct pci_dev *pdev;
203 if (hcd->self.controller->bus == &pci_bus_type) { 196 u16 port_wake;
204 struct pci_dev *pdev;
205 u16 port_wake;
206 197
207 pdev = to_pci_dev(hcd->self.controller); 198 pdev = to_pci_dev(hcd->self.controller);
208 199
209 /* Serial Bus Release Number is at PCI 0x60 offset */ 200 /* Serial Bus Release Number is at PCI 0x60 offset */
210 pci_read_config_byte(pdev, 0x60, &ehci->sbrn); 201 pci_read_config_byte(pdev, 0x60, &ehci->sbrn);
211 202
212 /* port wake capability, reported by boot firmware */ 203 /* port wake capability, reported by boot firmware */
213 pci_read_config_word(pdev, 0x62, &port_wake); 204 pci_read_config_word(pdev, 0x62, &port_wake);
214 hcd->can_wakeup = (port_wake & 1) != 0; 205 hcd->can_wakeup = (port_wake & 1) != 0;
215 206
216 /* help hc dma work well with cachelines */ 207 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
217 result = pci_set_mwi(pdev); 208 result = pci_set_mwi(pdev);
218 if (result) 209 if (!result)
219 ehci_dbg(ehci, "unable to enable MWI - not fatal.\n"); 210 ehci_dbg(ehci, "MWI active\n");
220 }
221 211
222 return ehci_run (hcd); 212 return ehci_run(hcd);
223} 213}
224 214
225/* always called by thread; normally rmmod */ 215/* always called by thread; normally rmmod */
226 216
227static void ehci_pci_stop (struct usb_hcd *hcd) 217static void ehci_pci_stop(struct usb_hcd *hcd)
228{ 218{
229 ehci_stop (hcd); 219 ehci_stop(hcd);
230} 220}
231 221
232/*-------------------------------------------------------------------------*/ 222/*-------------------------------------------------------------------------*/
@@ -242,12 +232,12 @@ static void ehci_pci_stop (struct usb_hcd *hcd)
242 * Also they depend on separate root hub suspend/resume. 232 * Also they depend on separate root hub suspend/resume.
243 */ 233 */
244 234
245static int ehci_pci_suspend (struct usb_hcd *hcd, pm_message_t message) 235static int ehci_pci_suspend(struct usb_hcd *hcd, pm_message_t message)
246{ 236{
247 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 237 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
248 238
249 if (time_before (jiffies, ehci->next_statechange)) 239 if (time_before(jiffies, ehci->next_statechange))
250 msleep (10); 240 msleep(10);
251 241
252 // could save FLADJ in case of Vaux power loss 242 // could save FLADJ in case of Vaux power loss
253 // ... we'd only use it to handle clock skew 243 // ... we'd only use it to handle clock skew
@@ -255,30 +245,30 @@ static int ehci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
255 return 0; 245 return 0;
256} 246}
257 247
258static int ehci_pci_resume (struct usb_hcd *hcd) 248static int ehci_pci_resume(struct usb_hcd *hcd)
259{ 249{
260 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 250 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
261 unsigned port; 251 unsigned port;
262 struct usb_device *root = hcd->self.root_hub; 252 struct usb_device *root = hcd->self.root_hub;
263 int retval = -EINVAL; 253 int retval = -EINVAL;
264 254
265 // maybe restore FLADJ 255 // maybe restore FLADJ
266 256
267 if (time_before (jiffies, ehci->next_statechange)) 257 if (time_before(jiffies, ehci->next_statechange))
268 msleep (100); 258 msleep(100);
269 259
270 /* If CF is clear, we lost PCI Vaux power and need to restart. */ 260 /* If CF is clear, we lost PCI Vaux power and need to restart. */
271 if (readl (&ehci->regs->configured_flag) != cpu_to_le32(FLAG_CF)) 261 if (readl(&ehci->regs->configured_flag) != cpu_to_le32(FLAG_CF))
272 goto restart; 262 goto restart;
273 263
274 /* If any port is suspended (or owned by the companion), 264 /* If any port is suspended (or owned by the companion),
275 * we know we can/must resume the HC (and mustn't reset it). 265 * we know we can/must resume the HC (and mustn't reset it).
276 * We just defer that to the root hub code. 266 * We just defer that to the root hub code.
277 */ 267 */
278 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) { 268 for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) {
279 u32 status; 269 u32 status;
280 port--; 270 port--;
281 status = readl (&ehci->regs->port_status [port]); 271 status = readl(&ehci->regs->port_status [port]);
282 if (!(status & PORT_POWER)) 272 if (!(status & PORT_POWER))
283 continue; 273 continue;
284 if (status & (PORT_SUSPEND | PORT_RESUME | PORT_OWNER)) { 274 if (status & (PORT_SUSPEND | PORT_RESUME | PORT_OWNER)) {
@@ -289,35 +279,35 @@ static int ehci_pci_resume (struct usb_hcd *hcd)
289 279
290restart: 280restart:
291 ehci_dbg(ehci, "lost power, restarting\n"); 281 ehci_dbg(ehci, "lost power, restarting\n");
292 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) { 282 for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) {
293 port--; 283 port--;
294 if (!root->children [port]) 284 if (!root->children [port])
295 continue; 285 continue;
296 usb_set_device_state (root->children[port], 286 usb_set_device_state(root->children[port],
297 USB_STATE_NOTATTACHED); 287 USB_STATE_NOTATTACHED);
298 } 288 }
299 289
300 /* Else reset, to cope with power loss or flush-to-storage 290 /* Else reset, to cope with power loss or flush-to-storage
301 * style "resume" having let BIOS kick in during reboot. 291 * style "resume" having let BIOS kick in during reboot.
302 */ 292 */
303 (void) ehci_halt (ehci); 293 (void) ehci_halt(ehci);
304 (void) ehci_reset (ehci); 294 (void) ehci_reset(ehci);
305 (void) ehci_pci_reset (hcd); 295 (void) ehci_pci_reset(hcd);
306 296
307 /* emptying the schedule aborts any urbs */ 297 /* emptying the schedule aborts any urbs */
308 spin_lock_irq (&ehci->lock); 298 spin_lock_irq(&ehci->lock);
309 if (ehci->reclaim) 299 if (ehci->reclaim)
310 ehci->reclaim_ready = 1; 300 ehci->reclaim_ready = 1;
311 ehci_work (ehci, NULL); 301 ehci_work(ehci, NULL);
312 spin_unlock_irq (&ehci->lock); 302 spin_unlock_irq(&ehci->lock);
313 303
314 /* restart; khubd will disconnect devices */ 304 /* restart; khubd will disconnect devices */
315 retval = ehci_run (hcd); 305 retval = ehci_run(hcd);
316 306
317 /* here we "know" root ports should always stay powered; 307 /* here we "know" root ports should always stay powered;
318 * but some controllers may lose all power. 308 * but some controllers may lose all power.
319 */ 309 */
320 ehci_port_power (ehci, 1); 310 ehci_port_power(ehci, 1);
321 311
322 return retval; 312 return retval;
323} 313}
@@ -376,7 +366,7 @@ static const struct pci_device_id pci_ids [] = { {
376 }, 366 },
377 { /* end: all zeroes */ } 367 { /* end: all zeroes */ }
378}; 368};
379MODULE_DEVICE_TABLE (pci, pci_ids); 369MODULE_DEVICE_TABLE(pci, pci_ids);
380 370
381/* pci driver glue; this is a "new style" PCI driver module */ 371/* pci driver glue; this is a "new style" PCI driver module */
382static struct pci_driver ehci_pci_driver = { 372static struct pci_driver ehci_pci_driver = {
@@ -392,22 +382,22 @@ static struct pci_driver ehci_pci_driver = {
392#endif 382#endif
393}; 383};
394 384
395static int __init ehci_hcd_pci_init (void) 385static int __init ehci_hcd_pci_init(void)
396{ 386{
397 if (usb_disabled()) 387 if (usb_disabled())
398 return -ENODEV; 388 return -ENODEV;
399 389
400 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", 390 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
401 hcd_name, 391 hcd_name,
402 sizeof (struct ehci_qh), sizeof (struct ehci_qtd), 392 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
403 sizeof (struct ehci_itd), sizeof (struct ehci_sitd)); 393 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
404 394
405 return pci_register_driver (&ehci_pci_driver); 395 return pci_register_driver(&ehci_pci_driver);
406} 396}
407module_init (ehci_hcd_pci_init); 397module_init(ehci_hcd_pci_init);
408 398
409static void __exit ehci_hcd_pci_cleanup (void) 399static void __exit ehci_hcd_pci_cleanup(void)
410{ 400{
411 pci_unregister_driver (&ehci_pci_driver); 401 pci_unregister_driver(&ehci_pci_driver);
412} 402}
413module_exit (ehci_hcd_pci_cleanup); 403module_exit(ehci_hcd_pci_cleanup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 07:49:46 -0500