diff options
Diffstat (limited to 'drivers/usb/host/ehci-fsl.h')
| -rw-r--r-- | drivers/usb/host/ehci-fsl.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h index b5e59db53347..2c8353795226 100644 --- a/drivers/usb/host/ehci-fsl.h +++ b/drivers/usb/host/ehci-fsl.h | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | /* Copyright (c) 2005 freescale semiconductor | 1 | /* Copyright (C) 2005-2010 Freescale Semiconductor, Inc. |
| 2 | * Copyright (c) 2005 MontaVista Software | 2 | * Copyright (c) 2005 MontaVista Software |
| 3 | * | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
| @@ -19,6 +19,9 @@ | |||
| 19 | #define _EHCI_FSL_H | 19 | #define _EHCI_FSL_H |
| 20 | 20 | ||
| 21 | /* offsets for the non-ehci registers in the FSL SOC USB controller */ | 21 | /* offsets for the non-ehci registers in the FSL SOC USB controller */ |
| 22 | #define FSL_SOC_USB_ID 0x0 | ||
| 23 | #define ID_MSK 0x3f | ||
| 24 | #define NID_MSK 0x3f00 | ||
| 22 | #define FSL_SOC_USB_ULPIVP 0x170 | 25 | #define FSL_SOC_USB_ULPIVP 0x170 |
| 23 | #define FSL_SOC_USB_PORTSC1 0x184 | 26 | #define FSL_SOC_USB_PORTSC1 0x184 |
| 24 | #define PORT_PTS_MSK (3<<30) | 27 | #define PORT_PTS_MSK (3<<30) |
| @@ -27,7 +30,14 @@ | |||
| 27 | #define PORT_PTS_SERIAL (3<<30) | 30 | #define PORT_PTS_SERIAL (3<<30) |
| 28 | #define PORT_PTS_PTW (1<<28) | 31 | #define PORT_PTS_PTW (1<<28) |
| 29 | #define FSL_SOC_USB_PORTSC2 0x188 | 32 | #define FSL_SOC_USB_PORTSC2 0x188 |
| 30 | #define FSL_SOC_USB_USBMODE 0x1a8 | 33 | |
| 34 | #define FSL_SOC_USB_USBGENCTRL 0x200 | ||
| 35 | #define USBGENCTRL_PPP (1 << 3) | ||
| 36 | #define USBGENCTRL_PFP (1 << 2) | ||
| 37 | #define FSL_SOC_USB_ISIPHYCTRL 0x204 | ||
| 38 | #define ISIPHYCTRL_PXE (1) | ||
| 39 | #define ISIPHYCTRL_PHYE (1 << 4) | ||
| 40 | |||
| 31 | #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ | 41 | #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ |
| 32 | #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ | 42 | #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ |
| 33 | #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ | 43 | #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ |
