aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/usb/gadget
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/usb/gadget')
-rw-r--r--drivers/usb/gadget/Kconfig23
-rw-r--r--drivers/usb/gadget/Makefile2
-rw-r--r--drivers/usb/gadget/at91_udc.c4
-rw-r--r--drivers/usb/gadget/ci13xxx_udc.c592
-rw-r--r--drivers/usb/gadget/ci13xxx_udc.h18
-rw-r--r--drivers/usb/gadget/composite.c17
-rw-r--r--drivers/usb/gadget/dummy_hcd.c4
-rw-r--r--drivers/usb/gadget/epautoconf.c7
-rw-r--r--drivers/usb/gadget/f_fs.c8
-rw-r--r--drivers/usb/gadget/f_mass_storage.c3
-rw-r--r--drivers/usb/gadget/f_phonet.c15
-rw-r--r--drivers/usb/gadget/fsl_mxc_udc.c21
-rw-r--r--drivers/usb/gadget/fsl_qe_udc.c14
-rw-r--r--drivers/usb/gadget/fsl_udc_core.c2
-rw-r--r--drivers/usb/gadget/fusb300_udc.c1744
-rw-r--r--drivers/usb/gadget/fusb300_udc.h687
-rw-r--r--drivers/usb/gadget/gadget_chips.h8
-rw-r--r--drivers/usb/gadget/lh7a40x_udc.c2152
-rw-r--r--drivers/usb/gadget/lh7a40x_udc.h259
-rw-r--r--drivers/usb/gadget/m66592-udc.c2
-rw-r--r--drivers/usb/gadget/pch_udc.c281
-rw-r--r--drivers/usb/gadget/printer.c19
-rw-r--r--drivers/usb/gadget/r8a66597-udc.c2
-rw-r--r--drivers/usb/gadget/s3c2410_udc.c76
-rw-r--r--drivers/usb/gadget/u_ether.c2
25 files changed, 3135 insertions, 2827 deletions
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 1dc9739277b4..bc5123cf41c2 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -176,15 +176,15 @@ config USB_FSL_USB2
176 default USB_GADGET 176 default USB_GADGET
177 select USB_GADGET_SELECTED 177 select USB_GADGET_SELECTED
178 178
179config USB_GADGET_LH7A40X 179config USB_GADGET_FUSB300
180 boolean "LH7A40X" 180 boolean "Faraday FUSB300 USB Peripheral Controller"
181 depends on ARCH_LH7A40X 181 select USB_GADGET_DUALSPEED
182 help 182 help
183 This driver provides USB Device Controller driver for LH7A40x 183 Faraday usb device controller FUSB300 driver
184 184
185config USB_LH7A40X 185config USB_FUSB300
186 tristate 186 tristate
187 depends on USB_GADGET_LH7A40X 187 depends on USB_GADGET_FUSB300
188 default USB_GADGET 188 default USB_GADGET
189 select USB_GADGET_SELECTED 189 select USB_GADGET_SELECTED
190 190
@@ -509,7 +509,7 @@ config USB_LANGWELL
509 select USB_GADGET_SELECTED 509 select USB_GADGET_SELECTED
510 510
511config USB_GADGET_EG20T 511config USB_GADGET_EG20T
512 boolean "Intel EG20T(Topcliff) USB Device controller" 512 boolean "Intel EG20T PCH/OKI SEMICONDUCTOR ML7213 IOH UDC"
513 depends on PCI 513 depends on PCI
514 select USB_GADGET_DUALSPEED 514 select USB_GADGET_DUALSPEED
515 help 515 help
@@ -525,6 +525,11 @@ config USB_GADGET_EG20T
525 This driver dose not support interrupt transfer or isochronous 525 This driver dose not support interrupt transfer or isochronous
526 transfer modes. 526 transfer modes.
527 527
528 This driver also can be used for OKI SEMICONDUCTOR's ML7213 which is
529 for IVI(In-Vehicle Infotainment) use.
530 ML7213 is companion chip for Intel Atom E6xx series.
531 ML7213 is completely compatible for Intel EG20T PCH.
532
528config USB_EG20T 533config USB_EG20T
529 tristate 534 tristate
530 depends on USB_GADGET_EG20T 535 depends on USB_GADGET_EG20T
@@ -535,12 +540,14 @@ config USB_GADGET_CI13XXX_MSM
535 boolean "MIPS USB CI13xxx for MSM" 540 boolean "MIPS USB CI13xxx for MSM"
536 depends on ARCH_MSM 541 depends on ARCH_MSM
537 select USB_GADGET_DUALSPEED 542 select USB_GADGET_DUALSPEED
538 select USB_MSM_OTG_72K 543 select USB_MSM_OTG
539 help 544 help
540 MSM SoC has chipidea USB controller. This driver uses 545 MSM SoC has chipidea USB controller. This driver uses
541 ci13xxx_udc core. 546 ci13xxx_udc core.
542 This driver depends on OTG driver for PHY initialization, 547 This driver depends on OTG driver for PHY initialization,
543 clock management, powering up VBUS, and power management. 548 clock management, powering up VBUS, and power management.
549 This driver is not supported on boards like trout which
550 has an external PHY.
544 551
545 Say "y" to link the driver statically, or "m" to build a 552 Say "y" to link the driver statically, or "m" to build a
546 dynamically linked module called "ci13xxx_msm" and force all 553 dynamically linked module called "ci13xxx_msm" and force all
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 55f5e8ae5924..1ea15ee74fd3 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o
11obj-$(CONFIG_USB_IMX) += imx_udc.o 11obj-$(CONFIG_USB_IMX) += imx_udc.o
12obj-$(CONFIG_USB_GOKU) += goku_udc.o 12obj-$(CONFIG_USB_GOKU) += goku_udc.o
13obj-$(CONFIG_USB_OMAP) += omap_udc.o 13obj-$(CONFIG_USB_OMAP) += omap_udc.o
14obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o
15obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o 14obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o
16obj-$(CONFIG_USB_AT91) += at91_udc.o 15obj-$(CONFIG_USB_AT91) += at91_udc.o
17obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o 16obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o
@@ -28,6 +27,7 @@ obj-$(CONFIG_USB_EG20T) += pch_udc.o
28obj-$(CONFIG_USB_PXA_U2O) += mv_udc.o 27obj-$(CONFIG_USB_PXA_U2O) += mv_udc.o
29mv_udc-y := mv_udc_core.o mv_udc_phy.o 28mv_udc-y := mv_udc_core.o mv_udc_phy.o
30obj-$(CONFIG_USB_CI13XXX_MSM) += ci13xxx_msm.o 29obj-$(CONFIG_USB_CI13XXX_MSM) += ci13xxx_msm.o
30obj-$(CONFIG_USB_FUSB300) += fusb300_udc.o
31 31
32# 32#
33# USB gadget drivers 33# USB gadget drivers
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index bdec36acd0fa..bb8ddf0469f9 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1798,8 +1798,10 @@ static int __init at91udc_probe(struct platform_device *pdev)
1798 } 1798 }
1799 1799
1800 retval = device_register(&udc->gadget.dev); 1800 retval = device_register(&udc->gadget.dev);
1801 if (retval < 0) 1801 if (retval < 0) {
1802 put_device(&udc->gadget.dev);
1802 goto fail0b; 1803 goto fail0b;
1804 }
1803 1805
1804 /* don't do anything until we have both gadget driver and VBUS */ 1806 /* don't do anything until we have both gadget driver and VBUS */
1805 clk_enable(udc->iclk); 1807 clk_enable(udc->iclk);
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index 31656a2b4ab4..e09178bc1450 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -76,10 +76,21 @@ static DEFINE_SPINLOCK(udc_lock);
76 76
77/* control endpoint description */ 77/* control endpoint description */
78static const struct usb_endpoint_descriptor 78static const struct usb_endpoint_descriptor
79ctrl_endpt_desc = { 79ctrl_endpt_out_desc = {
80 .bLength = USB_DT_ENDPOINT_SIZE, 80 .bLength = USB_DT_ENDPOINT_SIZE,
81 .bDescriptorType = USB_DT_ENDPOINT, 81 .bDescriptorType = USB_DT_ENDPOINT,
82 82
83 .bEndpointAddress = USB_DIR_OUT,
84 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
85 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
86};
87
88static const struct usb_endpoint_descriptor
89ctrl_endpt_in_desc = {
90 .bLength = USB_DT_ENDPOINT_SIZE,
91 .bDescriptorType = USB_DT_ENDPOINT,
92
93 .bEndpointAddress = USB_DIR_IN,
83 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 94 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
84 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 95 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
85}; 96};
@@ -265,10 +276,10 @@ static int hw_device_init(void __iomem *base)
265 hw_bank.size /= sizeof(u32); 276 hw_bank.size /= sizeof(u32);
266 277
267 reg = hw_aread(ABS_DCCPARAMS, DCCPARAMS_DEN) >> ffs_nr(DCCPARAMS_DEN); 278 reg = hw_aread(ABS_DCCPARAMS, DCCPARAMS_DEN) >> ffs_nr(DCCPARAMS_DEN);
268 if (reg == 0 || reg > ENDPT_MAX) 279 hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
269 return -ENODEV;
270 280
271 hw_ep_max = reg; /* cache hw ENDPT_MAX */ 281 if (hw_ep_max == 0 || hw_ep_max > ENDPT_MAX)
282 return -ENODEV;
272 283
273 /* setup lock mode ? */ 284 /* setup lock mode ? */
274 285
@@ -424,20 +435,6 @@ static int hw_ep_get_halt(int num, int dir)
424} 435}
425 436
426/** 437/**
427 * hw_ep_is_primed: test if endpoint is primed (execute without interruption)
428 * @num: endpoint number
429 * @dir: endpoint direction
430 *
431 * This function returns true if endpoint primed
432 */
433static int hw_ep_is_primed(int num, int dir)
434{
435 u32 reg = hw_cread(CAP_ENDPTPRIME, ~0) | hw_cread(CAP_ENDPTSTAT, ~0);
436
437 return test_bit(hw_ep_bit(num, dir), (void *)&reg);
438}
439
440/**
441 * hw_test_and_clear_setup_status: test & clear setup status (execute without 438 * hw_test_and_clear_setup_status: test & clear setup status (execute without
442 * interruption) 439 * interruption)
443 * @n: bit number (endpoint) 440 * @n: bit number (endpoint)
@@ -461,10 +458,6 @@ static int hw_ep_prime(int num, int dir, int is_ctrl)
461{ 458{
462 int n = hw_ep_bit(num, dir); 459 int n = hw_ep_bit(num, dir);
463 460
464 /* the caller should flush first */
465 if (hw_ep_is_primed(num, dir))
466 return -EBUSY;
467
468 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num))) 461 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
469 return -EAGAIN; 462 return -EAGAIN;
470 463
@@ -1197,16 +1190,17 @@ static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
1197 } 1190 }
1198 1191
1199 spin_lock_irqsave(udc->lock, flags); 1192 spin_lock_irqsave(udc->lock, flags);
1200 for (i = 0; i < hw_ep_max; i++) { 1193 for (i = 0; i < hw_ep_max/2; i++) {
1201 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i]; 1194 struct ci13xxx_ep *mEpRx = &udc->ci13xxx_ep[i];
1195 struct ci13xxx_ep *mEpTx = &udc->ci13xxx_ep[i + hw_ep_max/2];
1202 n += scnprintf(buf + n, PAGE_SIZE - n, 1196 n += scnprintf(buf + n, PAGE_SIZE - n,
1203 "EP=%02i: RX=%08X TX=%08X\n", 1197 "EP=%02i: RX=%08X TX=%08X\n",
1204 i, (u32)mEp->qh[RX].dma, (u32)mEp->qh[TX].dma); 1198 i, (u32)mEpRx->qh.dma, (u32)mEpTx->qh.dma);
1205 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) { 1199 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
1206 n += scnprintf(buf + n, PAGE_SIZE - n, 1200 n += scnprintf(buf + n, PAGE_SIZE - n,
1207 " %04X: %08X %08X\n", j, 1201 " %04X: %08X %08X\n", j,
1208 *((u32 *)mEp->qh[RX].ptr + j), 1202 *((u32 *)mEpRx->qh.ptr + j),
1209 *((u32 *)mEp->qh[TX].ptr + j)); 1203 *((u32 *)mEpTx->qh.ptr + j));
1210 } 1204 }
1211 } 1205 }
1212 spin_unlock_irqrestore(udc->lock, flags); 1206 spin_unlock_irqrestore(udc->lock, flags);
@@ -1293,7 +1287,7 @@ static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
1293 unsigned long flags; 1287 unsigned long flags;
1294 struct list_head *ptr = NULL; 1288 struct list_head *ptr = NULL;
1295 struct ci13xxx_req *req = NULL; 1289 struct ci13xxx_req *req = NULL;
1296 unsigned i, j, k, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32); 1290 unsigned i, j, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
1297 1291
1298 dbg_trace("[%s] %p\n", __func__, buf); 1292 dbg_trace("[%s] %p\n", __func__, buf);
1299 if (attr == NULL || buf == NULL) { 1293 if (attr == NULL || buf == NULL) {
@@ -1303,22 +1297,20 @@ static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
1303 1297
1304 spin_lock_irqsave(udc->lock, flags); 1298 spin_lock_irqsave(udc->lock, flags);
1305 for (i = 0; i < hw_ep_max; i++) 1299 for (i = 0; i < hw_ep_max; i++)
1306 for (k = RX; k <= TX; k++) 1300 list_for_each(ptr, &udc->ci13xxx_ep[i].qh.queue)
1307 list_for_each(ptr, &udc->ci13xxx_ep[i].qh[k].queue) 1301 {
1308 { 1302 req = list_entry(ptr, struct ci13xxx_req, queue);
1309 req = list_entry(ptr, 1303
1310 struct ci13xxx_req, queue); 1304 n += scnprintf(buf + n, PAGE_SIZE - n,
1305 "EP=%02i: TD=%08X %s\n",
1306 i % hw_ep_max/2, (u32)req->dma,
1307 ((i < hw_ep_max/2) ? "RX" : "TX"));
1311 1308
1309 for (j = 0; j < qSize; j++)
1312 n += scnprintf(buf + n, PAGE_SIZE - n, 1310 n += scnprintf(buf + n, PAGE_SIZE - n,
1313 "EP=%02i: TD=%08X %s\n", 1311 " %04X: %08X\n", j,
1314 i, (u32)req->dma, 1312 *((u32 *)req->ptr + j));
1315 ((k == RX) ? "RX" : "TX")); 1313 }
1316
1317 for (j = 0; j < qSize; j++)
1318 n += scnprintf(buf + n, PAGE_SIZE - n,
1319 " %04X: %08X\n", j,
1320 *((u32 *)req->ptr + j));
1321 }
1322 spin_unlock_irqrestore(udc->lock, flags); 1314 spin_unlock_irqrestore(udc->lock, flags);
1323 1315
1324 return n; 1316 return n;
@@ -1424,6 +1416,8 @@ static inline u8 _usb_addr(struct ci13xxx_ep *ep)
1424static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq) 1416static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1425{ 1417{
1426 unsigned i; 1418 unsigned i;
1419 int ret = 0;
1420 unsigned length = mReq->req.length;
1427 1421
1428 trace("%p, %p", mEp, mReq); 1422 trace("%p, %p", mEp, mReq);
1429 1423
@@ -1431,53 +1425,91 @@ static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1431 if (mReq->req.status == -EALREADY) 1425 if (mReq->req.status == -EALREADY)
1432 return -EALREADY; 1426 return -EALREADY;
1433 1427
1434 if (hw_ep_is_primed(mEp->num, mEp->dir))
1435 return -EBUSY;
1436
1437 mReq->req.status = -EALREADY; 1428 mReq->req.status = -EALREADY;
1438 1429 if (length && !mReq->req.dma) {
1439 if (mReq->req.length && !mReq->req.dma) {
1440 mReq->req.dma = \ 1430 mReq->req.dma = \
1441 dma_map_single(mEp->device, mReq->req.buf, 1431 dma_map_single(mEp->device, mReq->req.buf,
1442 mReq->req.length, mEp->dir ? 1432 length, mEp->dir ? DMA_TO_DEVICE :
1443 DMA_TO_DEVICE : DMA_FROM_DEVICE); 1433 DMA_FROM_DEVICE);
1444 if (mReq->req.dma == 0) 1434 if (mReq->req.dma == 0)
1445 return -ENOMEM; 1435 return -ENOMEM;
1446 1436
1447 mReq->map = 1; 1437 mReq->map = 1;
1448 } 1438 }
1449 1439
1440 if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
1441 mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
1442 &mReq->zdma);
1443 if (mReq->zptr == NULL) {
1444 if (mReq->map) {
1445 dma_unmap_single(mEp->device, mReq->req.dma,
1446 length, mEp->dir ? DMA_TO_DEVICE :
1447 DMA_FROM_DEVICE);
1448 mReq->req.dma = 0;
1449 mReq->map = 0;
1450 }
1451 return -ENOMEM;
1452 }
1453 memset(mReq->zptr, 0, sizeof(*mReq->zptr));
1454 mReq->zptr->next = TD_TERMINATE;
1455 mReq->zptr->token = TD_STATUS_ACTIVE;
1456 if (!mReq->req.no_interrupt)
1457 mReq->zptr->token |= TD_IOC;
1458 }
1450 /* 1459 /*
1451 * TD configuration 1460 * TD configuration
1452 * TODO - handle requests which spawns into several TDs 1461 * TODO - handle requests which spawns into several TDs
1453 */ 1462 */
1454 memset(mReq->ptr, 0, sizeof(*mReq->ptr)); 1463 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
1455 mReq->ptr->next |= TD_TERMINATE; 1464 mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
1456 mReq->ptr->token = mReq->req.length << ffs_nr(TD_TOTAL_BYTES);
1457 mReq->ptr->token &= TD_TOTAL_BYTES; 1465 mReq->ptr->token &= TD_TOTAL_BYTES;
1458 mReq->ptr->token |= TD_IOC;
1459 mReq->ptr->token |= TD_STATUS_ACTIVE; 1466 mReq->ptr->token |= TD_STATUS_ACTIVE;
1467 if (mReq->zptr) {
1468 mReq->ptr->next = mReq->zdma;
1469 } else {
1470 mReq->ptr->next = TD_TERMINATE;
1471 if (!mReq->req.no_interrupt)
1472 mReq->ptr->token |= TD_IOC;
1473 }
1460 mReq->ptr->page[0] = mReq->req.dma; 1474 mReq->ptr->page[0] = mReq->req.dma;
1461 for (i = 1; i < 5; i++) 1475 for (i = 1; i < 5; i++)
1462 mReq->ptr->page[i] = 1476 mReq->ptr->page[i] =
1463 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK; 1477 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
1464 1478
1465 /* 1479 if (!list_empty(&mEp->qh.queue)) {
1466 * QH configuration 1480 struct ci13xxx_req *mReqPrev;
1467 * At this point it's guaranteed exclusive access to qhead 1481 int n = hw_ep_bit(mEp->num, mEp->dir);
1468 * (endpt is not primed) so it's no need to use tripwire 1482 int tmp_stat;
1469 */ 1483
1470 mEp->qh[mEp->dir].ptr->td.next = mReq->dma; /* TERMINATE = 0 */ 1484 mReqPrev = list_entry(mEp->qh.queue.prev,
1471 mEp->qh[mEp->dir].ptr->td.token &= ~TD_STATUS; /* clear status */ 1485 struct ci13xxx_req, queue);
1472 if (mReq->req.zero == 0) 1486 if (mReqPrev->zptr)
1473 mEp->qh[mEp->dir].ptr->cap |= QH_ZLT; 1487 mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
1474 else 1488 else
1475 mEp->qh[mEp->dir].ptr->cap &= ~QH_ZLT; 1489 mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
1490 wmb();
1491 if (hw_cread(CAP_ENDPTPRIME, BIT(n)))
1492 goto done;
1493 do {
1494 hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
1495 tmp_stat = hw_cread(CAP_ENDPTSTAT, BIT(n));
1496 } while (!hw_cread(CAP_USBCMD, USBCMD_ATDTW));
1497 hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, 0);
1498 if (tmp_stat)
1499 goto done;
1500 }
1501
1502 /* QH configuration */
1503 mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
1504 mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
1505 mEp->qh.ptr->cap |= QH_ZLT;
1476 1506
1477 wmb(); /* synchronize before ep prime */ 1507 wmb(); /* synchronize before ep prime */
1478 1508
1479 return hw_ep_prime(mEp->num, mEp->dir, 1509 ret = hw_ep_prime(mEp->num, mEp->dir,
1480 mEp->type == USB_ENDPOINT_XFER_CONTROL); 1510 mEp->type == USB_ENDPOINT_XFER_CONTROL);
1511done:
1512 return ret;
1481} 1513}
1482 1514
1483/** 1515/**
@@ -1494,8 +1526,15 @@ static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1494 if (mReq->req.status != -EALREADY) 1526 if (mReq->req.status != -EALREADY)
1495 return -EINVAL; 1527 return -EINVAL;
1496 1528
1497 if (hw_ep_is_primed(mEp->num, mEp->dir)) 1529 if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
1498 hw_ep_flush(mEp->num, mEp->dir); 1530 return -EBUSY;
1531
1532 if (mReq->zptr) {
1533 if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
1534 return -EBUSY;
1535 dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
1536 mReq->zptr = NULL;
1537 }
1499 1538
1500 mReq->req.status = 0; 1539 mReq->req.status = 0;
1501 1540
@@ -1507,9 +1546,7 @@ static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1507 } 1546 }
1508 1547
1509 mReq->req.status = mReq->ptr->token & TD_STATUS; 1548 mReq->req.status = mReq->ptr->token & TD_STATUS;
1510 if ((TD_STATUS_ACTIVE & mReq->req.status) != 0) 1549 if ((TD_STATUS_HALTED & mReq->req.status) != 0)
1511 mReq->req.status = -ECONNRESET;
1512 else if ((TD_STATUS_HALTED & mReq->req.status) != 0)
1513 mReq->req.status = -1; 1550 mReq->req.status = -1;
1514 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0) 1551 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
1515 mReq->req.status = -1; 1552 mReq->req.status = -1;
@@ -1542,11 +1579,11 @@ __acquires(mEp->lock)
1542 1579
1543 hw_ep_flush(mEp->num, mEp->dir); 1580 hw_ep_flush(mEp->num, mEp->dir);
1544 1581
1545 while (!list_empty(&mEp->qh[mEp->dir].queue)) { 1582 while (!list_empty(&mEp->qh.queue)) {
1546 1583
1547 /* pop oldest request */ 1584 /* pop oldest request */
1548 struct ci13xxx_req *mReq = \ 1585 struct ci13xxx_req *mReq = \
1549 list_entry(mEp->qh[mEp->dir].queue.next, 1586 list_entry(mEp->qh.queue.next,
1550 struct ci13xxx_req, queue); 1587 struct ci13xxx_req, queue);
1551 list_del_init(&mReq->queue); 1588 list_del_init(&mReq->queue);
1552 mReq->req.status = -ESHUTDOWN; 1589 mReq->req.status = -ESHUTDOWN;
@@ -1571,19 +1608,25 @@ static int _gadget_stop_activity(struct usb_gadget *gadget)
1571{ 1608{
1572 struct usb_ep *ep; 1609 struct usb_ep *ep;
1573 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget); 1610 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1574 struct ci13xxx_ep *mEp = container_of(gadget->ep0, 1611 unsigned long flags;
1575 struct ci13xxx_ep, ep);
1576 1612
1577 trace("%p", gadget); 1613 trace("%p", gadget);
1578 1614
1579 if (gadget == NULL) 1615 if (gadget == NULL)
1580 return -EINVAL; 1616 return -EINVAL;
1581 1617
1618 spin_lock_irqsave(udc->lock, flags);
1619 udc->gadget.speed = USB_SPEED_UNKNOWN;
1620 udc->remote_wakeup = 0;
1621 udc->suspended = 0;
1622 spin_unlock_irqrestore(udc->lock, flags);
1623
1582 /* flush all endpoints */ 1624 /* flush all endpoints */
1583 gadget_for_each_ep(ep, gadget) { 1625 gadget_for_each_ep(ep, gadget) {
1584 usb_ep_fifo_flush(ep); 1626 usb_ep_fifo_flush(ep);
1585 } 1627 }
1586 usb_ep_fifo_flush(gadget->ep0); 1628 usb_ep_fifo_flush(&udc->ep0out.ep);
1629 usb_ep_fifo_flush(&udc->ep0in.ep);
1587 1630
1588 udc->driver->disconnect(gadget); 1631 udc->driver->disconnect(gadget);
1589 1632
@@ -1591,11 +1634,12 @@ static int _gadget_stop_activity(struct usb_gadget *gadget)
1591 gadget_for_each_ep(ep, gadget) { 1634 gadget_for_each_ep(ep, gadget) {
1592 usb_ep_disable(ep); 1635 usb_ep_disable(ep);
1593 } 1636 }
1594 usb_ep_disable(gadget->ep0); 1637 usb_ep_disable(&udc->ep0out.ep);
1638 usb_ep_disable(&udc->ep0in.ep);
1595 1639
1596 if (mEp->status != NULL) { 1640 if (udc->status != NULL) {
1597 usb_ep_free_request(gadget->ep0, mEp->status); 1641 usb_ep_free_request(&udc->ep0in.ep, udc->status);
1598 mEp->status = NULL; 1642 udc->status = NULL;
1599 } 1643 }
1600 1644
1601 return 0; 1645 return 0;
@@ -1614,7 +1658,6 @@ static void isr_reset_handler(struct ci13xxx *udc)
1614__releases(udc->lock) 1658__releases(udc->lock)
1615__acquires(udc->lock) 1659__acquires(udc->lock)
1616{ 1660{
1617 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[0];
1618 int retval; 1661 int retval;
1619 1662
1620 trace("%p", udc); 1663 trace("%p", udc);
@@ -1635,11 +1678,15 @@ __acquires(udc->lock)
1635 if (retval) 1678 if (retval)
1636 goto done; 1679 goto done;
1637 1680
1638 retval = usb_ep_enable(&mEp->ep, &ctrl_endpt_desc); 1681 retval = usb_ep_enable(&udc->ep0out.ep, &ctrl_endpt_out_desc);
1682 if (retval)
1683 goto done;
1684
1685 retval = usb_ep_enable(&udc->ep0in.ep, &ctrl_endpt_in_desc);
1639 if (!retval) { 1686 if (!retval) {
1640 mEp->status = usb_ep_alloc_request(&mEp->ep, GFP_ATOMIC); 1687 udc->status = usb_ep_alloc_request(&udc->ep0in.ep, GFP_ATOMIC);
1641 if (mEp->status == NULL) { 1688 if (udc->status == NULL) {
1642 usb_ep_disable(&mEp->ep); 1689 usb_ep_disable(&udc->ep0out.ep);
1643 retval = -ENOMEM; 1690 retval = -ENOMEM;
1644 } 1691 }
1645 } 1692 }
@@ -1672,16 +1719,17 @@ static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
1672 1719
1673/** 1720/**
1674 * isr_get_status_response: get_status request response 1721 * isr_get_status_response: get_status request response
1675 * @ep: endpoint 1722 * @udc: udc struct
1676 * @setup: setup request packet 1723 * @setup: setup request packet
1677 * 1724 *
1678 * This function returns an error code 1725 * This function returns an error code
1679 */ 1726 */
1680static int isr_get_status_response(struct ci13xxx_ep *mEp, 1727static int isr_get_status_response(struct ci13xxx *udc,
1681 struct usb_ctrlrequest *setup) 1728 struct usb_ctrlrequest *setup)
1682__releases(mEp->lock) 1729__releases(mEp->lock)
1683__acquires(mEp->lock) 1730__acquires(mEp->lock)
1684{ 1731{
1732 struct ci13xxx_ep *mEp = &udc->ep0in;
1685 struct usb_request *req = NULL; 1733 struct usb_request *req = NULL;
1686 gfp_t gfp_flags = GFP_ATOMIC; 1734 gfp_t gfp_flags = GFP_ATOMIC;
1687 int dir, num, retval; 1735 int dir, num, retval;
@@ -1706,7 +1754,8 @@ __acquires(mEp->lock)
1706 } 1754 }
1707 1755
1708 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { 1756 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1709 /* TODO: D1 - Remote Wakeup; D0 - Self Powered */ 1757 /* Assume that device is bus powered for now. */
1758 *((u16 *)req->buf) = _udc->remote_wakeup << 1;
1710 retval = 0; 1759 retval = 0;
1711 } else if ((setup->bRequestType & USB_RECIP_MASK) \ 1760 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1712 == USB_RECIP_ENDPOINT) { 1761 == USB_RECIP_ENDPOINT) {
@@ -1735,28 +1784,48 @@ __acquires(mEp->lock)
1735} 1784}
1736 1785
1737/** 1786/**
1787 * isr_setup_status_complete: setup_status request complete function
1788 * @ep: endpoint
1789 * @req: request handled
1790 *
1791 * Caller must release lock. Put the port in test mode if test mode
1792 * feature is selected.
1793 */
1794static void
1795isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1796{
1797 struct ci13xxx *udc = req->context;
1798 unsigned long flags;
1799
1800 trace("%p, %p", ep, req);
1801
1802 spin_lock_irqsave(udc->lock, flags);
1803 if (udc->test_mode)
1804 hw_port_test_set(udc->test_mode);
1805 spin_unlock_irqrestore(udc->lock, flags);
1806}
1807
1808/**
1738 * isr_setup_status_phase: queues the status phase of a setup transation 1809 * isr_setup_status_phase: queues the status phase of a setup transation
1739 * @mEp: endpoint 1810 * @udc: udc struct
1740 * 1811 *
1741 * This function returns an error code 1812 * This function returns an error code
1742 */ 1813 */
1743static int isr_setup_status_phase(struct ci13xxx_ep *mEp) 1814static int isr_setup_status_phase(struct ci13xxx *udc)
1744__releases(mEp->lock) 1815__releases(mEp->lock)
1745__acquires(mEp->lock) 1816__acquires(mEp->lock)
1746{ 1817{
1747 int retval; 1818 int retval;
1819 struct ci13xxx_ep *mEp;
1748 1820
1749 trace("%p", mEp); 1821 trace("%p", udc);
1750
1751 /* mEp is always valid & configured */
1752
1753 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1754 mEp->dir = (mEp->dir == TX) ? RX : TX;
1755 1822
1756 mEp->status->no_interrupt = 1; 1823 mEp = (udc->ep0_dir == TX) ? &udc->ep0out : &udc->ep0in;
1824 udc->status->context = udc;
1825 udc->status->complete = isr_setup_status_complete;
1757 1826
1758 spin_unlock(mEp->lock); 1827 spin_unlock(mEp->lock);
1759 retval = usb_ep_queue(&mEp->ep, mEp->status, GFP_ATOMIC); 1828 retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
1760 spin_lock(mEp->lock); 1829 spin_lock(mEp->lock);
1761 1830
1762 return retval; 1831 return retval;
@@ -1773,42 +1842,33 @@ static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
1773__releases(mEp->lock) 1842__releases(mEp->lock)
1774__acquires(mEp->lock) 1843__acquires(mEp->lock)
1775{ 1844{
1776 struct ci13xxx_req *mReq; 1845 struct ci13xxx_req *mReq, *mReqTemp;
1777 int retval; 1846 int retval;
1778 1847
1779 trace("%p", mEp); 1848 trace("%p", mEp);
1780 1849
1781 if (list_empty(&mEp->qh[mEp->dir].queue)) 1850 if (list_empty(&mEp->qh.queue))
1782 return -EINVAL; 1851 return -EINVAL;
1783 1852
1784 /* pop oldest request */ 1853 list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
1785 mReq = list_entry(mEp->qh[mEp->dir].queue.next, 1854 queue) {
1786 struct ci13xxx_req, queue); 1855 retval = _hardware_dequeue(mEp, mReq);
1787 list_del_init(&mReq->queue); 1856 if (retval < 0)
1788 1857 break;
1789 retval = _hardware_dequeue(mEp, mReq); 1858 list_del_init(&mReq->queue);
1790 if (retval < 0) { 1859 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
1791 dbg_event(_usb_addr(mEp), "DONE", retval); 1860 if (mReq->req.complete != NULL) {
1792 goto done; 1861 spin_unlock(mEp->lock);
1793 } 1862 mReq->req.complete(&mEp->ep, &mReq->req);
1794 1863 spin_lock(mEp->lock);
1795 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval); 1864 }
1796
1797 if (!list_empty(&mEp->qh[mEp->dir].queue)) {
1798 struct ci13xxx_req* mReqEnq;
1799
1800 mReqEnq = list_entry(mEp->qh[mEp->dir].queue.next,
1801 struct ci13xxx_req, queue);
1802 _hardware_enqueue(mEp, mReqEnq);
1803 } 1865 }
1804 1866
1805 if (mReq->req.complete != NULL) { 1867 if (retval == EBUSY)
1806 spin_unlock(mEp->lock); 1868 retval = 0;
1807 mReq->req.complete(&mEp->ep, &mReq->req); 1869 if (retval < 0)
1808 spin_lock(mEp->lock); 1870 dbg_event(_usb_addr(mEp), "DONE", retval);
1809 }
1810 1871
1811 done:
1812 return retval; 1872 return retval;
1813} 1873}
1814 1874
@@ -1823,6 +1883,7 @@ __releases(udc->lock)
1823__acquires(udc->lock) 1883__acquires(udc->lock)
1824{ 1884{
1825 unsigned i; 1885 unsigned i;
1886 u8 tmode = 0;
1826 1887
1827 trace("%p", udc); 1888 trace("%p", udc);
1828 1889
@@ -1836,16 +1897,14 @@ __acquires(udc->lock)
1836 int type, num, err = -EINVAL; 1897 int type, num, err = -EINVAL;
1837 struct usb_ctrlrequest req; 1898 struct usb_ctrlrequest req;
1838 1899
1839
1840 if (mEp->desc == NULL) 1900 if (mEp->desc == NULL)
1841 continue; /* not configured */ 1901 continue; /* not configured */
1842 1902
1843 if ((mEp->dir == RX && hw_test_and_clear_complete(i)) || 1903 if (hw_test_and_clear_complete(i)) {
1844 (mEp->dir == TX && hw_test_and_clear_complete(i + 16))) {
1845 err = isr_tr_complete_low(mEp); 1904 err = isr_tr_complete_low(mEp);
1846 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) { 1905 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1847 if (err > 0) /* needs status phase */ 1906 if (err > 0) /* needs status phase */
1848 err = isr_setup_status_phase(mEp); 1907 err = isr_setup_status_phase(udc);
1849 if (err < 0) { 1908 if (err < 0) {
1850 dbg_event(_usb_addr(mEp), 1909 dbg_event(_usb_addr(mEp),
1851 "ERROR", err); 1910 "ERROR", err);
@@ -1866,36 +1925,53 @@ __acquires(udc->lock)
1866 continue; 1925 continue;
1867 } 1926 }
1868 1927
1928 /*
1929 * Flush data and handshake transactions of previous
1930 * setup packet.
1931 */
1932 _ep_nuke(&udc->ep0out);
1933 _ep_nuke(&udc->ep0in);
1934
1869 /* read_setup_packet */ 1935 /* read_setup_packet */
1870 do { 1936 do {
1871 hw_test_and_set_setup_guard(); 1937 hw_test_and_set_setup_guard();
1872 memcpy(&req, &mEp->qh[RX].ptr->setup, sizeof(req)); 1938 memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
1873 } while (!hw_test_and_clear_setup_guard()); 1939 } while (!hw_test_and_clear_setup_guard());
1874 1940
1875 type = req.bRequestType; 1941 type = req.bRequestType;
1876 1942
1877 mEp->dir = (type & USB_DIR_IN) ? TX : RX; 1943 udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1878 1944
1879 dbg_setup(_usb_addr(mEp), &req); 1945 dbg_setup(_usb_addr(mEp), &req);
1880 1946
1881 switch (req.bRequest) { 1947 switch (req.bRequest) {
1882 case USB_REQ_CLEAR_FEATURE: 1948 case USB_REQ_CLEAR_FEATURE:
1883 if (type != (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 1949 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1884 le16_to_cpu(req.wValue) != USB_ENDPOINT_HALT) 1950 le16_to_cpu(req.wValue) ==
1885 goto delegate; 1951 USB_ENDPOINT_HALT) {
1886 if (req.wLength != 0) 1952 if (req.wLength != 0)
1887 break; 1953 break;
1888 num = le16_to_cpu(req.wIndex); 1954 num = le16_to_cpu(req.wIndex);
1889 num &= USB_ENDPOINT_NUMBER_MASK; 1955 num &= USB_ENDPOINT_NUMBER_MASK;
1890 if (!udc->ci13xxx_ep[num].wedge) { 1956 if (!udc->ci13xxx_ep[num].wedge) {
1891 spin_unlock(udc->lock); 1957 spin_unlock(udc->lock);
1892 err = usb_ep_clear_halt( 1958 err = usb_ep_clear_halt(
1893 &udc->ci13xxx_ep[num].ep); 1959 &udc->ci13xxx_ep[num].ep);
1894 spin_lock(udc->lock); 1960 spin_lock(udc->lock);
1895 if (err) 1961 if (err)
1962 break;
1963 }
1964 err = isr_setup_status_phase(udc);
1965 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1966 le16_to_cpu(req.wValue) ==
1967 USB_DEVICE_REMOTE_WAKEUP) {
1968 if (req.wLength != 0)
1896 break; 1969 break;
1970 udc->remote_wakeup = 0;
1971 err = isr_setup_status_phase(udc);
1972 } else {
1973 goto delegate;
1897 } 1974 }
1898 err = isr_setup_status_phase(mEp);
1899 break; 1975 break;
1900 case USB_REQ_GET_STATUS: 1976 case USB_REQ_GET_STATUS:
1901 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && 1977 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
@@ -1905,7 +1981,7 @@ __acquires(udc->lock)
1905 if (le16_to_cpu(req.wLength) != 2 || 1981 if (le16_to_cpu(req.wLength) != 2 ||
1906 le16_to_cpu(req.wValue) != 0) 1982 le16_to_cpu(req.wValue) != 0)
1907 break; 1983 break;
1908 err = isr_get_status_response(mEp, &req); 1984 err = isr_get_status_response(udc, &req);
1909 break; 1985 break;
1910 case USB_REQ_SET_ADDRESS: 1986 case USB_REQ_SET_ADDRESS:
1911 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) 1987 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
@@ -1916,28 +1992,56 @@ __acquires(udc->lock)
1916 err = hw_usb_set_address((u8)le16_to_cpu(req.wValue)); 1992 err = hw_usb_set_address((u8)le16_to_cpu(req.wValue));
1917 if (err) 1993 if (err)
1918 break; 1994 break;
1919 err = isr_setup_status_phase(mEp); 1995 err = isr_setup_status_phase(udc);
1920 break; 1996 break;
1921 case USB_REQ_SET_FEATURE: 1997 case USB_REQ_SET_FEATURE:
1922 if (type != (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 1998 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1923 le16_to_cpu(req.wValue) != USB_ENDPOINT_HALT) 1999 le16_to_cpu(req.wValue) ==
1924 goto delegate; 2000 USB_ENDPOINT_HALT) {
1925 if (req.wLength != 0) 2001 if (req.wLength != 0)
1926 break; 2002 break;
1927 num = le16_to_cpu(req.wIndex); 2003 num = le16_to_cpu(req.wIndex);
1928 num &= USB_ENDPOINT_NUMBER_MASK; 2004 num &= USB_ENDPOINT_NUMBER_MASK;
1929 2005
1930 spin_unlock(udc->lock); 2006 spin_unlock(udc->lock);
1931 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep); 2007 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
1932 spin_lock(udc->lock); 2008 spin_lock(udc->lock);
1933 if (err) 2009 if (!err)
1934 break; 2010 isr_setup_status_phase(udc);
1935 err = isr_setup_status_phase(mEp); 2011 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
2012 if (req.wLength != 0)
2013 break;
2014 switch (le16_to_cpu(req.wValue)) {
2015 case USB_DEVICE_REMOTE_WAKEUP:
2016 udc->remote_wakeup = 1;
2017 err = isr_setup_status_phase(udc);
2018 break;
2019 case USB_DEVICE_TEST_MODE:
2020 tmode = le16_to_cpu(req.wIndex) >> 8;
2021 switch (tmode) {
2022 case TEST_J:
2023 case TEST_K:
2024 case TEST_SE0_NAK:
2025 case TEST_PACKET:
2026 case TEST_FORCE_EN:
2027 udc->test_mode = tmode;
2028 err = isr_setup_status_phase(
2029 udc);
2030 break;
2031 default:
2032 break;
2033 }
2034 default:
2035 goto delegate;
2036 }
2037 } else {
2038 goto delegate;
2039 }
1936 break; 2040 break;
1937 default: 2041 default:
1938delegate: 2042delegate:
1939 if (req.wLength == 0) /* no data phase */ 2043 if (req.wLength == 0) /* no data phase */
1940 mEp->dir = TX; 2044 udc->ep0_dir = TX;
1941 2045
1942 spin_unlock(udc->lock); 2046 spin_unlock(udc->lock);
1943 err = udc->driver->setup(&udc->gadget, &req); 2047 err = udc->driver->setup(&udc->gadget, &req);
@@ -1968,7 +2072,7 @@ static int ep_enable(struct usb_ep *ep,
1968 const struct usb_endpoint_descriptor *desc) 2072 const struct usb_endpoint_descriptor *desc)
1969{ 2073{
1970 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep); 2074 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1971 int direction, retval = 0; 2075 int retval = 0;
1972 unsigned long flags; 2076 unsigned long flags;
1973 2077
1974 trace("%p, %p", ep, desc); 2078 trace("%p, %p", ep, desc);
@@ -1982,7 +2086,7 @@ static int ep_enable(struct usb_ep *ep,
1982 2086
1983 mEp->desc = desc; 2087 mEp->desc = desc;
1984 2088
1985 if (!list_empty(&mEp->qh[mEp->dir].queue)) 2089 if (!list_empty(&mEp->qh.queue))
1986 warn("enabling a non-empty endpoint!"); 2090 warn("enabling a non-empty endpoint!");
1987 2091
1988 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX; 2092 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
@@ -1991,29 +2095,22 @@ static int ep_enable(struct usb_ep *ep,
1991 2095
1992 mEp->ep.maxpacket = __constant_le16_to_cpu(desc->wMaxPacketSize); 2096 mEp->ep.maxpacket = __constant_le16_to_cpu(desc->wMaxPacketSize);
1993 2097
1994 direction = mEp->dir; 2098 dbg_event(_usb_addr(mEp), "ENABLE", 0);
1995 do {
1996 dbg_event(_usb_addr(mEp), "ENABLE", 0);
1997
1998 mEp->qh[mEp->dir].ptr->cap = 0;
1999
2000 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2001 mEp->qh[mEp->dir].ptr->cap |= QH_IOS;
2002 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
2003 mEp->qh[mEp->dir].ptr->cap &= ~QH_MULT;
2004 else
2005 mEp->qh[mEp->dir].ptr->cap &= ~QH_ZLT;
2006 2099
2007 mEp->qh[mEp->dir].ptr->cap |= 2100 mEp->qh.ptr->cap = 0;
2008 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
2009 mEp->qh[mEp->dir].ptr->td.next |= TD_TERMINATE; /* needed? */
2010 2101
2011 retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type); 2102 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2103 mEp->qh.ptr->cap |= QH_IOS;
2104 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
2105 mEp->qh.ptr->cap &= ~QH_MULT;
2106 else
2107 mEp->qh.ptr->cap &= ~QH_ZLT;
2012 2108
2013 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) 2109 mEp->qh.ptr->cap |=
2014 mEp->dir = (mEp->dir == TX) ? RX : TX; 2110 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
2111 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
2015 2112
2016 } while (mEp->dir != direction); 2113 retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type);
2017 2114
2018 spin_unlock_irqrestore(mEp->lock, flags); 2115 spin_unlock_irqrestore(mEp->lock, flags);
2019 return retval; 2116 return retval;
@@ -2146,7 +2243,7 @@ static int ep_queue(struct usb_ep *ep, struct usb_request *req,
2146 spin_lock_irqsave(mEp->lock, flags); 2243 spin_lock_irqsave(mEp->lock, flags);
2147 2244
2148 if (mEp->type == USB_ENDPOINT_XFER_CONTROL && 2245 if (mEp->type == USB_ENDPOINT_XFER_CONTROL &&
2149 !list_empty(&mEp->qh[mEp->dir].queue)) { 2246 !list_empty(&mEp->qh.queue)) {
2150 _ep_nuke(mEp); 2247 _ep_nuke(mEp);
2151 retval = -EOVERFLOW; 2248 retval = -EOVERFLOW;
2152 warn("endpoint ctrl %X nuked", _usb_addr(mEp)); 2249 warn("endpoint ctrl %X nuked", _usb_addr(mEp));
@@ -2170,15 +2267,15 @@ static int ep_queue(struct usb_ep *ep, struct usb_request *req,
2170 /* push request */ 2267 /* push request */
2171 mReq->req.status = -EINPROGRESS; 2268 mReq->req.status = -EINPROGRESS;
2172 mReq->req.actual = 0; 2269 mReq->req.actual = 0;
2173 list_add_tail(&mReq->queue, &mEp->qh[mEp->dir].queue);
2174 2270
2175 if (list_is_singular(&mEp->qh[mEp->dir].queue)) 2271 retval = _hardware_enqueue(mEp, mReq);
2176 retval = _hardware_enqueue(mEp, mReq);
2177 2272
2178 if (retval == -EALREADY) { 2273 if (retval == -EALREADY) {
2179 dbg_event(_usb_addr(mEp), "QUEUE", retval); 2274 dbg_event(_usb_addr(mEp), "QUEUE", retval);
2180 retval = 0; 2275 retval = 0;
2181 } 2276 }
2277 if (!retval)
2278 list_add_tail(&mReq->queue, &mEp->qh.queue);
2182 2279
2183 done: 2280 done:
2184 spin_unlock_irqrestore(mEp->lock, flags); 2281 spin_unlock_irqrestore(mEp->lock, flags);
@@ -2198,19 +2295,25 @@ static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
2198 2295
2199 trace("%p, %p", ep, req); 2296 trace("%p, %p", ep, req);
2200 2297
2201 if (ep == NULL || req == NULL || mEp->desc == NULL || 2298 if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
2202 list_empty(&mReq->queue) || list_empty(&mEp->qh[mEp->dir].queue)) 2299 mEp->desc == NULL || list_empty(&mReq->queue) ||
2300 list_empty(&mEp->qh.queue))
2203 return -EINVAL; 2301 return -EINVAL;
2204 2302
2205 spin_lock_irqsave(mEp->lock, flags); 2303 spin_lock_irqsave(mEp->lock, flags);
2206 2304
2207 dbg_event(_usb_addr(mEp), "DEQUEUE", 0); 2305 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
2208 2306
2209 if (mReq->req.status == -EALREADY) 2307 hw_ep_flush(mEp->num, mEp->dir);
2210 _hardware_dequeue(mEp, mReq);
2211 2308
2212 /* pop request */ 2309 /* pop request */
2213 list_del_init(&mReq->queue); 2310 list_del_init(&mReq->queue);
2311 if (mReq->map) {
2312 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
2313 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
2314 mReq->req.dma = 0;
2315 mReq->map = 0;
2316 }
2214 req->status = -ECONNRESET; 2317 req->status = -ECONNRESET;
2215 2318
2216 if (mReq->req.complete != NULL) { 2319 if (mReq->req.complete != NULL) {
@@ -2244,7 +2347,7 @@ static int ep_set_halt(struct usb_ep *ep, int value)
2244#ifndef STALL_IN 2347#ifndef STALL_IN
2245 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */ 2348 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2246 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX && 2349 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
2247 !list_empty(&mEp->qh[mEp->dir].queue)) { 2350 !list_empty(&mEp->qh.queue)) {
2248 spin_unlock_irqrestore(mEp->lock, flags); 2351 spin_unlock_irqrestore(mEp->lock, flags);
2249 return -EAGAIN; 2352 return -EAGAIN;
2250 } 2353 }
@@ -2355,7 +2458,7 @@ static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
2355 if (is_active) { 2458 if (is_active) {
2356 pm_runtime_get_sync(&_gadget->dev); 2459 pm_runtime_get_sync(&_gadget->dev);
2357 hw_device_reset(udc); 2460 hw_device_reset(udc);
2358 hw_device_state(udc->ci13xxx_ep[0].qh[RX].dma); 2461 hw_device_state(udc->ep0out.qh.dma);
2359 } else { 2462 } else {
2360 hw_device_state(0); 2463 hw_device_state(0);
2361 if (udc->udc_driver->notify_event) 2464 if (udc->udc_driver->notify_event)
@@ -2369,6 +2472,31 @@ static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
2369 return 0; 2472 return 0;
2370} 2473}
2371 2474
2475static int ci13xxx_wakeup(struct usb_gadget *_gadget)
2476{
2477 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2478 unsigned long flags;
2479 int ret = 0;
2480
2481 trace();
2482
2483 spin_lock_irqsave(udc->lock, flags);
2484 if (!udc->remote_wakeup) {
2485 ret = -EOPNOTSUPP;
2486 dbg_trace("remote wakeup feature is not enabled\n");
2487 goto out;
2488 }
2489 if (!hw_cread(CAP_PORTSC, PORTSC_SUSP)) {
2490 ret = -EINVAL;
2491 dbg_trace("port is not suspended\n");
2492 goto out;
2493 }
2494 hw_cwrite(CAP_PORTSC, PORTSC_FPR, PORTSC_FPR);
2495out:
2496 spin_unlock_irqrestore(udc->lock, flags);
2497 return ret;
2498}
2499
2372/** 2500/**
2373 * Device operations part of the API to the USB controller hardware, 2501 * Device operations part of the API to the USB controller hardware,
2374 * which don't involve endpoints (or i/o) 2502 * which don't involve endpoints (or i/o)
@@ -2376,6 +2504,7 @@ static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
2376 */ 2504 */
2377static const struct usb_gadget_ops usb_gadget_ops = { 2505static const struct usb_gadget_ops usb_gadget_ops = {
2378 .vbus_session = ci13xxx_vbus_session, 2506 .vbus_session = ci13xxx_vbus_session,
2507 .wakeup = ci13xxx_wakeup,
2379}; 2508};
2380 2509
2381/** 2510/**
@@ -2390,7 +2519,8 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2390 int (*bind)(struct usb_gadget *)) 2519 int (*bind)(struct usb_gadget *))
2391{ 2520{
2392 struct ci13xxx *udc = _udc; 2521 struct ci13xxx *udc = _udc;
2393 unsigned long i, k, flags; 2522 unsigned long flags;
2523 int i, j;
2394 int retval = -ENOMEM; 2524 int retval = -ENOMEM;
2395 2525
2396 trace("%p", driver); 2526 trace("%p", driver);
@@ -2427,45 +2557,46 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2427 2557
2428 info("hw_ep_max = %d", hw_ep_max); 2558 info("hw_ep_max = %d", hw_ep_max);
2429 2559
2430 udc->driver = driver;
2431 udc->gadget.dev.driver = NULL; 2560 udc->gadget.dev.driver = NULL;
2432 2561
2433 retval = 0; 2562 retval = 0;
2434 for (i = 0; i < hw_ep_max; i++) { 2563 for (i = 0; i < hw_ep_max/2; i++) {
2435 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i]; 2564 for (j = RX; j <= TX; j++) {
2565 int k = i + j * hw_ep_max/2;
2566 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
2436 2567
2437 scnprintf(mEp->name, sizeof(mEp->name), "ep%i", (int)i); 2568 scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
2569 (j == TX) ? "in" : "out");
2438 2570
2439 mEp->lock = udc->lock; 2571 mEp->lock = udc->lock;
2440 mEp->device = &udc->gadget.dev; 2572 mEp->device = &udc->gadget.dev;
2441 mEp->td_pool = udc->td_pool; 2573 mEp->td_pool = udc->td_pool;
2442 2574
2443 mEp->ep.name = mEp->name; 2575 mEp->ep.name = mEp->name;
2444 mEp->ep.ops = &usb_ep_ops; 2576 mEp->ep.ops = &usb_ep_ops;
2445 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX; 2577 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
2446 2578
2447 /* this allocation cannot be random */ 2579 INIT_LIST_HEAD(&mEp->qh.queue);
2448 for (k = RX; k <= TX; k++) {
2449 INIT_LIST_HEAD(&mEp->qh[k].queue);
2450 spin_unlock_irqrestore(udc->lock, flags); 2580 spin_unlock_irqrestore(udc->lock, flags);
2451 mEp->qh[k].ptr = dma_pool_alloc(udc->qh_pool, 2581 mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
2452 GFP_KERNEL, 2582 &mEp->qh.dma);
2453 &mEp->qh[k].dma);
2454 spin_lock_irqsave(udc->lock, flags); 2583 spin_lock_irqsave(udc->lock, flags);
2455 if (mEp->qh[k].ptr == NULL) 2584 if (mEp->qh.ptr == NULL)
2456 retval = -ENOMEM; 2585 retval = -ENOMEM;
2457 else 2586 else
2458 memset(mEp->qh[k].ptr, 0, 2587 memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
2459 sizeof(*mEp->qh[k].ptr)); 2588
2460 } 2589 /* skip ep0 out and in endpoints */
2461 if (i == 0) 2590 if (i == 0)
2462 udc->gadget.ep0 = &mEp->ep; 2591 continue;
2463 else 2592
2464 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list); 2593 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
2594 }
2465 } 2595 }
2466 if (retval) 2596 if (retval)
2467 goto done; 2597 goto done;
2468 2598
2599 udc->gadget.ep0 = &udc->ep0in.ep;
2469 /* bind gadget */ 2600 /* bind gadget */
2470 driver->driver.bus = NULL; 2601 driver->driver.bus = NULL;
2471 udc->gadget.dev.driver = &driver->driver; 2602 udc->gadget.dev.driver = &driver->driver;
@@ -2479,6 +2610,7 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2479 goto done; 2610 goto done;
2480 } 2611 }
2481 2612
2613 udc->driver = driver;
2482 pm_runtime_get_sync(&udc->gadget.dev); 2614 pm_runtime_get_sync(&udc->gadget.dev);
2483 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) { 2615 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
2484 if (udc->vbus_active) { 2616 if (udc->vbus_active) {
@@ -2490,14 +2622,12 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2490 } 2622 }
2491 } 2623 }
2492 2624
2493 retval = hw_device_state(udc->ci13xxx_ep[0].qh[RX].dma); 2625 retval = hw_device_state(udc->ep0out.qh.dma);
2494 if (retval) 2626 if (retval)
2495 pm_runtime_put_sync(&udc->gadget.dev); 2627 pm_runtime_put_sync(&udc->gadget.dev);
2496 2628
2497 done: 2629 done:
2498 spin_unlock_irqrestore(udc->lock, flags); 2630 spin_unlock_irqrestore(udc->lock, flags);
2499 if (retval)
2500 usb_gadget_unregister_driver(driver);
2501 return retval; 2631 return retval;
2502} 2632}
2503EXPORT_SYMBOL(usb_gadget_probe_driver); 2633EXPORT_SYMBOL(usb_gadget_probe_driver);
@@ -2510,7 +2640,7 @@ EXPORT_SYMBOL(usb_gadget_probe_driver);
2510int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 2640int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2511{ 2641{
2512 struct ci13xxx *udc = _udc; 2642 struct ci13xxx *udc = _udc;
2513 unsigned long i, k, flags; 2643 unsigned long i, flags;
2514 2644
2515 trace("%p", driver); 2645 trace("%p", driver);
2516 2646
@@ -2546,17 +2676,14 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2546 for (i = 0; i < hw_ep_max; i++) { 2676 for (i = 0; i < hw_ep_max; i++) {
2547 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i]; 2677 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
2548 2678
2549 if (i == 0) 2679 if (!list_empty(&mEp->ep.ep_list))
2550 udc->gadget.ep0 = NULL;
2551 else if (!list_empty(&mEp->ep.ep_list))
2552 list_del_init(&mEp->ep.ep_list); 2680 list_del_init(&mEp->ep.ep_list);
2553 2681
2554 for (k = RX; k <= TX; k++) 2682 if (mEp->qh.ptr != NULL)
2555 if (mEp->qh[k].ptr != NULL) 2683 dma_pool_free(udc->qh_pool, mEp->qh.ptr, mEp->qh.dma);
2556 dma_pool_free(udc->qh_pool,
2557 mEp->qh[k].ptr, mEp->qh[k].dma);
2558 } 2684 }
2559 2685
2686 udc->gadget.ep0 = NULL;
2560 udc->driver = NULL; 2687 udc->driver = NULL;
2561 2688
2562 spin_unlock_irqrestore(udc->lock, flags); 2689 spin_unlock_irqrestore(udc->lock, flags);
@@ -2620,6 +2747,12 @@ static irqreturn_t udc_irq(void)
2620 isr_statistics.pci++; 2747 isr_statistics.pci++;
2621 udc->gadget.speed = hw_port_is_high_speed() ? 2748 udc->gadget.speed = hw_port_is_high_speed() ?
2622 USB_SPEED_HIGH : USB_SPEED_FULL; 2749 USB_SPEED_HIGH : USB_SPEED_FULL;
2750 if (udc->suspended) {
2751 spin_unlock(udc->lock);
2752 udc->driver->resume(&udc->gadget);
2753 spin_lock(udc->lock);
2754 udc->suspended = 0;
2755 }
2623 } 2756 }
2624 if (USBi_UEI & intr) 2757 if (USBi_UEI & intr)
2625 isr_statistics.uei++; 2758 isr_statistics.uei++;
@@ -2627,8 +2760,15 @@ static irqreturn_t udc_irq(void)
2627 isr_statistics.ui++; 2760 isr_statistics.ui++;
2628 isr_tr_complete_handler(udc); 2761 isr_tr_complete_handler(udc);
2629 } 2762 }
2630 if (USBi_SLI & intr) 2763 if (USBi_SLI & intr) {
2764 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
2765 udc->suspended = 1;
2766 spin_unlock(udc->lock);
2767 udc->driver->suspend(&udc->gadget);
2768 spin_lock(udc->lock);
2769 }
2631 isr_statistics.sli++; 2770 isr_statistics.sli++;
2771 }
2632 retval = IRQ_HANDLED; 2772 retval = IRQ_HANDLED;
2633 } else { 2773 } else {
2634 isr_statistics.none++; 2774 isr_statistics.none++;
diff --git a/drivers/usb/gadget/ci13xxx_udc.h b/drivers/usb/gadget/ci13xxx_udc.h
index f61fed07f76b..23707775cb43 100644
--- a/drivers/usb/gadget/ci13xxx_udc.h
+++ b/drivers/usb/gadget/ci13xxx_udc.h
@@ -20,7 +20,7 @@
20 * DEFINE 20 * DEFINE
21 *****************************************************************************/ 21 *****************************************************************************/
22#define CI13XXX_PAGE_SIZE 4096ul /* page size for TD's */ 22#define CI13XXX_PAGE_SIZE 4096ul /* page size for TD's */
23#define ENDPT_MAX (16) 23#define ENDPT_MAX (32)
24#define CTRL_PAYLOAD_MAX (64) 24#define CTRL_PAYLOAD_MAX (64)
25#define RX (0) /* similar to USB_DIR_OUT but can be used as an index */ 25#define RX (0) /* similar to USB_DIR_OUT but can be used as an index */
26#define TX (1) /* similar to USB_DIR_IN but can be used as an index */ 26#define TX (1) /* similar to USB_DIR_IN but can be used as an index */
@@ -33,6 +33,7 @@ struct ci13xxx_td {
33 /* 0 */ 33 /* 0 */
34 u32 next; 34 u32 next;
35#define TD_TERMINATE BIT(0) 35#define TD_TERMINATE BIT(0)
36#define TD_ADDR_MASK (0xFFFFFFEUL << 5)
36 /* 1 */ 37 /* 1 */
37 u32 token; 38 u32 token;
38#define TD_STATUS (0x00FFUL << 0) 39#define TD_STATUS (0x00FFUL << 0)
@@ -74,6 +75,8 @@ struct ci13xxx_req {
74 struct list_head queue; 75 struct list_head queue;
75 struct ci13xxx_td *ptr; 76 struct ci13xxx_td *ptr;
76 dma_addr_t dma; 77 dma_addr_t dma;
78 struct ci13xxx_td *zptr;
79 dma_addr_t zdma;
77}; 80};
78 81
79/* Extension of usb_ep */ 82/* Extension of usb_ep */
@@ -88,8 +91,7 @@ struct ci13xxx_ep {
88 struct list_head queue; 91 struct list_head queue;
89 struct ci13xxx_qh *ptr; 92 struct ci13xxx_qh *ptr;
90 dma_addr_t dma; 93 dma_addr_t dma;
91 } qh[2]; 94 } qh;
92 struct usb_request *status;
93 int wedge; 95 int wedge;
94 96
95 /* global resources */ 97 /* global resources */
@@ -119,9 +121,17 @@ struct ci13xxx {
119 121
120 struct dma_pool *qh_pool; /* DMA pool for queue heads */ 122 struct dma_pool *qh_pool; /* DMA pool for queue heads */
121 struct dma_pool *td_pool; /* DMA pool for transfer descs */ 123 struct dma_pool *td_pool; /* DMA pool for transfer descs */
124 struct usb_request *status; /* ep0 status request */
122 125
123 struct usb_gadget gadget; /* USB slave device */ 126 struct usb_gadget gadget; /* USB slave device */
124 struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX]; /* extended endpts */ 127 struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX]; /* extended endpts */
128 u32 ep0_dir; /* ep0 direction */
129#define ep0out ci13xxx_ep[0]
130#define ep0in ci13xxx_ep[16]
131 u8 remote_wakeup; /* Is remote wakeup feature
132 enabled by the host? */
133 u8 suspended; /* suspended by the host */
134 u8 test_mode; /* the selected test mode */
125 135
126 struct usb_gadget_driver *driver; /* 3rd party gadget driver */ 136 struct usb_gadget_driver *driver; /* 3rd party gadget driver */
127 struct ci13xxx_udc_driver *udc_driver; /* device controller driver */ 137 struct ci13xxx_udc_driver *udc_driver; /* device controller driver */
@@ -149,6 +159,7 @@ struct ci13xxx {
149#define USBCMD_RS BIT(0) 159#define USBCMD_RS BIT(0)
150#define USBCMD_RST BIT(1) 160#define USBCMD_RST BIT(1)
151#define USBCMD_SUTW BIT(13) 161#define USBCMD_SUTW BIT(13)
162#define USBCMD_ATDTW BIT(14)
152 163
153/* USBSTS & USBINTR */ 164/* USBSTS & USBINTR */
154#define USBi_UI BIT(0) 165#define USBi_UI BIT(0)
@@ -162,6 +173,7 @@ struct ci13xxx {
162#define DEVICEADDR_USBADR (0x7FUL << 25) 173#define DEVICEADDR_USBADR (0x7FUL << 25)
163 174
164/* PORTSC */ 175/* PORTSC */
176#define PORTSC_FPR BIT(6)
165#define PORTSC_SUSP BIT(7) 177#define PORTSC_SUSP BIT(7)
166#define PORTSC_HSP BIT(9) 178#define PORTSC_HSP BIT(9)
167#define PORTSC_PTC (0x0FUL << 16) 179#define PORTSC_PTC (0x0FUL << 16)
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index f6ff8456d52d..c2251c40a205 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -813,7 +813,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
813 */ 813 */
814 req->zero = 0; 814 req->zero = 0;
815 req->complete = composite_setup_complete; 815 req->complete = composite_setup_complete;
816 req->length = USB_BUFSIZ; 816 req->length = 0;
817 gadget->ep0->driver_data = cdev; 817 gadget->ep0->driver_data = cdev;
818 818
819 switch (ctrl->bRequest) { 819 switch (ctrl->bRequest) {
@@ -887,7 +887,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
887 case USB_REQ_SET_INTERFACE: 887 case USB_REQ_SET_INTERFACE:
888 if (ctrl->bRequestType != USB_RECIP_INTERFACE) 888 if (ctrl->bRequestType != USB_RECIP_INTERFACE)
889 goto unknown; 889 goto unknown;
890 if (!cdev->config || w_index >= MAX_CONFIG_INTERFACES) 890 if (!cdev->config || intf >= MAX_CONFIG_INTERFACES)
891 break; 891 break;
892 f = cdev->config->interface[intf]; 892 f = cdev->config->interface[intf];
893 if (!f) 893 if (!f)
@@ -899,7 +899,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
899 case USB_REQ_GET_INTERFACE: 899 case USB_REQ_GET_INTERFACE:
900 if (ctrl->bRequestType != (USB_DIR_IN|USB_RECIP_INTERFACE)) 900 if (ctrl->bRequestType != (USB_DIR_IN|USB_RECIP_INTERFACE))
901 goto unknown; 901 goto unknown;
902 if (!cdev->config || w_index >= MAX_CONFIG_INTERFACES) 902 if (!cdev->config || intf >= MAX_CONFIG_INTERFACES)
903 break; 903 break;
904 f = cdev->config->interface[intf]; 904 f = cdev->config->interface[intf];
905 if (!f) 905 if (!f)
@@ -928,8 +928,9 @@ unknown:
928 */ 928 */
929 switch (ctrl->bRequestType & USB_RECIP_MASK) { 929 switch (ctrl->bRequestType & USB_RECIP_MASK) {
930 case USB_RECIP_INTERFACE: 930 case USB_RECIP_INTERFACE:
931 if (cdev->config) 931 if (!cdev->config || intf >= MAX_CONFIG_INTERFACES)
932 f = cdev->config->interface[intf]; 932 break;
933 f = cdev->config->interface[intf];
933 break; 934 break;
934 935
935 case USB_RECIP_ENDPOINT: 936 case USB_RECIP_ENDPOINT:
@@ -1257,16 +1258,16 @@ static struct usb_gadget_driver composite_driver = {
1257 * while it was binding. That would usually be done in order to wait for 1258 * while it was binding. That would usually be done in order to wait for
1258 * some userspace participation. 1259 * some userspace participation.
1259 */ 1260 */
1260extern int usb_composite_probe(struct usb_composite_driver *driver, 1261int usb_composite_probe(struct usb_composite_driver *driver,
1261 int (*bind)(struct usb_composite_dev *cdev)) 1262 int (*bind)(struct usb_composite_dev *cdev))
1262{ 1263{
1263 if (!driver || !driver->dev || !bind || composite) 1264 if (!driver || !driver->dev || !bind || composite)
1264 return -EINVAL; 1265 return -EINVAL;
1265 1266
1266 if (!driver->iProduct)
1267 driver->iProduct = driver->name;
1268 if (!driver->name) 1267 if (!driver->name)
1269 driver->name = "composite"; 1268 driver->name = "composite";
1269 if (!driver->iProduct)
1270 driver->iProduct = driver->name;
1270 composite_driver.function = (char *) driver->name; 1271 composite_driver.function = (char *) driver->name;
1271 composite_driver.driver.name = driver->name; 1272 composite_driver.driver.name = driver->name;
1272 composite = driver; 1273 composite = driver;
diff --git a/drivers/usb/gadget/dummy_hcd.c b/drivers/usb/gadget/dummy_hcd.c
index 13b9f47feecd..3214ca375d64 100644
--- a/drivers/usb/gadget/dummy_hcd.c
+++ b/drivers/usb/gadget/dummy_hcd.c
@@ -1593,8 +1593,8 @@ hub_descriptor (struct usb_hub_descriptor *desc)
1593 desc->bDescLength = 9; 1593 desc->bDescLength = 9;
1594 desc->wHubCharacteristics = cpu_to_le16(0x0001); 1594 desc->wHubCharacteristics = cpu_to_le16(0x0001);
1595 desc->bNbrPorts = 1; 1595 desc->bNbrPorts = 1;
1596 desc->bitmap [0] = 0xff; 1596 desc->u.hs.DeviceRemovable[0] = 0xff;
1597 desc->bitmap [1] = 0xff; 1597 desc->u.hs.DeviceRemovable[1] = 0xff;
1598} 1598}
1599 1599
1600static int dummy_hub_control ( 1600static int dummy_hub_control (
diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
index 8a832488ccdd..9b7360ff5aa7 100644
--- a/drivers/usb/gadget/epautoconf.c
+++ b/drivers/usb/gadget/epautoconf.c
@@ -128,6 +128,13 @@ ep_matches (
128 } 128 }
129 } 129 }
130 130
131 /*
132 * If the protocol driver hasn't yet decided on wMaxPacketSize
133 * and wants to know the maximum possible, provide the info.
134 */
135 if (desc->wMaxPacketSize == 0)
136 desc->wMaxPacketSize = cpu_to_le16(ep->maxpacket);
137
131 /* endpoint maxpacket size is an input parameter, except for bulk 138 /* endpoint maxpacket size is an input parameter, except for bulk
132 * where it's an output parameter representing the full speed limit. 139 * where it's an output parameter representing the full speed limit.
133 * the usb spec fixes high speed bulk maxpacket at 512 bytes. 140 * the usb spec fixes high speed bulk maxpacket at 512 bytes.
diff --git a/drivers/usb/gadget/f_fs.c b/drivers/usb/gadget/f_fs.c
index 1499f9e4afa8..19fffccc370d 100644
--- a/drivers/usb/gadget/f_fs.c
+++ b/drivers/usb/gadget/f_fs.c
@@ -368,6 +368,14 @@ static int __ffs_ep0_queue_wait(struct ffs_data *ffs, char *data, size_t len)
368 req->buf = data; 368 req->buf = data;
369 req->length = len; 369 req->length = len;
370 370
371 /*
372 * UDC layer requires to provide a buffer even for ZLP, but should
373 * not use it at all. Let's provide some poisoned pointer to catch
374 * possible bug in the driver.
375 */
376 if (req->buf == NULL)
377 req->buf = (void *)0xDEADBABE;
378
371 INIT_COMPLETION(ffs->ep0req_completion); 379 INIT_COMPLETION(ffs->ep0req_completion);
372 380
373 ret = usb_ep_queue(ffs->gadget->ep0, req, GFP_ATOMIC); 381 ret = usb_ep_queue(ffs->gadget->ep0, req, GFP_ATOMIC);
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index b5dbb2308f56..6d8e533949eb 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -293,6 +293,7 @@
293 293
294#include <linux/usb/ch9.h> 294#include <linux/usb/ch9.h>
295#include <linux/usb/gadget.h> 295#include <linux/usb/gadget.h>
296#include <linux/usb/composite.h>
296 297
297#include "gadget_chips.h" 298#include "gadget_chips.h"
298 299
@@ -2763,7 +2764,7 @@ static struct fsg_common *fsg_common_init(struct fsg_common *common,
2763 return ERR_PTR(-ENOMEM); 2764 return ERR_PTR(-ENOMEM);
2764 common->free_storage_on_release = 1; 2765 common->free_storage_on_release = 1;
2765 } else { 2766 } else {
2766 memset(common, 0, sizeof common); 2767 memset(common, 0, sizeof *common);
2767 common->free_storage_on_release = 0; 2768 common->free_storage_on_release = 0;
2768 } 2769 }
2769 2770
diff --git a/drivers/usb/gadget/f_phonet.c b/drivers/usb/gadget/f_phonet.c
index 3c6e1a058745..5e1495097ec3 100644
--- a/drivers/usb/gadget/f_phonet.c
+++ b/drivers/usb/gadget/f_phonet.c
@@ -346,14 +346,19 @@ static void pn_rx_complete(struct usb_ep *ep, struct usb_request *req)
346 346
347 if (unlikely(!skb)) 347 if (unlikely(!skb))
348 break; 348 break;
349 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page, 0,
350 req->actual);
351 page = NULL;
352 349
353 if (req->actual < req->length) { /* Last fragment */ 350 if (skb->len == 0) { /* First fragment */
354 skb->protocol = htons(ETH_P_PHONET); 351 skb->protocol = htons(ETH_P_PHONET);
355 skb_reset_mac_header(skb); 352 skb_reset_mac_header(skb);
356 pskb_pull(skb, 1); 353 /* Can't use pskb_pull() on page in IRQ */
354 memcpy(skb_put(skb, 1), page_address(page), 1);
355 }
356
357 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
358 skb->len == 0, req->actual);
359 page = NULL;
360
361 if (req->actual < req->length) { /* Last fragment */
357 skb->dev = dev; 362 skb->dev = dev;
358 dev->stats.rx_packets++; 363 dev->stats.rx_packets++;
359 dev->stats.rx_bytes += skb->len; 364 dev->stats.rx_bytes += skb->len;
diff --git a/drivers/usb/gadget/fsl_mxc_udc.c b/drivers/usb/gadget/fsl_mxc_udc.c
index 77b1eb577029..43a49ecc1f36 100644
--- a/drivers/usb/gadget/fsl_mxc_udc.c
+++ b/drivers/usb/gadget/fsl_mxc_udc.c
@@ -88,15 +88,18 @@ eenahb:
88void fsl_udc_clk_finalize(struct platform_device *pdev) 88void fsl_udc_clk_finalize(struct platform_device *pdev)
89{ 89{
90 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; 90 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
91#if defined(CONFIG_ARCH_MX35) 91#if defined(CONFIG_SOC_IMX35)
92 unsigned int v; 92 if (cpu_is_mx35()) {
93 93 unsigned int v;
94 /* workaround ENGcm09152 for i.MX35 */ 94
95 if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) { 95 /* workaround ENGcm09152 for i.MX35 */
96 v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + 96 if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) {
97 USBPHYCTRL_OTGBASE_OFFSET)); 97 v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
98 writel(v | USBPHYCTRL_EVDO, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + 98 USBPHYCTRL_OTGBASE_OFFSET));
99 USBPHYCTRL_OTGBASE_OFFSET)); 99 writel(v | USBPHYCTRL_EVDO,
100 MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
101 USBPHYCTRL_OTGBASE_OFFSET));
102 }
100 } 103 }
101#endif 104#endif
102 105
diff --git a/drivers/usb/gadget/fsl_qe_udc.c b/drivers/usb/gadget/fsl_qe_udc.c
index 792d5ef40137..aee7e3c53c38 100644
--- a/drivers/usb/gadget/fsl_qe_udc.c
+++ b/drivers/usb/gadget/fsl_qe_udc.c
@@ -2523,8 +2523,7 @@ static void qe_udc_release(struct device *dev)
2523} 2523}
2524 2524
2525/* Driver probe functions */ 2525/* Driver probe functions */
2526static int __devinit qe_udc_probe(struct platform_device *ofdev, 2526static int __devinit qe_udc_probe(struct platform_device *ofdev)
2527 const struct of_device_id *match)
2528{ 2527{
2529 struct device_node *np = ofdev->dev.of_node; 2528 struct device_node *np = ofdev->dev.of_node;
2530 struct qe_ep *ep; 2529 struct qe_ep *ep;
@@ -2532,6 +2531,9 @@ static int __devinit qe_udc_probe(struct platform_device *ofdev,
2532 unsigned int i; 2531 unsigned int i;
2533 const void *prop; 2532 const void *prop;
2534 2533
2534 if (!ofdev->dev.of_match)
2535 return -EINVAL;
2536
2535 prop = of_get_property(np, "mode", NULL); 2537 prop = of_get_property(np, "mode", NULL);
2536 if (!prop || strcmp(prop, "peripheral")) 2538 if (!prop || strcmp(prop, "peripheral"))
2537 return -ENODEV; 2539 return -ENODEV;
@@ -2543,7 +2545,7 @@ static int __devinit qe_udc_probe(struct platform_device *ofdev,
2543 return -ENOMEM; 2545 return -ENOMEM;
2544 } 2546 }
2545 2547
2546 udc_controller->soc_type = (unsigned long)match->data; 2548 udc_controller->soc_type = (unsigned long)ofdev->dev.of_match->data;
2547 udc_controller->usb_regs = of_iomap(np, 0); 2549 udc_controller->usb_regs = of_iomap(np, 0);
2548 if (!udc_controller->usb_regs) { 2550 if (!udc_controller->usb_regs) {
2549 ret = -ENOMEM; 2551 ret = -ENOMEM;
@@ -2768,7 +2770,7 @@ static const struct of_device_id qe_udc_match[] __devinitconst = {
2768 2770
2769MODULE_DEVICE_TABLE(of, qe_udc_match); 2771MODULE_DEVICE_TABLE(of, qe_udc_match);
2770 2772
2771static struct of_platform_driver udc_driver = { 2773static struct platform_driver udc_driver = {
2772 .driver = { 2774 .driver = {
2773 .name = (char *)driver_name, 2775 .name = (char *)driver_name,
2774 .owner = THIS_MODULE, 2776 .owner = THIS_MODULE,
@@ -2786,12 +2788,12 @@ static int __init qe_udc_init(void)
2786{ 2788{
2787 printk(KERN_INFO "%s: %s, %s\n", driver_name, driver_desc, 2789 printk(KERN_INFO "%s: %s, %s\n", driver_name, driver_desc,
2788 DRIVER_VERSION); 2790 DRIVER_VERSION);
2789 return of_register_platform_driver(&udc_driver); 2791 return platform_driver_register(&udc_driver);
2790} 2792}
2791 2793
2792static void __exit qe_udc_exit(void) 2794static void __exit qe_udc_exit(void)
2793{ 2795{
2794 of_unregister_platform_driver(&udc_driver); 2796 platform_driver_unregister(&udc_driver);
2795} 2797}
2796 2798
2797module_init(qe_udc_init); 2799module_init(qe_udc_init);
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
index 4c55eda4bd20..912cb8e63fe3 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -766,7 +766,6 @@ fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
766 struct fsl_req *req = container_of(_req, struct fsl_req, req); 766 struct fsl_req *req = container_of(_req, struct fsl_req, req);
767 struct fsl_udc *udc; 767 struct fsl_udc *udc;
768 unsigned long flags; 768 unsigned long flags;
769 int is_iso = 0;
770 769
771 /* catch various bogus parameters */ 770 /* catch various bogus parameters */
772 if (!_req || !req->req.complete || !req->req.buf 771 if (!_req || !req->req.complete || !req->req.buf
@@ -781,7 +780,6 @@ fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
781 if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) { 780 if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
782 if (req->req.length > ep->ep.maxpacket) 781 if (req->req.length > ep->ep.maxpacket)
783 return -EMSGSIZE; 782 return -EMSGSIZE;
784 is_iso = 1;
785 } 783 }
786 784
787 udc = ep->udc; 785 udc = ep->udc;
diff --git a/drivers/usb/gadget/fusb300_udc.c b/drivers/usb/gadget/fusb300_udc.c
new file mode 100644
index 000000000000..763d462454b9
--- /dev/null
+++ b/drivers/usb/gadget/fusb300_udc.c
@@ -0,0 +1,1744 @@
1/*
2 * Fusb300 UDC (USB gadget)
3 *
4 * Copyright (C) 2010 Faraday Technology Corp.
5 *
6 * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 *
21 */
22#include <linux/dma-mapping.h>
23#include <linux/err.h>
24#include <linux/interrupt.h>
25#include <linux/io.h>
26#include <linux/platform_device.h>
27#include <linux/usb/ch9.h>
28#include <linux/usb/gadget.h>
29
30#include "fusb300_udc.h"
31
32MODULE_DESCRIPTION("FUSB300 USB gadget driver");
33MODULE_LICENSE("GPL");
34MODULE_AUTHOR("Yuan Hsin Chen <yhchen@faraday-tech.com>");
35MODULE_ALIAS("platform:fusb300_udc");
36
37#define DRIVER_VERSION "20 October 2010"
38
39static const char udc_name[] = "fusb300_udc";
40static const char * const fusb300_ep_name[] = {
41 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", "ep8", "ep9",
42 "ep10", "ep11", "ep12", "ep13", "ep14", "ep15"
43};
44
45static void done(struct fusb300_ep *ep, struct fusb300_request *req,
46 int status);
47
48static void fusb300_enable_bit(struct fusb300 *fusb300, u32 offset,
49 u32 value)
50{
51 u32 reg = ioread32(fusb300->reg + offset);
52
53 reg |= value;
54 iowrite32(reg, fusb300->reg + offset);
55}
56
57static void fusb300_disable_bit(struct fusb300 *fusb300, u32 offset,
58 u32 value)
59{
60 u32 reg = ioread32(fusb300->reg + offset);
61
62 reg &= ~value;
63 iowrite32(reg, fusb300->reg + offset);
64}
65
66
67static void fusb300_ep_setting(struct fusb300_ep *ep,
68 struct fusb300_ep_info info)
69{
70 ep->epnum = info.epnum;
71 ep->type = info.type;
72}
73
74static int fusb300_ep_release(struct fusb300_ep *ep)
75{
76 if (!ep->epnum)
77 return 0;
78 ep->epnum = 0;
79 ep->stall = 0;
80 ep->wedged = 0;
81 return 0;
82}
83
84static void fusb300_set_fifo_entry(struct fusb300 *fusb300,
85 u32 ep)
86{
87 u32 val = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
88
89 val &= ~FUSB300_EPSET1_FIFOENTRY_MSK;
90 val |= FUSB300_EPSET1_FIFOENTRY(FUSB300_FIFO_ENTRY_NUM);
91 iowrite32(val, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
92}
93
94static void fusb300_set_start_entry(struct fusb300 *fusb300,
95 u8 ep)
96{
97 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
98 u32 start_entry = fusb300->fifo_entry_num * FUSB300_FIFO_ENTRY_NUM;
99
100 reg &= ~FUSB300_EPSET1_START_ENTRY_MSK ;
101 reg |= FUSB300_EPSET1_START_ENTRY(start_entry);
102 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
103 if (fusb300->fifo_entry_num == FUSB300_MAX_FIFO_ENTRY) {
104 fusb300->fifo_entry_num = 0;
105 fusb300->addrofs = 0;
106 pr_err("fifo entry is over the maximum number!\n");
107 } else
108 fusb300->fifo_entry_num++;
109}
110
111/* set fusb300_set_start_entry first before fusb300_set_epaddrofs */
112static void fusb300_set_epaddrofs(struct fusb300 *fusb300,
113 struct fusb300_ep_info info)
114{
115 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
116
117 reg &= ~FUSB300_EPSET2_ADDROFS_MSK;
118 reg |= FUSB300_EPSET2_ADDROFS(fusb300->addrofs);
119 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
120 fusb300->addrofs += (info.maxpacket + 7) / 8 * FUSB300_FIFO_ENTRY_NUM;
121}
122
123static void ep_fifo_setting(struct fusb300 *fusb300,
124 struct fusb300_ep_info info)
125{
126 fusb300_set_fifo_entry(fusb300, info.epnum);
127 fusb300_set_start_entry(fusb300, info.epnum);
128 fusb300_set_epaddrofs(fusb300, info);
129}
130
131static void fusb300_set_eptype(struct fusb300 *fusb300,
132 struct fusb300_ep_info info)
133{
134 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
135
136 reg &= ~FUSB300_EPSET1_TYPE_MSK;
137 reg |= FUSB300_EPSET1_TYPE(info.type);
138 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
139}
140
141static void fusb300_set_epdir(struct fusb300 *fusb300,
142 struct fusb300_ep_info info)
143{
144 u32 reg;
145
146 if (!info.dir_in)
147 return;
148 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
149 reg &= ~FUSB300_EPSET1_DIR_MSK;
150 reg |= FUSB300_EPSET1_DIRIN;
151 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
152}
153
154static void fusb300_set_ep_active(struct fusb300 *fusb300,
155 u8 ep)
156{
157 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
158
159 reg |= FUSB300_EPSET1_ACTEN;
160 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
161}
162
163static void fusb300_set_epmps(struct fusb300 *fusb300,
164 struct fusb300_ep_info info)
165{
166 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
167
168 reg &= ~FUSB300_EPSET2_MPS_MSK;
169 reg |= FUSB300_EPSET2_MPS(info.maxpacket);
170 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
171}
172
173static void fusb300_set_interval(struct fusb300 *fusb300,
174 struct fusb300_ep_info info)
175{
176 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
177
178 reg &= ~FUSB300_EPSET1_INTERVAL(0x7);
179 reg |= FUSB300_EPSET1_INTERVAL(info.interval);
180 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
181}
182
183static void fusb300_set_bwnum(struct fusb300 *fusb300,
184 struct fusb300_ep_info info)
185{
186 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
187
188 reg &= ~FUSB300_EPSET1_BWNUM(0x3);
189 reg |= FUSB300_EPSET1_BWNUM(info.bw_num);
190 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
191}
192
193static void set_ep_reg(struct fusb300 *fusb300,
194 struct fusb300_ep_info info)
195{
196 fusb300_set_eptype(fusb300, info);
197 fusb300_set_epdir(fusb300, info);
198 fusb300_set_epmps(fusb300, info);
199
200 if (info.interval)
201 fusb300_set_interval(fusb300, info);
202
203 if (info.bw_num)
204 fusb300_set_bwnum(fusb300, info);
205
206 fusb300_set_ep_active(fusb300, info.epnum);
207}
208
209static int config_ep(struct fusb300_ep *ep,
210 const struct usb_endpoint_descriptor *desc)
211{
212 struct fusb300 *fusb300 = ep->fusb300;
213 struct fusb300_ep_info info;
214
215 ep->desc = desc;
216
217 info.interval = 0;
218 info.addrofs = 0;
219 info.bw_num = 0;
220
221 info.type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
222 info.dir_in = (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ? 1 : 0;
223 info.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
224 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
225
226 if ((info.type == USB_ENDPOINT_XFER_INT) ||
227 (info.type == USB_ENDPOINT_XFER_ISOC)) {
228 info.interval = desc->bInterval;
229 if (info.type == USB_ENDPOINT_XFER_ISOC)
230 info.bw_num = ((desc->wMaxPacketSize & 0x1800) >> 11);
231 }
232
233 ep_fifo_setting(fusb300, info);
234
235 set_ep_reg(fusb300, info);
236
237 fusb300_ep_setting(ep, info);
238
239 fusb300->ep[info.epnum] = ep;
240
241 return 0;
242}
243
244static int fusb300_enable(struct usb_ep *_ep,
245 const struct usb_endpoint_descriptor *desc)
246{
247 struct fusb300_ep *ep;
248
249 ep = container_of(_ep, struct fusb300_ep, ep);
250
251 if (ep->fusb300->reenum) {
252 ep->fusb300->fifo_entry_num = 0;
253 ep->fusb300->addrofs = 0;
254 ep->fusb300->reenum = 0;
255 }
256
257 return config_ep(ep, desc);
258}
259
260static int fusb300_disable(struct usb_ep *_ep)
261{
262 struct fusb300_ep *ep;
263 struct fusb300_request *req;
264 unsigned long flags;
265
266 ep = container_of(_ep, struct fusb300_ep, ep);
267
268 BUG_ON(!ep);
269
270 while (!list_empty(&ep->queue)) {
271 req = list_entry(ep->queue.next, struct fusb300_request, queue);
272 spin_lock_irqsave(&ep->fusb300->lock, flags);
273 done(ep, req, -ECONNRESET);
274 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
275 }
276
277 return fusb300_ep_release(ep);
278}
279
280static struct usb_request *fusb300_alloc_request(struct usb_ep *_ep,
281 gfp_t gfp_flags)
282{
283 struct fusb300_request *req;
284
285 req = kzalloc(sizeof(struct fusb300_request), gfp_flags);
286 if (!req)
287 return NULL;
288 INIT_LIST_HEAD(&req->queue);
289
290 return &req->req;
291}
292
293static void fusb300_free_request(struct usb_ep *_ep, struct usb_request *_req)
294{
295 struct fusb300_request *req;
296
297 req = container_of(_req, struct fusb300_request, req);
298 kfree(req);
299}
300
301static int enable_fifo_int(struct fusb300_ep *ep)
302{
303 struct fusb300 *fusb300 = ep->fusb300;
304
305 if (ep->epnum) {
306 fusb300_enable_bit(fusb300, FUSB300_OFFSET_IGER0,
307 FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
308 } else {
309 pr_err("can't enable_fifo_int ep0\n");
310 return -EINVAL;
311 }
312
313 return 0;
314}
315
316static int disable_fifo_int(struct fusb300_ep *ep)
317{
318 struct fusb300 *fusb300 = ep->fusb300;
319
320 if (ep->epnum) {
321 fusb300_disable_bit(fusb300, FUSB300_OFFSET_IGER0,
322 FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
323 } else {
324 pr_err("can't disable_fifo_int ep0\n");
325 return -EINVAL;
326 }
327
328 return 0;
329}
330
331static void fusb300_set_cxlen(struct fusb300 *fusb300, u32 length)
332{
333 u32 reg;
334
335 reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
336 reg &= ~FUSB300_CSR_LEN_MSK;
337 reg |= FUSB300_CSR_LEN(length);
338 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_CSR);
339}
340
341/* write data to cx fifo */
342static void fusb300_wrcxf(struct fusb300_ep *ep,
343 struct fusb300_request *req)
344{
345 int i = 0;
346 u8 *tmp;
347 u32 data;
348 struct fusb300 *fusb300 = ep->fusb300;
349 u32 length = req->req.length - req->req.actual;
350
351 tmp = req->req.buf + req->req.actual;
352
353 if (length > SS_CTL_MAX_PACKET_SIZE) {
354 fusb300_set_cxlen(fusb300, SS_CTL_MAX_PACKET_SIZE);
355 for (i = (SS_CTL_MAX_PACKET_SIZE >> 2); i > 0; i--) {
356 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
357 *(tmp + 3) << 24;
358 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
359 tmp += 4;
360 }
361 req->req.actual += SS_CTL_MAX_PACKET_SIZE;
362 } else { /* length is less than max packet size */
363 fusb300_set_cxlen(fusb300, length);
364 for (i = length >> 2; i > 0; i--) {
365 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
366 *(tmp + 3) << 24;
367 printk(KERN_DEBUG " 0x%x\n", data);
368 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
369 tmp = tmp + 4;
370 }
371 switch (length % 4) {
372 case 1:
373 data = *tmp;
374 printk(KERN_DEBUG " 0x%x\n", data);
375 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
376 break;
377 case 2:
378 data = *tmp | *(tmp + 1) << 8;
379 printk(KERN_DEBUG " 0x%x\n", data);
380 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
381 break;
382 case 3:
383 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16;
384 printk(KERN_DEBUG " 0x%x\n", data);
385 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
386 break;
387 default:
388 break;
389 }
390 req->req.actual += length;
391 }
392}
393
394static void fusb300_set_epnstall(struct fusb300 *fusb300, u8 ep)
395{
396 fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
397 FUSB300_EPSET0_STL);
398}
399
400static void fusb300_clear_epnstall(struct fusb300 *fusb300, u8 ep)
401{
402 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
403
404 if (reg & FUSB300_EPSET0_STL) {
405 printk(KERN_DEBUG "EP%d stall... Clear!!\n", ep);
406 reg &= ~FUSB300_EPSET0_STL;
407 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
408 }
409}
410
411static void ep0_queue(struct fusb300_ep *ep, struct fusb300_request *req)
412{
413 if (ep->fusb300->ep0_dir) { /* if IN */
414 if (req->req.length) {
415 fusb300_wrcxf(ep, req);
416 } else
417 printk(KERN_DEBUG "%s : req->req.length = 0x%x\n",
418 __func__, req->req.length);
419 if ((req->req.length == req->req.actual) ||
420 (req->req.actual < ep->ep.maxpacket))
421 done(ep, req, 0);
422 } else { /* OUT */
423 if (!req->req.length)
424 done(ep, req, 0);
425 else
426 fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER1,
427 FUSB300_IGER1_CX_OUT_INT);
428 }
429}
430
431static int fusb300_queue(struct usb_ep *_ep, struct usb_request *_req,
432 gfp_t gfp_flags)
433{
434 struct fusb300_ep *ep;
435 struct fusb300_request *req;
436 unsigned long flags;
437 int request = 0;
438
439 ep = container_of(_ep, struct fusb300_ep, ep);
440 req = container_of(_req, struct fusb300_request, req);
441
442 if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
443 return -ESHUTDOWN;
444
445 spin_lock_irqsave(&ep->fusb300->lock, flags);
446
447 if (list_empty(&ep->queue))
448 request = 1;
449
450 list_add_tail(&req->queue, &ep->queue);
451
452 req->req.actual = 0;
453 req->req.status = -EINPROGRESS;
454
455 if (ep->desc == NULL) /* ep0 */
456 ep0_queue(ep, req);
457 else if (request && !ep->stall)
458 enable_fifo_int(ep);
459
460 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
461
462 return 0;
463}
464
465static int fusb300_dequeue(struct usb_ep *_ep, struct usb_request *_req)
466{
467 struct fusb300_ep *ep;
468 struct fusb300_request *req;
469 unsigned long flags;
470
471 ep = container_of(_ep, struct fusb300_ep, ep);
472 req = container_of(_req, struct fusb300_request, req);
473
474 spin_lock_irqsave(&ep->fusb300->lock, flags);
475 if (!list_empty(&ep->queue))
476 done(ep, req, -ECONNRESET);
477 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
478
479 return 0;
480}
481
482static int fusb300_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge)
483{
484 struct fusb300_ep *ep;
485 struct fusb300 *fusb300;
486 unsigned long flags;
487 int ret = 0;
488
489 ep = container_of(_ep, struct fusb300_ep, ep);
490
491 fusb300 = ep->fusb300;
492
493 spin_lock_irqsave(&ep->fusb300->lock, flags);
494
495 if (!list_empty(&ep->queue)) {
496 ret = -EAGAIN;
497 goto out;
498 }
499
500 if (value) {
501 fusb300_set_epnstall(fusb300, ep->epnum);
502 ep->stall = 1;
503 if (wedge)
504 ep->wedged = 1;
505 } else {
506 fusb300_clear_epnstall(fusb300, ep->epnum);
507 ep->stall = 0;
508 ep->wedged = 0;
509 }
510
511out:
512 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
513 return ret;
514}
515
516static int fusb300_set_halt(struct usb_ep *_ep, int value)
517{
518 return fusb300_set_halt_and_wedge(_ep, value, 0);
519}
520
521static int fusb300_set_wedge(struct usb_ep *_ep)
522{
523 return fusb300_set_halt_and_wedge(_ep, 1, 1);
524}
525
526static void fusb300_fifo_flush(struct usb_ep *_ep)
527{
528}
529
530static struct usb_ep_ops fusb300_ep_ops = {
531 .enable = fusb300_enable,
532 .disable = fusb300_disable,
533
534 .alloc_request = fusb300_alloc_request,
535 .free_request = fusb300_free_request,
536
537 .queue = fusb300_queue,
538 .dequeue = fusb300_dequeue,
539
540 .set_halt = fusb300_set_halt,
541 .fifo_flush = fusb300_fifo_flush,
542 .set_wedge = fusb300_set_wedge,
543};
544
545/*****************************************************************************/
546static void fusb300_clear_int(struct fusb300 *fusb300, u32 offset,
547 u32 value)
548{
549 iowrite32(value, fusb300->reg + offset);
550}
551
552static void fusb300_reset(void)
553{
554}
555
556static void fusb300_set_cxstall(struct fusb300 *fusb300)
557{
558 fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
559 FUSB300_CSR_STL);
560}
561
562static void fusb300_set_cxdone(struct fusb300 *fusb300)
563{
564 fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
565 FUSB300_CSR_DONE);
566}
567
568/* read data from cx fifo */
569void fusb300_rdcxf(struct fusb300 *fusb300,
570 u8 *buffer, u32 length)
571{
572 int i = 0;
573 u8 *tmp;
574 u32 data;
575
576 tmp = buffer;
577
578 for (i = (length >> 2); i > 0; i--) {
579 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
580 printk(KERN_DEBUG " 0x%x\n", data);
581 *tmp = data & 0xFF;
582 *(tmp + 1) = (data >> 8) & 0xFF;
583 *(tmp + 2) = (data >> 16) & 0xFF;
584 *(tmp + 3) = (data >> 24) & 0xFF;
585 tmp = tmp + 4;
586 }
587
588 switch (length % 4) {
589 case 1:
590 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
591 printk(KERN_DEBUG " 0x%x\n", data);
592 *tmp = data & 0xFF;
593 break;
594 case 2:
595 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
596 printk(KERN_DEBUG " 0x%x\n", data);
597 *tmp = data & 0xFF;
598 *(tmp + 1) = (data >> 8) & 0xFF;
599 break;
600 case 3:
601 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
602 printk(KERN_DEBUG " 0x%x\n", data);
603 *tmp = data & 0xFF;
604 *(tmp + 1) = (data >> 8) & 0xFF;
605 *(tmp + 2) = (data >> 16) & 0xFF;
606 break;
607 default:
608 break;
609 }
610}
611
612#if 0
613static void fusb300_dbg_fifo(struct fusb300_ep *ep,
614 u8 entry, u16 length)
615{
616 u32 reg;
617 u32 i = 0;
618 u32 j = 0;
619
620 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_GTM);
621 reg &= ~(FUSB300_GTM_TST_EP_ENTRY(0xF) |
622 FUSB300_GTM_TST_EP_NUM(0xF) | FUSB300_GTM_TST_FIFO_DEG);
623 reg |= (FUSB300_GTM_TST_EP_ENTRY(entry) |
624 FUSB300_GTM_TST_EP_NUM(ep->epnum) | FUSB300_GTM_TST_FIFO_DEG);
625 iowrite32(reg, ep->fusb300->reg + FUSB300_OFFSET_GTM);
626
627 for (i = 0; i < (length >> 2); i++) {
628 if (i * 4 == 1024)
629 break;
630 reg = ioread32(ep->fusb300->reg +
631 FUSB300_OFFSET_BUFDBG_START + i * 4);
632 printk(KERN_DEBUG" 0x%-8x", reg);
633 j++;
634 if ((j % 4) == 0)
635 printk(KERN_DEBUG "\n");
636 }
637
638 if (length % 4) {
639 reg = ioread32(ep->fusb300->reg +
640 FUSB300_OFFSET_BUFDBG_START + i * 4);
641 printk(KERN_DEBUG " 0x%x\n", reg);
642 }
643
644 if ((j % 4) != 0)
645 printk(KERN_DEBUG "\n");
646
647 fusb300_disable_bit(ep->fusb300, FUSB300_OFFSET_GTM,
648 FUSB300_GTM_TST_FIFO_DEG);
649}
650
651static void fusb300_cmp_dbg_fifo(struct fusb300_ep *ep,
652 u8 entry, u16 length, u8 *golden)
653{
654 u32 reg;
655 u32 i = 0;
656 u32 golden_value;
657 u8 *tmp;
658
659 tmp = golden;
660
661 printk(KERN_DEBUG "fusb300_cmp_dbg_fifo (entry %d) : start\n", entry);
662
663 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_GTM);
664 reg &= ~(FUSB300_GTM_TST_EP_ENTRY(0xF) |
665 FUSB300_GTM_TST_EP_NUM(0xF) | FUSB300_GTM_TST_FIFO_DEG);
666 reg |= (FUSB300_GTM_TST_EP_ENTRY(entry) |
667 FUSB300_GTM_TST_EP_NUM(ep->epnum) | FUSB300_GTM_TST_FIFO_DEG);
668 iowrite32(reg, ep->fusb300->reg + FUSB300_OFFSET_GTM);
669
670 for (i = 0; i < (length >> 2); i++) {
671 if (i * 4 == 1024)
672 break;
673 golden_value = *tmp | *(tmp + 1) << 8 |
674 *(tmp + 2) << 16 | *(tmp + 3) << 24;
675
676 reg = ioread32(ep->fusb300->reg +
677 FUSB300_OFFSET_BUFDBG_START + i*4);
678
679 if (reg != golden_value) {
680 printk(KERN_DEBUG "0x%x : ", (u32)(ep->fusb300->reg +
681 FUSB300_OFFSET_BUFDBG_START + i*4));
682 printk(KERN_DEBUG " golden = 0x%x, reg = 0x%x\n",
683 golden_value, reg);
684 }
685 tmp += 4;
686 }
687
688 switch (length % 4) {
689 case 1:
690 golden_value = *tmp;
691 case 2:
692 golden_value = *tmp | *(tmp + 1) << 8;
693 case 3:
694 golden_value = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16;
695 default:
696 break;
697
698 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_BUFDBG_START + i*4);
699 if (reg != golden_value) {
700 printk(KERN_DEBUG "0x%x:", (u32)(ep->fusb300->reg +
701 FUSB300_OFFSET_BUFDBG_START + i*4));
702 printk(KERN_DEBUG " golden = 0x%x, reg = 0x%x\n",
703 golden_value, reg);
704 }
705 }
706
707 printk(KERN_DEBUG "fusb300_cmp_dbg_fifo : end\n");
708 fusb300_disable_bit(ep->fusb300, FUSB300_OFFSET_GTM,
709 FUSB300_GTM_TST_FIFO_DEG);
710}
711#endif
712
713static void fusb300_rdfifo(struct fusb300_ep *ep,
714 struct fusb300_request *req,
715 u32 length)
716{
717 int i = 0;
718 u8 *tmp;
719 u32 data, reg;
720 struct fusb300 *fusb300 = ep->fusb300;
721
722 tmp = req->req.buf + req->req.actual;
723 req->req.actual += length;
724
725 if (req->req.actual > req->req.length)
726 printk(KERN_DEBUG "req->req.actual > req->req.length\n");
727
728 for (i = (length >> 2); i > 0; i--) {
729 data = ioread32(fusb300->reg +
730 FUSB300_OFFSET_EPPORT(ep->epnum));
731 *tmp = data & 0xFF;
732 *(tmp + 1) = (data >> 8) & 0xFF;
733 *(tmp + 2) = (data >> 16) & 0xFF;
734 *(tmp + 3) = (data >> 24) & 0xFF;
735 tmp = tmp + 4;
736 }
737
738 switch (length % 4) {
739 case 1:
740 data = ioread32(fusb300->reg +
741 FUSB300_OFFSET_EPPORT(ep->epnum));
742 *tmp = data & 0xFF;
743 break;
744 case 2:
745 data = ioread32(fusb300->reg +
746 FUSB300_OFFSET_EPPORT(ep->epnum));
747 *tmp = data & 0xFF;
748 *(tmp + 1) = (data >> 8) & 0xFF;
749 break;
750 case 3:
751 data = ioread32(fusb300->reg +
752 FUSB300_OFFSET_EPPORT(ep->epnum));
753 *tmp = data & 0xFF;
754 *(tmp + 1) = (data >> 8) & 0xFF;
755 *(tmp + 2) = (data >> 16) & 0xFF;
756 break;
757 default:
758 break;
759 }
760
761 do {
762 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
763 reg &= FUSB300_IGR1_SYNF0_EMPTY_INT;
764 if (i)
765 printk(KERN_INFO "sync fifo is not empty!\n");
766 i++;
767 } while (!reg);
768}
769
770/* write data to fifo */
771static void fusb300_wrfifo(struct fusb300_ep *ep,
772 struct fusb300_request *req)
773{
774 int i = 0;
775 u8 *tmp;
776 u32 data, reg;
777 struct fusb300 *fusb300 = ep->fusb300;
778
779 tmp = req->req.buf;
780 req->req.actual = req->req.length;
781
782 for (i = (req->req.length >> 2); i > 0; i--) {
783 data = *tmp | *(tmp + 1) << 8 |
784 *(tmp + 2) << 16 | *(tmp + 3) << 24;
785
786 iowrite32(data, fusb300->reg +
787 FUSB300_OFFSET_EPPORT(ep->epnum));
788 tmp += 4;
789 }
790
791 switch (req->req.length % 4) {
792 case 1:
793 data = *tmp;
794 iowrite32(data, fusb300->reg +
795 FUSB300_OFFSET_EPPORT(ep->epnum));
796 break;
797 case 2:
798 data = *tmp | *(tmp + 1) << 8;
799 iowrite32(data, fusb300->reg +
800 FUSB300_OFFSET_EPPORT(ep->epnum));
801 break;
802 case 3:
803 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16;
804 iowrite32(data, fusb300->reg +
805 FUSB300_OFFSET_EPPORT(ep->epnum));
806 break;
807 default:
808 break;
809 }
810
811 do {
812 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
813 reg &= FUSB300_IGR1_SYNF0_EMPTY_INT;
814 if (i)
815 printk(KERN_INFO"sync fifo is not empty!\n");
816 i++;
817 } while (!reg);
818}
819
820static u8 fusb300_get_epnstall(struct fusb300 *fusb300, u8 ep)
821{
822 u8 value;
823 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
824
825 value = reg & FUSB300_EPSET0_STL;
826
827 return value;
828}
829
830static u8 fusb300_get_cxstall(struct fusb300 *fusb300)
831{
832 u8 value;
833 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
834
835 value = (reg & FUSB300_CSR_STL) >> 1;
836
837 return value;
838}
839
840static void request_error(struct fusb300 *fusb300)
841{
842 fusb300_set_cxstall(fusb300);
843 printk(KERN_DEBUG "request error!!\n");
844}
845
846static void get_status(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
847__releases(fusb300->lock)
848__acquires(fusb300->lock)
849{
850 u8 ep;
851 u16 status = 0;
852 u16 w_index = ctrl->wIndex;
853
854 switch (ctrl->bRequestType & USB_RECIP_MASK) {
855 case USB_RECIP_DEVICE:
856 status = 1 << USB_DEVICE_SELF_POWERED;
857 break;
858 case USB_RECIP_INTERFACE:
859 status = 0;
860 break;
861 case USB_RECIP_ENDPOINT:
862 ep = w_index & USB_ENDPOINT_NUMBER_MASK;
863 if (ep) {
864 if (fusb300_get_epnstall(fusb300, ep))
865 status = 1 << USB_ENDPOINT_HALT;
866 } else {
867 if (fusb300_get_cxstall(fusb300))
868 status = 0;
869 }
870 break;
871
872 default:
873 request_error(fusb300);
874 return; /* exit */
875 }
876
877 fusb300->ep0_data = cpu_to_le16(status);
878 fusb300->ep0_req->buf = &fusb300->ep0_data;
879 fusb300->ep0_req->length = 2;
880
881 spin_unlock(&fusb300->lock);
882 fusb300_queue(fusb300->gadget.ep0, fusb300->ep0_req, GFP_KERNEL);
883 spin_lock(&fusb300->lock);
884}
885
886static void set_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
887{
888 u8 ep;
889
890 switch (ctrl->bRequestType & USB_RECIP_MASK) {
891 case USB_RECIP_DEVICE:
892 fusb300_set_cxdone(fusb300);
893 break;
894 case USB_RECIP_INTERFACE:
895 fusb300_set_cxdone(fusb300);
896 break;
897 case USB_RECIP_ENDPOINT: {
898 u16 w_index = le16_to_cpu(ctrl->wIndex);
899
900 ep = w_index & USB_ENDPOINT_NUMBER_MASK;
901 if (ep)
902 fusb300_set_epnstall(fusb300, ep);
903 else
904 fusb300_set_cxstall(fusb300);
905 fusb300_set_cxdone(fusb300);
906 }
907 break;
908 default:
909 request_error(fusb300);
910 break;
911 }
912}
913
914static void fusb300_clear_seqnum(struct fusb300 *fusb300, u8 ep)
915{
916 fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
917 FUSB300_EPSET0_CLRSEQNUM);
918}
919
920static void clear_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
921{
922 struct fusb300_ep *ep =
923 fusb300->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK];
924
925 switch (ctrl->bRequestType & USB_RECIP_MASK) {
926 case USB_RECIP_DEVICE:
927 fusb300_set_cxdone(fusb300);
928 break;
929 case USB_RECIP_INTERFACE:
930 fusb300_set_cxdone(fusb300);
931 break;
932 case USB_RECIP_ENDPOINT:
933 if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) {
934 if (ep->wedged) {
935 fusb300_set_cxdone(fusb300);
936 break;
937 }
938 if (ep->stall) {
939 ep->stall = 0;
940 fusb300_clear_seqnum(fusb300, ep->epnum);
941 fusb300_clear_epnstall(fusb300, ep->epnum);
942 if (!list_empty(&ep->queue))
943 enable_fifo_int(ep);
944 }
945 }
946 fusb300_set_cxdone(fusb300);
947 break;
948 default:
949 request_error(fusb300);
950 break;
951 }
952}
953
954static void fusb300_set_dev_addr(struct fusb300 *fusb300, u16 addr)
955{
956 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_DAR);
957
958 reg &= ~FUSB300_DAR_DRVADDR_MSK;
959 reg |= FUSB300_DAR_DRVADDR(addr);
960
961 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_DAR);
962}
963
964static void set_address(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
965{
966 if (ctrl->wValue >= 0x0100)
967 request_error(fusb300);
968 else {
969 fusb300_set_dev_addr(fusb300, ctrl->wValue);
970 fusb300_set_cxdone(fusb300);
971 }
972}
973
974#define UVC_COPY_DESCRIPTORS(mem, src) \
975 do { \
976 const struct usb_descriptor_header * const *__src; \
977 for (__src = src; *__src; ++__src) { \
978 memcpy(mem, *__src, (*__src)->bLength); \
979 mem += (*__src)->bLength; \
980 } \
981 } while (0)
982
983static void fusb300_ep0_complete(struct usb_ep *ep,
984 struct usb_request *req)
985{
986}
987
988static int setup_packet(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
989{
990 u8 *p = (u8 *)ctrl;
991 u8 ret = 0;
992 u8 i = 0;
993
994 fusb300_rdcxf(fusb300, p, 8);
995 fusb300->ep0_dir = ctrl->bRequestType & USB_DIR_IN;
996 fusb300->ep0_length = ctrl->wLength;
997
998 /* check request */
999 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1000 switch (ctrl->bRequest) {
1001 case USB_REQ_GET_STATUS:
1002 get_status(fusb300, ctrl);
1003 break;
1004 case USB_REQ_CLEAR_FEATURE:
1005 clear_feature(fusb300, ctrl);
1006 break;
1007 case USB_REQ_SET_FEATURE:
1008 set_feature(fusb300, ctrl);
1009 break;
1010 case USB_REQ_SET_ADDRESS:
1011 set_address(fusb300, ctrl);
1012 break;
1013 case USB_REQ_SET_CONFIGURATION:
1014 fusb300_enable_bit(fusb300, FUSB300_OFFSET_DAR,
1015 FUSB300_DAR_SETCONFG);
1016 /* clear sequence number */
1017 for (i = 1; i <= FUSB300_MAX_NUM_EP; i++)
1018 fusb300_clear_seqnum(fusb300, i);
1019 fusb300->reenum = 1;
1020 ret = 1;
1021 break;
1022 default:
1023 ret = 1;
1024 break;
1025 }
1026 } else
1027 ret = 1;
1028
1029 return ret;
1030}
1031
1032static void fusb300_set_ep_bycnt(struct fusb300_ep *ep, u32 bycnt)
1033{
1034 struct fusb300 *fusb300 = ep->fusb300;
1035 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPFFR(ep->epnum));
1036
1037 reg &= ~FUSB300_FFR_BYCNT;
1038 reg |= bycnt & FUSB300_FFR_BYCNT;
1039
1040 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPFFR(ep->epnum));
1041}
1042
1043static void done(struct fusb300_ep *ep, struct fusb300_request *req,
1044 int status)
1045{
1046 list_del_init(&req->queue);
1047
1048 /* don't modify queue heads during completion callback */
1049 if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
1050 req->req.status = -ESHUTDOWN;
1051 else
1052 req->req.status = status;
1053
1054 spin_unlock(&ep->fusb300->lock);
1055 req->req.complete(&ep->ep, &req->req);
1056 spin_lock(&ep->fusb300->lock);
1057
1058 if (ep->epnum) {
1059 disable_fifo_int(ep);
1060 if (!list_empty(&ep->queue))
1061 enable_fifo_int(ep);
1062 } else
1063 fusb300_set_cxdone(ep->fusb300);
1064}
1065
1066void fusb300_fill_idma_prdtbl(struct fusb300_ep *ep,
1067 struct fusb300_request *req)
1068{
1069 u32 value;
1070 u32 reg;
1071
1072 /* wait SW owner */
1073 do {
1074 reg = ioread32(ep->fusb300->reg +
1075 FUSB300_OFFSET_EPPRD_W0(ep->epnum));
1076 reg &= FUSB300_EPPRD0_H;
1077 } while (reg);
1078
1079 iowrite32((u32) req->req.buf, ep->fusb300->reg +
1080 FUSB300_OFFSET_EPPRD_W1(ep->epnum));
1081
1082 value = FUSB300_EPPRD0_BTC(req->req.length) | FUSB300_EPPRD0_H |
1083 FUSB300_EPPRD0_F | FUSB300_EPPRD0_L | FUSB300_EPPRD0_I;
1084 iowrite32(value, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W0(ep->epnum));
1085
1086 iowrite32(0x0, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W2(ep->epnum));
1087
1088 fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_EPPRDRDY,
1089 FUSB300_EPPRDR_EP_PRD_RDY(ep->epnum));
1090}
1091
1092static void fusb300_wait_idma_finished(struct fusb300_ep *ep)
1093{
1094 u32 reg;
1095
1096 do {
1097 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR1);
1098 if ((reg & FUSB300_IGR1_VBUS_CHG_INT) ||
1099 (reg & FUSB300_IGR1_WARM_RST_INT) ||
1100 (reg & FUSB300_IGR1_HOT_RST_INT) ||
1101 (reg & FUSB300_IGR1_USBRST_INT)
1102 )
1103 goto IDMA_RESET;
1104 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR0);
1105 reg &= FUSB300_IGR0_EPn_PRD_INT(ep->epnum);
1106 } while (!reg);
1107
1108 fusb300_clear_int(ep->fusb300, FUSB300_OFFSET_IGR0,
1109 FUSB300_IGR0_EPn_PRD_INT(ep->epnum));
1110IDMA_RESET:
1111 fusb300_clear_int(ep->fusb300, FUSB300_OFFSET_IGER0,
1112 FUSB300_IGER0_EEPn_PRD_INT(ep->epnum));
1113}
1114
1115static void fusb300_set_idma(struct fusb300_ep *ep,
1116 struct fusb300_request *req)
1117{
1118 dma_addr_t d;
1119 u8 *tmp = NULL;
1120
1121 d = dma_map_single(NULL, req->req.buf, req->req.length, DMA_TO_DEVICE);
1122
1123 if (dma_mapping_error(NULL, d)) {
1124 kfree(req->req.buf);
1125 printk(KERN_DEBUG "dma_mapping_error\n");
1126 }
1127
1128 dma_sync_single_for_device(NULL, d, req->req.length, DMA_TO_DEVICE);
1129
1130 fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER0,
1131 FUSB300_IGER0_EEPn_PRD_INT(ep->epnum));
1132
1133 tmp = req->req.buf;
1134 req->req.buf = (u8 *)d;
1135
1136 fusb300_fill_idma_prdtbl(ep, req);
1137 /* check idma is done */
1138 fusb300_wait_idma_finished(ep);
1139
1140 req->req.buf = tmp;
1141
1142 if (d)
1143 dma_unmap_single(NULL, d, req->req.length, DMA_TO_DEVICE);
1144}
1145
1146static void in_ep_fifo_handler(struct fusb300_ep *ep)
1147{
1148 struct fusb300_request *req = list_entry(ep->queue.next,
1149 struct fusb300_request, queue);
1150
1151 if (req->req.length) {
1152#if 0
1153 fusb300_set_ep_bycnt(ep, req->req.length);
1154 fusb300_wrfifo(ep, req);
1155#else
1156 fusb300_set_idma(ep, req);
1157#endif
1158 }
1159 done(ep, req, 0);
1160}
1161
1162static void out_ep_fifo_handler(struct fusb300_ep *ep)
1163{
1164 struct fusb300 *fusb300 = ep->fusb300;
1165 struct fusb300_request *req = list_entry(ep->queue.next,
1166 struct fusb300_request, queue);
1167 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPFFR(ep->epnum));
1168 u32 length = reg & FUSB300_FFR_BYCNT;
1169
1170 fusb300_rdfifo(ep, req, length);
1171
1172 /* finish out transfer */
1173 if ((req->req.length == req->req.actual) || (length < ep->ep.maxpacket))
1174 done(ep, req, 0);
1175}
1176
1177static void check_device_mode(struct fusb300 *fusb300)
1178{
1179 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_GCR);
1180
1181 switch (reg & FUSB300_GCR_DEVEN_MSK) {
1182 case FUSB300_GCR_DEVEN_SS:
1183 fusb300->gadget.speed = USB_SPEED_SUPER;
1184 break;
1185 case FUSB300_GCR_DEVEN_HS:
1186 fusb300->gadget.speed = USB_SPEED_HIGH;
1187 break;
1188 case FUSB300_GCR_DEVEN_FS:
1189 fusb300->gadget.speed = USB_SPEED_FULL;
1190 break;
1191 default:
1192 fusb300->gadget.speed = USB_SPEED_UNKNOWN;
1193 break;
1194 }
1195 printk(KERN_INFO "dev_mode = %d\n", (reg & FUSB300_GCR_DEVEN_MSK));
1196}
1197
1198
1199static void fusb300_ep0out(struct fusb300 *fusb300)
1200{
1201 struct fusb300_ep *ep = fusb300->ep[0];
1202 u32 reg;
1203
1204 if (!list_empty(&ep->queue)) {
1205 struct fusb300_request *req;
1206
1207 req = list_first_entry(&ep->queue,
1208 struct fusb300_request, queue);
1209 if (req->req.length)
1210 fusb300_rdcxf(ep->fusb300, req->req.buf,
1211 req->req.length);
1212 done(ep, req, 0);
1213 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
1214 reg &= ~FUSB300_IGER1_CX_OUT_INT;
1215 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_IGER1);
1216 } else
1217 pr_err("%s : empty queue\n", __func__);
1218}
1219
1220static void fusb300_ep0in(struct fusb300 *fusb300)
1221{
1222 struct fusb300_request *req;
1223 struct fusb300_ep *ep = fusb300->ep[0];
1224
1225 if ((!list_empty(&ep->queue)) && (fusb300->ep0_dir)) {
1226 req = list_entry(ep->queue.next,
1227 struct fusb300_request, queue);
1228 if (req->req.length)
1229 fusb300_wrcxf(ep, req);
1230 if ((req->req.length - req->req.actual) < ep->ep.maxpacket)
1231 done(ep, req, 0);
1232 } else
1233 fusb300_set_cxdone(fusb300);
1234}
1235
1236static void fusb300_grp2_handler(void)
1237{
1238}
1239
1240static void fusb300_grp3_handler(void)
1241{
1242}
1243
1244static void fusb300_grp4_handler(void)
1245{
1246}
1247
1248static void fusb300_grp5_handler(void)
1249{
1250}
1251
1252static irqreturn_t fusb300_irq(int irq, void *_fusb300)
1253{
1254 struct fusb300 *fusb300 = _fusb300;
1255 u32 int_grp1 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
1256 u32 int_grp1_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
1257 u32 int_grp0 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR0);
1258 u32 int_grp0_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER0);
1259 struct usb_ctrlrequest ctrl;
1260 u8 in;
1261 u32 reg;
1262 int i;
1263
1264 spin_lock(&fusb300->lock);
1265
1266 int_grp1 &= int_grp1_en;
1267 int_grp0 &= int_grp0_en;
1268
1269 if (int_grp1 & FUSB300_IGR1_WARM_RST_INT) {
1270 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1271 FUSB300_IGR1_WARM_RST_INT);
1272 printk(KERN_INFO"fusb300_warmreset\n");
1273 fusb300_reset();
1274 }
1275
1276 if (int_grp1 & FUSB300_IGR1_HOT_RST_INT) {
1277 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1278 FUSB300_IGR1_HOT_RST_INT);
1279 printk(KERN_INFO"fusb300_hotreset\n");
1280 fusb300_reset();
1281 }
1282
1283 if (int_grp1 & FUSB300_IGR1_USBRST_INT) {
1284 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1285 FUSB300_IGR1_USBRST_INT);
1286 fusb300_reset();
1287 }
1288 /* COMABT_INT has a highest priority */
1289
1290 if (int_grp1 & FUSB300_IGR1_CX_COMABT_INT) {
1291 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1292 FUSB300_IGR1_CX_COMABT_INT);
1293 printk(KERN_INFO"fusb300_ep0abt\n");
1294 }
1295
1296 if (int_grp1 & FUSB300_IGR1_VBUS_CHG_INT) {
1297 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1298 FUSB300_IGR1_VBUS_CHG_INT);
1299 printk(KERN_INFO"fusb300_vbus_change\n");
1300 }
1301
1302 if (int_grp1 & FUSB300_IGR1_U3_EXIT_FAIL_INT) {
1303 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1304 FUSB300_IGR1_U3_EXIT_FAIL_INT);
1305 }
1306
1307 if (int_grp1 & FUSB300_IGR1_U2_EXIT_FAIL_INT) {
1308 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1309 FUSB300_IGR1_U2_EXIT_FAIL_INT);
1310 }
1311
1312 if (int_grp1 & FUSB300_IGR1_U1_EXIT_FAIL_INT) {
1313 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1314 FUSB300_IGR1_U1_EXIT_FAIL_INT);
1315 }
1316
1317 if (int_grp1 & FUSB300_IGR1_U2_ENTRY_FAIL_INT) {
1318 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1319 FUSB300_IGR1_U2_ENTRY_FAIL_INT);
1320 }
1321
1322 if (int_grp1 & FUSB300_IGR1_U1_ENTRY_FAIL_INT) {
1323 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1324 FUSB300_IGR1_U1_ENTRY_FAIL_INT);
1325 }
1326
1327 if (int_grp1 & FUSB300_IGR1_U3_EXIT_INT) {
1328 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1329 FUSB300_IGR1_U3_EXIT_INT);
1330 printk(KERN_INFO "FUSB300_IGR1_U3_EXIT_INT\n");
1331 }
1332
1333 if (int_grp1 & FUSB300_IGR1_U2_EXIT_INT) {
1334 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1335 FUSB300_IGR1_U2_EXIT_INT);
1336 printk(KERN_INFO "FUSB300_IGR1_U2_EXIT_INT\n");
1337 }
1338
1339 if (int_grp1 & FUSB300_IGR1_U1_EXIT_INT) {
1340 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1341 FUSB300_IGR1_U1_EXIT_INT);
1342 printk(KERN_INFO "FUSB300_IGR1_U1_EXIT_INT\n");
1343 }
1344
1345 if (int_grp1 & FUSB300_IGR1_U3_ENTRY_INT) {
1346 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1347 FUSB300_IGR1_U3_ENTRY_INT);
1348 printk(KERN_INFO "FUSB300_IGR1_U3_ENTRY_INT\n");
1349 fusb300_enable_bit(fusb300, FUSB300_OFFSET_SSCR1,
1350 FUSB300_SSCR1_GO_U3_DONE);
1351 }
1352
1353 if (int_grp1 & FUSB300_IGR1_U2_ENTRY_INT) {
1354 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1355 FUSB300_IGR1_U2_ENTRY_INT);
1356 printk(KERN_INFO "FUSB300_IGR1_U2_ENTRY_INT\n");
1357 }
1358
1359 if (int_grp1 & FUSB300_IGR1_U1_ENTRY_INT) {
1360 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1361 FUSB300_IGR1_U1_ENTRY_INT);
1362 printk(KERN_INFO "FUSB300_IGR1_U1_ENTRY_INT\n");
1363 }
1364
1365 if (int_grp1 & FUSB300_IGR1_RESM_INT) {
1366 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1367 FUSB300_IGR1_RESM_INT);
1368 printk(KERN_INFO "fusb300_resume\n");
1369 }
1370
1371 if (int_grp1 & FUSB300_IGR1_SUSP_INT) {
1372 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1373 FUSB300_IGR1_SUSP_INT);
1374 printk(KERN_INFO "fusb300_suspend\n");
1375 }
1376
1377 if (int_grp1 & FUSB300_IGR1_HS_LPM_INT) {
1378 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1379 FUSB300_IGR1_HS_LPM_INT);
1380 printk(KERN_INFO "fusb300_HS_LPM_INT\n");
1381 }
1382
1383 if (int_grp1 & FUSB300_IGR1_DEV_MODE_CHG_INT) {
1384 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1385 FUSB300_IGR1_DEV_MODE_CHG_INT);
1386 check_device_mode(fusb300);
1387 }
1388
1389 if (int_grp1 & FUSB300_IGR1_CX_COMFAIL_INT) {
1390 fusb300_set_cxstall(fusb300);
1391 printk(KERN_INFO "fusb300_ep0fail\n");
1392 }
1393
1394 if (int_grp1 & FUSB300_IGR1_CX_SETUP_INT) {
1395 printk(KERN_INFO "fusb300_ep0setup\n");
1396 if (setup_packet(fusb300, &ctrl)) {
1397 spin_unlock(&fusb300->lock);
1398 if (fusb300->driver->setup(&fusb300->gadget, &ctrl) < 0)
1399 fusb300_set_cxstall(fusb300);
1400 spin_lock(&fusb300->lock);
1401 }
1402 }
1403
1404 if (int_grp1 & FUSB300_IGR1_CX_CMDEND_INT)
1405 printk(KERN_INFO "fusb300_cmdend\n");
1406
1407
1408 if (int_grp1 & FUSB300_IGR1_CX_OUT_INT) {
1409 printk(KERN_INFO "fusb300_cxout\n");
1410 fusb300_ep0out(fusb300);
1411 }
1412
1413 if (int_grp1 & FUSB300_IGR1_CX_IN_INT) {
1414 printk(KERN_INFO "fusb300_cxin\n");
1415 fusb300_ep0in(fusb300);
1416 }
1417
1418 if (int_grp1 & FUSB300_IGR1_INTGRP5)
1419 fusb300_grp5_handler();
1420
1421 if (int_grp1 & FUSB300_IGR1_INTGRP4)
1422 fusb300_grp4_handler();
1423
1424 if (int_grp1 & FUSB300_IGR1_INTGRP3)
1425 fusb300_grp3_handler();
1426
1427 if (int_grp1 & FUSB300_IGR1_INTGRP2)
1428 fusb300_grp2_handler();
1429
1430 if (int_grp0) {
1431 for (i = 1; i < FUSB300_MAX_NUM_EP; i++) {
1432 if (int_grp0 & FUSB300_IGR0_EPn_FIFO_INT(i)) {
1433 reg = ioread32(fusb300->reg +
1434 FUSB300_OFFSET_EPSET1(i));
1435 in = (reg & FUSB300_EPSET1_DIRIN) ? 1 : 0;
1436 if (in)
1437 in_ep_fifo_handler(fusb300->ep[i]);
1438 else
1439 out_ep_fifo_handler(fusb300->ep[i]);
1440 }
1441 }
1442 }
1443
1444 spin_unlock(&fusb300->lock);
1445
1446 return IRQ_HANDLED;
1447}
1448
1449static void fusb300_set_u2_timeout(struct fusb300 *fusb300,
1450 u32 time)
1451{
1452 u32 reg;
1453
1454 reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
1455 reg &= ~0xff;
1456 reg |= FUSB300_SSCR2_U2TIMEOUT(time);
1457
1458 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
1459}
1460
1461static void fusb300_set_u1_timeout(struct fusb300 *fusb300,
1462 u32 time)
1463{
1464 u32 reg;
1465
1466 reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
1467 reg &= ~(0xff << 8);
1468 reg |= FUSB300_SSCR2_U1TIMEOUT(time);
1469
1470 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
1471}
1472
1473static void init_controller(struct fusb300 *fusb300)
1474{
1475 u32 reg;
1476 u32 mask = 0;
1477 u32 val = 0;
1478
1479 /* split on */
1480 mask = val = FUSB300_AHBBCR_S0_SPLIT_ON | FUSB300_AHBBCR_S1_SPLIT_ON;
1481 reg = ioread32(fusb300->reg + FUSB300_OFFSET_AHBCR);
1482 reg &= ~mask;
1483 reg |= val;
1484 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_AHBCR);
1485
1486 /* enable high-speed LPM */
1487 mask = val = FUSB300_HSCR_HS_LPM_PERMIT;
1488 reg = ioread32(fusb300->reg + FUSB300_OFFSET_HSCR);
1489 reg &= ~mask;
1490 reg |= val;
1491 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_HSCR);
1492
1493 /*set u1 u2 timmer*/
1494 fusb300_set_u2_timeout(fusb300, 0xff);
1495 fusb300_set_u1_timeout(fusb300, 0xff);
1496
1497 /* enable all grp1 interrupt */
1498 iowrite32(0xcfffff9f, fusb300->reg + FUSB300_OFFSET_IGER1);
1499}
1500/*------------------------------------------------------------------------*/
1501static struct fusb300 *the_controller;
1502
1503int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
1504 int (*bind)(struct usb_gadget *))
1505{
1506 struct fusb300 *fusb300 = the_controller;
1507 int retval;
1508
1509 if (!driver
1510 || driver->speed < USB_SPEED_FULL
1511 || !bind
1512 || !driver->setup)
1513 return -EINVAL;
1514
1515 if (!fusb300)
1516 return -ENODEV;
1517
1518 if (fusb300->driver)
1519 return -EBUSY;
1520
1521 /* hook up the driver */
1522 driver->driver.bus = NULL;
1523 fusb300->driver = driver;
1524 fusb300->gadget.dev.driver = &driver->driver;
1525
1526 retval = device_add(&fusb300->gadget.dev);
1527 if (retval) {
1528 pr_err("device_add error (%d)\n", retval);
1529 goto error;
1530 }
1531
1532 retval = bind(&fusb300->gadget);
1533 if (retval) {
1534 pr_err("bind to driver error (%d)\n", retval);
1535 device_del(&fusb300->gadget.dev);
1536 goto error;
1537 }
1538
1539 return 0;
1540
1541error:
1542 fusb300->driver = NULL;
1543 fusb300->gadget.dev.driver = NULL;
1544
1545 return retval;
1546}
1547EXPORT_SYMBOL(usb_gadget_probe_driver);
1548
1549int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1550{
1551 struct fusb300 *fusb300 = the_controller;
1552
1553 if (driver != fusb300->driver || !driver->unbind)
1554 return -EINVAL;
1555
1556 driver->unbind(&fusb300->gadget);
1557 fusb300->gadget.dev.driver = NULL;
1558
1559 init_controller(fusb300);
1560 device_del(&fusb300->gadget.dev);
1561 fusb300->driver = NULL;
1562
1563 return 0;
1564}
1565EXPORT_SYMBOL(usb_gadget_unregister_driver);
1566/*--------------------------------------------------------------------------*/
1567
1568static int fusb300_udc_pullup(struct usb_gadget *_gadget, int is_active)
1569{
1570 return 0;
1571}
1572
1573static struct usb_gadget_ops fusb300_gadget_ops = {
1574 .pullup = fusb300_udc_pullup,
1575};
1576
1577static int __exit fusb300_remove(struct platform_device *pdev)
1578{
1579 struct fusb300 *fusb300 = dev_get_drvdata(&pdev->dev);
1580
1581 iounmap(fusb300->reg);
1582 free_irq(platform_get_irq(pdev, 0), fusb300);
1583
1584 fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
1585 kfree(fusb300);
1586
1587 return 0;
1588}
1589
1590static int __init fusb300_probe(struct platform_device *pdev)
1591{
1592 struct resource *res, *ires, *ires1;
1593 void __iomem *reg = NULL;
1594 struct fusb300 *fusb300 = NULL;
1595 struct fusb300_ep *_ep[FUSB300_MAX_NUM_EP];
1596 int ret = 0;
1597 int i;
1598
1599 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1600 if (!res) {
1601 ret = -ENODEV;
1602 pr_err("platform_get_resource error.\n");
1603 goto clean_up;
1604 }
1605
1606 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1607 if (!ires) {
1608 ret = -ENODEV;
1609 dev_err(&pdev->dev,
1610 "platform_get_resource IORESOURCE_IRQ error.\n");
1611 goto clean_up;
1612 }
1613
1614 ires1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
1615 if (!ires1) {
1616 ret = -ENODEV;
1617 dev_err(&pdev->dev,
1618 "platform_get_resource IORESOURCE_IRQ 1 error.\n");
1619 goto clean_up;
1620 }
1621
1622 reg = ioremap(res->start, resource_size(res));
1623 if (reg == NULL) {
1624 ret = -ENOMEM;
1625 pr_err("ioremap error.\n");
1626 goto clean_up;
1627 }
1628
1629 /* initialize udc */
1630 fusb300 = kzalloc(sizeof(struct fusb300), GFP_KERNEL);
1631 if (fusb300 == NULL) {
1632 pr_err("kzalloc error\n");
1633 goto clean_up;
1634 }
1635
1636 for (i = 0; i < FUSB300_MAX_NUM_EP; i++) {
1637 _ep[i] = kzalloc(sizeof(struct fusb300_ep), GFP_KERNEL);
1638 if (_ep[i] == NULL) {
1639 pr_err("_ep kzalloc error\n");
1640 goto clean_up;
1641 }
1642 fusb300->ep[i] = _ep[i];
1643 }
1644
1645 spin_lock_init(&fusb300->lock);
1646
1647 dev_set_drvdata(&pdev->dev, fusb300);
1648
1649 fusb300->gadget.ops = &fusb300_gadget_ops;
1650
1651 device_initialize(&fusb300->gadget.dev);
1652
1653 dev_set_name(&fusb300->gadget.dev, "gadget");
1654
1655 fusb300->gadget.is_dualspeed = 1;
1656 fusb300->gadget.dev.parent = &pdev->dev;
1657 fusb300->gadget.dev.dma_mask = pdev->dev.dma_mask;
1658 fusb300->gadget.dev.release = pdev->dev.release;
1659 fusb300->gadget.name = udc_name;
1660 fusb300->reg = reg;
1661
1662 ret = request_irq(ires->start, fusb300_irq, IRQF_DISABLED | IRQF_SHARED,
1663 udc_name, fusb300);
1664 if (ret < 0) {
1665 pr_err("request_irq error (%d)\n", ret);
1666 goto clean_up;
1667 }
1668
1669 ret = request_irq(ires1->start, fusb300_irq,
1670 IRQF_DISABLED | IRQF_SHARED, udc_name, fusb300);
1671 if (ret < 0) {
1672 pr_err("request_irq1 error (%d)\n", ret);
1673 goto clean_up;
1674 }
1675
1676 INIT_LIST_HEAD(&fusb300->gadget.ep_list);
1677
1678 for (i = 0; i < FUSB300_MAX_NUM_EP ; i++) {
1679 struct fusb300_ep *ep = fusb300->ep[i];
1680
1681 if (i != 0) {
1682 INIT_LIST_HEAD(&fusb300->ep[i]->ep.ep_list);
1683 list_add_tail(&fusb300->ep[i]->ep.ep_list,
1684 &fusb300->gadget.ep_list);
1685 }
1686 ep->fusb300 = fusb300;
1687 INIT_LIST_HEAD(&ep->queue);
1688 ep->ep.name = fusb300_ep_name[i];
1689 ep->ep.ops = &fusb300_ep_ops;
1690 ep->ep.maxpacket = HS_BULK_MAX_PACKET_SIZE;
1691 }
1692 fusb300->ep[0]->ep.maxpacket = HS_CTL_MAX_PACKET_SIZE;
1693 fusb300->ep[0]->epnum = 0;
1694 fusb300->gadget.ep0 = &fusb300->ep[0]->ep;
1695 INIT_LIST_HEAD(&fusb300->gadget.ep0->ep_list);
1696
1697 the_controller = fusb300;
1698
1699 fusb300->ep0_req = fusb300_alloc_request(&fusb300->ep[0]->ep,
1700 GFP_KERNEL);
1701 if (fusb300->ep0_req == NULL)
1702 goto clean_up3;
1703
1704 init_controller(fusb300);
1705 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1706
1707 return 0;
1708
1709clean_up3:
1710 free_irq(ires->start, fusb300);
1711
1712clean_up:
1713 if (fusb300) {
1714 if (fusb300->ep0_req)
1715 fusb300_free_request(&fusb300->ep[0]->ep,
1716 fusb300->ep0_req);
1717 kfree(fusb300);
1718 }
1719 if (reg)
1720 iounmap(reg);
1721
1722 return ret;
1723}
1724
1725static struct platform_driver fusb300_driver = {
1726 .remove = __exit_p(fusb300_remove),
1727 .driver = {
1728 .name = (char *) udc_name,
1729 .owner = THIS_MODULE,
1730 },
1731};
1732
1733static int __init fusb300_udc_init(void)
1734{
1735 return platform_driver_probe(&fusb300_driver, fusb300_probe);
1736}
1737
1738module_init(fusb300_udc_init);
1739
1740static void __exit fusb300_udc_cleanup(void)
1741{
1742 platform_driver_unregister(&fusb300_driver);
1743}
1744module_exit(fusb300_udc_cleanup);
diff --git a/drivers/usb/gadget/fusb300_udc.h b/drivers/usb/gadget/fusb300_udc.h
new file mode 100644
index 000000000000..f51aa2ef1f90
--- /dev/null
+++ b/drivers/usb/gadget/fusb300_udc.h
@@ -0,0 +1,687 @@
1/*
2 * Fusb300 UDC (USB gadget)
3 *
4 * Copyright (C) 2010 Faraday Technology Corp.
5 *
6 * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 *
21 */
22
23
24#ifndef __FUSB300_UDC_H__
25#define __FUSB300_UDC_H_
26
27#include <linux/kernel.h>
28
29#define FUSB300_OFFSET_GCR 0x00
30#define FUSB300_OFFSET_GTM 0x04
31#define FUSB300_OFFSET_DAR 0x08
32#define FUSB300_OFFSET_CSR 0x0C
33#define FUSB300_OFFSET_CXPORT 0x10
34#define FUSB300_OFFSET_EPSET0(n) (0x20 + (n - 1) * 0x30)
35#define FUSB300_OFFSET_EPSET1(n) (0x24 + (n - 1) * 0x30)
36#define FUSB300_OFFSET_EPSET2(n) (0x28 + (n - 1) * 0x30)
37#define FUSB300_OFFSET_EPFFR(n) (0x2c + (n - 1) * 0x30)
38#define FUSB300_OFFSET_EPSTRID(n) (0x40 + (n - 1) * 0x30)
39#define FUSB300_OFFSET_HSPTM 0x300
40#define FUSB300_OFFSET_HSCR 0x304
41#define FUSB300_OFFSET_SSCR0 0x308
42#define FUSB300_OFFSET_SSCR1 0x30C
43#define FUSB300_OFFSET_TT 0x310
44#define FUSB300_OFFSET_DEVNOTF 0x314
45#define FUSB300_OFFSET_DNC1 0x318
46#define FUSB300_OFFSET_CS 0x31C
47#define FUSB300_OFFSET_SOF 0x324
48#define FUSB300_OFFSET_EFCS 0x328
49#define FUSB300_OFFSET_IGR0 0x400
50#define FUSB300_OFFSET_IGR1 0x404
51#define FUSB300_OFFSET_IGR2 0x408
52#define FUSB300_OFFSET_IGR3 0x40C
53#define FUSB300_OFFSET_IGR4 0x410
54#define FUSB300_OFFSET_IGR5 0x414
55#define FUSB300_OFFSET_IGER0 0x420
56#define FUSB300_OFFSET_IGER1 0x424
57#define FUSB300_OFFSET_IGER2 0x428
58#define FUSB300_OFFSET_IGER3 0x42C
59#define FUSB300_OFFSET_IGER4 0x430
60#define FUSB300_OFFSET_IGER5 0x434
61#define FUSB300_OFFSET_DMAHMER 0x500
62#define FUSB300_OFFSET_EPPRDRDY 0x504
63#define FUSB300_OFFSET_DMAEPMR 0x508
64#define FUSB300_OFFSET_DMAENR 0x50C
65#define FUSB300_OFFSET_DMAAPR 0x510
66#define FUSB300_OFFSET_AHBCR 0x514
67#define FUSB300_OFFSET_EPPRD_W0(n) (0x520 + (n - 1) * 0x10)
68#define FUSB300_OFFSET_EPPRD_W1(n) (0x524 + (n - 1) * 0x10)
69#define FUSB300_OFFSET_EPPRD_W2(n) (0x528 + (n - 1) * 0x10)
70#define FUSB300_OFFSET_EPRD_PTR(n) (0x52C + (n - 1) * 0x10)
71#define FUSB300_OFFSET_BUFDBG_START 0x800
72#define FUSB300_OFFSET_BUFDBG_END 0xBFC
73#define FUSB300_OFFSET_EPPORT(n) (0x1010 + (n - 1) * 0x10)
74
75/*
76 * * Global Control Register (offset = 000H)
77 * */
78#define FUSB300_GCR_SF_RST (1 << 8)
79#define FUSB300_GCR_VBUS_STATUS (1 << 7)
80#define FUSB300_GCR_FORCE_HS_SUSP (1 << 6)
81#define FUSB300_GCR_SYNC_FIFO1_CLR (1 << 5)
82#define FUSB300_GCR_SYNC_FIFO0_CLR (1 << 4)
83#define FUSB300_GCR_FIFOCLR (1 << 3)
84#define FUSB300_GCR_GLINTEN (1 << 2)
85#define FUSB300_GCR_DEVEN_FS 0x3
86#define FUSB300_GCR_DEVEN_HS 0x2
87#define FUSB300_GCR_DEVEN_SS 0x1
88#define FUSB300_GCR_DEVDIS 0x0
89#define FUSB300_GCR_DEVEN_MSK 0x3
90
91
92/*
93 * *Global Test Mode (offset = 004H)
94 * */
95#define FUSB300_GTM_TST_DIS_SOFGEN (1 << 16)
96#define FUSB300_GTM_TST_CUR_EP_ENTRY(n) ((n & 0xF) << 12)
97#define FUSB300_GTM_TST_EP_ENTRY(n) ((n & 0xF) << 8)
98#define FUSB300_GTM_TST_EP_NUM(n) ((n & 0xF) << 4)
99#define FUSB300_GTM_TST_FIFO_DEG (1 << 1)
100#define FUSB300_GTM_TSTMODE (1 << 0)
101
102/*
103 * * Device Address Register (offset = 008H)
104 * */
105#define FUSB300_DAR_SETCONFG (1 << 7)
106#define FUSB300_DAR_DRVADDR(x) (x & 0x7F)
107#define FUSB300_DAR_DRVADDR_MSK 0x7F
108
109/*
110 * *Control Transfer Configuration and Status Register
111 * (CX_Config_Status, offset = 00CH)
112 * */
113#define FUSB300_CSR_LEN(x) ((x & 0xFFFF) << 8)
114#define FUSB300_CSR_LEN_MSK (0xFFFF << 8)
115#define FUSB300_CSR_EMP (1 << 4)
116#define FUSB300_CSR_FUL (1 << 3)
117#define FUSB300_CSR_CLR (1 << 2)
118#define FUSB300_CSR_STL (1 << 1)
119#define FUSB300_CSR_DONE (1 << 0)
120
121/*
122 * * EPn Setting 0 (EPn_SET0, offset = 020H+(n-1)*30H, n=1~15 )
123 * */
124#define FUSB300_EPSET0_CLRSEQNUM (1 << 2)
125#define FUSB300_EPSET0_EPn_TX0BYTE (1 << 1)
126#define FUSB300_EPSET0_STL (1 << 0)
127
128/*
129 * * EPn Setting 1 (EPn_SET1, offset = 024H+(n-1)*30H, n=1~15)
130 * */
131#define FUSB300_EPSET1_START_ENTRY(x) ((x & 0xFF) << 24)
132#define FUSB300_EPSET1_START_ENTRY_MSK (0xFF << 24)
133#define FUSB300_EPSET1_FIFOENTRY(x) ((x & 0x1F) << 12)
134#define FUSB300_EPSET1_FIFOENTRY_MSK (0x1f << 12)
135#define FUSB300_EPSET1_INTERVAL(x) ((x & 0x7) << 6)
136#define FUSB300_EPSET1_BWNUM(x) ((x & 0x3) << 4)
137#define FUSB300_EPSET1_TYPEISO (1 << 2)
138#define FUSB300_EPSET1_TYPEBLK (2 << 2)
139#define FUSB300_EPSET1_TYPEINT (3 << 2)
140#define FUSB300_EPSET1_TYPE(x) ((x & 0x3) << 2)
141#define FUSB300_EPSET1_TYPE_MSK (0x3 << 2)
142#define FUSB300_EPSET1_DIROUT (0 << 1)
143#define FUSB300_EPSET1_DIRIN (1 << 1)
144#define FUSB300_EPSET1_DIR(x) ((x & 0x1) << 1)
145#define FUSB300_EPSET1_DIRIN (1 << 1)
146#define FUSB300_EPSET1_DIR_MSK ((0x1) << 1)
147#define FUSB300_EPSET1_ACTDIS 0
148#define FUSB300_EPSET1_ACTEN 1
149
150/*
151 * *EPn Setting 2 (EPn_SET2, offset = 028H+(n-1)*30H, n=1~15)
152 * */
153#define FUSB300_EPSET2_ADDROFS(x) ((x & 0x7FFF) << 16)
154#define FUSB300_EPSET2_ADDROFS_MSK (0x7fff << 16)
155#define FUSB300_EPSET2_MPS(x) (x & 0x7FF)
156#define FUSB300_EPSET2_MPS_MSK 0x7FF
157
158/*
159 * * EPn FIFO Register (offset = 2cH+(n-1)*30H)
160 * */
161#define FUSB300_FFR_RST (1 << 31)
162#define FUSB300_FF_FUL (1 << 30)
163#define FUSB300_FF_EMPTY (1 << 29)
164#define FUSB300_FFR_BYCNT 0x1FFFF
165
166/*
167 * *EPn Stream ID (EPn_STR_ID, offset = 040H+(n-1)*30H, n=1~15)
168 * */
169#define FUSB300_STRID_STREN (1 << 16)
170#define FUSB300_STRID_STRID(x) (x & 0xFFFF)
171
172/*
173 * *HS PHY Test Mode (offset = 300H)
174 * */
175#define FUSB300_HSPTM_TSTPKDONE (1 << 4)
176#define FUSB300_HSPTM_TSTPKT (1 << 3)
177#define FUSB300_HSPTM_TSTSET0NAK (1 << 2)
178#define FUSB300_HSPTM_TSTKSTA (1 << 1)
179#define FUSB300_HSPTM_TSTJSTA (1 << 0)
180
181/*
182 * *HS Control Register (offset = 304H)
183 * */
184#define FUSB300_HSCR_HS_LPM_PERMIT (1 << 8)
185#define FUSB300_HSCR_HS_LPM_RMWKUP (1 << 7)
186#define FUSB300_HSCR_CAP_LPM_RMWKUP (1 << 6)
187#define FUSB300_HSCR_HS_GOSUSP (1 << 5)
188#define FUSB300_HSCR_HS_GORMWKU (1 << 4)
189#define FUSB300_HSCR_CAP_RMWKUP (1 << 3)
190#define FUSB300_HSCR_IDLECNT_0MS 0
191#define FUSB300_HSCR_IDLECNT_1MS 1
192#define FUSB300_HSCR_IDLECNT_2MS 2
193#define FUSB300_HSCR_IDLECNT_3MS 3
194#define FUSB300_HSCR_IDLECNT_4MS 4
195#define FUSB300_HSCR_IDLECNT_5MS 5
196#define FUSB300_HSCR_IDLECNT_6MS 6
197#define FUSB300_HSCR_IDLECNT_7MS 7
198
199/*
200 * * SS Controller Register 0 (offset = 308H)
201 * */
202#define FUSB300_SSCR0_MAX_INTERVAL(x) ((x & 0x7) << 4)
203#define FUSB300_SSCR0_U2_FUN_EN (1 << 1)
204#define FUSB300_SSCR0_U1_FUN_EN (1 << 0)
205
206/*
207 * * SS Controller Register 1 (offset = 30CH)
208 * */
209#define FUSB300_SSCR1_GO_U3_DONE (1 << 8)
210#define FUSB300_SSCR1_TXDEEMPH_LEVEL (1 << 7)
211#define FUSB300_SSCR1_DIS_SCRMB (1 << 6)
212#define FUSB300_SSCR1_FORCE_RECOVERY (1 << 5)
213#define FUSB300_SSCR1_U3_WAKEUP_EN (1 << 4)
214#define FUSB300_SSCR1_U2_EXIT_EN (1 << 3)
215#define FUSB300_SSCR1_U1_EXIT_EN (1 << 2)
216#define FUSB300_SSCR1_U2_ENTRY_EN (1 << 1)
217#define FUSB300_SSCR1_U1_ENTRY_EN (1 << 0)
218
219/*
220 * *SS Controller Register 2 (offset = 310H)
221 * */
222#define FUSB300_SSCR2_SS_TX_SWING (1 << 25)
223#define FUSB300_SSCR2_FORCE_LINKPM_ACCEPT (1 << 24)
224#define FUSB300_SSCR2_U2_INACT_TIMEOUT(x) ((x & 0xFF) << 16)
225#define FUSB300_SSCR2_U1TIMEOUT(x) ((x & 0xFF) << 8)
226#define FUSB300_SSCR2_U2TIMEOUT(x) (x & 0xFF)
227
228/*
229 * *SS Device Notification Control (DEV_NOTF, offset = 314H)
230 * */
231#define FUSB300_DEVNOTF_CONTEXT0(x) ((x & 0xFFFFFF) << 8)
232#define FUSB300_DEVNOTF_TYPE_DIS 0
233#define FUSB300_DEVNOTF_TYPE_FUNCWAKE 1
234#define FUSB300_DEVNOTF_TYPE_LTM 2
235#define FUSB300_DEVNOTF_TYPE_BUSINT_ADJMSG 3
236
237/*
238 * *BFM Arbiter Priority Register (BFM_ARB offset = 31CH)
239 * */
240#define FUSB300_BFMARB_ARB_M1 (1 << 3)
241#define FUSB300_BFMARB_ARB_M0 (1 << 2)
242#define FUSB300_BFMARB_ARB_S1 (1 << 1)
243#define FUSB300_BFMARB_ARB_S0 1
244
245/*
246 * *Vendor Specific IO Control Register (offset = 320H)
247 * */
248#define FUSB300_VSIC_VCTLOAD_N (1 << 8)
249#define FUSB300_VSIC_VCTL(x) (x & 0x3F)
250
251/*
252 * *SOF Mask Timer (offset = 324H)
253 * */
254#define FUSB300_SOF_MASK_TIMER_HS 0x044c
255#define FUSB300_SOF_MASK_TIMER_FS 0x2710
256
257/*
258 * *Error Flag and Control Status (offset = 328H)
259 * */
260#define FUSB300_EFCS_PM_STATE_U3 3
261#define FUSB300_EFCS_PM_STATE_U2 2
262#define FUSB300_EFCS_PM_STATE_U1 1
263#define FUSB300_EFCS_PM_STATE_U0 0
264
265/*
266 * *Interrupt Group 0 Register (offset = 400H)
267 * */
268#define FUSB300_IGR0_EP15_PRD_INT (1 << 31)
269#define FUSB300_IGR0_EP14_PRD_INT (1 << 30)
270#define FUSB300_IGR0_EP13_PRD_INT (1 << 29)
271#define FUSB300_IGR0_EP12_PRD_INT (1 << 28)
272#define FUSB300_IGR0_EP11_PRD_INT (1 << 27)
273#define FUSB300_IGR0_EP10_PRD_INT (1 << 26)
274#define FUSB300_IGR0_EP9_PRD_INT (1 << 25)
275#define FUSB300_IGR0_EP8_PRD_INT (1 << 24)
276#define FUSB300_IGR0_EP7_PRD_INT (1 << 23)
277#define FUSB300_IGR0_EP6_PRD_INT (1 << 22)
278#define FUSB300_IGR0_EP5_PRD_INT (1 << 21)
279#define FUSB300_IGR0_EP4_PRD_INT (1 << 20)
280#define FUSB300_IGR0_EP3_PRD_INT (1 << 19)
281#define FUSB300_IGR0_EP2_PRD_INT (1 << 18)
282#define FUSB300_IGR0_EP1_PRD_INT (1 << 17)
283#define FUSB300_IGR0_EPn_PRD_INT(n) (1 << (n + 16))
284
285#define FUSB300_IGR0_EP15_FIFO_INT (1 << 15)
286#define FUSB300_IGR0_EP14_FIFO_INT (1 << 14)
287#define FUSB300_IGR0_EP13_FIFO_INT (1 << 13)
288#define FUSB300_IGR0_EP12_FIFO_INT (1 << 12)
289#define FUSB300_IGR0_EP11_FIFO_INT (1 << 11)
290#define FUSB300_IGR0_EP10_FIFO_INT (1 << 10)
291#define FUSB300_IGR0_EP9_FIFO_INT (1 << 9)
292#define FUSB300_IGR0_EP8_FIFO_INT (1 << 8)
293#define FUSB300_IGR0_EP7_FIFO_INT (1 << 7)
294#define FUSB300_IGR0_EP6_FIFO_INT (1 << 6)
295#define FUSB300_IGR0_EP5_FIFO_INT (1 << 5)
296#define FUSB300_IGR0_EP4_FIFO_INT (1 << 4)
297#define FUSB300_IGR0_EP3_FIFO_INT (1 << 3)
298#define FUSB300_IGR0_EP2_FIFO_INT (1 << 2)
299#define FUSB300_IGR0_EP1_FIFO_INT (1 << 1)
300#define FUSB300_IGR0_EPn_FIFO_INT(n) (1 << n)
301
302/*
303 * *Interrupt Group 1 Register (offset = 404H)
304 * */
305#define FUSB300_IGR1_INTGRP5 (1 << 31)
306#define FUSB300_IGR1_VBUS_CHG_INT (1 << 30)
307#define FUSB300_IGR1_SYNF1_EMPTY_INT (1 << 29)
308#define FUSB300_IGR1_SYNF0_EMPTY_INT (1 << 28)
309#define FUSB300_IGR1_U3_EXIT_FAIL_INT (1 << 27)
310#define FUSB300_IGR1_U2_EXIT_FAIL_INT (1 << 26)
311#define FUSB300_IGR1_U1_EXIT_FAIL_INT (1 << 25)
312#define FUSB300_IGR1_U2_ENTRY_FAIL_INT (1 << 24)
313#define FUSB300_IGR1_U1_ENTRY_FAIL_INT (1 << 23)
314#define FUSB300_IGR1_U3_EXIT_INT (1 << 22)
315#define FUSB300_IGR1_U2_EXIT_INT (1 << 21)
316#define FUSB300_IGR1_U1_EXIT_INT (1 << 20)
317#define FUSB300_IGR1_U3_ENTRY_INT (1 << 19)
318#define FUSB300_IGR1_U2_ENTRY_INT (1 << 18)
319#define FUSB300_IGR1_U1_ENTRY_INT (1 << 17)
320#define FUSB300_IGR1_HOT_RST_INT (1 << 16)
321#define FUSB300_IGR1_WARM_RST_INT (1 << 15)
322#define FUSB300_IGR1_RESM_INT (1 << 14)
323#define FUSB300_IGR1_SUSP_INT (1 << 13)
324#define FUSB300_IGR1_HS_LPM_INT (1 << 12)
325#define FUSB300_IGR1_USBRST_INT (1 << 11)
326#define FUSB300_IGR1_DEV_MODE_CHG_INT (1 << 9)
327#define FUSB300_IGR1_CX_COMABT_INT (1 << 8)
328#define FUSB300_IGR1_CX_COMFAIL_INT (1 << 7)
329#define FUSB300_IGR1_CX_CMDEND_INT (1 << 6)
330#define FUSB300_IGR1_CX_OUT_INT (1 << 5)
331#define FUSB300_IGR1_CX_IN_INT (1 << 4)
332#define FUSB300_IGR1_CX_SETUP_INT (1 << 3)
333#define FUSB300_IGR1_INTGRP4 (1 << 2)
334#define FUSB300_IGR1_INTGRP3 (1 << 1)
335#define FUSB300_IGR1_INTGRP2 (1 << 0)
336
337/*
338 * *Interrupt Group 2 Register (offset = 408H)
339 * */
340#define FUSB300_IGR2_EP6_STR_ACCEPT_INT (1 << 29)
341#define FUSB300_IGR2_EP6_STR_RESUME_INT (1 << 28)
342#define FUSB300_IGR2_EP6_STR_REQ_INT (1 << 27)
343#define FUSB300_IGR2_EP6_STR_NOTRDY_INT (1 << 26)
344#define FUSB300_IGR2_EP6_STR_PRIME_INT (1 << 25)
345#define FUSB300_IGR2_EP5_STR_ACCEPT_INT (1 << 24)
346#define FUSB300_IGR2_EP5_STR_RESUME_INT (1 << 23)
347#define FUSB300_IGR2_EP5_STR_REQ_INT (1 << 22)
348#define FUSB300_IGR2_EP5_STR_NOTRDY_INT (1 << 21)
349#define FUSB300_IGR2_EP5_STR_PRIME_INT (1 << 20)
350#define FUSB300_IGR2_EP4_STR_ACCEPT_INT (1 << 19)
351#define FUSB300_IGR2_EP4_STR_RESUME_INT (1 << 18)
352#define FUSB300_IGR2_EP4_STR_REQ_INT (1 << 17)
353#define FUSB300_IGR2_EP4_STR_NOTRDY_INT (1 << 16)
354#define FUSB300_IGR2_EP4_STR_PRIME_INT (1 << 15)
355#define FUSB300_IGR2_EP3_STR_ACCEPT_INT (1 << 14)
356#define FUSB300_IGR2_EP3_STR_RESUME_INT (1 << 13)
357#define FUSB300_IGR2_EP3_STR_REQ_INT (1 << 12)
358#define FUSB300_IGR2_EP3_STR_NOTRDY_INT (1 << 11)
359#define FUSB300_IGR2_EP3_STR_PRIME_INT (1 << 10)
360#define FUSB300_IGR2_EP2_STR_ACCEPT_INT (1 << 9)
361#define FUSB300_IGR2_EP2_STR_RESUME_INT (1 << 8)
362#define FUSB300_IGR2_EP2_STR_REQ_INT (1 << 7)
363#define FUSB300_IGR2_EP2_STR_NOTRDY_INT (1 << 6)
364#define FUSB300_IGR2_EP2_STR_PRIME_INT (1 << 5)
365#define FUSB300_IGR2_EP1_STR_ACCEPT_INT (1 << 4)
366#define FUSB300_IGR2_EP1_STR_RESUME_INT (1 << 3)
367#define FUSB300_IGR2_EP1_STR_REQ_INT (1 << 2)
368#define FUSB300_IGR2_EP1_STR_NOTRDY_INT (1 << 1)
369#define FUSB300_IGR2_EP1_STR_PRIME_INT (1 << 0)
370
371#define FUSB300_IGR2_EP_STR_ACCEPT_INT(n) (1 << (5 * n - 1))
372#define FUSB300_IGR2_EP_STR_RESUME_INT(n) (1 << (5 * n - 2))
373#define FUSB300_IGR2_EP_STR_REQ_INT(n) (1 << (5 * n - 3))
374#define FUSB300_IGR2_EP_STR_NOTRDY_INT(n) (1 << (5 * n - 4))
375#define FUSB300_IGR2_EP_STR_PRIME_INT(n) (1 << (5 * n - 5))
376
377/*
378 * *Interrupt Group 3 Register (offset = 40CH)
379 * */
380#define FUSB300_IGR3_EP12_STR_ACCEPT_INT (1 << 29)
381#define FUSB300_IGR3_EP12_STR_RESUME_INT (1 << 28)
382#define FUSB300_IGR3_EP12_STR_REQ_INT (1 << 27)
383#define FUSB300_IGR3_EP12_STR_NOTRDY_INT (1 << 26)
384#define FUSB300_IGR3_EP12_STR_PRIME_INT (1 << 25)
385#define FUSB300_IGR3_EP11_STR_ACCEPT_INT (1 << 24)
386#define FUSB300_IGR3_EP11_STR_RESUME_INT (1 << 23)
387#define FUSB300_IGR3_EP11_STR_REQ_INT (1 << 22)
388#define FUSB300_IGR3_EP11_STR_NOTRDY_INT (1 << 21)
389#define FUSB300_IGR3_EP11_STR_PRIME_INT (1 << 20)
390#define FUSB300_IGR3_EP10_STR_ACCEPT_INT (1 << 19)
391#define FUSB300_IGR3_EP10_STR_RESUME_INT (1 << 18)
392#define FUSB300_IGR3_EP10_STR_REQ_INT (1 << 17)
393#define FUSB300_IGR3_EP10_STR_NOTRDY_INT (1 << 16)
394#define FUSB300_IGR3_EP10_STR_PRIME_INT (1 << 15)
395#define FUSB300_IGR3_EP9_STR_ACCEPT_INT (1 << 14)
396#define FUSB300_IGR3_EP9_STR_RESUME_INT (1 << 13)
397#define FUSB300_IGR3_EP9_STR_REQ_INT (1 << 12)
398#define FUSB300_IGR3_EP9_STR_NOTRDY_INT (1 << 11)
399#define FUSB300_IGR3_EP9_STR_PRIME_INT (1 << 10)
400#define FUSB300_IGR3_EP8_STR_ACCEPT_INT (1 << 9)
401#define FUSB300_IGR3_EP8_STR_RESUME_INT (1 << 8)
402#define FUSB300_IGR3_EP8_STR_REQ_INT (1 << 7)
403#define FUSB300_IGR3_EP8_STR_NOTRDY_INT (1 << 6)
404#define FUSB300_IGR3_EP8_STR_PRIME_INT (1 << 5)
405#define FUSB300_IGR3_EP7_STR_ACCEPT_INT (1 << 4)
406#define FUSB300_IGR3_EP7_STR_RESUME_INT (1 << 3)
407#define FUSB300_IGR3_EP7_STR_REQ_INT (1 << 2)
408#define FUSB300_IGR3_EP7_STR_NOTRDY_INT (1 << 1)
409#define FUSB300_IGR3_EP7_STR_PRIME_INT (1 << 0)
410
411#define FUSB300_IGR3_EP_STR_ACCEPT_INT(n) (1 << (5 * (n - 6) - 1))
412#define FUSB300_IGR3_EP_STR_RESUME_INT(n) (1 << (5 * (n - 6) - 2))
413#define FUSB300_IGR3_EP_STR_REQ_INT(n) (1 << (5 * (n - 6) - 3))
414#define FUSB300_IGR3_EP_STR_NOTRDY_INT(n) (1 << (5 * (n - 6) - 4))
415#define FUSB300_IGR3_EP_STR_PRIME_INT(n) (1 << (5 * (n - 6) - 5))
416
417/*
418 * *Interrupt Group 4 Register (offset = 410H)
419 * */
420#define FUSB300_IGR4_EP15_RX0_INT (1 << 31)
421#define FUSB300_IGR4_EP14_RX0_INT (1 << 30)
422#define FUSB300_IGR4_EP13_RX0_INT (1 << 29)
423#define FUSB300_IGR4_EP12_RX0_INT (1 << 28)
424#define FUSB300_IGR4_EP11_RX0_INT (1 << 27)
425#define FUSB300_IGR4_EP10_RX0_INT (1 << 26)
426#define FUSB300_IGR4_EP9_RX0_INT (1 << 25)
427#define FUSB300_IGR4_EP8_RX0_INT (1 << 24)
428#define FUSB300_IGR4_EP7_RX0_INT (1 << 23)
429#define FUSB300_IGR4_EP6_RX0_INT (1 << 22)
430#define FUSB300_IGR4_EP5_RX0_INT (1 << 21)
431#define FUSB300_IGR4_EP4_RX0_INT (1 << 20)
432#define FUSB300_IGR4_EP3_RX0_INT (1 << 19)
433#define FUSB300_IGR4_EP2_RX0_INT (1 << 18)
434#define FUSB300_IGR4_EP1_RX0_INT (1 << 17)
435#define FUSB300_IGR4_EP_RX0_INT(x) (1 << (x + 16))
436#define FUSB300_IGR4_EP15_STR_ACCEPT_INT (1 << 14)
437#define FUSB300_IGR4_EP15_STR_RESUME_INT (1 << 13)
438#define FUSB300_IGR4_EP15_STR_REQ_INT (1 << 12)
439#define FUSB300_IGR4_EP15_STR_NOTRDY_INT (1 << 11)
440#define FUSB300_IGR4_EP15_STR_PRIME_INT (1 << 10)
441#define FUSB300_IGR4_EP14_STR_ACCEPT_INT (1 << 9)
442#define FUSB300_IGR4_EP14_STR_RESUME_INT (1 << 8)
443#define FUSB300_IGR4_EP14_STR_REQ_INT (1 << 7)
444#define FUSB300_IGR4_EP14_STR_NOTRDY_INT (1 << 6)
445#define FUSB300_IGR4_EP14_STR_PRIME_INT (1 << 5)
446#define FUSB300_IGR4_EP13_STR_ACCEPT_INT (1 << 4)
447#define FUSB300_IGR4_EP13_STR_RESUME_INT (1 << 3)
448#define FUSB300_IGR4_EP13_STR_REQ_INT (1 << 2)
449#define FUSB300_IGR4_EP13_STR_NOTRDY_INT (1 << 1)
450#define FUSB300_IGR4_EP13_STR_PRIME_INT (1 << 0)
451
452#define FUSB300_IGR4_EP_STR_ACCEPT_INT(n) (1 << (5 * (n - 12) - 1))
453#define FUSB300_IGR4_EP_STR_RESUME_INT(n) (1 << (5 * (n - 12) - 2))
454#define FUSB300_IGR4_EP_STR_REQ_INT(n) (1 << (5 * (n - 12) - 3))
455#define FUSB300_IGR4_EP_STR_NOTRDY_INT(n) (1 << (5 * (n - 12) - 4))
456#define FUSB300_IGR4_EP_STR_PRIME_INT(n) (1 << (5 * (n - 12) - 5))
457
458/*
459 * *Interrupt Group 5 Register (offset = 414H)
460 * */
461#define FUSB300_IGR5_EP_STL_INT(n) (1 << n)
462
463/*
464 * *Interrupt Enable Group 0 Register (offset = 420H)
465 * */
466#define FUSB300_IGER0_EEP15_PRD_INT (1 << 31)
467#define FUSB300_IGER0_EEP14_PRD_INT (1 << 30)
468#define FUSB300_IGER0_EEP13_PRD_INT (1 << 29)
469#define FUSB300_IGER0_EEP12_PRD_INT (1 << 28)
470#define FUSB300_IGER0_EEP11_PRD_INT (1 << 27)
471#define FUSB300_IGER0_EEP10_PRD_INT (1 << 26)
472#define FUSB300_IGER0_EEP9_PRD_INT (1 << 25)
473#define FUSB300_IGER0_EP8_PRD_INT (1 << 24)
474#define FUSB300_IGER0_EEP7_PRD_INT (1 << 23)
475#define FUSB300_IGER0_EEP6_PRD_INT (1 << 22)
476#define FUSB300_IGER0_EEP5_PRD_INT (1 << 21)
477#define FUSB300_IGER0_EEP4_PRD_INT (1 << 20)
478#define FUSB300_IGER0_EEP3_PRD_INT (1 << 19)
479#define FUSB300_IGER0_EEP2_PRD_INT (1 << 18)
480#define FUSB300_IGER0_EEP1_PRD_INT (1 << 17)
481#define FUSB300_IGER0_EEPn_PRD_INT(n) (1 << (n + 16))
482
483#define FUSB300_IGER0_EEP15_FIFO_INT (1 << 15)
484#define FUSB300_IGER0_EEP14_FIFO_INT (1 << 14)
485#define FUSB300_IGER0_EEP13_FIFO_INT (1 << 13)
486#define FUSB300_IGER0_EEP12_FIFO_INT (1 << 12)
487#define FUSB300_IGER0_EEP11_FIFO_INT (1 << 11)
488#define FUSB300_IGER0_EEP10_FIFO_INT (1 << 10)
489#define FUSB300_IGER0_EEP9_FIFO_INT (1 << 9)
490#define FUSB300_IGER0_EEP8_FIFO_INT (1 << 8)
491#define FUSB300_IGER0_EEP7_FIFO_INT (1 << 7)
492#define FUSB300_IGER0_EEP6_FIFO_INT (1 << 6)
493#define FUSB300_IGER0_EEP5_FIFO_INT (1 << 5)
494#define FUSB300_IGER0_EEP4_FIFO_INT (1 << 4)
495#define FUSB300_IGER0_EEP3_FIFO_INT (1 << 3)
496#define FUSB300_IGER0_EEP2_FIFO_INT (1 << 2)
497#define FUSB300_IGER0_EEP1_FIFO_INT (1 << 1)
498#define FUSB300_IGER0_EEPn_FIFO_INT(n) (1 << n)
499
500/*
501 * *Interrupt Enable Group 1 Register (offset = 424H)
502 * */
503#define FUSB300_IGER1_EINT_GRP5 (1 << 31)
504#define FUSB300_IGER1_VBUS_CHG_INT (1 << 30)
505#define FUSB300_IGER1_SYNF1_EMPTY_INT (1 << 29)
506#define FUSB300_IGER1_SYNF0_EMPTY_INT (1 << 28)
507#define FUSB300_IGER1_U3_EXIT_FAIL_INT (1 << 27)
508#define FUSB300_IGER1_U2_EXIT_FAIL_INT (1 << 26)
509#define FUSB300_IGER1_U1_EXIT_FAIL_INT (1 << 25)
510#define FUSB300_IGER1_U2_ENTRY_FAIL_INT (1 << 24)
511#define FUSB300_IGER1_U1_ENTRY_FAIL_INT (1 << 23)
512#define FUSB300_IGER1_U3_EXIT_INT (1 << 22)
513#define FUSB300_IGER1_U2_EXIT_INT (1 << 21)
514#define FUSB300_IGER1_U1_EXIT_INT (1 << 20)
515#define FUSB300_IGER1_U3_ENTRY_INT (1 << 19)
516#define FUSB300_IGER1_U2_ENTRY_INT (1 << 18)
517#define FUSB300_IGER1_U1_ENTRY_INT (1 << 17)
518#define FUSB300_IGER1_HOT_RST_INT (1 << 16)
519#define FUSB300_IGER1_WARM_RST_INT (1 << 15)
520#define FUSB300_IGER1_RESM_INT (1 << 14)
521#define FUSB300_IGER1_SUSP_INT (1 << 13)
522#define FUSB300_IGER1_LPM_INT (1 << 12)
523#define FUSB300_IGER1_HS_RST_INT (1 << 11)
524#define FUSB300_IGER1_EDEV_MODE_CHG_INT (1 << 9)
525#define FUSB300_IGER1_CX_COMABT_INT (1 << 8)
526#define FUSB300_IGER1_CX_COMFAIL_INT (1 << 7)
527#define FUSB300_IGER1_CX_CMDEND_INT (1 << 6)
528#define FUSB300_IGER1_CX_OUT_INT (1 << 5)
529#define FUSB300_IGER1_CX_IN_INT (1 << 4)
530#define FUSB300_IGER1_CX_SETUP_INT (1 << 3)
531#define FUSB300_IGER1_INTGRP4 (1 << 2)
532#define FUSB300_IGER1_INTGRP3 (1 << 1)
533#define FUSB300_IGER1_INTGRP2 (1 << 0)
534
535/*
536 * *Interrupt Enable Group 2 Register (offset = 428H)
537 * */
538#define FUSB300_IGER2_EEP_STR_ACCEPT_INT(n) (1 << (5 * n - 1))
539#define FUSB300_IGER2_EEP_STR_RESUME_INT(n) (1 << (5 * n - 2))
540#define FUSB300_IGER2_EEP_STR_REQ_INT(n) (1 << (5 * n - 3))
541#define FUSB300_IGER2_EEP_STR_NOTRDY_INT(n) (1 << (5 * n - 4))
542#define FUSB300_IGER2_EEP_STR_PRIME_INT(n) (1 << (5 * n - 5))
543
544/*
545 * *Interrupt Enable Group 3 Register (offset = 42CH)
546 * */
547
548#define FUSB300_IGER3_EEP_STR_ACCEPT_INT(n) (1 << (5 * (n - 6) - 1))
549#define FUSB300_IGER3_EEP_STR_RESUME_INT(n) (1 << (5 * (n - 6) - 2))
550#define FUSB300_IGER3_EEP_STR_REQ_INT(n) (1 << (5 * (n - 6) - 3))
551#define FUSB300_IGER3_EEP_STR_NOTRDY_INT(n) (1 << (5 * (n - 6) - 4))
552#define FUSB300_IGER3_EEP_STR_PRIME_INT(n) (1 << (5 * (n - 6) - 5))
553
554/*
555 * *Interrupt Enable Group 4 Register (offset = 430H)
556 * */
557
558#define FUSB300_IGER4_EEP_RX0_INT(n) (1 << (n + 16))
559#define FUSB300_IGER4_EEP_STR_ACCEPT_INT(n) (1 << (5 * (n - 6) - 1))
560#define FUSB300_IGER4_EEP_STR_RESUME_INT(n) (1 << (5 * (n - 6) - 2))
561#define FUSB300_IGER4_EEP_STR_REQ_INT(n) (1 << (5 * (n - 6) - 3))
562#define FUSB300_IGER4_EEP_STR_NOTRDY_INT(n) (1 << (5 * (n - 6) - 4))
563#define FUSB300_IGER4_EEP_STR_PRIME_INT(n) (1 << (5 * (n - 6) - 5))
564
565/* EP PRD Ready (EP_PRD_RDY, offset = 504H) */
566
567#define FUSB300_EPPRDR_EP15_PRD_RDY (1 << 15)
568#define FUSB300_EPPRDR_EP14_PRD_RDY (1 << 14)
569#define FUSB300_EPPRDR_EP13_PRD_RDY (1 << 13)
570#define FUSB300_EPPRDR_EP12_PRD_RDY (1 << 12)
571#define FUSB300_EPPRDR_EP11_PRD_RDY (1 << 11)
572#define FUSB300_EPPRDR_EP10_PRD_RDY (1 << 10)
573#define FUSB300_EPPRDR_EP9_PRD_RDY (1 << 9)
574#define FUSB300_EPPRDR_EP8_PRD_RDY (1 << 8)
575#define FUSB300_EPPRDR_EP7_PRD_RDY (1 << 7)
576#define FUSB300_EPPRDR_EP6_PRD_RDY (1 << 6)
577#define FUSB300_EPPRDR_EP5_PRD_RDY (1 << 5)
578#define FUSB300_EPPRDR_EP4_PRD_RDY (1 << 4)
579#define FUSB300_EPPRDR_EP3_PRD_RDY (1 << 3)
580#define FUSB300_EPPRDR_EP2_PRD_RDY (1 << 2)
581#define FUSB300_EPPRDR_EP1_PRD_RDY (1 << 1)
582#define FUSB300_EPPRDR_EP_PRD_RDY(n) (1 << n)
583
584/* AHB Bus Control Register (offset = 514H) */
585#define FUSB300_AHBBCR_S1_SPLIT_ON (1 << 17)
586#define FUSB300_AHBBCR_S0_SPLIT_ON (1 << 16)
587#define FUSB300_AHBBCR_S1_1entry (0 << 12)
588#define FUSB300_AHBBCR_S1_4entry (3 << 12)
589#define FUSB300_AHBBCR_S1_8entry (5 << 12)
590#define FUSB300_AHBBCR_S1_16entry (7 << 12)
591#define FUSB300_AHBBCR_S0_1entry (0 << 8)
592#define FUSB300_AHBBCR_S0_4entry (3 << 8)
593#define FUSB300_AHBBCR_S0_8entry (5 << 8)
594#define FUSB300_AHBBCR_S0_16entry (7 << 8)
595#define FUSB300_AHBBCR_M1_BURST_SINGLE (0 << 4)
596#define FUSB300_AHBBCR_M1_BURST_INCR (1 << 4)
597#define FUSB300_AHBBCR_M1_BURST_INCR4 (3 << 4)
598#define FUSB300_AHBBCR_M1_BURST_INCR8 (5 << 4)
599#define FUSB300_AHBBCR_M1_BURST_INCR16 (7 << 4)
600#define FUSB300_AHBBCR_M0_BURST_SINGLE 0
601#define FUSB300_AHBBCR_M0_BURST_INCR 1
602#define FUSB300_AHBBCR_M0_BURST_INCR4 3
603#define FUSB300_AHBBCR_M0_BURST_INCR8 5
604#define FUSB300_AHBBCR_M0_BURST_INCR16 7
605#define FUSB300_IGER5_EEP_STL_INT(n) (1 << n)
606
607/* WORD 0 Data Structure of PRD Table */
608#define FUSB300_EPPRD0_M (1 << 30)
609#define FUSB300_EPPRD0_O (1 << 29)
610/* The finished prd */
611#define FUSB300_EPPRD0_F (1 << 28)
612#define FUSB300_EPPRD0_I (1 << 27)
613#define FUSB300_EPPRD0_A (1 << 26)
614/* To decide HW point to first prd at next time */
615#define FUSB300_EPPRD0_L (1 << 25)
616#define FUSB300_EPPRD0_H (1 << 24)
617#define FUSB300_EPPRD0_BTC(n) (n & 0xFFFFFF)
618
619/*----------------------------------------------------------------------*/
620#define FUSB300_MAX_NUM_EP 16
621
622#define FUSB300_FIFO_ENTRY_NUM 8
623#define FUSB300_MAX_FIFO_ENTRY 8
624
625#define SS_CTL_MAX_PACKET_SIZE 0x200
626#define SS_BULK_MAX_PACKET_SIZE 0x400
627#define SS_INT_MAX_PACKET_SIZE 0x400
628#define SS_ISO_MAX_PACKET_SIZE 0x400
629
630#define HS_BULK_MAX_PACKET_SIZE 0x200
631#define HS_CTL_MAX_PACKET_SIZE 0x40
632#define HS_INT_MAX_PACKET_SIZE 0x400
633#define HS_ISO_MAX_PACKET_SIZE 0x400
634
635struct fusb300_ep_info {
636 u8 epnum;
637 u8 type;
638 u8 interval;
639 u8 dir_in;
640 u16 maxpacket;
641 u16 addrofs;
642 u16 bw_num;
643};
644
645struct fusb300_request {
646
647 struct usb_request req;
648 struct list_head queue;
649};
650
651
652struct fusb300_ep {
653 struct usb_ep ep;
654 struct fusb300 *fusb300;
655
656 struct list_head queue;
657 unsigned stall:1;
658 unsigned wedged:1;
659 unsigned use_dma:1;
660
661 unsigned char epnum;
662 unsigned char type;
663 const struct usb_endpoint_descriptor *desc;
664};
665
666struct fusb300 {
667 spinlock_t lock;
668 void __iomem *reg;
669
670 unsigned long irq_trigger;
671
672 struct usb_gadget gadget;
673 struct usb_gadget_driver *driver;
674
675 struct fusb300_ep *ep[FUSB300_MAX_NUM_EP];
676
677 struct usb_request *ep0_req; /* for internal request */
678 __le16 ep0_data;
679 u32 ep0_length; /* for internal request */
680 u8 ep0_dir; /* 0/0x80 out/in */
681
682 u8 fifo_entry_num; /* next start fifo entry */
683 u32 addrofs; /* next fifo address offset */
684 u8 reenum; /* if re-enumeration */
685};
686
687#endif
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index 5c2720d64ffa..e896f6359dfe 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -45,12 +45,6 @@
45#define gadget_is_goku(g) 0 45#define gadget_is_goku(g) 0
46#endif 46#endif
47 47
48#ifdef CONFIG_USB_GADGET_LH7A40X
49#define gadget_is_lh7a40x(g) !strcmp("lh7a40x_udc", (g)->name)
50#else
51#define gadget_is_lh7a40x(g) 0
52#endif
53
54#ifdef CONFIG_USB_GADGET_OMAP 48#ifdef CONFIG_USB_GADGET_OMAP
55#define gadget_is_omap(g) !strcmp("omap_udc", (g)->name) 49#define gadget_is_omap(g) !strcmp("omap_udc", (g)->name)
56#else 50#else
@@ -181,8 +175,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget)
181 return 0x06; 175 return 0x06;
182 else if (gadget_is_omap(gadget)) 176 else if (gadget_is_omap(gadget))
183 return 0x08; 177 return 0x08;
184 else if (gadget_is_lh7a40x(gadget))
185 return 0x09;
186 else if (gadget_is_pxa27x(gadget)) 178 else if (gadget_is_pxa27x(gadget))
187 return 0x11; 179 return 0x11;
188 else if (gadget_is_s3c2410(gadget)) 180 else if (gadget_is_s3c2410(gadget))
diff --git a/drivers/usb/gadget/lh7a40x_udc.c b/drivers/usb/gadget/lh7a40x_udc.c
deleted file mode 100644
index 6b58bd8ce623..000000000000
--- a/drivers/usb/gadget/lh7a40x_udc.c
+++ /dev/null
@@ -1,2152 +0,0 @@
1/*
2 * linux/drivers/usb/gadget/lh7a40x_udc.c
3 * Sharp LH7A40x on-chip full speed USB device controllers
4 *
5 * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
6 * Copyright (C) 2004 Bo Henriksen, Nordic ID
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#include <linux/platform_device.h>
25#include <linux/slab.h>
26
27#include "lh7a40x_udc.h"
28
29//#define DEBUG printk
30//#define DEBUG_EP0 printk
31//#define DEBUG_SETUP printk
32
33#ifndef DEBUG_EP0
34# define DEBUG_EP0(fmt,args...)
35#endif
36#ifndef DEBUG_SETUP
37# define DEBUG_SETUP(fmt,args...)
38#endif
39#ifndef DEBUG
40# define NO_STATES
41# define DEBUG(fmt,args...)
42#endif
43
44#define DRIVER_DESC "LH7A40x USB Device Controller"
45#define DRIVER_VERSION __DATE__
46
47#ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
48#define _BIT(x) (1<<(x))
49#endif
50
51struct lh7a40x_udc *the_controller;
52
53static const char driver_name[] = "lh7a40x_udc";
54static const char driver_desc[] = DRIVER_DESC;
55static const char ep0name[] = "ep0-control";
56
57/*
58 Local definintions.
59*/
60
61#ifndef NO_STATES
62static char *state_names[] = {
63 "WAIT_FOR_SETUP",
64 "DATA_STATE_XMIT",
65 "DATA_STATE_NEED_ZLP",
66 "WAIT_FOR_OUT_STATUS",
67 "DATA_STATE_RECV"
68};
69#endif
70
71/*
72 Local declarations.
73*/
74static int lh7a40x_ep_enable(struct usb_ep *ep,
75 const struct usb_endpoint_descriptor *);
76static int lh7a40x_ep_disable(struct usb_ep *ep);
77static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
78static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
79static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
80static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
81static int lh7a40x_set_halt(struct usb_ep *ep, int);
82static int lh7a40x_fifo_status(struct usb_ep *ep);
83static void lh7a40x_fifo_flush(struct usb_ep *ep);
84static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
85static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
86
87static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
88 int status);
89static void pio_irq_enable(int bEndpointAddress);
90static void pio_irq_disable(int bEndpointAddress);
91static void stop_activity(struct lh7a40x_udc *dev,
92 struct usb_gadget_driver *driver);
93static void flush(struct lh7a40x_ep *ep);
94static void udc_enable(struct lh7a40x_udc *dev);
95static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
96
97static struct usb_ep_ops lh7a40x_ep_ops = {
98 .enable = lh7a40x_ep_enable,
99 .disable = lh7a40x_ep_disable,
100
101 .alloc_request = lh7a40x_alloc_request,
102 .free_request = lh7a40x_free_request,
103
104 .queue = lh7a40x_queue,
105 .dequeue = lh7a40x_dequeue,
106
107 .set_halt = lh7a40x_set_halt,
108 .fifo_status = lh7a40x_fifo_status,
109 .fifo_flush = lh7a40x_fifo_flush,
110};
111
112/* Inline code */
113
114static __inline__ int write_packet(struct lh7a40x_ep *ep,
115 struct lh7a40x_request *req, int max)
116{
117 u8 *buf;
118 int length, count;
119 volatile u32 *fifo = (volatile u32 *)ep->fifo;
120
121 buf = req->req.buf + req->req.actual;
122 prefetch(buf);
123
124 length = req->req.length - req->req.actual;
125 length = min(length, max);
126 req->req.actual += length;
127
128 DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
129
130 count = length;
131 while (count--) {
132 *fifo = *buf++;
133 }
134
135 return length;
136}
137
138static __inline__ void usb_set_index(u32 ep)
139{
140 *(volatile u32 *)io_p2v(USB_INDEX) = ep;
141}
142
143static __inline__ u32 usb_read(u32 port)
144{
145 return *(volatile u32 *)io_p2v(port);
146}
147
148static __inline__ void usb_write(u32 val, u32 port)
149{
150 *(volatile u32 *)io_p2v(port) = val;
151}
152
153static __inline__ void usb_set(u32 val, u32 port)
154{
155 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
156 u32 after = (*ioport) | val;
157 *ioport = after;
158}
159
160static __inline__ void usb_clear(u32 val, u32 port)
161{
162 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
163 u32 after = (*ioport) & ~val;
164 *ioport = after;
165}
166
167/*-------------------------------------------------------------------------*/
168
169#define GPIO_PORTC_DR (0x80000E08)
170#define GPIO_PORTC_DDR (0x80000E18)
171#define GPIO_PORTC_PDR (0x80000E70)
172
173/* get port C pin data register */
174#define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
175/* get port C data direction register */
176#define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
177/* set port C data register */
178#define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
179/* set port C data direction register */
180#define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
181
182/*
183 * LPD7A404 GPIO's:
184 * Port C bit 1 = USB Port 1 Power Enable
185 * Port C bit 2 = USB Port 1 Data Carrier Detect
186 */
187#define is_usb_connected() get_portc_pdr(2)
188
189#ifdef CONFIG_USB_GADGET_DEBUG_FILES
190
191static const char proc_node_name[] = "driver/udc";
192
193static int
194udc_proc_read(char *page, char **start, off_t off, int count,
195 int *eof, void *_dev)
196{
197 char *buf = page;
198 struct lh7a40x_udc *dev = _dev;
199 char *next = buf;
200 unsigned size = count;
201 unsigned long flags;
202 int t;
203
204 if (off != 0)
205 return 0;
206
207 local_irq_save(flags);
208
209 /* basic device status */
210 t = scnprintf(next, size,
211 DRIVER_DESC "\n"
212 "%s version: %s\n"
213 "Gadget driver: %s\n"
214 "Host: %s\n\n",
215 driver_name, DRIVER_VERSION,
216 dev->driver ? dev->driver->driver.name : "(none)",
217 is_usb_connected()? "full speed" : "disconnected");
218 size -= t;
219 next += t;
220
221 t = scnprintf(next, size,
222 "GPIO:\n"
223 " Port C bit 1: %d, dir %d\n"
224 " Port C bit 2: %d, dir %d\n\n",
225 get_portc_pdr(1), get_portc_ddr(1),
226 get_portc_pdr(2), get_portc_ddr(2)
227 );
228 size -= t;
229 next += t;
230
231 t = scnprintf(next, size,
232 "DCP pullup: %d\n\n",
233 (usb_read(USB_PM) & PM_USB_DCP) != 0);
234 size -= t;
235 next += t;
236
237 local_irq_restore(flags);
238 *eof = 1;
239 return count - size;
240}
241
242#define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
243#define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
244
245#else /* !CONFIG_USB_GADGET_DEBUG_FILES */
246
247#define create_proc_files() do {} while (0)
248#define remove_proc_files() do {} while (0)
249
250#endif /* CONFIG_USB_GADGET_DEBUG_FILES */
251
252/*
253 * udc_disable - disable USB device controller
254 */
255static void udc_disable(struct lh7a40x_udc *dev)
256{
257 DEBUG("%s, %p\n", __func__, dev);
258
259 udc_set_address(dev, 0);
260
261 /* Disable interrupts */
262 usb_write(0, USB_IN_INT_EN);
263 usb_write(0, USB_OUT_INT_EN);
264 usb_write(0, USB_INT_EN);
265
266 /* Disable the USB */
267 usb_write(0, USB_PM);
268
269#ifdef CONFIG_ARCH_LH7A404
270 /* Disable USB power */
271 set_portc_dr(1, 0);
272#endif
273
274 /* if hardware supports it, disconnect from usb */
275 /* make_usb_disappear(); */
276
277 dev->ep0state = WAIT_FOR_SETUP;
278 dev->gadget.speed = USB_SPEED_UNKNOWN;
279 dev->usb_address = 0;
280}
281
282/*
283 * udc_reinit - initialize software state
284 */
285static void udc_reinit(struct lh7a40x_udc *dev)
286{
287 u32 i;
288
289 DEBUG("%s, %p\n", __func__, dev);
290
291 /* device/ep0 records init */
292 INIT_LIST_HEAD(&dev->gadget.ep_list);
293 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
294 dev->ep0state = WAIT_FOR_SETUP;
295
296 /* basic endpoint records init */
297 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
298 struct lh7a40x_ep *ep = &dev->ep[i];
299
300 if (i != 0)
301 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
302
303 ep->desc = 0;
304 ep->stopped = 0;
305 INIT_LIST_HEAD(&ep->queue);
306 ep->pio_irqs = 0;
307 }
308
309 /* the rest was statically initialized, and is read-only */
310}
311
312#define BYTES2MAXP(x) (x / 8)
313#define MAXP2BYTES(x) (x * 8)
314
315/* until it's enabled, this UDC should be completely invisible
316 * to any USB host.
317 */
318static void udc_enable(struct lh7a40x_udc *dev)
319{
320 int ep;
321
322 DEBUG("%s, %p\n", __func__, dev);
323
324 dev->gadget.speed = USB_SPEED_UNKNOWN;
325
326#ifdef CONFIG_ARCH_LH7A404
327 /* Set Port C bit 1 & 2 as output */
328 set_portc_ddr(1, 1);
329 set_portc_ddr(2, 1);
330
331 /* Enable USB power */
332 set_portc_dr(1, 0);
333#endif
334
335 /*
336 * C.f Chapter 18.1.3.1 Initializing the USB
337 */
338
339 /* Disable the USB */
340 usb_clear(PM_USB_ENABLE, USB_PM);
341
342 /* Reset APB & I/O sides of the USB */
343 usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
344 mdelay(5);
345 usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
346
347 /* Set MAXP values for each */
348 for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
349 struct lh7a40x_ep *ep_reg = &dev->ep[ep];
350 u32 csr;
351
352 usb_set_index(ep);
353
354 switch (ep_reg->ep_type) {
355 case ep_bulk_in:
356 case ep_interrupt:
357 usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
358 ep_reg->csr2);
359 /* Fall through */
360 case ep_control:
361 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
362 USB_IN_MAXP);
363 break;
364 case ep_bulk_out:
365 usb_clear(USB_OUT_CSR2_USB_DMA_EN |
366 USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
367 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
368 USB_OUT_MAXP);
369 break;
370 }
371
372 /* Read & Write CSR1, just in case */
373 csr = usb_read(ep_reg->csr1);
374 usb_write(csr, ep_reg->csr1);
375
376 flush(ep_reg);
377 }
378
379 /* Disable interrupts */
380 usb_write(0, USB_IN_INT_EN);
381 usb_write(0, USB_OUT_INT_EN);
382 usb_write(0, USB_INT_EN);
383
384 /* Enable interrupts */
385 usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
386 usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
387 /* Dont enable rest of the interrupts */
388 /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
389 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
390
391 /* Enable SUSPEND */
392 usb_set(PM_ENABLE_SUSPEND, USB_PM);
393
394 /* Enable the USB */
395 usb_set(PM_USB_ENABLE, USB_PM);
396
397#ifdef CONFIG_ARCH_LH7A404
398 /* NOTE: DOES NOT WORK! */
399 /* Let host detect UDC:
400 * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
401 * transistor on and pull the USBDP pin HIGH.
402 */
403 /* usb_clear(PM_USB_DCP, USB_PM);
404 usb_set(PM_USB_DCP, USB_PM); */
405#endif
406}
407
408/*
409 Register entry point for the peripheral controller driver.
410*/
411int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
412 int (*bind)(struct usb_gadget *))
413{
414 struct lh7a40x_udc *dev = the_controller;
415 int retval;
416
417 DEBUG("%s: %s\n", __func__, driver->driver.name);
418
419 if (!driver
420 || driver->speed != USB_SPEED_FULL
421 || !bind
422 || !driver->disconnect
423 || !driver->setup)
424 return -EINVAL;
425 if (!dev)
426 return -ENODEV;
427 if (dev->driver)
428 return -EBUSY;
429
430 /* first hook up the driver ... */
431 dev->driver = driver;
432 dev->gadget.dev.driver = &driver->driver;
433
434 device_add(&dev->gadget.dev);
435 retval = bind(&dev->gadget);
436 if (retval) {
437 printk(KERN_WARNING "%s: bind to driver %s --> error %d\n",
438 dev->gadget.name, driver->driver.name, retval);
439 device_del(&dev->gadget.dev);
440
441 dev->driver = 0;
442 dev->gadget.dev.driver = 0;
443 return retval;
444 }
445
446 /* ... then enable host detection and ep0; and we're ready
447 * for set_configuration as well as eventual disconnect.
448 * NOTE: this shouldn't power up until later.
449 */
450 printk(KERN_WARNING "%s: registered gadget driver '%s'\n",
451 dev->gadget.name, driver->driver.name);
452
453 udc_enable(dev);
454
455 return 0;
456}
457EXPORT_SYMBOL(usb_gadget_probe_driver);
458
459/*
460 Unregister entry point for the peripheral controller driver.
461*/
462int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
463{
464 struct lh7a40x_udc *dev = the_controller;
465 unsigned long flags;
466
467 if (!dev)
468 return -ENODEV;
469 if (!driver || driver != dev->driver || !driver->unbind)
470 return -EINVAL;
471
472 spin_lock_irqsave(&dev->lock, flags);
473 dev->driver = 0;
474 stop_activity(dev, driver);
475 spin_unlock_irqrestore(&dev->lock, flags);
476
477 driver->unbind(&dev->gadget);
478 dev->gadget.dev.driver = NULL;
479 device_del(&dev->gadget.dev);
480
481 udc_disable(dev);
482
483 DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
484 return 0;
485}
486
487EXPORT_SYMBOL(usb_gadget_unregister_driver);
488
489/*-------------------------------------------------------------------------*/
490
491/** Write request to FIFO (max write == maxp size)
492 * Return: 0 = still running, 1 = completed, negative = errno
493 * NOTE: INDEX register must be set for EP
494 */
495static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
496{
497 u32 max;
498 u32 csr;
499
500 max = le16_to_cpu(ep->desc->wMaxPacketSize);
501
502 csr = usb_read(ep->csr1);
503 DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
504
505 if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
506 unsigned count;
507 int is_last, is_short;
508
509 count = write_packet(ep, req, max);
510 usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
511
512 /* last packet is usually short (or a zlp) */
513 if (unlikely(count != max))
514 is_last = is_short = 1;
515 else {
516 if (likely(req->req.length != req->req.actual)
517 || req->req.zero)
518 is_last = 0;
519 else
520 is_last = 1;
521 /* interrupt/iso maxpacket may not fill the fifo */
522 is_short = unlikely(max < ep_maxpacket(ep));
523 }
524
525 DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __func__,
526 ep->ep.name, count,
527 is_last ? "/L" : "", is_short ? "/S" : "",
528 req->req.length - req->req.actual, req);
529
530 /* requests complete when all IN data is in the FIFO */
531 if (is_last) {
532 done(ep, req, 0);
533 if (list_empty(&ep->queue)) {
534 pio_irq_disable(ep_index(ep));
535 }
536 return 1;
537 }
538 } else {
539 DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
540 }
541
542 return 0;
543}
544
545/** Read to request from FIFO (max read == bytes in fifo)
546 * Return: 0 = still running, 1 = completed, negative = errno
547 * NOTE: INDEX register must be set for EP
548 */
549static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
550{
551 u32 csr;
552 u8 *buf;
553 unsigned bufferspace, count, is_short;
554 volatile u32 *fifo = (volatile u32 *)ep->fifo;
555
556 /* make sure there's a packet in the FIFO. */
557 csr = usb_read(ep->csr1);
558 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
559 DEBUG("%s: Packet NOT ready!\n", __func__);
560 return -EINVAL;
561 }
562
563 buf = req->req.buf + req->req.actual;
564 prefetchw(buf);
565 bufferspace = req->req.length - req->req.actual;
566
567 /* read all bytes from this packet */
568 count = usb_read(USB_OUT_FIFO_WC1);
569 req->req.actual += min(count, bufferspace);
570
571 is_short = (count < ep->ep.maxpacket);
572 DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
573 ep->ep.name, csr, count,
574 is_short ? "/S" : "", req, req->req.actual, req->req.length);
575
576 while (likely(count-- != 0)) {
577 u8 byte = (u8) (*fifo & 0xff);
578
579 if (unlikely(bufferspace == 0)) {
580 /* this happens when the driver's buffer
581 * is smaller than what the host sent.
582 * discard the extra data.
583 */
584 if (req->req.status != -EOVERFLOW)
585 printk(KERN_WARNING "%s overflow %d\n",
586 ep->ep.name, count);
587 req->req.status = -EOVERFLOW;
588 } else {
589 *buf++ = byte;
590 bufferspace--;
591 }
592 }
593
594 usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
595
596 /* completion */
597 if (is_short || req->req.actual == req->req.length) {
598 done(ep, req, 0);
599 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
600
601 if (list_empty(&ep->queue))
602 pio_irq_disable(ep_index(ep));
603 return 1;
604 }
605
606 /* finished that packet. the next one may be waiting... */
607 return 0;
608}
609
610/*
611 * done - retire a request; caller blocked irqs
612 * INDEX register is preserved to keep same
613 */
614static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
615{
616 unsigned int stopped = ep->stopped;
617 u32 index;
618
619 DEBUG("%s, %p\n", __func__, ep);
620 list_del_init(&req->queue);
621
622 if (likely(req->req.status == -EINPROGRESS))
623 req->req.status = status;
624 else
625 status = req->req.status;
626
627 if (status && status != -ESHUTDOWN)
628 DEBUG("complete %s req %p stat %d len %u/%u\n",
629 ep->ep.name, &req->req, status,
630 req->req.actual, req->req.length);
631
632 /* don't modify queue heads during completion callback */
633 ep->stopped = 1;
634 /* Read current index (completion may modify it) */
635 index = usb_read(USB_INDEX);
636
637 spin_unlock(&ep->dev->lock);
638 req->req.complete(&ep->ep, &req->req);
639 spin_lock(&ep->dev->lock);
640
641 /* Restore index */
642 usb_set_index(index);
643 ep->stopped = stopped;
644}
645
646/** Enable EP interrupt */
647static void pio_irq_enable(int ep)
648{
649 DEBUG("%s: %d\n", __func__, ep);
650
651 switch (ep) {
652 case 1:
653 usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
654 break;
655 case 2:
656 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
657 break;
658 case 3:
659 usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
660 break;
661 default:
662 DEBUG("Unknown endpoint: %d\n", ep);
663 break;
664 }
665}
666
667/** Disable EP interrupt */
668static void pio_irq_disable(int ep)
669{
670 DEBUG("%s: %d\n", __func__, ep);
671
672 switch (ep) {
673 case 1:
674 usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
675 break;
676 case 2:
677 usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
678 break;
679 case 3:
680 usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
681 break;
682 default:
683 DEBUG("Unknown endpoint: %d\n", ep);
684 break;
685 }
686}
687
688/*
689 * nuke - dequeue ALL requests
690 */
691void nuke(struct lh7a40x_ep *ep, int status)
692{
693 struct lh7a40x_request *req;
694
695 DEBUG("%s, %p\n", __func__, ep);
696
697 /* Flush FIFO */
698 flush(ep);
699
700 /* called with irqs blocked */
701 while (!list_empty(&ep->queue)) {
702 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
703 done(ep, req, status);
704 }
705
706 /* Disable IRQ if EP is enabled (has descriptor) */
707 if (ep->desc)
708 pio_irq_disable(ep_index(ep));
709}
710
711/*
712void nuke_all(struct lh7a40x_udc *dev)
713{
714 int n;
715 for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
716 struct lh7a40x_ep *ep = &dev->ep[n];
717 usb_set_index(n);
718 nuke(ep, 0);
719 }
720}*/
721
722/*
723static void flush_all(struct lh7a40x_udc *dev)
724{
725 int n;
726 for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
727 {
728 struct lh7a40x_ep *ep = &dev->ep[n];
729 flush(ep);
730 }
731}
732*/
733
734/** Flush EP
735 * NOTE: INDEX register must be set before this call
736 */
737static void flush(struct lh7a40x_ep *ep)
738{
739 DEBUG("%s, %p\n", __func__, ep);
740
741 switch (ep->ep_type) {
742 case ep_control:
743 /* check, by implication c.f. 15.1.2.11 */
744 break;
745
746 case ep_bulk_in:
747 case ep_interrupt:
748 /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
749 usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
750 break;
751
752 case ep_bulk_out:
753 /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
754 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
755 break;
756 }
757}
758
759/**
760 * lh7a40x_in_epn - handle IN interrupt
761 */
762static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
763{
764 u32 csr;
765 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
766 struct lh7a40x_request *req;
767
768 usb_set_index(ep_idx);
769
770 csr = usb_read(ep->csr1);
771 DEBUG("%s: %d, csr %x\n", __func__, ep_idx, csr);
772
773 if (csr & USB_IN_CSR1_SENT_STALL) {
774 DEBUG("USB_IN_CSR1_SENT_STALL\n");
775 usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
776 ep->csr1);
777 return;
778 }
779
780 if (!ep->desc) {
781 DEBUG("%s: NO EP DESC\n", __func__);
782 return;
783 }
784
785 if (list_empty(&ep->queue))
786 req = 0;
787 else
788 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
789
790 DEBUG("req: %p\n", req);
791
792 if (!req)
793 return;
794
795 write_fifo(ep, req);
796}
797
798/* ********************************************************************************************* */
799/* Bulk OUT (recv)
800 */
801
802static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
803{
804 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
805 struct lh7a40x_request *req;
806
807 DEBUG("%s: %d\n", __func__, ep_idx);
808
809 usb_set_index(ep_idx);
810
811 if (ep->desc) {
812 u32 csr;
813 csr = usb_read(ep->csr1);
814
815 while ((csr =
816 usb_read(ep->
817 csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
818 USB_OUT_CSR1_SENT_STALL)) {
819 DEBUG("%s: %x\n", __func__, csr);
820
821 if (csr & USB_OUT_CSR1_SENT_STALL) {
822 DEBUG("%s: stall sent, flush fifo\n",
823 __func__);
824 /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
825 flush(ep);
826 } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
827 if (list_empty(&ep->queue))
828 req = 0;
829 else
830 req =
831 list_entry(ep->queue.next,
832 struct lh7a40x_request,
833 queue);
834
835 if (!req) {
836 printk(KERN_WARNING
837 "%s: NULL REQ %d\n",
838 __func__, ep_idx);
839 flush(ep);
840 break;
841 } else {
842 read_fifo(ep, req);
843 }
844 }
845
846 }
847
848 } else {
849 /* Throw packet away.. */
850 printk(KERN_WARNING "%s: No descriptor?!?\n", __func__);
851 flush(ep);
852 }
853}
854
855static void stop_activity(struct lh7a40x_udc *dev,
856 struct usb_gadget_driver *driver)
857{
858 int i;
859
860 /* don't disconnect drivers more than once */
861 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
862 driver = 0;
863 dev->gadget.speed = USB_SPEED_UNKNOWN;
864
865 /* prevent new request submissions, kill any outstanding requests */
866 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
867 struct lh7a40x_ep *ep = &dev->ep[i];
868 ep->stopped = 1;
869
870 usb_set_index(i);
871 nuke(ep, -ESHUTDOWN);
872 }
873
874 /* report disconnect; the driver is already quiesced */
875 if (driver) {
876 spin_unlock(&dev->lock);
877 driver->disconnect(&dev->gadget);
878 spin_lock(&dev->lock);
879 }
880
881 /* re-init driver-visible data structures */
882 udc_reinit(dev);
883}
884
885/** Handle USB RESET interrupt
886 */
887static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
888{
889#if 0 /* def CONFIG_ARCH_LH7A404 */
890 /* Does not work always... */
891
892 DEBUG("%s: %d\n", __func__, dev->usb_address);
893
894 if (!dev->usb_address) {
895 /*usb_set(USB_RESET_IO, USB_RESET);
896 mdelay(5);
897 usb_clear(USB_RESET_IO, USB_RESET); */
898 return;
899 }
900 /* Put the USB controller into reset. */
901 usb_set(USB_RESET_IO, USB_RESET);
902
903 /* Set Device ID to 0 */
904 udc_set_address(dev, 0);
905
906 /* Let PLL2 settle down */
907 mdelay(5);
908
909 /* Release the USB controller from reset */
910 usb_clear(USB_RESET_IO, USB_RESET);
911
912 /* Re-enable UDC */
913 udc_enable(dev);
914
915#endif
916 dev->gadget.speed = USB_SPEED_FULL;
917}
918
919/*
920 * lh7a40x usb client interrupt handler.
921 */
922static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
923{
924 struct lh7a40x_udc *dev = _dev;
925
926 DEBUG("\n\n");
927
928 spin_lock(&dev->lock);
929
930 for (;;) {
931 u32 intr_in = usb_read(USB_IN_INT);
932 u32 intr_out = usb_read(USB_OUT_INT);
933 u32 intr_int = usb_read(USB_INT);
934
935 /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
936 u32 in_en = usb_read(USB_IN_INT_EN);
937 u32 out_en = usb_read(USB_OUT_INT_EN);
938
939 if (!intr_out && !intr_in && !intr_int)
940 break;
941
942 DEBUG("%s (on state %s)\n", __func__,
943 state_names[dev->ep0state]);
944 DEBUG("intr_out = %x\n", intr_out);
945 DEBUG("intr_in = %x\n", intr_in);
946 DEBUG("intr_int = %x\n", intr_int);
947
948 if (intr_in) {
949 usb_write(intr_in, USB_IN_INT);
950
951 if ((intr_in & USB_IN_INT_EP1)
952 && (in_en & USB_IN_INT_EP1)) {
953 DEBUG("USB_IN_INT_EP1\n");
954 lh7a40x_in_epn(dev, 1, intr_in);
955 }
956 if ((intr_in & USB_IN_INT_EP3)
957 && (in_en & USB_IN_INT_EP3)) {
958 DEBUG("USB_IN_INT_EP3\n");
959 lh7a40x_in_epn(dev, 3, intr_in);
960 }
961 if (intr_in & USB_IN_INT_EP0) {
962 DEBUG("USB_IN_INT_EP0 (control)\n");
963 lh7a40x_handle_ep0(dev, intr_in);
964 }
965 }
966
967 if (intr_out) {
968 usb_write(intr_out, USB_OUT_INT);
969
970 if ((intr_out & USB_OUT_INT_EP2)
971 && (out_en & USB_OUT_INT_EP2)) {
972 DEBUG("USB_OUT_INT_EP2\n");
973 lh7a40x_out_epn(dev, 2, intr_out);
974 }
975 }
976
977 if (intr_int) {
978 usb_write(intr_int, USB_INT);
979
980 if (intr_int & USB_INT_RESET_INT) {
981 lh7a40x_reset_intr(dev);
982 }
983
984 if (intr_int & USB_INT_RESUME_INT) {
985 DEBUG("USB resume\n");
986
987 if (dev->gadget.speed != USB_SPEED_UNKNOWN
988 && dev->driver
989 && dev->driver->resume
990 && is_usb_connected()) {
991 dev->driver->resume(&dev->gadget);
992 }
993 }
994
995 if (intr_int & USB_INT_SUSPEND_INT) {
996 DEBUG("USB suspend%s\n",
997 is_usb_connected()? "" : "+disconnect");
998 if (!is_usb_connected()) {
999 stop_activity(dev, dev->driver);
1000 } else if (dev->gadget.speed !=
1001 USB_SPEED_UNKNOWN && dev->driver
1002 && dev->driver->suspend) {
1003 dev->driver->suspend(&dev->gadget);
1004 }
1005 }
1006
1007 }
1008 }
1009
1010 spin_unlock(&dev->lock);
1011
1012 return IRQ_HANDLED;
1013}
1014
1015static int lh7a40x_ep_enable(struct usb_ep *_ep,
1016 const struct usb_endpoint_descriptor *desc)
1017{
1018 struct lh7a40x_ep *ep;
1019 struct lh7a40x_udc *dev;
1020 unsigned long flags;
1021
1022 DEBUG("%s, %p\n", __func__, _ep);
1023
1024 ep = container_of(_ep, struct lh7a40x_ep, ep);
1025 if (!_ep || !desc || ep->desc || _ep->name == ep0name
1026 || desc->bDescriptorType != USB_DT_ENDPOINT
1027 || ep->bEndpointAddress != desc->bEndpointAddress
1028 || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
1029 DEBUG("%s, bad ep or descriptor\n", __func__);
1030 return -EINVAL;
1031 }
1032
1033 /* xfer types must match, except that interrupt ~= bulk */
1034 if (ep->bmAttributes != desc->bmAttributes
1035 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
1036 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
1037 DEBUG("%s, %s type mismatch\n", __func__, _ep->name);
1038 return -EINVAL;
1039 }
1040
1041 /* hardware _could_ do smaller, but driver doesn't */
1042 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
1043 && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
1044 || !desc->wMaxPacketSize) {
1045 DEBUG("%s, bad %s maxpacket\n", __func__, _ep->name);
1046 return -ERANGE;
1047 }
1048
1049 dev = ep->dev;
1050 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
1051 DEBUG("%s, bogus device state\n", __func__);
1052 return -ESHUTDOWN;
1053 }
1054
1055 spin_lock_irqsave(&ep->dev->lock, flags);
1056
1057 ep->stopped = 0;
1058 ep->desc = desc;
1059 ep->pio_irqs = 0;
1060 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
1061
1062 spin_unlock_irqrestore(&ep->dev->lock, flags);
1063
1064 /* Reset halt state (does flush) */
1065 lh7a40x_set_halt(_ep, 0);
1066
1067 DEBUG("%s: enabled %s\n", __func__, _ep->name);
1068 return 0;
1069}
1070
1071/** Disable EP
1072 * NOTE: Sets INDEX register
1073 */
1074static int lh7a40x_ep_disable(struct usb_ep *_ep)
1075{
1076 struct lh7a40x_ep *ep;
1077 unsigned long flags;
1078
1079 DEBUG("%s, %p\n", __func__, _ep);
1080
1081 ep = container_of(_ep, struct lh7a40x_ep, ep);
1082 if (!_ep || !ep->desc) {
1083 DEBUG("%s, %s not enabled\n", __func__,
1084 _ep ? ep->ep.name : NULL);
1085 return -EINVAL;
1086 }
1087
1088 spin_lock_irqsave(&ep->dev->lock, flags);
1089
1090 usb_set_index(ep_index(ep));
1091
1092 /* Nuke all pending requests (does flush) */
1093 nuke(ep, -ESHUTDOWN);
1094
1095 /* Disable ep IRQ */
1096 pio_irq_disable(ep_index(ep));
1097
1098 ep->desc = 0;
1099 ep->stopped = 1;
1100
1101 spin_unlock_irqrestore(&ep->dev->lock, flags);
1102
1103 DEBUG("%s: disabled %s\n", __func__, _ep->name);
1104 return 0;
1105}
1106
1107static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
1108 gfp_t gfp_flags)
1109{
1110 struct lh7a40x_request *req;
1111
1112 DEBUG("%s, %p\n", __func__, ep);
1113
1114 req = kzalloc(sizeof(*req), gfp_flags);
1115 if (!req)
1116 return 0;
1117
1118 INIT_LIST_HEAD(&req->queue);
1119
1120 return &req->req;
1121}
1122
1123static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
1124{
1125 struct lh7a40x_request *req;
1126
1127 DEBUG("%s, %p\n", __func__, ep);
1128
1129 req = container_of(_req, struct lh7a40x_request, req);
1130 WARN_ON(!list_empty(&req->queue));
1131 kfree(req);
1132}
1133
1134/** Queue one request
1135 * Kickstart transfer if needed
1136 * NOTE: Sets INDEX register
1137 */
1138static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
1139 gfp_t gfp_flags)
1140{
1141 struct lh7a40x_request *req;
1142 struct lh7a40x_ep *ep;
1143 struct lh7a40x_udc *dev;
1144 unsigned long flags;
1145
1146 DEBUG("\n\n\n%s, %p\n", __func__, _ep);
1147
1148 req = container_of(_req, struct lh7a40x_request, req);
1149 if (unlikely
1150 (!_req || !_req->complete || !_req->buf
1151 || !list_empty(&req->queue))) {
1152 DEBUG("%s, bad params\n", __func__);
1153 return -EINVAL;
1154 }
1155
1156 ep = container_of(_ep, struct lh7a40x_ep, ep);
1157 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1158 DEBUG("%s, bad ep\n", __func__);
1159 return -EINVAL;
1160 }
1161
1162 dev = ep->dev;
1163 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1164 DEBUG("%s, bogus device state %p\n", __func__, dev->driver);
1165 return -ESHUTDOWN;
1166 }
1167
1168 DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
1169 _req->buf);
1170
1171 spin_lock_irqsave(&dev->lock, flags);
1172
1173 _req->status = -EINPROGRESS;
1174 _req->actual = 0;
1175
1176 /* kickstart this i/o queue? */
1177 DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
1178 ep->stopped);
1179 if (list_empty(&ep->queue) && likely(!ep->stopped)) {
1180 u32 csr;
1181
1182 if (unlikely(ep_index(ep) == 0)) {
1183 /* EP0 */
1184 list_add_tail(&req->queue, &ep->queue);
1185 lh7a40x_ep0_kick(dev, ep);
1186 req = 0;
1187 } else if (ep_is_in(ep)) {
1188 /* EP1 & EP3 */
1189 usb_set_index(ep_index(ep));
1190 csr = usb_read(ep->csr1);
1191 pio_irq_enable(ep_index(ep));
1192 if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
1193 if (write_fifo(ep, req) == 1)
1194 req = 0;
1195 }
1196 } else {
1197 /* EP2 */
1198 usb_set_index(ep_index(ep));
1199 csr = usb_read(ep->csr1);
1200 pio_irq_enable(ep_index(ep));
1201 if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
1202 if (read_fifo(ep, req) == 1)
1203 req = 0;
1204 }
1205 }
1206 }
1207
1208 /* pio or dma irq handler advances the queue. */
1209 if (likely(req != 0))
1210 list_add_tail(&req->queue, &ep->queue);
1211
1212 spin_unlock_irqrestore(&dev->lock, flags);
1213
1214 return 0;
1215}
1216
1217/* dequeue JUST ONE request */
1218static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1219{
1220 struct lh7a40x_ep *ep;
1221 struct lh7a40x_request *req;
1222 unsigned long flags;
1223
1224 DEBUG("%s, %p\n", __func__, _ep);
1225
1226 ep = container_of(_ep, struct lh7a40x_ep, ep);
1227 if (!_ep || ep->ep.name == ep0name)
1228 return -EINVAL;
1229
1230 spin_lock_irqsave(&ep->dev->lock, flags);
1231
1232 /* make sure it's actually queued on this endpoint */
1233 list_for_each_entry(req, &ep->queue, queue) {
1234 if (&req->req == _req)
1235 break;
1236 }
1237 if (&req->req != _req) {
1238 spin_unlock_irqrestore(&ep->dev->lock, flags);
1239 return -EINVAL;
1240 }
1241
1242 done(ep, req, -ECONNRESET);
1243
1244 spin_unlock_irqrestore(&ep->dev->lock, flags);
1245 return 0;
1246}
1247
1248/** Halt specific EP
1249 * Return 0 if success
1250 * NOTE: Sets INDEX register to EP !
1251 */
1252static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
1253{
1254 struct lh7a40x_ep *ep;
1255 unsigned long flags;
1256
1257 ep = container_of(_ep, struct lh7a40x_ep, ep);
1258 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1259 DEBUG("%s, bad ep\n", __func__);
1260 return -EINVAL;
1261 }
1262
1263 usb_set_index(ep_index(ep));
1264
1265 DEBUG("%s, ep %d, val %d\n", __func__, ep_index(ep), value);
1266
1267 spin_lock_irqsave(&ep->dev->lock, flags);
1268
1269 if (ep_index(ep) == 0) {
1270 /* EP0 */
1271 usb_set(EP0_SEND_STALL, ep->csr1);
1272 } else if (ep_is_in(ep)) {
1273 u32 csr = usb_read(ep->csr1);
1274 if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
1275 || !list_empty(&ep->queue))) {
1276 /*
1277 * Attempts to halt IN endpoints will fail (returning -EAGAIN)
1278 * if any transfer requests are still queued, or if the controller
1279 * FIFO still holds bytes that the host hasn't collected.
1280 */
1281 spin_unlock_irqrestore(&ep->dev->lock, flags);
1282 DEBUG
1283 ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
1284 (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
1285 !list_empty(&ep->queue));
1286 return -EAGAIN;
1287 }
1288 flush(ep);
1289 if (value)
1290 usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
1291 else {
1292 usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
1293 usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
1294 }
1295
1296 } else {
1297
1298 flush(ep);
1299 if (value)
1300 usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1301 else {
1302 usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1303 usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
1304 }
1305 }
1306
1307 if (value) {
1308 ep->stopped = 1;
1309 } else {
1310 ep->stopped = 0;
1311 }
1312
1313 spin_unlock_irqrestore(&ep->dev->lock, flags);
1314
1315 DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
1316
1317 return 0;
1318}
1319
1320/** Return bytes in EP FIFO
1321 * NOTE: Sets INDEX register to EP
1322 */
1323static int lh7a40x_fifo_status(struct usb_ep *_ep)
1324{
1325 u32 csr;
1326 int count = 0;
1327 struct lh7a40x_ep *ep;
1328
1329 ep = container_of(_ep, struct lh7a40x_ep, ep);
1330 if (!_ep) {
1331 DEBUG("%s, bad ep\n", __func__);
1332 return -ENODEV;
1333 }
1334
1335 DEBUG("%s, %d\n", __func__, ep_index(ep));
1336
1337 /* LPD can't report unclaimed bytes from IN fifos */
1338 if (ep_is_in(ep))
1339 return -EOPNOTSUPP;
1340
1341 usb_set_index(ep_index(ep));
1342
1343 csr = usb_read(ep->csr1);
1344 if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
1345 csr & USB_OUT_CSR1_OUT_PKT_RDY) {
1346 count = usb_read(USB_OUT_FIFO_WC1);
1347 }
1348
1349 return count;
1350}
1351
1352/** Flush EP FIFO
1353 * NOTE: Sets INDEX register to EP
1354 */
1355static void lh7a40x_fifo_flush(struct usb_ep *_ep)
1356{
1357 struct lh7a40x_ep *ep;
1358
1359 ep = container_of(_ep, struct lh7a40x_ep, ep);
1360 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1361 DEBUG("%s, bad ep\n", __func__);
1362 return;
1363 }
1364
1365 usb_set_index(ep_index(ep));
1366 flush(ep);
1367}
1368
1369/****************************************************************/
1370/* End Point 0 related functions */
1371/****************************************************************/
1372
1373/* return: 0 = still running, 1 = completed, negative = errno */
1374static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1375{
1376 u32 max;
1377 unsigned count;
1378 int is_last;
1379
1380 max = ep_maxpacket(ep);
1381
1382 DEBUG_EP0("%s\n", __func__);
1383
1384 count = write_packet(ep, req, max);
1385
1386 /* last packet is usually short (or a zlp) */
1387 if (unlikely(count != max))
1388 is_last = 1;
1389 else {
1390 if (likely(req->req.length != req->req.actual) || req->req.zero)
1391 is_last = 0;
1392 else
1393 is_last = 1;
1394 }
1395
1396 DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __func__,
1397 ep->ep.name, count,
1398 is_last ? "/L" : "", req->req.length - req->req.actual, req);
1399
1400 /* requests complete when all IN data is in the FIFO */
1401 if (is_last) {
1402 done(ep, req, 0);
1403 return 1;
1404 }
1405
1406 return 0;
1407}
1408
1409static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
1410 unsigned char *cp, int max)
1411{
1412 int bytes;
1413 int count = usb_read(USB_OUT_FIFO_WC1);
1414 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1415
1416 if (count > max)
1417 count = max;
1418 bytes = count;
1419 while (count--)
1420 *cp++ = *fifo & 0xFF;
1421 return bytes;
1422}
1423
1424static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
1425 unsigned char *cp, int count)
1426{
1427 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1428 DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
1429 while (count--)
1430 *fifo = *cp++;
1431}
1432
1433static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1434{
1435 u32 csr;
1436 u8 *buf;
1437 unsigned bufferspace, count, is_short;
1438 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1439
1440 DEBUG_EP0("%s\n", __func__);
1441
1442 csr = usb_read(USB_EP0_CSR);
1443 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
1444 return 0;
1445
1446 buf = req->req.buf + req->req.actual;
1447 prefetchw(buf);
1448 bufferspace = req->req.length - req->req.actual;
1449
1450 /* read all bytes from this packet */
1451 if (likely(csr & EP0_OUT_PKT_RDY)) {
1452 count = usb_read(USB_OUT_FIFO_WC1);
1453 req->req.actual += min(count, bufferspace);
1454 } else /* zlp */
1455 count = 0;
1456
1457 is_short = (count < ep->ep.maxpacket);
1458 DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
1459 ep->ep.name, csr, count,
1460 is_short ? "/S" : "", req, req->req.actual, req->req.length);
1461
1462 while (likely(count-- != 0)) {
1463 u8 byte = (u8) (*fifo & 0xff);
1464
1465 if (unlikely(bufferspace == 0)) {
1466 /* this happens when the driver's buffer
1467 * is smaller than what the host sent.
1468 * discard the extra data.
1469 */
1470 if (req->req.status != -EOVERFLOW)
1471 DEBUG_EP0("%s overflow %d\n", ep->ep.name,
1472 count);
1473 req->req.status = -EOVERFLOW;
1474 } else {
1475 *buf++ = byte;
1476 bufferspace--;
1477 }
1478 }
1479
1480 /* completion */
1481 if (is_short || req->req.actual == req->req.length) {
1482 done(ep, req, 0);
1483 return 1;
1484 }
1485
1486 /* finished that packet. the next one may be waiting... */
1487 return 0;
1488}
1489
1490/**
1491 * udc_set_address - set the USB address for this device
1492 * @address:
1493 *
1494 * Called from control endpoint function after it decodes a set address setup packet.
1495 */
1496static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
1497{
1498 DEBUG_EP0("%s: %d\n", __func__, address);
1499 /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
1500 dev->usb_address = address;
1501 usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
1502 usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
1503 /* usb_read(USB_FA); */
1504}
1505
1506/*
1507 * DATA_STATE_RECV (OUT_PKT_RDY)
1508 * - if error
1509 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1510 * - else
1511 * set EP0_CLR_OUT bit
1512 if last set EP0_DATA_END bit
1513 */
1514static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
1515{
1516 struct lh7a40x_request *req;
1517 struct lh7a40x_ep *ep = &dev->ep[0];
1518 int ret;
1519
1520 DEBUG_EP0("%s: %x\n", __func__, csr);
1521
1522 if (list_empty(&ep->queue))
1523 req = 0;
1524 else
1525 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1526
1527 if (req) {
1528
1529 if (req->req.length == 0) {
1530 DEBUG_EP0("ZERO LENGTH OUT!\n");
1531 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1532 dev->ep0state = WAIT_FOR_SETUP;
1533 return;
1534 }
1535 ret = read_fifo_ep0(ep, req);
1536 if (ret) {
1537 /* Done! */
1538 DEBUG_EP0("%s: finished, waiting for status\n",
1539 __func__);
1540
1541 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1542 dev->ep0state = WAIT_FOR_SETUP;
1543 } else {
1544 /* Not done yet.. */
1545 DEBUG_EP0("%s: not finished\n", __func__);
1546 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1547 }
1548 } else {
1549 DEBUG_EP0("NO REQ??!\n");
1550 }
1551}
1552
1553/*
1554 * DATA_STATE_XMIT
1555 */
1556static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
1557{
1558 struct lh7a40x_request *req;
1559 struct lh7a40x_ep *ep = &dev->ep[0];
1560 int ret, need_zlp = 0;
1561
1562 DEBUG_EP0("%s: %x\n", __func__, csr);
1563
1564 if (list_empty(&ep->queue))
1565 req = 0;
1566 else
1567 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1568
1569 if (!req) {
1570 DEBUG_EP0("%s: NULL REQ\n", __func__);
1571 return 0;
1572 }
1573
1574 if (req->req.length == 0) {
1575
1576 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1577 dev->ep0state = WAIT_FOR_SETUP;
1578 return 1;
1579 }
1580
1581 if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
1582 /* Next write will end with the packet size, */
1583 /* so we need Zero-length-packet */
1584 need_zlp = 1;
1585 }
1586
1587 ret = write_fifo_ep0(ep, req);
1588
1589 if (ret == 1 && !need_zlp) {
1590 /* Last packet */
1591 DEBUG_EP0("%s: finished, waiting for status\n", __func__);
1592
1593 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1594 dev->ep0state = WAIT_FOR_SETUP;
1595 } else {
1596 DEBUG_EP0("%s: not finished\n", __func__);
1597 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1598 }
1599
1600 if (need_zlp) {
1601 DEBUG_EP0("%s: Need ZLP!\n", __func__);
1602 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1603 dev->ep0state = DATA_STATE_NEED_ZLP;
1604 }
1605
1606 return 1;
1607}
1608
1609static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
1610 struct usb_ctrlrequest *ctrl)
1611{
1612 struct lh7a40x_ep *ep0 = &dev->ep[0];
1613 struct lh7a40x_ep *qep;
1614 int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
1615 u16 val = 0;
1616
1617 if (reqtype == USB_RECIP_INTERFACE) {
1618 /* This is not supported.
1619 * And according to the USB spec, this one does nothing..
1620 * Just return 0
1621 */
1622 DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
1623 } else if (reqtype == USB_RECIP_DEVICE) {
1624 DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
1625 val |= (1 << 0); /* Self powered */
1626 /*val |= (1<<1); *//* Remote wakeup */
1627 } else if (reqtype == USB_RECIP_ENDPOINT) {
1628 int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
1629
1630 DEBUG_SETUP
1631 ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
1632 ep_num, ctrl->wLength);
1633
1634 if (ctrl->wLength > 2 || ep_num > 3)
1635 return -EOPNOTSUPP;
1636
1637 qep = &dev->ep[ep_num];
1638 if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
1639 && ep_index(qep) != 0) {
1640 return -EOPNOTSUPP;
1641 }
1642
1643 usb_set_index(ep_index(qep));
1644
1645 /* Return status on next IN token */
1646 switch (qep->ep_type) {
1647 case ep_control:
1648 val =
1649 (usb_read(qep->csr1) & EP0_SEND_STALL) ==
1650 EP0_SEND_STALL;
1651 break;
1652 case ep_bulk_in:
1653 case ep_interrupt:
1654 val =
1655 (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
1656 USB_IN_CSR1_SEND_STALL;
1657 break;
1658 case ep_bulk_out:
1659 val =
1660 (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
1661 USB_OUT_CSR1_SEND_STALL;
1662 break;
1663 }
1664
1665 /* Back to EP0 index */
1666 usb_set_index(0);
1667
1668 DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
1669 ctrl->wIndex, val);
1670 } else {
1671 DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
1672 return -EOPNOTSUPP;
1673 }
1674
1675 /* Clear "out packet ready" */
1676 usb_set((EP0_CLR_OUT), USB_EP0_CSR);
1677 /* Put status to FIFO */
1678 lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
1679 /* Issue "In packet ready" */
1680 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1681
1682 return 0;
1683}
1684
1685/*
1686 * WAIT_FOR_SETUP (OUT_PKT_RDY)
1687 * - read data packet from EP0 FIFO
1688 * - decode command
1689 * - if error
1690 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1691 * - else
1692 * set EP0_CLR_OUT | EP0_DATA_END bits
1693 */
1694static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
1695{
1696 struct lh7a40x_ep *ep = &dev->ep[0];
1697 struct usb_ctrlrequest ctrl;
1698 int i, bytes, is_in;
1699
1700 DEBUG_SETUP("%s: %x\n", __func__, csr);
1701
1702 /* Nuke all previous transfers */
1703 nuke(ep, -EPROTO);
1704
1705 /* read control req from fifo (8 bytes) */
1706 bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
1707
1708 DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
1709 DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
1710 ctrl.bRequestType == USB_DIR_IN);
1711 DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
1712 DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
1713 DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
1714 DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
1715
1716 /* Set direction of EP0 */
1717 if (likely(ctrl.bRequestType & USB_DIR_IN)) {
1718 ep->bEndpointAddress |= USB_DIR_IN;
1719 is_in = 1;
1720 } else {
1721 ep->bEndpointAddress &= ~USB_DIR_IN;
1722 is_in = 0;
1723 }
1724
1725 dev->req_pending = 1;
1726
1727 /* Handle some SETUP packets ourselves */
1728 switch (ctrl.bRequest) {
1729 case USB_REQ_SET_ADDRESS:
1730 if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1731 break;
1732
1733 DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
1734 udc_set_address(dev, ctrl.wValue);
1735 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1736 return;
1737
1738 case USB_REQ_GET_STATUS:{
1739 if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
1740 return;
1741
1742 case USB_REQ_CLEAR_FEATURE:
1743 case USB_REQ_SET_FEATURE:
1744 if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
1745 struct lh7a40x_ep *qep;
1746 int ep_num = (ctrl.wIndex & 0x0f);
1747
1748 /* Support only HALT feature */
1749 if (ctrl.wValue != 0 || ctrl.wLength != 0
1750 || ep_num > 3 || ep_num < 1)
1751 break;
1752
1753 qep = &dev->ep[ep_num];
1754 spin_unlock(&dev->lock);
1755 if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
1756 DEBUG_SETUP("SET_FEATURE (%d)\n",
1757 ep_num);
1758 lh7a40x_set_halt(&qep->ep, 1);
1759 } else {
1760 DEBUG_SETUP("CLR_FEATURE (%d)\n",
1761 ep_num);
1762 lh7a40x_set_halt(&qep->ep, 0);
1763 }
1764 spin_lock(&dev->lock);
1765 usb_set_index(0);
1766
1767 /* Reply with a ZLP on next IN token */
1768 usb_set((EP0_CLR_OUT | EP0_DATA_END),
1769 USB_EP0_CSR);
1770 return;
1771 }
1772 break;
1773 }
1774
1775 default:
1776 break;
1777 }
1778
1779 if (likely(dev->driver)) {
1780 /* device-2-host (IN) or no data setup command, process immediately */
1781 spin_unlock(&dev->lock);
1782 i = dev->driver->setup(&dev->gadget, &ctrl);
1783 spin_lock(&dev->lock);
1784
1785 if (i < 0) {
1786 /* setup processing failed, force stall */
1787 DEBUG_SETUP
1788 (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
1789 i);
1790 usb_set_index(0);
1791 usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
1792 USB_EP0_CSR);
1793
1794 /* ep->stopped = 1; */
1795 dev->ep0state = WAIT_FOR_SETUP;
1796 }
1797 }
1798}
1799
1800/*
1801 * DATA_STATE_NEED_ZLP
1802 */
1803static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
1804{
1805 DEBUG_EP0("%s: %x\n", __func__, csr);
1806
1807 /* c.f. Table 15-14 */
1808 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1809 dev->ep0state = WAIT_FOR_SETUP;
1810}
1811
1812/*
1813 * handle ep0 interrupt
1814 */
1815static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
1816{
1817 struct lh7a40x_ep *ep = &dev->ep[0];
1818 u32 csr;
1819
1820 /* Set index 0 */
1821 usb_set_index(0);
1822 csr = usb_read(USB_EP0_CSR);
1823
1824 DEBUG_EP0("%s: csr = %x\n", __func__, csr);
1825
1826 /*
1827 * For overview of what we should be doing see c.f. Chapter 18.1.2.4
1828 * We will follow that outline here modified by our own global state
1829 * indication which provides hints as to what we think should be
1830 * happening..
1831 */
1832
1833 /*
1834 * if SENT_STALL is set
1835 * - clear the SENT_STALL bit
1836 */
1837 if (csr & EP0_SENT_STALL) {
1838 DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __func__, csr);
1839 usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
1840 nuke(ep, -ECONNABORTED);
1841 dev->ep0state = WAIT_FOR_SETUP;
1842 return;
1843 }
1844
1845 /*
1846 * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
1847 * - fill EP0 FIFO
1848 * - if last packet
1849 * - set IN_PKT_RDY | DATA_END
1850 * - else
1851 * set IN_PKT_RDY
1852 */
1853 if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
1854 DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
1855 __func__);
1856
1857 switch (dev->ep0state) {
1858 case DATA_STATE_XMIT:
1859 DEBUG_EP0("continue with DATA_STATE_XMIT\n");
1860 lh7a40x_ep0_in(dev, csr);
1861 return;
1862 case DATA_STATE_NEED_ZLP:
1863 DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
1864 lh7a40x_ep0_in_zlp(dev, csr);
1865 return;
1866 default:
1867 /* Stall? */
1868 DEBUG_EP0("Odd state!! state = %s\n",
1869 state_names[dev->ep0state]);
1870 dev->ep0state = WAIT_FOR_SETUP;
1871 /* nuke(ep, 0); */
1872 /* usb_set(EP0_SEND_STALL, ep->csr1); */
1873 break;
1874 }
1875 }
1876
1877 /*
1878 * if SETUP_END is set
1879 * - abort the last transfer
1880 * - set SERVICED_SETUP_END_BIT
1881 */
1882 if (csr & EP0_SETUP_END) {
1883 DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __func__, csr);
1884
1885 usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
1886
1887 nuke(ep, 0);
1888 dev->ep0state = WAIT_FOR_SETUP;
1889 }
1890
1891 /*
1892 * if EP0_OUT_PKT_RDY is set
1893 * - read data packet from EP0 FIFO
1894 * - decode command
1895 * - if error
1896 * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
1897 * - else
1898 * set SERVICED_OUT_PKT_RDY | DATA_END bits
1899 */
1900 if (csr & EP0_OUT_PKT_RDY) {
1901
1902 DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __func__,
1903 csr);
1904
1905 switch (dev->ep0state) {
1906 case WAIT_FOR_SETUP:
1907 DEBUG_EP0("WAIT_FOR_SETUP\n");
1908 lh7a40x_ep0_setup(dev, csr);
1909 break;
1910
1911 case DATA_STATE_RECV:
1912 DEBUG_EP0("DATA_STATE_RECV\n");
1913 lh7a40x_ep0_out(dev, csr);
1914 break;
1915
1916 default:
1917 /* send stall? */
1918 DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
1919 dev->ep0state);
1920 break;
1921 }
1922 }
1923}
1924
1925static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
1926{
1927 u32 csr;
1928
1929 usb_set_index(0);
1930 csr = usb_read(USB_EP0_CSR);
1931
1932 DEBUG_EP0("%s: %x\n", __func__, csr);
1933
1934 /* Clear "out packet ready" */
1935 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1936
1937 if (ep_is_in(ep)) {
1938 dev->ep0state = DATA_STATE_XMIT;
1939 lh7a40x_ep0_in(dev, csr);
1940 } else {
1941 dev->ep0state = DATA_STATE_RECV;
1942 lh7a40x_ep0_out(dev, csr);
1943 }
1944}
1945
1946/* ---------------------------------------------------------------------------
1947 * device-scoped parts of the api to the usb controller hardware
1948 * ---------------------------------------------------------------------------
1949 */
1950
1951static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
1952{
1953 u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
1954 u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
1955 DEBUG("%s, %p\n", __func__, _gadget);
1956 return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
1957}
1958
1959static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
1960{
1961 /* host may not have enabled remote wakeup */
1962 /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
1963 return -EHOSTUNREACH;
1964 udc_set_mask_UDCCR(UDCCR_RSM); */
1965 return -ENOTSUPP;
1966}
1967
1968static const struct usb_gadget_ops lh7a40x_udc_ops = {
1969 .get_frame = lh7a40x_udc_get_frame,
1970 .wakeup = lh7a40x_udc_wakeup,
1971 /* current versions must always be self-powered */
1972};
1973
1974static void nop_release(struct device *dev)
1975{
1976 DEBUG("%s %s\n", __func__, dev_name(dev));
1977}
1978
1979static struct lh7a40x_udc memory = {
1980 .usb_address = 0,
1981
1982 .gadget = {
1983 .ops = &lh7a40x_udc_ops,
1984 .ep0 = &memory.ep[0].ep,
1985 .name = driver_name,
1986 .dev = {
1987 .init_name = "gadget",
1988 .release = nop_release,
1989 },
1990 },
1991
1992 /* control endpoint */
1993 .ep[0] = {
1994 .ep = {
1995 .name = ep0name,
1996 .ops = &lh7a40x_ep_ops,
1997 .maxpacket = EP0_PACKETSIZE,
1998 },
1999 .dev = &memory,
2000
2001 .bEndpointAddress = 0,
2002 .bmAttributes = 0,
2003
2004 .ep_type = ep_control,
2005 .fifo = io_p2v(USB_EP0_FIFO),
2006 .csr1 = USB_EP0_CSR,
2007 .csr2 = USB_EP0_CSR,
2008 },
2009
2010 /* first group of endpoints */
2011 .ep[1] = {
2012 .ep = {
2013 .name = "ep1in-bulk",
2014 .ops = &lh7a40x_ep_ops,
2015 .maxpacket = 64,
2016 },
2017 .dev = &memory,
2018
2019 .bEndpointAddress = USB_DIR_IN | 1,
2020 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2021
2022 .ep_type = ep_bulk_in,
2023 .fifo = io_p2v(USB_EP1_FIFO),
2024 .csr1 = USB_IN_CSR1,
2025 .csr2 = USB_IN_CSR2,
2026 },
2027
2028 .ep[2] = {
2029 .ep = {
2030 .name = "ep2out-bulk",
2031 .ops = &lh7a40x_ep_ops,
2032 .maxpacket = 64,
2033 },
2034 .dev = &memory,
2035
2036 .bEndpointAddress = 2,
2037 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2038
2039 .ep_type = ep_bulk_out,
2040 .fifo = io_p2v(USB_EP2_FIFO),
2041 .csr1 = USB_OUT_CSR1,
2042 .csr2 = USB_OUT_CSR2,
2043 },
2044
2045 .ep[3] = {
2046 .ep = {
2047 .name = "ep3in-int",
2048 .ops = &lh7a40x_ep_ops,
2049 .maxpacket = 64,
2050 },
2051 .dev = &memory,
2052
2053 .bEndpointAddress = USB_DIR_IN | 3,
2054 .bmAttributes = USB_ENDPOINT_XFER_INT,
2055
2056 .ep_type = ep_interrupt,
2057 .fifo = io_p2v(USB_EP3_FIFO),
2058 .csr1 = USB_IN_CSR1,
2059 .csr2 = USB_IN_CSR2,
2060 },
2061};
2062
2063/*
2064 * probe - binds to the platform device
2065 */
2066static int lh7a40x_udc_probe(struct platform_device *pdev)
2067{
2068 struct lh7a40x_udc *dev = &memory;
2069 int retval;
2070
2071 DEBUG("%s: %p\n", __func__, pdev);
2072
2073 spin_lock_init(&dev->lock);
2074 dev->dev = &pdev->dev;
2075
2076 device_initialize(&dev->gadget.dev);
2077 dev->gadget.dev.parent = &pdev->dev;
2078
2079 the_controller = dev;
2080 platform_set_drvdata(pdev, dev);
2081
2082 udc_disable(dev);
2083 udc_reinit(dev);
2084
2085 /* irq setup after old hardware state is cleaned up */
2086 retval =
2087 request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
2088 dev);
2089 if (retval != 0) {
2090 DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
2091 IRQ_USBINTR, retval);
2092 return -EBUSY;
2093 }
2094
2095 create_proc_files();
2096
2097 return retval;
2098}
2099
2100static int lh7a40x_udc_remove(struct platform_device *pdev)
2101{
2102 struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
2103
2104 DEBUG("%s: %p\n", __func__, pdev);
2105
2106 if (dev->driver)
2107 return -EBUSY;
2108
2109 udc_disable(dev);
2110 remove_proc_files();
2111
2112 free_irq(IRQ_USBINTR, dev);
2113
2114 platform_set_drvdata(pdev, 0);
2115
2116 the_controller = 0;
2117
2118 return 0;
2119}
2120
2121/*-------------------------------------------------------------------------*/
2122
2123static struct platform_driver udc_driver = {
2124 .probe = lh7a40x_udc_probe,
2125 .remove = lh7a40x_udc_remove,
2126 /* FIXME power management support */
2127 /* .suspend = ... disable UDC */
2128 /* .resume = ... re-enable UDC */
2129 .driver = {
2130 .name = (char *)driver_name,
2131 .owner = THIS_MODULE,
2132 },
2133};
2134
2135static int __init udc_init(void)
2136{
2137 DEBUG("%s: %s version %s\n", __func__, driver_name, DRIVER_VERSION);
2138 return platform_driver_register(&udc_driver);
2139}
2140
2141static void __exit udc_exit(void)
2142{
2143 platform_driver_unregister(&udc_driver);
2144}
2145
2146module_init(udc_init);
2147module_exit(udc_exit);
2148
2149MODULE_DESCRIPTION(DRIVER_DESC);
2150MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
2151MODULE_LICENSE("GPL");
2152MODULE_ALIAS("platform:lh7a40x_udc");
diff --git a/drivers/usb/gadget/lh7a40x_udc.h b/drivers/usb/gadget/lh7a40x_udc.h
deleted file mode 100644
index ca861203a301..000000000000
--- a/drivers/usb/gadget/lh7a40x_udc.h
+++ /dev/null
@@ -1,259 +0,0 @@
1/*
2 * linux/drivers/usb/gadget/lh7a40x_udc.h
3 * Sharp LH7A40x on-chip full speed USB device controllers
4 *
5 * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
6 * Copyright (C) 2004 Bo Henriksen, Nordic ID
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#ifndef __LH7A40X_H_
25#define __LH7A40X_H_
26
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/ioport.h>
30#include <linux/types.h>
31#include <linux/errno.h>
32#include <linux/delay.h>
33#include <linux/sched.h>
34#include <linux/slab.h>
35#include <linux/init.h>
36#include <linux/timer.h>
37#include <linux/list.h>
38#include <linux/interrupt.h>
39#include <linux/proc_fs.h>
40#include <linux/mm.h>
41#include <linux/device.h>
42#include <linux/dma-mapping.h>
43
44#include <asm/byteorder.h>
45#include <asm/dma.h>
46#include <asm/io.h>
47#include <asm/irq.h>
48#include <asm/system.h>
49#include <asm/unaligned.h>
50#include <mach/hardware.h>
51
52#include <linux/usb/ch9.h>
53#include <linux/usb/gadget.h>
54
55/*
56 * Memory map
57 */
58
59#define USB_FA 0x80000200 // function address register
60#define USB_PM 0x80000204 // power management register
61
62#define USB_IN_INT 0x80000208 // IN interrupt register bank (EP0-EP3)
63#define USB_OUT_INT 0x80000210 // OUT interrupt register bank (EP2)
64#define USB_INT 0x80000218 // interrupt register bank
65
66#define USB_IN_INT_EN 0x8000021C // IN interrupt enable register bank
67#define USB_OUT_INT_EN 0x80000224 // OUT interrupt enable register bank
68#define USB_INT_EN 0x8000022C // USB interrupt enable register bank
69
70#define USB_FRM_NUM1 0x80000230 // Frame number1 register
71#define USB_FRM_NUM2 0x80000234 // Frame number2 register
72#define USB_INDEX 0x80000238 // index register
73
74#define USB_IN_MAXP 0x80000240 // IN MAXP register
75#define USB_IN_CSR1 0x80000244 // IN CSR1 register/EP0 CSR register
76#define USB_EP0_CSR 0x80000244 // IN CSR1 register/EP0 CSR register
77#define USB_IN_CSR2 0x80000248 // IN CSR2 register
78#define USB_OUT_MAXP 0x8000024C // OUT MAXP register
79
80#define USB_OUT_CSR1 0x80000250 // OUT CSR1 register
81#define USB_OUT_CSR2 0x80000254 // OUT CSR2 register
82#define USB_OUT_FIFO_WC1 0x80000258 // OUT FIFO write count1 register
83#define USB_OUT_FIFO_WC2 0x8000025C // OUT FIFO write count2 register
84
85#define USB_RESET 0x8000044C // USB reset register
86
87#define USB_EP0_FIFO 0x80000280
88#define USB_EP1_FIFO 0x80000284
89#define USB_EP2_FIFO 0x80000288
90#define USB_EP3_FIFO 0x8000028c
91
92/*
93 * USB reset register
94 */
95#define USB_RESET_APB (1<<1) //resets USB APB control side WRITE
96#define USB_RESET_IO (1<<0) //resets USB IO side WRITE
97
98/*
99 * USB function address register
100 */
101#define USB_FA_ADDR_UPDATE (1<<7)
102#define USB_FA_FUNCTION_ADDR (0x7F)
103
104/*
105 * Power Management register
106 */
107#define PM_USB_DCP (1<<5)
108#define PM_USB_ENABLE (1<<4)
109#define PM_USB_RESET (1<<3)
110#define PM_UC_RESUME (1<<2)
111#define PM_SUSPEND_MODE (1<<1)
112#define PM_ENABLE_SUSPEND (1<<0)
113
114/*
115 * IN interrupt register
116 */
117#define USB_IN_INT_EP3 (1<<3)
118#define USB_IN_INT_EP1 (1<<1)
119#define USB_IN_INT_EP0 (1<<0)
120
121/*
122 * OUT interrupt register
123 */
124#define USB_OUT_INT_EP2 (1<<2)
125
126/*
127 * USB interrupt register
128 */
129#define USB_INT_RESET_INT (1<<2)
130#define USB_INT_RESUME_INT (1<<1)
131#define USB_INT_SUSPEND_INT (1<<0)
132
133/*
134 * USB interrupt enable register
135 */
136#define USB_INT_EN_USB_RESET_INTER (1<<2)
137#define USB_INT_EN_RESUME_INTER (1<<1)
138#define USB_INT_EN_SUSPEND_INTER (1<<0)
139
140/*
141 * INCSR1 register
142 */
143#define USB_IN_CSR1_CLR_DATA_TOGGLE (1<<6)
144#define USB_IN_CSR1_SENT_STALL (1<<5)
145#define USB_IN_CSR1_SEND_STALL (1<<4)
146#define USB_IN_CSR1_FIFO_FLUSH (1<<3)
147#define USB_IN_CSR1_FIFO_NOT_EMPTY (1<<1)
148#define USB_IN_CSR1_IN_PKT_RDY (1<<0)
149
150/*
151 * INCSR2 register
152 */
153#define USB_IN_CSR2_AUTO_SET (1<<7)
154#define USB_IN_CSR2_USB_DMA_EN (1<<4)
155
156/*
157 * OUT CSR1 register
158 */
159#define USB_OUT_CSR1_CLR_DATA_REG (1<<7)
160#define USB_OUT_CSR1_SENT_STALL (1<<6)
161#define USB_OUT_CSR1_SEND_STALL (1<<5)
162#define USB_OUT_CSR1_FIFO_FLUSH (1<<4)
163#define USB_OUT_CSR1_FIFO_FULL (1<<1)
164#define USB_OUT_CSR1_OUT_PKT_RDY (1<<0)
165
166/*
167 * OUT CSR2 register
168 */
169#define USB_OUT_CSR2_AUTO_CLR (1<<7)
170#define USB_OUT_CSR2_USB_DMA_EN (1<<4)
171
172/*
173 * EP0 CSR
174 */
175#define EP0_CLR_SETUP_END (1<<7) /* Clear "Setup Ends" Bit (w) */
176#define EP0_CLR_OUT (1<<6) /* Clear "Out packet ready" Bit (w) */
177#define EP0_SEND_STALL (1<<5) /* Send STALL Handshake (rw) */
178#define EP0_SETUP_END (1<<4) /* Setup Ends (r) */
179
180#define EP0_DATA_END (1<<3) /* Data end (rw) */
181#define EP0_SENT_STALL (1<<2) /* Sent Stall Handshake (r) */
182#define EP0_IN_PKT_RDY (1<<1) /* In packet ready (rw) */
183#define EP0_OUT_PKT_RDY (1<<0) /* Out packet ready (r) */
184
185/* general CSR */
186#define OUT_PKT_RDY (1<<0)
187#define IN_PKT_RDY (1<<0)
188
189/*
190 * IN/OUT MAXP register
191 */
192#define USB_OUT_MAXP_MAXP (0xF)
193#define USB_IN_MAXP_MAXP (0xF)
194
195// Max packet size
196//#define EP0_PACKETSIZE 0x10
197#define EP0_PACKETSIZE 0x8
198#define EP0_MAXPACKETSIZE 0x10
199
200#define UDC_MAX_ENDPOINTS 4
201
202#define WAIT_FOR_SETUP 0
203#define DATA_STATE_XMIT 1
204#define DATA_STATE_NEED_ZLP 2
205#define WAIT_FOR_OUT_STATUS 3
206#define DATA_STATE_RECV 4
207
208/* ********************************************************************************************* */
209/* IO
210 */
211
212typedef enum ep_type {
213 ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
214} ep_type_t;
215
216struct lh7a40x_ep {
217 struct usb_ep ep;
218 struct lh7a40x_udc *dev;
219
220 const struct usb_endpoint_descriptor *desc;
221 struct list_head queue;
222 unsigned long pio_irqs;
223
224 u8 stopped;
225 u8 bEndpointAddress;
226 u8 bmAttributes;
227
228 ep_type_t ep_type;
229 u32 fifo;
230 u32 csr1;
231 u32 csr2;
232};
233
234struct lh7a40x_request {
235 struct usb_request req;
236 struct list_head queue;
237};
238
239struct lh7a40x_udc {
240 struct usb_gadget gadget;
241 struct usb_gadget_driver *driver;
242 struct device *dev;
243 spinlock_t lock;
244
245 int ep0state;
246 struct lh7a40x_ep ep[UDC_MAX_ENDPOINTS];
247
248 unsigned char usb_address;
249
250 unsigned req_pending:1, req_std:1, req_config:1;
251};
252
253extern struct lh7a40x_udc *the_controller;
254
255#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN)==USB_DIR_IN)
256#define ep_index(EP) ((EP)->bEndpointAddress&0xF)
257#define ep_maxpacket(EP) ((EP)->ep.maxpacket)
258
259#endif
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c
index 51b19f3027e7..084aa080a2d5 100644
--- a/drivers/usb/gadget/m66592-udc.c
+++ b/drivers/usb/gadget/m66592-udc.c
@@ -258,7 +258,7 @@ static int pipe_buffer_setting(struct m66592 *m66592,
258 break; 258 break;
259 case M66592_BULK: 259 case M66592_BULK:
260 /* isochronous pipes may be used as bulk pipes */ 260 /* isochronous pipes may be used as bulk pipes */
261 if (info->pipe > M66592_BASE_PIPENUM_BULK) 261 if (info->pipe >= M66592_BASE_PIPENUM_BULK)
262 bufnum = info->pipe - M66592_BASE_PIPENUM_BULK; 262 bufnum = info->pipe - M66592_BASE_PIPENUM_BULK;
263 else 263 else
264 bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC; 264 bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC;
diff --git a/drivers/usb/gadget/pch_udc.c b/drivers/usb/gadget/pch_udc.c
index 0c8dd81dddca..3e4b35e50c24 100644
--- a/drivers/usb/gadget/pch_udc.c
+++ b/drivers/usb/gadget/pch_udc.c
@@ -198,10 +198,10 @@
198#define PCH_UDC_BRLEN 0x0F /* Burst length */ 198#define PCH_UDC_BRLEN 0x0F /* Burst length */
199#define PCH_UDC_THLEN 0x1F /* Threshold length */ 199#define PCH_UDC_THLEN 0x1F /* Threshold length */
200/* Value of EP Buffer Size */ 200/* Value of EP Buffer Size */
201#define UDC_EP0IN_BUFF_SIZE 64 201#define UDC_EP0IN_BUFF_SIZE 16
202#define UDC_EPIN_BUFF_SIZE 512 202#define UDC_EPIN_BUFF_SIZE 256
203#define UDC_EP0OUT_BUFF_SIZE 64 203#define UDC_EP0OUT_BUFF_SIZE 16
204#define UDC_EPOUT_BUFF_SIZE 512 204#define UDC_EPOUT_BUFF_SIZE 256
205/* Value of EP maximum packet size */ 205/* Value of EP maximum packet size */
206#define UDC_EP0IN_MAX_PKT_SIZE 64 206#define UDC_EP0IN_MAX_PKT_SIZE 64
207#define UDC_EP0OUT_MAX_PKT_SIZE 64 207#define UDC_EP0OUT_MAX_PKT_SIZE 64
@@ -351,7 +351,7 @@ struct pch_udc_dev {
351 struct pci_pool *data_requests; 351 struct pci_pool *data_requests;
352 struct pci_pool *stp_requests; 352 struct pci_pool *stp_requests;
353 dma_addr_t dma_addr; 353 dma_addr_t dma_addr;
354 unsigned long ep0out_buf[64]; 354 void *ep0out_buf;
355 struct usb_ctrlrequest setup_data; 355 struct usb_ctrlrequest setup_data;
356 unsigned long phys_addr; 356 unsigned long phys_addr;
357 void __iomem *base_addr; 357 void __iomem *base_addr;
@@ -361,11 +361,12 @@ struct pch_udc_dev {
361 361
362#define PCH_UDC_PCI_BAR 1 362#define PCH_UDC_PCI_BAR 1
363#define PCI_DEVICE_ID_INTEL_EG20T_UDC 0x8808 363#define PCI_DEVICE_ID_INTEL_EG20T_UDC 0x8808
364#define PCI_VENDOR_ID_ROHM 0x10DB
365#define PCI_DEVICE_ID_ML7213_IOH_UDC 0x801D
364 366
365static const char ep0_string[] = "ep0in"; 367static const char ep0_string[] = "ep0in";
366static DEFINE_SPINLOCK(udc_stall_spinlock); /* stall spin lock */ 368static DEFINE_SPINLOCK(udc_stall_spinlock); /* stall spin lock */
367struct pch_udc_dev *pch_udc; /* pointer to device object */ 369struct pch_udc_dev *pch_udc; /* pointer to device object */
368
369static int speed_fs; 370static int speed_fs;
370module_param_named(speed_fs, speed_fs, bool, S_IRUGO); 371module_param_named(speed_fs, speed_fs, bool, S_IRUGO);
371MODULE_PARM_DESC(speed_fs, "true for Full speed operation"); 372MODULE_PARM_DESC(speed_fs, "true for Full speed operation");
@@ -381,6 +382,8 @@ MODULE_PARM_DESC(speed_fs, "true for Full speed operation");
381 * @dma_mapped: DMA memory mapped for request 382 * @dma_mapped: DMA memory mapped for request
382 * @dma_done: DMA completed for request 383 * @dma_done: DMA completed for request
383 * @chain_len: chain length 384 * @chain_len: chain length
385 * @buf: Buffer memory for align adjustment
386 * @dma: DMA memory for align adjustment
384 */ 387 */
385struct pch_udc_request { 388struct pch_udc_request {
386 struct usb_request req; 389 struct usb_request req;
@@ -392,6 +395,8 @@ struct pch_udc_request {
392 dma_mapped:1, 395 dma_mapped:1,
393 dma_done:1; 396 dma_done:1;
394 unsigned chain_len; 397 unsigned chain_len;
398 void *buf;
399 dma_addr_t dma;
395}; 400};
396 401
397static inline u32 pch_udc_readl(struct pch_udc_dev *dev, unsigned long reg) 402static inline u32 pch_udc_readl(struct pch_udc_dev *dev, unsigned long reg)
@@ -613,7 +618,7 @@ static inline void pch_udc_ep_set_trfr_type(struct pch_udc_ep *ep,
613/** 618/**
614 * pch_udc_ep_set_bufsz() - Set the maximum packet size for the endpoint 619 * pch_udc_ep_set_bufsz() - Set the maximum packet size for the endpoint
615 * @ep: Reference to structure of type pch_udc_ep_regs 620 * @ep: Reference to structure of type pch_udc_ep_regs
616 * @buf_size: The buffer size 621 * @buf_size: The buffer word size
617 */ 622 */
618static void pch_udc_ep_set_bufsz(struct pch_udc_ep *ep, 623static void pch_udc_ep_set_bufsz(struct pch_udc_ep *ep,
619 u32 buf_size, u32 ep_in) 624 u32 buf_size, u32 ep_in)
@@ -633,7 +638,7 @@ static void pch_udc_ep_set_bufsz(struct pch_udc_ep *ep,
633/** 638/**
634 * pch_udc_ep_set_maxpkt() - Set the Max packet size for the endpoint 639 * pch_udc_ep_set_maxpkt() - Set the Max packet size for the endpoint
635 * @ep: Reference to structure of type pch_udc_ep_regs 640 * @ep: Reference to structure of type pch_udc_ep_regs
636 * @pkt_size: The packet size 641 * @pkt_size: The packet byte size
637 */ 642 */
638static void pch_udc_ep_set_maxpkt(struct pch_udc_ep *ep, u32 pkt_size) 643static void pch_udc_ep_set_maxpkt(struct pch_udc_ep *ep, u32 pkt_size)
639{ 644{
@@ -918,25 +923,10 @@ static void pch_udc_ep_clear_nak(struct pch_udc_ep *ep)
918 */ 923 */
919static void pch_udc_ep_fifo_flush(struct pch_udc_ep *ep, int dir) 924static void pch_udc_ep_fifo_flush(struct pch_udc_ep *ep, int dir)
920{ 925{
921 unsigned int loopcnt = 0;
922 struct pch_udc_dev *dev = ep->dev;
923
924 if (dir) { /* IN ep */ 926 if (dir) { /* IN ep */
925 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_F); 927 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_F);
926 return; 928 return;
927 } 929 }
928
929 if (pch_udc_read_ep_status(ep) & UDC_EPSTS_MRXFIFO_EMP)
930 return;
931 pch_udc_ep_bit_set(ep, UDC_EPCTL_ADDR, UDC_EPCTL_MRXFLUSH);
932 /* Wait for RxFIFO Empty */
933 loopcnt = 10000;
934 while (!(pch_udc_read_ep_status(ep) & UDC_EPSTS_MRXFIFO_EMP) &&
935 --loopcnt)
936 udelay(5);
937 if (!loopcnt)
938 dev_err(&dev->pdev->dev, "RxFIFO not Empty\n");
939 pch_udc_ep_bit_clr(ep, UDC_EPCTL_ADDR, UDC_EPCTL_MRXFLUSH);
940} 930}
941 931
942/** 932/**
@@ -1218,14 +1208,31 @@ static void complete_req(struct pch_udc_ep *ep, struct pch_udc_request *req,
1218 1208
1219 dev = ep->dev; 1209 dev = ep->dev;
1220 if (req->dma_mapped) { 1210 if (req->dma_mapped) {
1221 if (ep->in) 1211 if (req->dma == DMA_ADDR_INVALID) {
1222 pci_unmap_single(dev->pdev, req->req.dma, 1212 if (ep->in)
1223 req->req.length, PCI_DMA_TODEVICE); 1213 dma_unmap_single(&dev->pdev->dev, req->req.dma,
1224 else 1214 req->req.length,
1225 pci_unmap_single(dev->pdev, req->req.dma, 1215 DMA_TO_DEVICE);
1226 req->req.length, PCI_DMA_FROMDEVICE); 1216 else
1217 dma_unmap_single(&dev->pdev->dev, req->req.dma,
1218 req->req.length,
1219 DMA_FROM_DEVICE);
1220 req->req.dma = DMA_ADDR_INVALID;
1221 } else {
1222 if (ep->in)
1223 dma_unmap_single(&dev->pdev->dev, req->dma,
1224 req->req.length,
1225 DMA_TO_DEVICE);
1226 else {
1227 dma_unmap_single(&dev->pdev->dev, req->dma,
1228 req->req.length,
1229 DMA_FROM_DEVICE);
1230 memcpy(req->req.buf, req->buf, req->req.length);
1231 }
1232 kfree(req->buf);
1233 req->dma = DMA_ADDR_INVALID;
1234 }
1227 req->dma_mapped = 0; 1235 req->dma_mapped = 0;
1228 req->req.dma = DMA_ADDR_INVALID;
1229 } 1236 }
1230 ep->halted = 1; 1237 ep->halted = 1;
1231 spin_unlock(&dev->lock); 1238 spin_unlock(&dev->lock);
@@ -1266,12 +1273,18 @@ static void pch_udc_free_dma_chain(struct pch_udc_dev *dev,
1266 struct pch_udc_data_dma_desc *td = req->td_data; 1273 struct pch_udc_data_dma_desc *td = req->td_data;
1267 unsigned i = req->chain_len; 1274 unsigned i = req->chain_len;
1268 1275
1276 dma_addr_t addr2;
1277 dma_addr_t addr = (dma_addr_t)td->next;
1278 td->next = 0x00;
1269 for (; i > 1; --i) { 1279 for (; i > 1; --i) {
1270 dma_addr_t addr = (dma_addr_t)td->next;
1271 /* do not free first desc., will be done by free for request */ 1280 /* do not free first desc., will be done by free for request */
1272 td = phys_to_virt(addr); 1281 td = phys_to_virt(addr);
1282 addr2 = (dma_addr_t)td->next;
1273 pci_pool_free(dev->data_requests, td, addr); 1283 pci_pool_free(dev->data_requests, td, addr);
1284 td->next = 0x00;
1285 addr = addr2;
1274 } 1286 }
1287 req->chain_len = 1;
1275} 1288}
1276 1289
1277/** 1290/**
@@ -1299,23 +1312,23 @@ static int pch_udc_create_dma_chain(struct pch_udc_ep *ep,
1299 if (req->chain_len > 1) 1312 if (req->chain_len > 1)
1300 pch_udc_free_dma_chain(ep->dev, req); 1313 pch_udc_free_dma_chain(ep->dev, req);
1301 1314
1302 for (; ; bytes -= buf_len, ++len) { 1315 if (req->dma == DMA_ADDR_INVALID)
1303 if (ep->in) 1316 td->dataptr = req->req.dma;
1304 td->status = PCH_UDC_BS_HST_BSY | min(buf_len, bytes); 1317 else
1305 else 1318 td->dataptr = req->dma;
1306 td->status = PCH_UDC_BS_HST_BSY;
1307 1319
1320 td->status = PCH_UDC_BS_HST_BSY;
1321 for (; ; bytes -= buf_len, ++len) {
1322 td->status = PCH_UDC_BS_HST_BSY | min(buf_len, bytes);
1308 if (bytes <= buf_len) 1323 if (bytes <= buf_len)
1309 break; 1324 break;
1310
1311 last = td; 1325 last = td;
1312 td = pci_pool_alloc(ep->dev->data_requests, gfp_flags, 1326 td = pci_pool_alloc(ep->dev->data_requests, gfp_flags,
1313 &dma_addr); 1327 &dma_addr);
1314 if (!td) 1328 if (!td)
1315 goto nomem; 1329 goto nomem;
1316
1317 i += buf_len; 1330 i += buf_len;
1318 td->dataptr = req->req.dma + i; 1331 td->dataptr = req->td_data->dataptr + i;
1319 last->next = dma_addr; 1332 last->next = dma_addr;
1320 } 1333 }
1321 1334
@@ -1350,28 +1363,15 @@ static int prepare_dma(struct pch_udc_ep *ep, struct pch_udc_request *req,
1350{ 1363{
1351 int retval; 1364 int retval;
1352 1365
1353 req->td_data->dataptr = req->req.dma;
1354 req->td_data->status |= PCH_UDC_DMA_LAST;
1355 /* Allocate and create a DMA chain */ 1366 /* Allocate and create a DMA chain */
1356 retval = pch_udc_create_dma_chain(ep, req, ep->ep.maxpacket, gfp); 1367 retval = pch_udc_create_dma_chain(ep, req, ep->ep.maxpacket, gfp);
1357 if (retval) { 1368 if (retval) {
1358 pr_err("%s: could not create DMA chain: %d\n", 1369 pr_err("%s: could not create DMA chain:%d\n", __func__, retval);
1359 __func__, retval);
1360 return retval; 1370 return retval;
1361 } 1371 }
1362 if (!ep->in) 1372 if (ep->in)
1363 return 0;
1364 if (req->req.length <= ep->ep.maxpacket)
1365 req->td_data->status = PCH_UDC_DMA_LAST | PCH_UDC_BS_HST_BSY |
1366 req->req.length;
1367 /* if bytes < max packet then tx bytes must
1368 * be written in packet per buffer mode
1369 */
1370 if ((req->req.length < ep->ep.maxpacket) || !ep->num)
1371 req->td_data->status = (req->td_data->status & 1373 req->td_data->status = (req->td_data->status &
1372 ~PCH_UDC_RXTX_BYTES) | req->req.length; 1374 ~PCH_UDC_BUFF_STS) | PCH_UDC_BS_HST_RDY;
1373 req->td_data->status = (req->td_data->status &
1374 ~PCH_UDC_BUFF_STS) | PCH_UDC_BS_HST_BSY;
1375 return 0; 1375 return 0;
1376} 1376}
1377 1377
@@ -1414,7 +1414,6 @@ static void pch_udc_start_rxrequest(struct pch_udc_ep *ep,
1414 1414
1415 pch_udc_clear_dma(ep->dev, DMA_DIR_RX); 1415 pch_udc_clear_dma(ep->dev, DMA_DIR_RX);
1416 td_data = req->td_data; 1416 td_data = req->td_data;
1417 ep->td_data = req->td_data;
1418 /* Set the status bits for all descriptors */ 1417 /* Set the status bits for all descriptors */
1419 while (1) { 1418 while (1) {
1420 td_data->status = (td_data->status & ~PCH_UDC_BUFF_STS) | 1419 td_data->status = (td_data->status & ~PCH_UDC_BUFF_STS) |
@@ -1528,6 +1527,7 @@ static struct usb_request *pch_udc_alloc_request(struct usb_ep *usbep,
1528 if (!req) 1527 if (!req)
1529 return NULL; 1528 return NULL;
1530 req->req.dma = DMA_ADDR_INVALID; 1529 req->req.dma = DMA_ADDR_INVALID;
1530 req->dma = DMA_ADDR_INVALID;
1531 INIT_LIST_HEAD(&req->queue); 1531 INIT_LIST_HEAD(&req->queue);
1532 if (!ep->dev->dma_addr) 1532 if (!ep->dev->dma_addr)
1533 return &req->req; 1533 return &req->req;
@@ -1612,16 +1612,37 @@ static int pch_udc_pcd_queue(struct usb_ep *usbep, struct usb_request *usbreq,
1612 /* map the buffer for dma */ 1612 /* map the buffer for dma */
1613 if (usbreq->length && 1613 if (usbreq->length &&
1614 ((usbreq->dma == DMA_ADDR_INVALID) || !usbreq->dma)) { 1614 ((usbreq->dma == DMA_ADDR_INVALID) || !usbreq->dma)) {
1615 if (ep->in) 1615 if (!((unsigned long)(usbreq->buf) & 0x03)) {
1616 usbreq->dma = pci_map_single(dev->pdev, usbreq->buf, 1616 if (ep->in)
1617 usbreq->length, PCI_DMA_TODEVICE); 1617 usbreq->dma = dma_map_single(&dev->pdev->dev,
1618 else 1618 usbreq->buf,
1619 usbreq->dma = pci_map_single(dev->pdev, usbreq->buf, 1619 usbreq->length,
1620 usbreq->length, PCI_DMA_FROMDEVICE); 1620 DMA_TO_DEVICE);
1621 else
1622 usbreq->dma = dma_map_single(&dev->pdev->dev,
1623 usbreq->buf,
1624 usbreq->length,
1625 DMA_FROM_DEVICE);
1626 } else {
1627 req->buf = kzalloc(usbreq->length, GFP_ATOMIC);
1628 if (!req->buf)
1629 return -ENOMEM;
1630 if (ep->in) {
1631 memcpy(req->buf, usbreq->buf, usbreq->length);
1632 req->dma = dma_map_single(&dev->pdev->dev,
1633 req->buf,
1634 usbreq->length,
1635 DMA_TO_DEVICE);
1636 } else
1637 req->dma = dma_map_single(&dev->pdev->dev,
1638 req->buf,
1639 usbreq->length,
1640 DMA_FROM_DEVICE);
1641 }
1621 req->dma_mapped = 1; 1642 req->dma_mapped = 1;
1622 } 1643 }
1623 if (usbreq->length > 0) { 1644 if (usbreq->length > 0) {
1624 retval = prepare_dma(ep, req, gfp); 1645 retval = prepare_dma(ep, req, GFP_ATOMIC);
1625 if (retval) 1646 if (retval)
1626 goto probe_end; 1647 goto probe_end;
1627 } 1648 }
@@ -1646,7 +1667,6 @@ static int pch_udc_pcd_queue(struct usb_ep *usbep, struct usb_request *usbreq,
1646 pch_udc_wait_ep_stall(ep); 1667 pch_udc_wait_ep_stall(ep);
1647 pch_udc_ep_clear_nak(ep); 1668 pch_udc_ep_clear_nak(ep);
1648 pch_udc_enable_ep_interrupts(ep->dev, (1 << ep->num)); 1669 pch_udc_enable_ep_interrupts(ep->dev, (1 << ep->num));
1649 pch_udc_set_dma(dev, DMA_DIR_TX);
1650 } 1670 }
1651 } 1671 }
1652 /* Now add this request to the ep's pending requests */ 1672 /* Now add this request to the ep's pending requests */
@@ -1916,31 +1936,46 @@ static void pch_udc_complete_receiver(struct pch_udc_ep *ep)
1916 struct pch_udc_request *req; 1936 struct pch_udc_request *req;
1917 struct pch_udc_dev *dev = ep->dev; 1937 struct pch_udc_dev *dev = ep->dev;
1918 unsigned int count; 1938 unsigned int count;
1939 struct pch_udc_data_dma_desc *td;
1940 dma_addr_t addr;
1919 1941
1920 if (list_empty(&ep->queue)) 1942 if (list_empty(&ep->queue))
1921 return; 1943 return;
1922
1923 /* next request */ 1944 /* next request */
1924 req = list_entry(ep->queue.next, struct pch_udc_request, queue); 1945 req = list_entry(ep->queue.next, struct pch_udc_request, queue);
1925 if ((req->td_data_last->status & PCH_UDC_BUFF_STS) !=
1926 PCH_UDC_BS_DMA_DONE)
1927 return;
1928 pch_udc_clear_dma(ep->dev, DMA_DIR_RX); 1946 pch_udc_clear_dma(ep->dev, DMA_DIR_RX);
1929 if ((req->td_data_last->status & PCH_UDC_RXTX_STS) != 1947 pch_udc_ep_set_ddptr(ep, 0);
1930 PCH_UDC_RTS_SUCC) { 1948 if ((req->td_data_last->status & PCH_UDC_BUFF_STS) ==
1931 dev_err(&dev->pdev->dev, "Invalid RXTX status (0x%08x) " 1949 PCH_UDC_BS_DMA_DONE)
1932 "epstatus=0x%08x\n", 1950 td = req->td_data_last;
1933 (req->td_data_last->status & PCH_UDC_RXTX_STS), 1951 else
1934 (int)(ep->epsts)); 1952 td = req->td_data;
1935 return;
1936 }
1937 count = req->td_data_last->status & PCH_UDC_RXTX_BYTES;
1938 1953
1954 while (1) {
1955 if ((td->status & PCH_UDC_RXTX_STS) != PCH_UDC_RTS_SUCC) {
1956 dev_err(&dev->pdev->dev, "Invalid RXTX status=0x%08x "
1957 "epstatus=0x%08x\n",
1958 (req->td_data->status & PCH_UDC_RXTX_STS),
1959 (int)(ep->epsts));
1960 return;
1961 }
1962 if ((td->status & PCH_UDC_BUFF_STS) == PCH_UDC_BS_DMA_DONE)
1963 if (td->status | PCH_UDC_DMA_LAST) {
1964 count = td->status & PCH_UDC_RXTX_BYTES;
1965 break;
1966 }
1967 if (td == req->td_data_last) {
1968 dev_err(&dev->pdev->dev, "Not complete RX descriptor");
1969 return;
1970 }
1971 addr = (dma_addr_t)td->next;
1972 td = phys_to_virt(addr);
1973 }
1939 /* on 64k packets the RXBYTES field is zero */ 1974 /* on 64k packets the RXBYTES field is zero */
1940 if (!count && (req->req.length == UDC_DMA_MAXPACKET)) 1975 if (!count && (req->req.length == UDC_DMA_MAXPACKET))
1941 count = UDC_DMA_MAXPACKET; 1976 count = UDC_DMA_MAXPACKET;
1942 req->td_data->status |= PCH_UDC_DMA_LAST; 1977 req->td_data->status |= PCH_UDC_DMA_LAST;
1943 req->td_data_last->status |= PCH_UDC_BS_HST_BSY; 1978 td->status |= PCH_UDC_BS_HST_BSY;
1944 1979
1945 req->dma_going = 0; 1980 req->dma_going = 0;
1946 req->req.actual = count; 1981 req->req.actual = count;
@@ -1963,7 +1998,7 @@ static void pch_udc_svc_data_in(struct pch_udc_dev *dev, int ep_num)
1963 u32 epsts; 1998 u32 epsts;
1964 struct pch_udc_ep *ep; 1999 struct pch_udc_ep *ep;
1965 2000
1966 ep = &dev->ep[2*ep_num]; 2001 ep = &dev->ep[UDC_EPIN_IDX(ep_num)];
1967 epsts = ep->epsts; 2002 epsts = ep->epsts;
1968 ep->epsts = 0; 2003 ep->epsts = 0;
1969 2004
@@ -2008,7 +2043,7 @@ static void pch_udc_svc_data_out(struct pch_udc_dev *dev, int ep_num)
2008 struct pch_udc_ep *ep; 2043 struct pch_udc_ep *ep;
2009 struct pch_udc_request *req = NULL; 2044 struct pch_udc_request *req = NULL;
2010 2045
2011 ep = &dev->ep[2*ep_num + 1]; 2046 ep = &dev->ep[UDC_EPOUT_IDX(ep_num)];
2012 epsts = ep->epsts; 2047 epsts = ep->epsts;
2013 ep->epsts = 0; 2048 ep->epsts = 0;
2014 2049
@@ -2025,10 +2060,11 @@ static void pch_udc_svc_data_out(struct pch_udc_dev *dev, int ep_num)
2025 } 2060 }
2026 if (epsts & UDC_EPSTS_HE) 2061 if (epsts & UDC_EPSTS_HE)
2027 return; 2062 return;
2028 if (epsts & UDC_EPSTS_RSS) 2063 if (epsts & UDC_EPSTS_RSS) {
2029 pch_udc_ep_set_stall(ep); 2064 pch_udc_ep_set_stall(ep);
2030 pch_udc_enable_ep_interrupts(ep->dev, 2065 pch_udc_enable_ep_interrupts(ep->dev,
2031 PCH_UDC_EPINT(ep->in, ep->num)); 2066 PCH_UDC_EPINT(ep->in, ep->num));
2067 }
2032 if (epsts & UDC_EPSTS_RCS) { 2068 if (epsts & UDC_EPSTS_RCS) {
2033 if (!dev->prot_stall) { 2069 if (!dev->prot_stall) {
2034 pch_udc_ep_clear_stall(ep); 2070 pch_udc_ep_clear_stall(ep);
@@ -2060,8 +2096,10 @@ static void pch_udc_svc_control_in(struct pch_udc_dev *dev)
2060{ 2096{
2061 u32 epsts; 2097 u32 epsts;
2062 struct pch_udc_ep *ep; 2098 struct pch_udc_ep *ep;
2099 struct pch_udc_ep *ep_out;
2063 2100
2064 ep = &dev->ep[UDC_EP0IN_IDX]; 2101 ep = &dev->ep[UDC_EP0IN_IDX];
2102 ep_out = &dev->ep[UDC_EP0OUT_IDX];
2065 epsts = ep->epsts; 2103 epsts = ep->epsts;
2066 ep->epsts = 0; 2104 ep->epsts = 0;
2067 2105
@@ -2073,8 +2111,16 @@ static void pch_udc_svc_control_in(struct pch_udc_dev *dev)
2073 return; 2111 return;
2074 if (epsts & UDC_EPSTS_HE) 2112 if (epsts & UDC_EPSTS_HE)
2075 return; 2113 return;
2076 if ((epsts & UDC_EPSTS_TDC) && (!dev->stall)) 2114 if ((epsts & UDC_EPSTS_TDC) && (!dev->stall)) {
2077 pch_udc_complete_transfer(ep); 2115 pch_udc_complete_transfer(ep);
2116 pch_udc_clear_dma(dev, DMA_DIR_RX);
2117 ep_out->td_data->status = (ep_out->td_data->status &
2118 ~PCH_UDC_BUFF_STS) |
2119 PCH_UDC_BS_HST_RDY;
2120 pch_udc_ep_clear_nak(ep_out);
2121 pch_udc_set_dma(dev, DMA_DIR_RX);
2122 pch_udc_ep_set_rrdy(ep_out);
2123 }
2078 /* On IN interrupt, provide data if we have any */ 2124 /* On IN interrupt, provide data if we have any */
2079 if ((epsts & UDC_EPSTS_IN) && !(epsts & UDC_EPSTS_TDC) && 2125 if ((epsts & UDC_EPSTS_IN) && !(epsts & UDC_EPSTS_TDC) &&
2080 !(epsts & UDC_EPSTS_TXEMPTY)) 2126 !(epsts & UDC_EPSTS_TXEMPTY))
@@ -2102,11 +2148,9 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev)
2102 dev->stall = 0; 2148 dev->stall = 0;
2103 dev->ep[UDC_EP0IN_IDX].halted = 0; 2149 dev->ep[UDC_EP0IN_IDX].halted = 0;
2104 dev->ep[UDC_EP0OUT_IDX].halted = 0; 2150 dev->ep[UDC_EP0OUT_IDX].halted = 0;
2105 /* In data not ready */
2106 pch_udc_ep_set_nak(&(dev->ep[UDC_EP0IN_IDX]));
2107 dev->setup_data = ep->td_stp->request; 2151 dev->setup_data = ep->td_stp->request;
2108 pch_udc_init_setup_buff(ep->td_stp); 2152 pch_udc_init_setup_buff(ep->td_stp);
2109 pch_udc_clear_dma(dev, DMA_DIR_TX); 2153 pch_udc_clear_dma(dev, DMA_DIR_RX);
2110 pch_udc_ep_fifo_flush(&(dev->ep[UDC_EP0IN_IDX]), 2154 pch_udc_ep_fifo_flush(&(dev->ep[UDC_EP0IN_IDX]),
2111 dev->ep[UDC_EP0IN_IDX].in); 2155 dev->ep[UDC_EP0IN_IDX].in);
2112 if ((dev->setup_data.bRequestType & USB_DIR_IN)) 2156 if ((dev->setup_data.bRequestType & USB_DIR_IN))
@@ -2122,14 +2166,23 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev)
2122 setup_supported = dev->driver->setup(&dev->gadget, 2166 setup_supported = dev->driver->setup(&dev->gadget,
2123 &dev->setup_data); 2167 &dev->setup_data);
2124 spin_lock(&dev->lock); 2168 spin_lock(&dev->lock);
2169
2170 if (dev->setup_data.bRequestType & USB_DIR_IN) {
2171 ep->td_data->status = (ep->td_data->status &
2172 ~PCH_UDC_BUFF_STS) |
2173 PCH_UDC_BS_HST_RDY;
2174 pch_udc_ep_set_ddptr(ep, ep->td_data_phys);
2175 }
2125 /* ep0 in returns data on IN phase */ 2176 /* ep0 in returns data on IN phase */
2126 if (setup_supported >= 0 && setup_supported < 2177 if (setup_supported >= 0 && setup_supported <
2127 UDC_EP0IN_MAX_PKT_SIZE) { 2178 UDC_EP0IN_MAX_PKT_SIZE) {
2128 pch_udc_ep_clear_nak(&(dev->ep[UDC_EP0IN_IDX])); 2179 pch_udc_ep_clear_nak(&(dev->ep[UDC_EP0IN_IDX]));
2129 /* Gadget would have queued a request when 2180 /* Gadget would have queued a request when
2130 * we called the setup */ 2181 * we called the setup */
2131 pch_udc_set_dma(dev, DMA_DIR_RX); 2182 if (!(dev->setup_data.bRequestType & USB_DIR_IN)) {
2132 pch_udc_ep_clear_nak(ep); 2183 pch_udc_set_dma(dev, DMA_DIR_RX);
2184 pch_udc_ep_clear_nak(ep);
2185 }
2133 } else if (setup_supported < 0) { 2186 } else if (setup_supported < 0) {
2134 /* if unsupported request, then stall */ 2187 /* if unsupported request, then stall */
2135 pch_udc_ep_set_stall(&(dev->ep[UDC_EP0IN_IDX])); 2188 pch_udc_ep_set_stall(&(dev->ep[UDC_EP0IN_IDX]));
@@ -2142,22 +2195,13 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev)
2142 } 2195 }
2143 } else if ((((stat & UDC_EPSTS_OUT_MASK) >> UDC_EPSTS_OUT_SHIFT) == 2196 } else if ((((stat & UDC_EPSTS_OUT_MASK) >> UDC_EPSTS_OUT_SHIFT) ==
2144 UDC_EPSTS_OUT_DATA) && !dev->stall) { 2197 UDC_EPSTS_OUT_DATA) && !dev->stall) {
2145 if (list_empty(&ep->queue)) { 2198 pch_udc_clear_dma(dev, DMA_DIR_RX);
2146 dev_err(&dev->pdev->dev, "%s: No request\n", __func__); 2199 pch_udc_ep_set_ddptr(ep, 0);
2147 ep->td_data->status = (ep->td_data->status & 2200 if (!list_empty(&ep->queue)) {
2148 ~PCH_UDC_BUFF_STS) |
2149 PCH_UDC_BS_HST_RDY;
2150 pch_udc_set_dma(dev, DMA_DIR_RX);
2151 } else {
2152 /* control write */
2153 /* next function will pickuo an clear the status */
2154 ep->epsts = stat; 2201 ep->epsts = stat;
2155 2202 pch_udc_svc_data_out(dev, PCH_UDC_EP0);
2156 pch_udc_svc_data_out(dev, 0);
2157 /* re-program desc. pointer for possible ZLPs */
2158 pch_udc_ep_set_ddptr(ep, ep->td_data_phys);
2159 pch_udc_set_dma(dev, DMA_DIR_RX);
2160 } 2203 }
2204 pch_udc_set_dma(dev, DMA_DIR_RX);
2161 } 2205 }
2162 pch_udc_ep_set_rrdy(ep); 2206 pch_udc_ep_set_rrdy(ep);
2163} 2207}
@@ -2174,7 +2218,7 @@ static void pch_udc_postsvc_epinters(struct pch_udc_dev *dev, int ep_num)
2174 struct pch_udc_ep *ep; 2218 struct pch_udc_ep *ep;
2175 struct pch_udc_request *req; 2219 struct pch_udc_request *req;
2176 2220
2177 ep = &dev->ep[2*ep_num]; 2221 ep = &dev->ep[UDC_EPIN_IDX(ep_num)];
2178 if (!list_empty(&ep->queue)) { 2222 if (!list_empty(&ep->queue)) {
2179 req = list_entry(ep->queue.next, struct pch_udc_request, queue); 2223 req = list_entry(ep->queue.next, struct pch_udc_request, queue);
2180 pch_udc_enable_ep_interrupts(ep->dev, 2224 pch_udc_enable_ep_interrupts(ep->dev,
@@ -2196,13 +2240,13 @@ static void pch_udc_read_all_epstatus(struct pch_udc_dev *dev, u32 ep_intr)
2196 for (i = 0; i < PCH_UDC_USED_EP_NUM; i++) { 2240 for (i = 0; i < PCH_UDC_USED_EP_NUM; i++) {
2197 /* IN */ 2241 /* IN */
2198 if (ep_intr & (0x1 << i)) { 2242 if (ep_intr & (0x1 << i)) {
2199 ep = &dev->ep[2*i]; 2243 ep = &dev->ep[UDC_EPIN_IDX(i)];
2200 ep->epsts = pch_udc_read_ep_status(ep); 2244 ep->epsts = pch_udc_read_ep_status(ep);
2201 pch_udc_clear_ep_status(ep, ep->epsts); 2245 pch_udc_clear_ep_status(ep, ep->epsts);
2202 } 2246 }
2203 /* OUT */ 2247 /* OUT */
2204 if (ep_intr & (0x10000 << i)) { 2248 if (ep_intr & (0x10000 << i)) {
2205 ep = &dev->ep[2*i+1]; 2249 ep = &dev->ep[UDC_EPOUT_IDX(i)];
2206 ep->epsts = pch_udc_read_ep_status(ep); 2250 ep->epsts = pch_udc_read_ep_status(ep);
2207 pch_udc_clear_ep_status(ep, ep->epsts); 2251 pch_udc_clear_ep_status(ep, ep->epsts);
2208 } 2252 }
@@ -2563,9 +2607,6 @@ static void pch_udc_pcd_reinit(struct pch_udc_dev *dev)
2563 dev->ep[UDC_EP0IN_IDX].ep.maxpacket = UDC_EP0IN_MAX_PKT_SIZE; 2607 dev->ep[UDC_EP0IN_IDX].ep.maxpacket = UDC_EP0IN_MAX_PKT_SIZE;
2564 dev->ep[UDC_EP0OUT_IDX].ep.maxpacket = UDC_EP0OUT_MAX_PKT_SIZE; 2608 dev->ep[UDC_EP0OUT_IDX].ep.maxpacket = UDC_EP0OUT_MAX_PKT_SIZE;
2565 2609
2566 dev->dma_addr = pci_map_single(dev->pdev, dev->ep0out_buf, 256,
2567 PCI_DMA_FROMDEVICE);
2568
2569 /* remove ep0 in and out from the list. They have own pointer */ 2610 /* remove ep0 in and out from the list. They have own pointer */
2570 list_del_init(&dev->ep[UDC_EP0IN_IDX].ep.ep_list); 2611 list_del_init(&dev->ep[UDC_EP0IN_IDX].ep.ep_list);
2571 list_del_init(&dev->ep[UDC_EP0OUT_IDX].ep.ep_list); 2612 list_del_init(&dev->ep[UDC_EP0OUT_IDX].ep.ep_list);
@@ -2637,6 +2678,13 @@ static int init_dma_pools(struct pch_udc_dev *dev)
2637 dev->ep[UDC_EP0IN_IDX].td_stp_phys = 0; 2678 dev->ep[UDC_EP0IN_IDX].td_stp_phys = 0;
2638 dev->ep[UDC_EP0IN_IDX].td_data = NULL; 2679 dev->ep[UDC_EP0IN_IDX].td_data = NULL;
2639 dev->ep[UDC_EP0IN_IDX].td_data_phys = 0; 2680 dev->ep[UDC_EP0IN_IDX].td_data_phys = 0;
2681
2682 dev->ep0out_buf = kzalloc(UDC_EP0OUT_BUFF_SIZE * 4, GFP_KERNEL);
2683 if (!dev->ep0out_buf)
2684 return -ENOMEM;
2685 dev->dma_addr = dma_map_single(&dev->pdev->dev, dev->ep0out_buf,
2686 UDC_EP0OUT_BUFF_SIZE * 4,
2687 DMA_FROM_DEVICE);
2640 return 0; 2688 return 0;
2641} 2689}
2642 2690
@@ -2700,7 +2748,8 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2700 2748
2701 pch_udc_disable_interrupts(dev, UDC_DEVINT_MSK); 2749 pch_udc_disable_interrupts(dev, UDC_DEVINT_MSK);
2702 2750
2703 /* Assues that there are no pending requets with this driver */ 2751 /* Assures that there are no pending requests with this driver */
2752 driver->disconnect(&dev->gadget);
2704 driver->unbind(&dev->gadget); 2753 driver->unbind(&dev->gadget);
2705 dev->gadget.dev.driver = NULL; 2754 dev->gadget.dev.driver = NULL;
2706 dev->driver = NULL; 2755 dev->driver = NULL;
@@ -2750,6 +2799,11 @@ static void pch_udc_remove(struct pci_dev *pdev)
2750 pci_pool_destroy(dev->stp_requests); 2799 pci_pool_destroy(dev->stp_requests);
2751 } 2800 }
2752 2801
2802 if (dev->dma_addr)
2803 dma_unmap_single(&dev->pdev->dev, dev->dma_addr,
2804 UDC_EP0OUT_BUFF_SIZE * 4, DMA_FROM_DEVICE);
2805 kfree(dev->ep0out_buf);
2806
2753 pch_udc_exit(dev); 2807 pch_udc_exit(dev);
2754 2808
2755 if (dev->irq_registered) 2809 if (dev->irq_registered)
@@ -2792,11 +2846,7 @@ static int pch_udc_resume(struct pci_dev *pdev)
2792 int ret; 2846 int ret;
2793 2847
2794 pci_set_power_state(pdev, PCI_D0); 2848 pci_set_power_state(pdev, PCI_D0);
2795 ret = pci_restore_state(pdev); 2849 pci_restore_state(pdev);
2796 if (ret) {
2797 dev_err(&pdev->dev, "%s: pci_restore_state failed\n", __func__);
2798 return ret;
2799 }
2800 ret = pci_enable_device(pdev); 2850 ret = pci_enable_device(pdev);
2801 if (ret) { 2851 if (ret) {
2802 dev_err(&pdev->dev, "%s: pci_enable_device failed\n", __func__); 2852 dev_err(&pdev->dev, "%s: pci_enable_device failed\n", __func__);
@@ -2914,6 +2964,11 @@ static DEFINE_PCI_DEVICE_TABLE(pch_udc_pcidev_id) = {
2914 .class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe, 2964 .class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe,
2915 .class_mask = 0xffffffff, 2965 .class_mask = 0xffffffff,
2916 }, 2966 },
2967 {
2968 PCI_DEVICE(PCI_VENDOR_ID_ROHM, PCI_DEVICE_ID_ML7213_IOH_UDC),
2969 .class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe,
2970 .class_mask = 0xffffffff,
2971 },
2917 { 0 }, 2972 { 0 },
2918}; 2973};
2919 2974
diff --git a/drivers/usb/gadget/printer.c b/drivers/usb/gadget/printer.c
index 2fc8636316c5..12ff6cffedc9 100644
--- a/drivers/usb/gadget/printer.c
+++ b/drivers/usb/gadget/printer.c
@@ -131,31 +131,31 @@ static struct printer_dev usb_printer_gadget;
131 * parameters are in UTF-8 (superset of ASCII's 7 bit characters). 131 * parameters are in UTF-8 (superset of ASCII's 7 bit characters).
132 */ 132 */
133 133
134static ushort __initdata idVendor; 134static ushort idVendor;
135module_param(idVendor, ushort, S_IRUGO); 135module_param(idVendor, ushort, S_IRUGO);
136MODULE_PARM_DESC(idVendor, "USB Vendor ID"); 136MODULE_PARM_DESC(idVendor, "USB Vendor ID");
137 137
138static ushort __initdata idProduct; 138static ushort idProduct;
139module_param(idProduct, ushort, S_IRUGO); 139module_param(idProduct, ushort, S_IRUGO);
140MODULE_PARM_DESC(idProduct, "USB Product ID"); 140MODULE_PARM_DESC(idProduct, "USB Product ID");
141 141
142static ushort __initdata bcdDevice; 142static ushort bcdDevice;
143module_param(bcdDevice, ushort, S_IRUGO); 143module_param(bcdDevice, ushort, S_IRUGO);
144MODULE_PARM_DESC(bcdDevice, "USB Device version (BCD)"); 144MODULE_PARM_DESC(bcdDevice, "USB Device version (BCD)");
145 145
146static char *__initdata iManufacturer; 146static char *iManufacturer;
147module_param(iManufacturer, charp, S_IRUGO); 147module_param(iManufacturer, charp, S_IRUGO);
148MODULE_PARM_DESC(iManufacturer, "USB Manufacturer string"); 148MODULE_PARM_DESC(iManufacturer, "USB Manufacturer string");
149 149
150static char *__initdata iProduct; 150static char *iProduct;
151module_param(iProduct, charp, S_IRUGO); 151module_param(iProduct, charp, S_IRUGO);
152MODULE_PARM_DESC(iProduct, "USB Product string"); 152MODULE_PARM_DESC(iProduct, "USB Product string");
153 153
154static char *__initdata iSerialNum; 154static char *iSerialNum;
155module_param(iSerialNum, charp, S_IRUGO); 155module_param(iSerialNum, charp, S_IRUGO);
156MODULE_PARM_DESC(iSerialNum, "1"); 156MODULE_PARM_DESC(iSerialNum, "1");
157 157
158static char *__initdata iPNPstring; 158static char *iPNPstring;
159module_param(iPNPstring, charp, S_IRUGO); 159module_param(iPNPstring, charp, S_IRUGO);
160MODULE_PARM_DESC(iPNPstring, "MFG:linux;MDL:g_printer;CLS:PRINTER;SN:1;"); 160MODULE_PARM_DESC(iPNPstring, "MFG:linux;MDL:g_printer;CLS:PRINTER;SN:1;");
161 161
@@ -1596,13 +1596,12 @@ cleanup(void)
1596 int status; 1596 int status;
1597 1597
1598 mutex_lock(&usb_printer_gadget.lock_printer_io); 1598 mutex_lock(&usb_printer_gadget.lock_printer_io);
1599 class_destroy(usb_gadget_class);
1600 unregister_chrdev_region(g_printer_devno, 2);
1601
1602 status = usb_gadget_unregister_driver(&printer_driver); 1599 status = usb_gadget_unregister_driver(&printer_driver);
1603 if (status) 1600 if (status)
1604 ERROR(dev, "usb_gadget_unregister_driver %x\n", status); 1601 ERROR(dev, "usb_gadget_unregister_driver %x\n", status);
1605 1602
1603 unregister_chrdev_region(g_printer_devno, 2);
1604 class_destroy(usb_gadget_class);
1606 mutex_unlock(&usb_printer_gadget.lock_printer_io); 1605 mutex_unlock(&usb_printer_gadget.lock_printer_io);
1607} 1606}
1608module_exit(cleanup); 1607module_exit(cleanup);
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c
index 20d43da319ae..015118535f77 100644
--- a/drivers/usb/gadget/r8a66597-udc.c
+++ b/drivers/usb/gadget/r8a66597-udc.c
@@ -258,7 +258,7 @@ static int pipe_buffer_setting(struct r8a66597 *r8a66597,
258 break; 258 break;
259 case R8A66597_BULK: 259 case R8A66597_BULK:
260 /* isochronous pipes may be used as bulk pipes */ 260 /* isochronous pipes may be used as bulk pipes */
261 if (info->pipe > R8A66597_BASE_PIPENUM_BULK) 261 if (info->pipe >= R8A66597_BASE_PIPENUM_BULK)
262 bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; 262 bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK;
263 else 263 else
264 bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; 264 bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC;
diff --git a/drivers/usb/gadget/s3c2410_udc.c b/drivers/usb/gadget/s3c2410_udc.c
index c2448950a8d8..6d8b04061d5d 100644
--- a/drivers/usb/gadget/s3c2410_udc.c
+++ b/drivers/usb/gadget/s3c2410_udc.c
@@ -902,7 +902,7 @@ static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
902 int pwr_reg; 902 int pwr_reg;
903 int ep0csr; 903 int ep0csr;
904 int i; 904 int i;
905 u32 idx; 905 u32 idx, idx2;
906 unsigned long flags; 906 unsigned long flags;
907 907
908 spin_lock_irqsave(&dev->lock, flags); 908 spin_lock_irqsave(&dev->lock, flags);
@@ -1017,6 +1017,20 @@ static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
1017 } 1017 }
1018 } 1018 }
1019 1019
1020 /* what else causes this interrupt? a receive! who is it? */
1021 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
1022 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1023 idx2 = udc_read(S3C2410_UDC_INDEX_REG);
1024 udc_write(i, S3C2410_UDC_INDEX_REG);
1025
1026 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
1027 s3c2410_udc_handle_ep(&dev->ep[i]);
1028
1029 /* restore index */
1030 udc_write(idx2, S3C2410_UDC_INDEX_REG);
1031 }
1032 }
1033
1020 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD); 1034 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1021 1035
1022 /* Restore old index */ 1036 /* Restore old index */
@@ -1467,7 +1481,9 @@ static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1467{ 1481{
1468 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1482 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1469 1483
1470 if (udc_info && udc_info->udc_command) { 1484 if (udc_info && (udc_info->udc_command ||
1485 gpio_is_valid(udc_info->pullup_pin))) {
1486
1471 if (is_on) 1487 if (is_on)
1472 s3c2410_udc_enable(udc); 1488 s3c2410_udc_enable(udc);
1473 else { 1489 else {
@@ -1544,6 +1560,32 @@ static const struct usb_gadget_ops s3c2410_ops = {
1544 .vbus_draw = s3c2410_vbus_draw, 1560 .vbus_draw = s3c2410_vbus_draw,
1545}; 1561};
1546 1562
1563static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1564{
1565 if (!udc_info)
1566 return;
1567
1568 if (udc_info->udc_command) {
1569 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1570 } else if (gpio_is_valid(udc_info->pullup_pin)) {
1571 int value;
1572
1573 switch (cmd) {
1574 case S3C2410_UDC_P_ENABLE:
1575 value = 1;
1576 break;
1577 case S3C2410_UDC_P_DISABLE:
1578 value = 0;
1579 break;
1580 default:
1581 return;
1582 }
1583 value ^= udc_info->pullup_pin_inverted;
1584
1585 gpio_set_value(udc_info->pullup_pin, value);
1586 }
1587}
1588
1547/*------------------------- gadget driver handling---------------------------*/ 1589/*------------------------- gadget driver handling---------------------------*/
1548/* 1590/*
1549 * s3c2410_udc_disable 1591 * s3c2410_udc_disable
@@ -1565,8 +1607,7 @@ static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1565 udc_write(0x1F, S3C2410_UDC_EP_INT_REG); 1607 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1566 1608
1567 /* Good bye, cruel world */ 1609 /* Good bye, cruel world */
1568 if (udc_info && udc_info->udc_command) 1610 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1569 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1570 1611
1571 /* Set speed to unknown */ 1612 /* Set speed to unknown */
1572 dev->gadget.speed = USB_SPEED_UNKNOWN; 1613 dev->gadget.speed = USB_SPEED_UNKNOWN;
@@ -1627,8 +1668,7 @@ static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1627 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG); 1668 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1628 1669
1629 /* time to say "hello, world" */ 1670 /* time to say "hello, world" */
1630 if (udc_info && udc_info->udc_command) 1671 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1631 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1632} 1672}
1633 1673
1634/* 1674/*
@@ -1903,6 +1943,17 @@ static int s3c2410_udc_probe(struct platform_device *pdev)
1903 udc->vbus = 1; 1943 udc->vbus = 1;
1904 } 1944 }
1905 1945
1946 if (udc_info && !udc_info->udc_command &&
1947 gpio_is_valid(udc_info->pullup_pin)) {
1948
1949 retval = gpio_request_one(udc_info->pullup_pin,
1950 udc_info->vbus_pin_inverted ?
1951 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1952 "udc pullup");
1953 if (retval)
1954 goto err_vbus_irq;
1955 }
1956
1906 if (s3c2410_udc_debugfs_root) { 1957 if (s3c2410_udc_debugfs_root) {
1907 udc->regs_info = debugfs_create_file("registers", S_IRUGO, 1958 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1908 s3c2410_udc_debugfs_root, 1959 s3c2410_udc_debugfs_root,
@@ -1915,6 +1966,9 @@ static int s3c2410_udc_probe(struct platform_device *pdev)
1915 1966
1916 return 0; 1967 return 0;
1917 1968
1969err_vbus_irq:
1970 if (udc_info && udc_info->vbus_pin > 0)
1971 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1918err_gpio_claim: 1972err_gpio_claim:
1919 if (udc_info && udc_info->vbus_pin > 0) 1973 if (udc_info && udc_info->vbus_pin > 0)
1920 gpio_free(udc_info->vbus_pin); 1974 gpio_free(udc_info->vbus_pin);
@@ -1942,6 +1996,10 @@ static int s3c2410_udc_remove(struct platform_device *pdev)
1942 1996
1943 debugfs_remove(udc->regs_info); 1997 debugfs_remove(udc->regs_info);
1944 1998
1999 if (udc_info && !udc_info->udc_command &&
2000 gpio_is_valid(udc_info->pullup_pin))
2001 gpio_free(udc_info->pullup_pin);
2002
1945 if (udc_info && udc_info->vbus_pin > 0) { 2003 if (udc_info && udc_info->vbus_pin > 0) {
1946 irq = gpio_to_irq(udc_info->vbus_pin); 2004 irq = gpio_to_irq(udc_info->vbus_pin);
1947 free_irq(irq, udc); 2005 free_irq(irq, udc);
@@ -1973,16 +2031,14 @@ static int s3c2410_udc_remove(struct platform_device *pdev)
1973#ifdef CONFIG_PM 2031#ifdef CONFIG_PM
1974static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message) 2032static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1975{ 2033{
1976 if (udc_info && udc_info->udc_command) 2034 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1977 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1978 2035
1979 return 0; 2036 return 0;
1980} 2037}
1981 2038
1982static int s3c2410_udc_resume(struct platform_device *pdev) 2039static int s3c2410_udc_resume(struct platform_device *pdev)
1983{ 2040{
1984 if (udc_info && udc_info->udc_command) 2041 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1985 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1986 2042
1987 return 0; 2043 return 0;
1988} 2044}
diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c
index 1eda968b5644..2ac1d2147325 100644
--- a/drivers/usb/gadget/u_ether.c
+++ b/drivers/usb/gadget/u_ether.c
@@ -241,7 +241,7 @@ rx_submit(struct eth_dev *dev, struct usb_request *req, gfp_t gfp_flags)
241 size -= size % out->maxpacket; 241 size -= size % out->maxpacket;
242 242
243 if (dev->port_usb->is_fixed) 243 if (dev->port_usb->is_fixed)
244 size = max(size, dev->port_usb->fixed_out_len); 244 size = max_t(size_t, size, dev->port_usb->fixed_out_len);
245 245
246 skb = alloc_skb(size + NET_IP_ALIGN, gfp_flags); 246 skb = alloc_skb(size + NET_IP_ALIGN, gfp_flags);
247 if (skb == NULL) { 247 if (skb == NULL) {
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-03 16:03:30 -0500