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-rw-r--r--drivers/usb/gadget/Kconfig4
-rw-r--r--drivers/usb/gadget/at91_udc.c4
-rw-r--r--drivers/usb/gadget/ether.c6
-rw-r--r--drivers/usb/gadget/file_storage.c38
-rw-r--r--drivers/usb/gadget/gadget_chips.h6
-rw-r--r--drivers/usb/gadget/inode.c25
-rw-r--r--drivers/usb/gadget/net2280.c108
-rw-r--r--drivers/usb/gadget/net2280.h415
-rw-r--r--drivers/usb/gadget/zero.c7
9 files changed, 137 insertions, 476 deletions
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index d80f71877d68..363b2ad74ae6 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -69,11 +69,11 @@ choice
69 often need board-specific hooks. 69 often need board-specific hooks.
70 70
71config USB_GADGET_NET2280 71config USB_GADGET_NET2280
72 boolean "NetChip 2280" 72 boolean "NetChip 228x"
73 depends on PCI 73 depends on PCI
74 select USB_GADGET_DUALSPEED 74 select USB_GADGET_DUALSPEED
75 help 75 help
76 NetChip 2280 is a PCI based USB peripheral controller which 76 NetChip 2280 / 2282 is a PCI based USB peripheral controller which
77 supports both full and high speed USB 2.0 data transfers. 77 supports both full and high speed USB 2.0 data transfers.
78 78
79 It has six configurable endpoints, as well as endpoint zero 79 It has six configurable endpoints, as well as endpoint zero
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 865858cfd1c2..b8d0b7825bf3 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1709,7 +1709,7 @@ static int __devexit at91udc_remove(struct platform_device *dev)
1709} 1709}
1710 1710
1711#ifdef CONFIG_PM 1711#ifdef CONFIG_PM
1712static int at91udc_suspend(struct platform_device *dev, u32 state, u32 level) 1712static int at91udc_suspend(struct platform_device *dev, pm_message_t mesg)
1713{ 1713{
1714 struct at91_udc *udc = platform_get_drvdata(dev); 1714 struct at91_udc *udc = platform_get_drvdata(dev);
1715 1715
@@ -1731,7 +1731,7 @@ static int at91udc_suspend(struct platform_device *dev, u32 state, u32 level)
1731 return 0; 1731 return 0;
1732} 1732}
1733 1733
1734static int at91udc_resume(struct platform_device *dev, u32 level) 1734static int at91udc_resume(struct platform_device *dev)
1735{ 1735{
1736 struct at91_udc *udc = platform_get_drvdata(dev); 1736 struct at91_udc *udc = platform_get_drvdata(dev);
1737 1737
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index c3d8e5c5bf28..9c4422ac9de4 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -2338,6 +2338,9 @@ autoconf_fail:
2338 hs_subset_descriptors(); 2338 hs_subset_descriptors();
2339 } 2339 }
2340 2340
2341 device_desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
2342 usb_gadget_set_selfpowered (gadget);
2343
2341 /* For now RNDIS is always a second config */ 2344 /* For now RNDIS is always a second config */
2342 if (rndis) 2345 if (rndis)
2343 device_desc.bNumConfigurations = 2; 2346 device_desc.bNumConfigurations = 2;
@@ -2361,9 +2364,6 @@ autoconf_fail:
2361#endif 2364#endif
2362#endif /* DUALSPEED */ 2365#endif /* DUALSPEED */
2363 2366
2364 device_desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
2365 usb_gadget_set_selfpowered (gadget);
2366
2367 if (gadget->is_otg) { 2367 if (gadget->is_otg) {
2368 otg_descriptor.bmAttributes |= USB_OTG_HNP, 2368 otg_descriptor.bmAttributes |= USB_OTG_HNP,
2369 eth_config.bmAttributes |= USB_CONFIG_ATT_WAKEUP; 2369 eth_config.bmAttributes |= USB_CONFIG_ATT_WAKEUP;
diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c
index cf3be299e353..6f887478b148 100644
--- a/drivers/usb/gadget/file_storage.c
+++ b/drivers/usb/gadget/file_storage.c
@@ -71,6 +71,12 @@
71 * requirement amounts to two 16K buffers, size configurable by a parameter. 71 * requirement amounts to two 16K buffers, size configurable by a parameter.
72 * Support is included for both full-speed and high-speed operation. 72 * Support is included for both full-speed and high-speed operation.
73 * 73 *
74 * Note that the driver is slightly non-portable in that it assumes a
75 * single memory/DMA buffer will be useable for bulk-in, bulk-out, and
76 * interrupt-in endpoints. With most device controllers this isn't an
77 * issue, but there may be some with hardware restrictions that prevent
78 * a buffer from being used by more than one endpoint.
79 *
74 * Module options: 80 * Module options:
75 * 81 *
76 * file=filename[,filename...] 82 * file=filename[,filename...]
@@ -108,6 +114,14 @@
108 * setting are not allowed when the medium is loaded. 114 * setting are not allowed when the medium is loaded.
109 * 115 *
110 * This gadget driver is heavily based on "Gadget Zero" by David Brownell. 116 * This gadget driver is heavily based on "Gadget Zero" by David Brownell.
117 * The driver's SCSI command interface was based on the "Information
118 * technology - Small Computer System Interface - 2" document from
119 * X3T9.2 Project 375D, Revision 10L, 7-SEP-93, available at
120 * <http://www.t10.org/ftp/t10/drafts/s2/s2-r10l.pdf>. The single exception
121 * is opcode 0x23 (READ FORMAT CAPACITIES), which was based on the
122 * "Universal Serial Bus Mass Storage Class UFI Command Specification"
123 * document, Revision 1.0, December 14, 1998, available at
124 * <http://www.usb.org/developers/devclass_docs/usbmass-ufi10.pdf>.
111 */ 125 */
112 126
113 127
@@ -334,11 +348,9 @@ MODULE_LICENSE("Dual BSD/GPL");
334 348
335#define MAX_LUNS 8 349#define MAX_LUNS 8
336 350
337 /* Arggh! There should be a module_param_array_named macro! */
338static char *file[MAX_LUNS];
339static int ro[MAX_LUNS];
340
341static struct { 351static struct {
352 char *file[MAX_LUNS];
353 int ro[MAX_LUNS];
342 int num_filenames; 354 int num_filenames;
343 int num_ros; 355 int num_ros;
344 unsigned int nluns; 356 unsigned int nluns;
@@ -370,10 +382,11 @@ static struct {
370 }; 382 };
371 383
372 384
373module_param_array(file, charp, &mod_data.num_filenames, S_IRUGO); 385module_param_array_named(file, mod_data.file, charp, &mod_data.num_filenames,
386 S_IRUGO);
374MODULE_PARM_DESC(file, "names of backing files or devices"); 387MODULE_PARM_DESC(file, "names of backing files or devices");
375 388
376module_param_array(ro, bool, &mod_data.num_ros, S_IRUGO); 389module_param_array_named(ro, mod_data.ro, bool, &mod_data.num_ros, S_IRUGO);
377MODULE_PARM_DESC(ro, "true to force read-only"); 390MODULE_PARM_DESC(ro, "true to force read-only");
378 391
379module_param_named(luns, mod_data.nluns, uint, S_IRUGO); 392module_param_named(luns, mod_data.nluns, uint, S_IRUGO);
@@ -1795,6 +1808,7 @@ static int do_write(struct fsg_dev *fsg)
1795 * the bulk-out maxpacket size */ 1808 * the bulk-out maxpacket size */
1796 bh->outreq->length = bh->bulk_out_intended_length = 1809 bh->outreq->length = bh->bulk_out_intended_length =
1797 amount; 1810 amount;
1811 bh->outreq->short_not_ok = 1;
1798 start_transfer(fsg, fsg->bulk_out, bh->outreq, 1812 start_transfer(fsg, fsg->bulk_out, bh->outreq,
1799 &bh->outreq_busy, &bh->state); 1813 &bh->outreq_busy, &bh->state);
1800 fsg->next_buffhd_to_fill = bh->next; 1814 fsg->next_buffhd_to_fill = bh->next;
@@ -2398,6 +2412,7 @@ static int throw_away_data(struct fsg_dev *fsg)
2398 * the bulk-out maxpacket size */ 2412 * the bulk-out maxpacket size */
2399 bh->outreq->length = bh->bulk_out_intended_length = 2413 bh->outreq->length = bh->bulk_out_intended_length =
2400 amount; 2414 amount;
2415 bh->outreq->short_not_ok = 1;
2401 start_transfer(fsg, fsg->bulk_out, bh->outreq, 2416 start_transfer(fsg, fsg->bulk_out, bh->outreq,
2402 &bh->outreq_busy, &bh->state); 2417 &bh->outreq_busy, &bh->state);
2403 fsg->next_buffhd_to_fill = bh->next; 2418 fsg->next_buffhd_to_fill = bh->next;
@@ -3029,6 +3044,7 @@ static int get_next_command(struct fsg_dev *fsg)
3029 3044
3030 /* Queue a request to read a Bulk-only CBW */ 3045 /* Queue a request to read a Bulk-only CBW */
3031 set_bulk_out_req_length(fsg, bh, USB_BULK_CB_WRAP_LEN); 3046 set_bulk_out_req_length(fsg, bh, USB_BULK_CB_WRAP_LEN);
3047 bh->outreq->short_not_ok = 1;
3032 start_transfer(fsg, fsg->bulk_out, bh->outreq, 3048 start_transfer(fsg, fsg->bulk_out, bh->outreq,
3033 &bh->outreq_busy, &bh->state); 3049 &bh->outreq_busy, &bh->state);
3034 3050
@@ -3859,7 +3875,7 @@ static int __init fsg_bind(struct usb_gadget *gadget)
3859 3875
3860 for (i = 0; i < fsg->nluns; ++i) { 3876 for (i = 0; i < fsg->nluns; ++i) {
3861 curlun = &fsg->luns[i]; 3877 curlun = &fsg->luns[i];
3862 curlun->ro = ro[i]; 3878 curlun->ro = mod_data.ro[i];
3863 curlun->dev.parent = &gadget->dev; 3879 curlun->dev.parent = &gadget->dev;
3864 curlun->dev.driver = &fsg_driver.driver; 3880 curlun->dev.driver = &fsg_driver.driver;
3865 dev_set_drvdata(&curlun->dev, fsg); 3881 dev_set_drvdata(&curlun->dev, fsg);
@@ -3876,8 +3892,9 @@ static int __init fsg_bind(struct usb_gadget *gadget)
3876 kref_get(&fsg->ref); 3892 kref_get(&fsg->ref);
3877 } 3893 }
3878 3894
3879 if (file[i] && *file[i]) { 3895 if (mod_data.file[i] && *mod_data.file[i]) {
3880 if ((rc = open_backing_file(curlun, file[i])) != 0) 3896 if ((rc = open_backing_file(curlun,
3897 mod_data.file[i])) != 0)
3881 goto out; 3898 goto out;
3882 } else if (!mod_data.removable) { 3899 } else if (!mod_data.removable) {
3883 ERROR(fsg, "no file given for LUN%d\n", i); 3900 ERROR(fsg, "no file given for LUN%d\n", i);
@@ -3953,6 +3970,9 @@ static int __init fsg_bind(struct usb_gadget *gadget)
3953 for (i = 0; i < NUM_BUFFERS; ++i) { 3970 for (i = 0; i < NUM_BUFFERS; ++i) {
3954 struct fsg_buffhd *bh = &fsg->buffhds[i]; 3971 struct fsg_buffhd *bh = &fsg->buffhds[i];
3955 3972
3973 /* Allocate for the bulk-in endpoint. We assume that
3974 * the buffer will also work with the bulk-out (and
3975 * interrupt-in) endpoint. */
3956 bh->buf = usb_ep_alloc_buffer(fsg->bulk_in, mod_data.buflen, 3976 bh->buf = usb_ep_alloc_buffer(fsg->bulk_in, mod_data.buflen,
3957 &bh->dma, GFP_KERNEL); 3977 &bh->dma, GFP_KERNEL);
3958 if (!bh->buf) 3978 if (!bh->buf)
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index c4081407171f..aa80f0910720 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -100,9 +100,9 @@
100#define gadget_is_musbhsfc(g) 0 100#define gadget_is_musbhsfc(g) 0
101#endif 101#endif
102 102
103/* Mentor high speed "dual role" controller, peripheral mode */ 103/* Mentor high speed "dual role" controller, in peripheral role */
104#ifdef CONFIG_USB_GADGET_MUSBHDRC 104#ifdef CONFIG_USB_GADGET_MUSB_HDRC
105#define gadget_is_musbhdrc(g) !strcmp("musbhdrc_udc", (g)->name) 105#define gadget_is_musbhdrc(g) !strcmp("musb_hdrc", (g)->name)
106#else 106#else
107#define gadget_is_musbhdrc(g) 0 107#define gadget_is_musbhdrc(g) 0
108#endif 108#endif
diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c
index 3f618ce6998d..0eb010a3f5bc 100644
--- a/drivers/usb/gadget/inode.c
+++ b/drivers/usb/gadget/inode.c
@@ -810,7 +810,7 @@ ep_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
810 if (value == 0) 810 if (value == 0)
811 data->state = STATE_EP_ENABLED; 811 data->state = STATE_EP_ENABLED;
812 break; 812 break;
813#ifdef HIGHSPEED 813#ifdef CONFIG_USB_GADGET_DUALSPEED
814 case USB_SPEED_HIGH: 814 case USB_SPEED_HIGH:
815 /* fails if caller didn't provide that descriptor... */ 815 /* fails if caller didn't provide that descriptor... */
816 value = usb_ep_enable (ep, &data->hs_desc); 816 value = usb_ep_enable (ep, &data->hs_desc);
@@ -982,7 +982,7 @@ ep0_read (struct file *fd, char __user *buf, size_t len, loff_t *ptr)
982 /* assume that was SET_CONFIGURATION */ 982 /* assume that was SET_CONFIGURATION */
983 if (dev->current_config) { 983 if (dev->current_config) {
984 unsigned power; 984 unsigned power;
985#ifdef HIGHSPEED 985#ifdef CONFIG_USB_GADGET_DUALSPEED
986 if (dev->gadget->speed == USB_SPEED_HIGH) 986 if (dev->gadget->speed == USB_SPEED_HIGH)
987 power = dev->hs_config->bMaxPower; 987 power = dev->hs_config->bMaxPower;
988 else 988 else
@@ -1262,7 +1262,7 @@ static struct file_operations ep0_io_operations = {
1262 * Unrecognized ep0 requests may be handled in user space. 1262 * Unrecognized ep0 requests may be handled in user space.
1263 */ 1263 */
1264 1264
1265#ifdef HIGHSPEED 1265#ifdef CONFIG_USB_GADGET_DUALSPEED
1266static void make_qualifier (struct dev_data *dev) 1266static void make_qualifier (struct dev_data *dev)
1267{ 1267{
1268 struct usb_qualifier_descriptor qual; 1268 struct usb_qualifier_descriptor qual;
@@ -1291,7 +1291,7 @@ static int
1291config_buf (struct dev_data *dev, u8 type, unsigned index) 1291config_buf (struct dev_data *dev, u8 type, unsigned index)
1292{ 1292{
1293 int len; 1293 int len;
1294#ifdef HIGHSPEED 1294#ifdef CONFIG_USB_GADGET_DUALSPEED
1295 int hs; 1295 int hs;
1296#endif 1296#endif
1297 1297
@@ -1299,7 +1299,7 @@ config_buf (struct dev_data *dev, u8 type, unsigned index)
1299 if (index > 0) 1299 if (index > 0)
1300 return -EINVAL; 1300 return -EINVAL;
1301 1301
1302#ifdef HIGHSPEED 1302#ifdef CONFIG_USB_GADGET_DUALSPEED
1303 hs = (dev->gadget->speed == USB_SPEED_HIGH); 1303 hs = (dev->gadget->speed == USB_SPEED_HIGH);
1304 if (type == USB_DT_OTHER_SPEED_CONFIG) 1304 if (type == USB_DT_OTHER_SPEED_CONFIG)
1305 hs = !hs; 1305 hs = !hs;
@@ -1335,12 +1335,12 @@ gadgetfs_setup (struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1335 dev->state = STATE_CONNECTED; 1335 dev->state = STATE_CONNECTED;
1336 dev->dev->bMaxPacketSize0 = gadget->ep0->maxpacket; 1336 dev->dev->bMaxPacketSize0 = gadget->ep0->maxpacket;
1337 1337
1338#ifdef HIGHSPEED 1338#ifdef CONFIG_USB_GADGET_DUALSPEED
1339 if (gadget->speed == USB_SPEED_HIGH && dev->hs_config == 0) { 1339 if (gadget->speed == USB_SPEED_HIGH && dev->hs_config == 0) {
1340 ERROR (dev, "no high speed config??\n"); 1340 ERROR (dev, "no high speed config??\n");
1341 return -EINVAL; 1341 return -EINVAL;
1342 } 1342 }
1343#endif /* HIGHSPEED */ 1343#endif /* CONFIG_USB_GADGET_DUALSPEED */
1344 1344
1345 INFO (dev, "connected\n"); 1345 INFO (dev, "connected\n");
1346 event = next_event (dev, GADGETFS_CONNECT); 1346 event = next_event (dev, GADGETFS_CONNECT);
@@ -1352,11 +1352,11 @@ gadgetfs_setup (struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1352 /* ... down_trylock (&data->lock) ... */ 1352 /* ... down_trylock (&data->lock) ... */
1353 if (data->state != STATE_EP_DEFER_ENABLE) 1353 if (data->state != STATE_EP_DEFER_ENABLE)
1354 continue; 1354 continue;
1355#ifdef HIGHSPEED 1355#ifdef CONFIG_USB_GADGET_DUALSPEED
1356 if (gadget->speed == USB_SPEED_HIGH) 1356 if (gadget->speed == USB_SPEED_HIGH)
1357 value = usb_ep_enable (ep, &data->hs_desc); 1357 value = usb_ep_enable (ep, &data->hs_desc);
1358 else 1358 else
1359#endif /* HIGHSPEED */ 1359#endif /* CONFIG_USB_GADGET_DUALSPEED */
1360 value = usb_ep_enable (ep, &data->desc); 1360 value = usb_ep_enable (ep, &data->desc);
1361 if (value) { 1361 if (value) {
1362 ERROR (dev, "deferred %s enable --> %d\n", 1362 ERROR (dev, "deferred %s enable --> %d\n",
@@ -1391,7 +1391,7 @@ gadgetfs_setup (struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1391 value = min (w_length, (u16) sizeof *dev->dev); 1391 value = min (w_length, (u16) sizeof *dev->dev);
1392 req->buf = dev->dev; 1392 req->buf = dev->dev;
1393 break; 1393 break;
1394#ifdef HIGHSPEED 1394#ifdef CONFIG_USB_GADGET_DUALSPEED
1395 case USB_DT_DEVICE_QUALIFIER: 1395 case USB_DT_DEVICE_QUALIFIER:
1396 if (!dev->hs_config) 1396 if (!dev->hs_config)
1397 break; 1397 break;
@@ -1428,7 +1428,7 @@ gadgetfs_setup (struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1428 // user mode expected to disable endpoints 1428 // user mode expected to disable endpoints
1429 } else { 1429 } else {
1430 u8 config, power; 1430 u8 config, power;
1431#ifdef HIGHSPEED 1431#ifdef CONFIG_USB_GADGET_DUALSPEED
1432 if (gadget->speed == USB_SPEED_HIGH) { 1432 if (gadget->speed == USB_SPEED_HIGH) {
1433 config = dev->hs_config->bConfigurationValue; 1433 config = dev->hs_config->bConfigurationValue;
1434 power = dev->hs_config->bMaxPower; 1434 power = dev->hs_config->bMaxPower;
@@ -1614,6 +1614,7 @@ static int activate_ep_files (struct dev_data *dev)
1614 data, &ep_config_operations, 1614 data, &ep_config_operations,
1615 &data->dentry); 1615 &data->dentry);
1616 if (!data->inode) { 1616 if (!data->inode) {
1617 usb_ep_free_request(ep, data->req);
1617 kfree (data); 1618 kfree (data);
1618 goto enomem; 1619 goto enomem;
1619 } 1620 }
@@ -1728,7 +1729,7 @@ gadgetfs_suspend (struct usb_gadget *gadget)
1728} 1729}
1729 1730
1730static struct usb_gadget_driver gadgetfs_driver = { 1731static struct usb_gadget_driver gadgetfs_driver = {
1731#ifdef HIGHSPEED 1732#ifdef CONFIG_USB_GADGET_DUALSPEED
1732 .speed = USB_SPEED_HIGH, 1733 .speed = USB_SPEED_HIGH,
1733#else 1734#else
1734 .speed = USB_SPEED_FULL, 1735 .speed = USB_SPEED_FULL,
diff --git a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c
index fb73dc100535..0b9293493957 100644
--- a/drivers/usb/gadget/net2280.c
+++ b/drivers/usb/gadget/net2280.c
@@ -26,6 +26,8 @@
26 * Copyright (C) 2003 David Brownell 26 * Copyright (C) 2003 David Brownell
27 * Copyright (C) 2003-2005 PLX Technology, Inc. 27 * Copyright (C) 2003-2005 PLX Technology, Inc.
28 * 28 *
29 * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility with 2282 chip
30 *
29 * This program is free software; you can redistribute it and/or modify 31 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License as published by 32 * it under the terms of the GNU General Public License as published by
31 * the Free Software Foundation; either version 2 of the License, or 33 * the Free Software Foundation; either version 2 of the License, or
@@ -71,8 +73,8 @@
71#include <asm/unaligned.h> 73#include <asm/unaligned.h>
72 74
73 75
74#define DRIVER_DESC "PLX NET2280 USB Peripheral Controller" 76#define DRIVER_DESC "PLX NET228x USB Peripheral Controller"
75#define DRIVER_VERSION "2005 Feb 03" 77#define DRIVER_VERSION "2005 Sept 27"
76 78
77#define DMA_ADDR_INVALID (~(dma_addr_t)0) 79#define DMA_ADDR_INVALID (~(dma_addr_t)0)
78#define EP_DONTUSE 13 /* nonzero */ 80#define EP_DONTUSE 13 /* nonzero */
@@ -118,7 +120,7 @@ module_param (fifo_mode, ushort, 0644);
118/* enable_suspend -- When enabled, the driver will respond to 120/* enable_suspend -- When enabled, the driver will respond to
119 * USB suspend requests by powering down the NET2280. Otherwise, 121 * USB suspend requests by powering down the NET2280. Otherwise,
120 * USB suspend requests will be ignored. This is acceptible for 122 * USB suspend requests will be ignored. This is acceptible for
121 * self-powered devices, and helps avoid some quirks. 123 * self-powered devices
122 */ 124 */
123static int enable_suspend = 0; 125static int enable_suspend = 0;
124 126
@@ -223,6 +225,11 @@ net2280_enable (struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
223 ep->is_in = (tmp & USB_DIR_IN) != 0; 225 ep->is_in = (tmp & USB_DIR_IN) != 0;
224 if (!ep->is_in) 226 if (!ep->is_in)
225 writel ((1 << SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp); 227 writel ((1 << SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
228 else if (dev->pdev->device != 0x2280) {
229 /* Added for 2282, Don't use nak packets on an in endpoint, this was ignored on 2280 */
230 writel ((1 << CLEAR_NAK_OUT_PACKETS)
231 | (1 << CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
232 }
226 233
227 writel (tmp, &ep->regs->ep_cfg); 234 writel (tmp, &ep->regs->ep_cfg);
228 235
@@ -232,8 +239,9 @@ net2280_enable (struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
232 writel (tmp, &dev->regs->pciirqenb0); 239 writel (tmp, &dev->regs->pciirqenb0);
233 240
234 tmp = (1 << DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) 241 tmp = (1 << DATA_PACKET_RECEIVED_INTERRUPT_ENABLE)
235 | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE) 242 | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
236 | readl (&ep->regs->ep_irqenb); 243 if (dev->pdev->device == 0x2280)
244 tmp |= readl (&ep->regs->ep_irqenb);
237 writel (tmp, &ep->regs->ep_irqenb); 245 writel (tmp, &ep->regs->ep_irqenb);
238 } else { /* dma, per-request */ 246 } else { /* dma, per-request */
239 tmp = (1 << (8 + ep->num)); /* completion */ 247 tmp = (1 << (8 + ep->num)); /* completion */
@@ -314,10 +322,18 @@ static void ep_reset (struct net2280_regs __iomem *regs, struct net2280_ep *ep)
314 /* init to our chosen defaults, notably so that we NAK OUT 322 /* init to our chosen defaults, notably so that we NAK OUT
315 * packets until the driver queues a read (+note erratum 0112) 323 * packets until the driver queues a read (+note erratum 0112)
316 */ 324 */
317 tmp = (1 << SET_NAK_OUT_PACKETS_MODE) 325 if (!ep->is_in || ep->dev->pdev->device == 0x2280) {
326 tmp = (1 << SET_NAK_OUT_PACKETS_MODE)
318 | (1 << SET_NAK_OUT_PACKETS) 327 | (1 << SET_NAK_OUT_PACKETS)
319 | (1 << CLEAR_EP_HIDE_STATUS_PHASE) 328 | (1 << CLEAR_EP_HIDE_STATUS_PHASE)
320 | (1 << CLEAR_INTERRUPT_MODE); 329 | (1 << CLEAR_INTERRUPT_MODE);
330 } else {
331 /* added for 2282 */
332 tmp = (1 << CLEAR_NAK_OUT_PACKETS_MODE)
333 | (1 << CLEAR_NAK_OUT_PACKETS)
334 | (1 << CLEAR_EP_HIDE_STATUS_PHASE)
335 | (1 << CLEAR_INTERRUPT_MODE);
336 }
321 337
322 if (ep->num != 0) { 338 if (ep->num != 0) {
323 tmp |= (1 << CLEAR_ENDPOINT_TOGGLE) 339 tmp |= (1 << CLEAR_ENDPOINT_TOGGLE)
@@ -326,14 +342,18 @@ static void ep_reset (struct net2280_regs __iomem *regs, struct net2280_ep *ep)
326 writel (tmp, &ep->regs->ep_rsp); 342 writel (tmp, &ep->regs->ep_rsp);
327 343
328 /* scrub most status bits, and flush any fifo state */ 344 /* scrub most status bits, and flush any fifo state */
329 writel ( (1 << TIMEOUT) 345 if (ep->dev->pdev->device == 0x2280)
346 tmp = (1 << FIFO_OVERFLOW)
347 | (1 << FIFO_UNDERFLOW);
348 else
349 tmp = 0;
350
351 writel (tmp | (1 << TIMEOUT)
330 | (1 << USB_STALL_SENT) 352 | (1 << USB_STALL_SENT)
331 | (1 << USB_IN_NAK_SENT) 353 | (1 << USB_IN_NAK_SENT)
332 | (1 << USB_IN_ACK_RCVD) 354 | (1 << USB_IN_ACK_RCVD)
333 | (1 << USB_OUT_PING_NAK_SENT) 355 | (1 << USB_OUT_PING_NAK_SENT)
334 | (1 << USB_OUT_ACK_SENT) 356 | (1 << USB_OUT_ACK_SENT)
335 | (1 << FIFO_OVERFLOW)
336 | (1 << FIFO_UNDERFLOW)
337 | (1 << FIFO_FLUSH) 357 | (1 << FIFO_FLUSH)
338 | (1 << SHORT_PACKET_OUT_DONE_INTERRUPT) 358 | (1 << SHORT_PACKET_OUT_DONE_INTERRUPT)
339 | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT) 359 | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT)
@@ -718,7 +738,7 @@ fill_dma_desc (struct net2280_ep *ep, struct net2280_request *req, int valid)
718 */ 738 */
719 if (ep->is_in) 739 if (ep->is_in)
720 dmacount |= (1 << DMA_DIRECTION); 740 dmacount |= (1 << DMA_DIRECTION);
721 else if ((dmacount % ep->ep.maxpacket) != 0) 741 if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) || ep->dev->pdev->device != 0x2280)
722 dmacount |= (1 << END_OF_CHAIN); 742 dmacount |= (1 << END_OF_CHAIN);
723 743
724 req->valid = valid; 744 req->valid = valid;
@@ -760,9 +780,12 @@ static inline void stop_dma (struct net2280_dma_regs __iomem *dma)
760static void start_queue (struct net2280_ep *ep, u32 dmactl, u32 td_dma) 780static void start_queue (struct net2280_ep *ep, u32 dmactl, u32 td_dma)
761{ 781{
762 struct net2280_dma_regs __iomem *dma = ep->dma; 782 struct net2280_dma_regs __iomem *dma = ep->dma;
783 unsigned int tmp = (1 << VALID_BIT) | (ep->is_in << DMA_DIRECTION);
784
785 if (ep->dev->pdev->device != 0x2280)
786 tmp |= (1 << END_OF_CHAIN);
763 787
764 writel ((1 << VALID_BIT) | (ep->is_in << DMA_DIRECTION), 788 writel (tmp, &dma->dmacount);
765 &dma->dmacount);
766 writel (readl (&dma->dmastat), &dma->dmastat); 789 writel (readl (&dma->dmastat), &dma->dmastat);
767 790
768 writel (td_dma, &dma->dmadesc); 791 writel (td_dma, &dma->dmadesc);
@@ -2110,7 +2133,11 @@ static void handle_ep_small (struct net2280_ep *ep)
2110 VDEBUG (ep->dev, "%s ack ep_stat %08x, req %p\n", 2133 VDEBUG (ep->dev, "%s ack ep_stat %08x, req %p\n",
2111 ep->ep.name, t, req ? &req->req : 0); 2134 ep->ep.name, t, req ? &req->req : 0);
2112#endif 2135#endif
2113 writel (t & ~(1 << NAK_OUT_PACKETS), &ep->regs->ep_stat); 2136 if (!ep->is_in || ep->dev->pdev->device == 0x2280)
2137 writel (t & ~(1 << NAK_OUT_PACKETS), &ep->regs->ep_stat);
2138 else
2139 /* Added for 2282 */
2140 writel (t, &ep->regs->ep_stat);
2114 2141
2115 /* for ep0, monitor token irqs to catch data stage length errors 2142 /* for ep0, monitor token irqs to catch data stage length errors
2116 * and to synchronize on status. 2143 * and to synchronize on status.
@@ -2139,7 +2166,7 @@ static void handle_ep_small (struct net2280_ep *ep)
2139 ep->stopped = 1; 2166 ep->stopped = 1;
2140 set_halt (ep); 2167 set_halt (ep);
2141 mode = 2; 2168 mode = 2;
2142 } else if (!req && ep->stopped) 2169 } else if (!req && !ep->stopped)
2143 write_fifo (ep, NULL); 2170 write_fifo (ep, NULL);
2144 } 2171 }
2145 } else { 2172 } else {
@@ -2214,7 +2241,8 @@ static void handle_ep_small (struct net2280_ep *ep)
2214 if (likely (req)) { 2241 if (likely (req)) {
2215 req->td->dmacount = 0; 2242 req->td->dmacount = 0;
2216 t = readl (&ep->regs->ep_avail); 2243 t = readl (&ep->regs->ep_avail);
2217 dma_done (ep, req, count, t); 2244 dma_done (ep, req, count,
2245 (ep->out_overflow || t) ? -EOVERFLOW : 0);
2218 } 2246 }
2219 2247
2220 /* also flush to prevent erratum 0106 trouble */ 2248 /* also flush to prevent erratum 0106 trouble */
@@ -2252,9 +2280,7 @@ static void handle_ep_small (struct net2280_ep *ep)
2252 /* if we wrote it all, we're usually done */ 2280 /* if we wrote it all, we're usually done */
2253 if (req->req.actual == req->req.length) { 2281 if (req->req.actual == req->req.length) {
2254 if (ep->num == 0) { 2282 if (ep->num == 0) {
2255 /* wait for control status */ 2283 /* send zlps until the status stage */
2256 if (mode != 2)
2257 req = NULL;
2258 } else if (!req->req.zero || len != ep->ep.maxpacket) 2284 } else if (!req->req.zero || len != ep->ep.maxpacket)
2259 mode = 2; 2285 mode = 2;
2260 } 2286 }
@@ -2337,7 +2363,7 @@ static void handle_stat0_irqs (struct net2280 *dev, u32 stat)
2337 u32 raw [2]; 2363 u32 raw [2];
2338 struct usb_ctrlrequest r; 2364 struct usb_ctrlrequest r;
2339 } u; 2365 } u;
2340 int tmp = 0; 2366 int tmp;
2341 struct net2280_request *req; 2367 struct net2280_request *req;
2342 2368
2343 if (dev->gadget.speed == USB_SPEED_UNKNOWN) { 2369 if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
@@ -2364,14 +2390,19 @@ static void handle_stat0_irqs (struct net2280 *dev, u32 stat)
2364 } 2390 }
2365 ep->stopped = 0; 2391 ep->stopped = 0;
2366 dev->protocol_stall = 0; 2392 dev->protocol_stall = 0;
2367 writel ( (1 << TIMEOUT) 2393
2394 if (ep->dev->pdev->device == 0x2280)
2395 tmp = (1 << FIFO_OVERFLOW)
2396 | (1 << FIFO_UNDERFLOW);
2397 else
2398 tmp = 0;
2399
2400 writel (tmp | (1 << TIMEOUT)
2368 | (1 << USB_STALL_SENT) 2401 | (1 << USB_STALL_SENT)
2369 | (1 << USB_IN_NAK_SENT) 2402 | (1 << USB_IN_NAK_SENT)
2370 | (1 << USB_IN_ACK_RCVD) 2403 | (1 << USB_IN_ACK_RCVD)
2371 | (1 << USB_OUT_PING_NAK_SENT) 2404 | (1 << USB_OUT_PING_NAK_SENT)
2372 | (1 << USB_OUT_ACK_SENT) 2405 | (1 << USB_OUT_ACK_SENT)
2373 | (1 << FIFO_OVERFLOW)
2374 | (1 << FIFO_UNDERFLOW)
2375 | (1 << SHORT_PACKET_OUT_DONE_INTERRUPT) 2406 | (1 << SHORT_PACKET_OUT_DONE_INTERRUPT)
2376 | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT) 2407 | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT)
2377 | (1 << DATA_PACKET_RECEIVED_INTERRUPT) 2408 | (1 << DATA_PACKET_RECEIVED_INTERRUPT)
@@ -2385,6 +2416,8 @@ static void handle_stat0_irqs (struct net2280 *dev, u32 stat)
2385 cpu_to_le32s (&u.raw [0]); 2416 cpu_to_le32s (&u.raw [0]);
2386 cpu_to_le32s (&u.raw [1]); 2417 cpu_to_le32s (&u.raw [1]);
2387 2418
2419 tmp = 0;
2420
2388#define w_value le16_to_cpup (&u.r.wValue) 2421#define w_value le16_to_cpup (&u.r.wValue)
2389#define w_index le16_to_cpup (&u.r.wIndex) 2422#define w_index le16_to_cpup (&u.r.wIndex)
2390#define w_length le16_to_cpup (&u.r.wLength) 2423#define w_length le16_to_cpup (&u.r.wLength)
@@ -2594,10 +2627,17 @@ static void handle_stat1_irqs (struct net2280 *dev, u32 stat)
2594 writel (stat, &dev->regs->irqstat1); 2627 writel (stat, &dev->regs->irqstat1);
2595 2628
2596 /* some status we can just ignore */ 2629 /* some status we can just ignore */
2597 stat &= ~((1 << CONTROL_STATUS_INTERRUPT) 2630 if (dev->pdev->device == 0x2280)
2598 | (1 << SUSPEND_REQUEST_INTERRUPT) 2631 stat &= ~((1 << CONTROL_STATUS_INTERRUPT)
2599 | (1 << RESUME_INTERRUPT) 2632 | (1 << SUSPEND_REQUEST_INTERRUPT)
2600 | (1 << SOF_INTERRUPT)); 2633 | (1 << RESUME_INTERRUPT)
2634 | (1 << SOF_INTERRUPT));
2635 else
2636 stat &= ~((1 << CONTROL_STATUS_INTERRUPT)
2637 | (1 << RESUME_INTERRUPT)
2638 | (1 << SOF_DOWN_INTERRUPT)
2639 | (1 << SOF_INTERRUPT));
2640
2601 if (!stat) 2641 if (!stat)
2602 return; 2642 return;
2603 // DEBUG (dev, "irqstat1 %08x\n", stat); 2643 // DEBUG (dev, "irqstat1 %08x\n", stat);
@@ -2702,6 +2742,10 @@ static irqreturn_t net2280_irq (int irq, void *_dev, struct pt_regs * r)
2702{ 2742{
2703 struct net2280 *dev = _dev; 2743 struct net2280 *dev = _dev;
2704 2744
2745 /* shared interrupt, not ours */
2746 if (!(readl(&dev->regs->irqstat0) & (1 << INTA_ASSERTED)))
2747 return IRQ_NONE;
2748
2705 spin_lock (&dev->lock); 2749 spin_lock (&dev->lock);
2706 2750
2707 /* handle disconnect, dma, and more */ 2751 /* handle disconnect, dma, and more */
@@ -2789,13 +2833,13 @@ static int net2280_probe (struct pci_dev *pdev, const struct pci_device_id *id)
2789 } 2833 }
2790 2834
2791 /* alloc, and start init */ 2835 /* alloc, and start init */
2792 dev = kmalloc (sizeof *dev, SLAB_KERNEL); 2836 dev = kzalloc (sizeof *dev, SLAB_KERNEL);
2793 if (dev == NULL){ 2837 if (dev == NULL){
2794 retval = -ENOMEM; 2838 retval = -ENOMEM;
2795 goto done; 2839 goto done;
2796 } 2840 }
2797 2841
2798 memset (dev, 0, sizeof *dev); 2842 pci_set_drvdata (pdev, dev);
2799 spin_lock_init (&dev->lock); 2843 spin_lock_init (&dev->lock);
2800 dev->pdev = pdev; 2844 dev->pdev = pdev;
2801 dev->gadget.ops = &net2280_ops; 2845 dev->gadget.ops = &net2280_ops;
@@ -2908,7 +2952,6 @@ static int net2280_probe (struct pci_dev *pdev, const struct pci_device_id *id)
2908 dev->chiprev = get_idx_reg (dev->regs, REG_CHIPREV) & 0xffff; 2952 dev->chiprev = get_idx_reg (dev->regs, REG_CHIPREV) & 0xffff;
2909 2953
2910 /* done */ 2954 /* done */
2911 pci_set_drvdata (pdev, dev);
2912 INFO (dev, "%s\n", driver_desc); 2955 INFO (dev, "%s\n", driver_desc);
2913 INFO (dev, "irq %s, pci mem %p, chip rev %04x\n", 2956 INFO (dev, "irq %s, pci mem %p, chip rev %04x\n",
2914 bufp, base, dev->chiprev); 2957 bufp, base, dev->chiprev);
@@ -2939,6 +2982,13 @@ static struct pci_device_id pci_ids [] = { {
2939 .device = 0x2280, 2982 .device = 0x2280,
2940 .subvendor = PCI_ANY_ID, 2983 .subvendor = PCI_ANY_ID,
2941 .subdevice = PCI_ANY_ID, 2984 .subdevice = PCI_ANY_ID,
2985}, {
2986 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
2987 .class_mask = ~0,
2988 .vendor = 0x17cc,
2989 .device = 0x2282,
2990 .subvendor = PCI_ANY_ID,
2991 .subdevice = PCI_ANY_ID,
2942 2992
2943}, { /* end: all zeroes */ } 2993}, { /* end: all zeroes */ }
2944}; 2994};
diff --git a/drivers/usb/gadget/net2280.h b/drivers/usb/gadget/net2280.h
index fff4509cf340..957d6df34015 100644
--- a/drivers/usb/gadget/net2280.h
+++ b/drivers/usb/gadget/net2280.h
@@ -22,420 +22,7 @@
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */ 23 */
24 24
25/*-------------------------------------------------------------------------*/ 25#include <linux/usb/net2280.h>
26
27/* NET2280 MEMORY MAPPED REGISTERS
28 *
29 * The register layout came from the chip documentation, and the bit
30 * number definitions were extracted from chip specification.
31 *
32 * Use the shift operator ('<<') to build bit masks, with readl/writel
33 * to access the registers through PCI.
34 */
35
36/* main registers, BAR0 + 0x0000 */
37struct net2280_regs {
38 // offset 0x0000
39 u32 devinit;
40#define LOCAL_CLOCK_FREQUENCY 8
41#define FORCE_PCI_RESET 7
42#define PCI_ID 6
43#define PCI_ENABLE 5
44#define FIFO_SOFT_RESET 4
45#define CFG_SOFT_RESET 3
46#define PCI_SOFT_RESET 2
47#define USB_SOFT_RESET 1
48#define M8051_RESET 0
49 u32 eectl;
50#define EEPROM_ADDRESS_WIDTH 23
51#define EEPROM_CHIP_SELECT_ACTIVE 22
52#define EEPROM_PRESENT 21
53#define EEPROM_VALID 20
54#define EEPROM_BUSY 19
55#define EEPROM_CHIP_SELECT_ENABLE 18
56#define EEPROM_BYTE_READ_START 17
57#define EEPROM_BYTE_WRITE_START 16
58#define EEPROM_READ_DATA 8
59#define EEPROM_WRITE_DATA 0
60 u32 eeclkfreq;
61 u32 _unused0;
62 // offset 0x0010
63
64 u32 pciirqenb0; /* interrupt PCI master ... */
65#define SETUP_PACKET_INTERRUPT_ENABLE 7
66#define ENDPOINT_F_INTERRUPT_ENABLE 6
67#define ENDPOINT_E_INTERRUPT_ENABLE 5
68#define ENDPOINT_D_INTERRUPT_ENABLE 4
69#define ENDPOINT_C_INTERRUPT_ENABLE 3
70#define ENDPOINT_B_INTERRUPT_ENABLE 2
71#define ENDPOINT_A_INTERRUPT_ENABLE 1
72#define ENDPOINT_0_INTERRUPT_ENABLE 0
73 u32 pciirqenb1;
74#define PCI_INTERRUPT_ENABLE 31
75#define POWER_STATE_CHANGE_INTERRUPT_ENABLE 27
76#define PCI_ARBITER_TIMEOUT_INTERRUPT_ENABLE 26
77#define PCI_PARITY_ERROR_INTERRUPT_ENABLE 25
78#define PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE 20
79#define PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE 19
80#define PCI_TARGET_ABORT_ASSERTED_INTERRUPT_ENABLE 18
81#define PCI_RETRY_ABORT_INTERRUPT_ENABLE 17
82#define PCI_MASTER_CYCLE_DONE_INTERRUPT_ENABLE 16
83#define GPIO_INTERRUPT_ENABLE 13
84#define DMA_D_INTERRUPT_ENABLE 12
85#define DMA_C_INTERRUPT_ENABLE 11
86#define DMA_B_INTERRUPT_ENABLE 10
87#define DMA_A_INTERRUPT_ENABLE 9
88#define EEPROM_DONE_INTERRUPT_ENABLE 8
89#define VBUS_INTERRUPT_ENABLE 7
90#define CONTROL_STATUS_INTERRUPT_ENABLE 6
91#define ROOT_PORT_RESET_INTERRUPT_ENABLE 4
92#define SUSPEND_REQUEST_INTERRUPT_ENABLE 3
93#define SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE 2
94#define RESUME_INTERRUPT_ENABLE 1
95#define SOF_INTERRUPT_ENABLE 0
96 u32 cpu_irqenb0; /* ... or onboard 8051 */
97#define SETUP_PACKET_INTERRUPT_ENABLE 7
98#define ENDPOINT_F_INTERRUPT_ENABLE 6
99#define ENDPOINT_E_INTERRUPT_ENABLE 5
100#define ENDPOINT_D_INTERRUPT_ENABLE 4
101#define ENDPOINT_C_INTERRUPT_ENABLE 3
102#define ENDPOINT_B_INTERRUPT_ENABLE 2
103#define ENDPOINT_A_INTERRUPT_ENABLE 1
104#define ENDPOINT_0_INTERRUPT_ENABLE 0
105 u32 cpu_irqenb1;
106#define CPU_INTERRUPT_ENABLE 31
107#define POWER_STATE_CHANGE_INTERRUPT_ENABLE 27
108#define PCI_ARBITER_TIMEOUT_INTERRUPT_ENABLE 26
109#define PCI_PARITY_ERROR_INTERRUPT_ENABLE 25
110#define PCI_INTA_INTERRUPT_ENABLE 24
111#define PCI_PME_INTERRUPT_ENABLE 23
112#define PCI_SERR_INTERRUPT_ENABLE 22
113#define PCI_PERR_INTERRUPT_ENABLE 21
114#define PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE 20
115#define PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE 19
116#define PCI_RETRY_ABORT_INTERRUPT_ENABLE 17
117#define PCI_MASTER_CYCLE_DONE_INTERRUPT_ENABLE 16
118#define GPIO_INTERRUPT_ENABLE 13
119#define DMA_D_INTERRUPT_ENABLE 12
120#define DMA_C_INTERRUPT_ENABLE 11
121#define DMA_B_INTERRUPT_ENABLE 10
122#define DMA_A_INTERRUPT_ENABLE 9
123#define EEPROM_DONE_INTERRUPT_ENABLE 8
124#define VBUS_INTERRUPT_ENABLE 7
125#define CONTROL_STATUS_INTERRUPT_ENABLE 6
126#define ROOT_PORT_RESET_INTERRUPT_ENABLE 4
127#define SUSPEND_REQUEST_INTERRUPT_ENABLE 3
128#define SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE 2
129#define RESUME_INTERRUPT_ENABLE 1
130#define SOF_INTERRUPT_ENABLE 0
131
132 // offset 0x0020
133 u32 _unused1;
134 u32 usbirqenb1;
135#define USB_INTERRUPT_ENABLE 31
136#define POWER_STATE_CHANGE_INTERRUPT_ENABLE 27
137#define PCI_ARBITER_TIMEOUT_INTERRUPT_ENABLE 26
138#define PCI_PARITY_ERROR_INTERRUPT_ENABLE 25
139#define PCI_INTA_INTERRUPT_ENABLE 24
140#define PCI_PME_INTERRUPT_ENABLE 23
141#define PCI_SERR_INTERRUPT_ENABLE 22
142#define PCI_PERR_INTERRUPT_ENABLE 21
143#define PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE 20
144#define PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE 19
145#define PCI_RETRY_ABORT_INTERRUPT_ENABLE 17
146#define PCI_MASTER_CYCLE_DONE_INTERRUPT_ENABLE 16
147#define GPIO_INTERRUPT_ENABLE 13
148#define DMA_D_INTERRUPT_ENABLE 12
149#define DMA_C_INTERRUPT_ENABLE 11
150#define DMA_B_INTERRUPT_ENABLE 10
151#define DMA_A_INTERRUPT_ENABLE 9
152#define EEPROM_DONE_INTERRUPT_ENABLE 8
153#define VBUS_INTERRUPT_ENABLE 7
154#define CONTROL_STATUS_INTERRUPT_ENABLE 6
155#define ROOT_PORT_RESET_INTERRUPT_ENABLE 4
156#define SUSPEND_REQUEST_INTERRUPT_ENABLE 3
157#define SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE 2
158#define RESUME_INTERRUPT_ENABLE 1
159#define SOF_INTERRUPT_ENABLE 0
160 u32 irqstat0;
161#define INTA_ASSERTED 12
162#define SETUP_PACKET_INTERRUPT 7
163#define ENDPOINT_F_INTERRUPT 6
164#define ENDPOINT_E_INTERRUPT 5
165#define ENDPOINT_D_INTERRUPT 4
166#define ENDPOINT_C_INTERRUPT 3
167#define ENDPOINT_B_INTERRUPT 2
168#define ENDPOINT_A_INTERRUPT 1
169#define ENDPOINT_0_INTERRUPT 0
170 u32 irqstat1;
171#define POWER_STATE_CHANGE_INTERRUPT 27
172#define PCI_ARBITER_TIMEOUT_INTERRUPT 26
173#define PCI_PARITY_ERROR_INTERRUPT 25
174#define PCI_INTA_INTERRUPT 24
175#define PCI_PME_INTERRUPT 23
176#define PCI_SERR_INTERRUPT 22
177#define PCI_PERR_INTERRUPT 21
178#define PCI_MASTER_ABORT_RECEIVED_INTERRUPT 20
179#define PCI_TARGET_ABORT_RECEIVED_INTERRUPT 19
180#define PCI_RETRY_ABORT_INTERRUPT 17
181#define PCI_MASTER_CYCLE_DONE_INTERRUPT 16
182#define GPIO_INTERRUPT 13
183#define DMA_D_INTERRUPT 12
184#define DMA_C_INTERRUPT 11
185#define DMA_B_INTERRUPT 10
186#define DMA_A_INTERRUPT 9
187#define EEPROM_DONE_INTERRUPT 8
188#define VBUS_INTERRUPT 7
189#define CONTROL_STATUS_INTERRUPT 6
190#define ROOT_PORT_RESET_INTERRUPT 4
191#define SUSPEND_REQUEST_INTERRUPT 3
192#define SUSPEND_REQUEST_CHANGE_INTERRUPT 2
193#define RESUME_INTERRUPT 1
194#define SOF_INTERRUPT 0
195 // offset 0x0030
196 u32 idxaddr;
197 u32 idxdata;
198 u32 fifoctl;
199#define PCI_BASE2_RANGE 16
200#define IGNORE_FIFO_AVAILABILITY 3
201#define PCI_BASE2_SELECT 2
202#define FIFO_CONFIGURATION_SELECT 0
203 u32 _unused2;
204 // offset 0x0040
205 u32 memaddr;
206#define START 28
207#define DIRECTION 27
208#define FIFO_DIAGNOSTIC_SELECT 24
209#define MEMORY_ADDRESS 0
210 u32 memdata0;
211 u32 memdata1;
212 u32 _unused3;
213 // offset 0x0050
214 u32 gpioctl;
215#define GPIO3_LED_SELECT 12
216#define GPIO3_INTERRUPT_ENABLE 11
217#define GPIO2_INTERRUPT_ENABLE 10
218#define GPIO1_INTERRUPT_ENABLE 9
219#define GPIO0_INTERRUPT_ENABLE 8
220#define GPIO3_OUTPUT_ENABLE 7
221#define GPIO2_OUTPUT_ENABLE 6
222#define GPIO1_OUTPUT_ENABLE 5
223#define GPIO0_OUTPUT_ENABLE 4
224#define GPIO3_DATA 3
225#define GPIO2_DATA 2
226#define GPIO1_DATA 1
227#define GPIO0_DATA 0
228 u32 gpiostat;
229#define GPIO3_INTERRUPT 3
230#define GPIO2_INTERRUPT 2
231#define GPIO1_INTERRUPT 1
232#define GPIO0_INTERRUPT 0
233} __attribute__ ((packed));
234
235/* usb control, BAR0 + 0x0080 */
236struct net2280_usb_regs {
237 // offset 0x0080
238 u32 stdrsp;
239#define STALL_UNSUPPORTED_REQUESTS 31
240#define SET_TEST_MODE 16
241#define GET_OTHER_SPEED_CONFIGURATION 15
242#define GET_DEVICE_QUALIFIER 14
243#define SET_ADDRESS 13
244#define ENDPOINT_SET_CLEAR_HALT 12
245#define DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP 11
246#define GET_STRING_DESCRIPTOR_2 10
247#define GET_STRING_DESCRIPTOR_1 9
248#define GET_STRING_DESCRIPTOR_0 8
249#define GET_SET_INTERFACE 6
250#define GET_SET_CONFIGURATION 5
251#define GET_CONFIGURATION_DESCRIPTOR 4
252#define GET_DEVICE_DESCRIPTOR 3
253#define GET_ENDPOINT_STATUS 2
254#define GET_INTERFACE_STATUS 1
255#define GET_DEVICE_STATUS 0
256 u32 prodvendid;
257#define PRODUCT_ID 16
258#define VENDOR_ID 0
259 u32 relnum;
260 u32 usbctl;
261#define SERIAL_NUMBER_INDEX 16
262#define PRODUCT_ID_STRING_ENABLE 13
263#define VENDOR_ID_STRING_ENABLE 12
264#define USB_ROOT_PORT_WAKEUP_ENABLE 11
265#define VBUS_PIN 10
266#define TIMED_DISCONNECT 9
267#define SUSPEND_IMMEDIATELY 7
268#define SELF_POWERED_USB_DEVICE 6
269#define REMOTE_WAKEUP_SUPPORT 5
270#define PME_POLARITY 4
271#define USB_DETECT_ENABLE 3
272#define PME_WAKEUP_ENABLE 2
273#define DEVICE_REMOTE_WAKEUP_ENABLE 1
274#define SELF_POWERED_STATUS 0
275 // offset 0x0090
276 u32 usbstat;
277#define HIGH_SPEED 7
278#define FULL_SPEED 6
279#define GENERATE_RESUME 5
280#define GENERATE_DEVICE_REMOTE_WAKEUP 4
281 u32 xcvrdiag;
282#define FORCE_HIGH_SPEED_MODE 31
283#define FORCE_FULL_SPEED_MODE 30
284#define USB_TEST_MODE 24
285#define LINE_STATE 16
286#define TRANSCEIVER_OPERATION_MODE 2
287#define TRANSCEIVER_SELECT 1
288#define TERMINATION_SELECT 0
289 u32 setup0123;
290 u32 setup4567;
291 // offset 0x0090
292 u32 _unused0;
293 u32 ouraddr;
294#define FORCE_IMMEDIATE 7
295#define OUR_USB_ADDRESS 0
296 u32 ourconfig;
297} __attribute__ ((packed));
298
299/* pci control, BAR0 + 0x0100 */
300struct net2280_pci_regs {
301 // offset 0x0100
302 u32 pcimstctl;
303#define PCI_ARBITER_PARK_SELECT 13
304#define PCI_MULTI LEVEL_ARBITER 12
305#define PCI_RETRY_ABORT_ENABLE 11
306#define DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE 10
307#define DMA_READ_MULTIPLE_ENABLE 9
308#define DMA_READ_LINE_ENABLE 8
309#define PCI_MASTER_COMMAND_SELECT 6
310#define MEM_READ_OR_WRITE 0
311#define IO_READ_OR_WRITE 1
312#define CFG_READ_OR_WRITE 2
313#define PCI_MASTER_START 5
314#define PCI_MASTER_READ_WRITE 4
315#define PCI_MASTER_WRITE 0
316#define PCI_MASTER_READ 1
317#define PCI_MASTER_BYTE_WRITE_ENABLES 0
318 u32 pcimstaddr;
319 u32 pcimstdata;
320 u32 pcimststat;
321#define PCI_ARBITER_CLEAR 2
322#define PCI_EXTERNAL_ARBITER 1
323#define PCI_HOST_MODE 0
324} __attribute__ ((packed));
325
326/* dma control, BAR0 + 0x0180 ... array of four structs like this,
327 * for channels 0..3. see also struct net2280_dma: descriptor
328 * that can be loaded into some of these registers.
329 */
330struct net2280_dma_regs { /* [11.7] */
331 // offset 0x0180, 0x01a0, 0x01c0, 0x01e0,
332 u32 dmactl;
333#define DMA_SCATTER_GATHER_DONE_INTERRUPT_ENABLE 25
334#define DMA_CLEAR_COUNT_ENABLE 21
335#define DESCRIPTOR_POLLING_RATE 19
336#define POLL_CONTINUOUS 0
337#define POLL_1_USEC 1
338#define POLL_100_USEC 2
339#define POLL_1_MSEC 3
340#define DMA_VALID_BIT_POLLING_ENABLE 18
341#define DMA_VALID_BIT_ENABLE 17
342#define DMA_SCATTER_GATHER_ENABLE 16
343#define DMA_OUT_AUTO_START_ENABLE 4
344#define DMA_PREEMPT_ENABLE 3
345#define DMA_FIFO_VALIDATE 2
346#define DMA_ENABLE 1
347#define DMA_ADDRESS_HOLD 0
348 u32 dmastat;
349#define DMA_SCATTER_GATHER_DONE_INTERRUPT 25
350#define DMA_TRANSACTION_DONE_INTERRUPT 24
351#define DMA_ABORT 1
352#define DMA_START 0
353 u32 _unused0 [2];
354 // offset 0x0190, 0x01b0, 0x01d0, 0x01f0,
355 u32 dmacount;
356#define VALID_BIT 31
357#define DMA_DIRECTION 30
358#define DMA_DONE_INTERRUPT_ENABLE 29
359#define END_OF_CHAIN 28
360#define DMA_BYTE_COUNT_MASK ((1<<24)-1)
361#define DMA_BYTE_COUNT 0
362 u32 dmaaddr;
363 u32 dmadesc;
364 u32 _unused1;
365} __attribute__ ((packed));
366
367/* dedicated endpoint registers, BAR0 + 0x0200 */
368
369struct net2280_dep_regs { /* [11.8] */
370 // offset 0x0200, 0x0210, 0x220, 0x230, 0x240
371 u32 dep_cfg;
372 // offset 0x0204, 0x0214, 0x224, 0x234, 0x244
373 u32 dep_rsp;
374 u32 _unused [2];
375} __attribute__ ((packed));
376
377/* configurable endpoint registers, BAR0 + 0x0300 ... array of seven structs
378 * like this, for ep0 then the configurable endpoints A..F
379 * ep0 reserved for control; E and F have only 64 bytes of fifo
380 */
381struct net2280_ep_regs { /* [11.9] */
382 // offset 0x0300, 0x0320, 0x0340, 0x0360, 0x0380, 0x03a0, 0x03c0
383 u32 ep_cfg;
384#define ENDPOINT_BYTE_COUNT 16
385#define ENDPOINT_ENABLE 10
386#define ENDPOINT_TYPE 8
387#define ENDPOINT_DIRECTION 7
388#define ENDPOINT_NUMBER 0
389 u32 ep_rsp;
390#define SET_NAK_OUT_PACKETS 15
391#define SET_EP_HIDE_STATUS_PHASE 14
392#define SET_EP_FORCE_CRC_ERROR 13
393#define SET_INTERRUPT_MODE 12
394#define SET_CONTROL_STATUS_PHASE_HANDSHAKE 11
395#define SET_NAK_OUT_PACKETS_MODE 10
396#define SET_ENDPOINT_TOGGLE 9
397#define SET_ENDPOINT_HALT 8
398#define CLEAR_NAK_OUT_PACKETS 7
399#define CLEAR_EP_HIDE_STATUS_PHASE 6
400#define CLEAR_EP_FORCE_CRC_ERROR 5
401#define CLEAR_INTERRUPT_MODE 4
402#define CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE 3
403#define CLEAR_NAK_OUT_PACKETS_MODE 2
404#define CLEAR_ENDPOINT_TOGGLE 1
405#define CLEAR_ENDPOINT_HALT 0
406 u32 ep_irqenb;
407#define SHORT_PACKET_OUT_DONE_INTERRUPT_ENABLE 6
408#define SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE 5
409#define DATA_PACKET_RECEIVED_INTERRUPT_ENABLE 3
410#define DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE 2
411#define DATA_OUT_PING_TOKEN_INTERRUPT_ENABLE 1
412#define DATA_IN_TOKEN_INTERRUPT_ENABLE 0
413 u32 ep_stat;
414#define FIFO_VALID_COUNT 24
415#define HIGH_BANDWIDTH_OUT_TRANSACTION_PID 22
416#define TIMEOUT 21
417#define USB_STALL_SENT 20
418#define USB_IN_NAK_SENT 19
419#define USB_IN_ACK_RCVD 18
420#define USB_OUT_PING_NAK_SENT 17
421#define USB_OUT_ACK_SENT 16
422#define FIFO_OVERFLOW 13
423#define FIFO_UNDERFLOW 12
424#define FIFO_FULL 11
425#define FIFO_EMPTY 10
426#define FIFO_FLUSH 9
427#define SHORT_PACKET_OUT_DONE_INTERRUPT 6
428#define SHORT_PACKET_TRANSFERRED_INTERRUPT 5
429#define NAK_OUT_PACKETS 4
430#define DATA_PACKET_RECEIVED_INTERRUPT 3
431#define DATA_PACKET_TRANSMITTED_INTERRUPT 2
432#define DATA_OUT_PING_TOKEN_INTERRUPT 1
433#define DATA_IN_TOKEN_INTERRUPT 0
434 // offset 0x0310, 0x0330, 0x0350, 0x0370, 0x0390, 0x03b0, 0x03d0
435 u32 ep_avail;
436 u32 ep_data;
437 u32 _unused0 [2];
438} __attribute__ ((packed));
439 26
440/*-------------------------------------------------------------------------*/ 27/*-------------------------------------------------------------------------*/
441 28
diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c
index 51424f66a765..68e3d8f5da89 100644
--- a/drivers/usb/gadget/zero.c
+++ b/drivers/usb/gadget/zero.c
@@ -572,9 +572,10 @@ static void source_sink_complete (struct usb_ep *ep, struct usb_request *req)
572 switch (status) { 572 switch (status) {
573 573
574 case 0: /* normal completion? */ 574 case 0: /* normal completion? */
575 if (ep == dev->out_ep) 575 if (ep == dev->out_ep) {
576 check_read_data (dev, ep, req); 576 check_read_data (dev, ep, req);
577 else 577 memset (req->buf, 0x55, req->length);
578 } else
578 reinit_write_data (dev, ep, req); 579 reinit_write_data (dev, ep, req);
579 break; 580 break;
580 581
@@ -626,6 +627,8 @@ source_sink_start_ep (struct usb_ep *ep, gfp_t gfp_flags)
626 627
627 if (strcmp (ep->name, EP_IN_NAME) == 0) 628 if (strcmp (ep->name, EP_IN_NAME) == 0)
628 reinit_write_data (ep->driver_data, ep, req); 629 reinit_write_data (ep->driver_data, ep, req);
630 else
631 memset (req->buf, 0x55, req->length);
629 632
630 status = usb_ep_queue (ep, req, gfp_flags); 633 status = usb_ep_queue (ep, req, gfp_flags);
631 if (status) { 634 if (status) {
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 19:23:22 -0500