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-rw-r--r--drivers/usb/gadget/Kconfig28
-rw-r--r--drivers/usb/gadget/Makefile1
-rw-r--r--drivers/usb/gadget/gadget_chips.h8
-rw-r--r--drivers/usb/gadget/m66592-udc.c286
-rw-r--r--drivers/usb/gadget/m66592-udc.h90
-rw-r--r--drivers/usb/gadget/r8a66597-udc.c1689
-rw-r--r--drivers/usb/gadget/r8a66597-udc.h256
7 files changed, 2176 insertions, 182 deletions
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 7f8e83a954ac..9f986b417c5b 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -251,6 +251,24 @@ config USB_PXA25X_SMALL
251 default y if USB_ETH 251 default y if USB_ETH
252 default y if USB_G_SERIAL 252 default y if USB_G_SERIAL
253 253
254config USB_GADGET_R8A66597
255 boolean "Renesas R8A66597 USB Peripheral Controller"
256 select USB_GADGET_DUALSPEED
257 help
258 R8A66597 is a discrete USB host and peripheral controller chip that
259 supports both full and high speed USB 2.0 data transfers.
260 It has nine configurable endpoints, and endpoint zero.
261
262 Say "y" to link the driver statically, or "m" to build a
263 dynamically linked module called "r8a66597_udc" and force all
264 gadget drivers to also be dynamically linked.
265
266config USB_R8A66597
267 tristate
268 depends on USB_GADGET_R8A66597
269 default USB_GADGET
270 select USB_GADGET_SELECTED
271
254config USB_GADGET_PXA27X 272config USB_GADGET_PXA27X
255 boolean "PXA 27x" 273 boolean "PXA 27x"
256 depends on ARCH_PXA && (PXA27x || PXA3xx) 274 depends on ARCH_PXA && (PXA27x || PXA3xx)
@@ -360,16 +378,6 @@ config USB_M66592
360 default USB_GADGET 378 default USB_GADGET
361 select USB_GADGET_SELECTED 379 select USB_GADGET_SELECTED
362 380
363config SUPERH_BUILT_IN_M66592
364 boolean "Enable SuperH built-in USB like the M66592"
365 depends on USB_GADGET_M66592 && CPU_SUBTYPE_SH7722
366 help
367 SH7722 has USB like the M66592.
368
369 The transfer rate is very slow when use "Ethernet Gadget".
370 However, this problem is improved if change a value of
371 NET_IP_ALIGN to 4.
372
373# 381#
374# Controllers available only in discrete form (and all PCI controllers) 382# Controllers available only in discrete form (and all PCI controllers)
375# 383#
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index e6017e6bf6da..9d7b87c52e9f 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -23,6 +23,7 @@ ifeq ($(CONFIG_ARCH_MXC),y)
23fsl_usb2_udc-objs += fsl_mx3_udc.o 23fsl_usb2_udc-objs += fsl_mx3_udc.o
24endif 24endif
25obj-$(CONFIG_USB_M66592) += m66592-udc.o 25obj-$(CONFIG_USB_M66592) += m66592-udc.o
26obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o
26obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o 27obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o
27obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o 28obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o
28obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o 29obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index 8e0e9a0b7364..f2d270b202f2 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -173,6 +173,12 @@
173// CONFIG_USB_GADGET_AU1X00 173// CONFIG_USB_GADGET_AU1X00
174// ... 174// ...
175 175
176#ifdef CONFIG_USB_GADGET_R8A66597
177#define gadget_is_r8a66597(g) !strcmp("r8a66597_udc", (g)->name)
178#else
179#define gadget_is_r8a66597(g) 0
180#endif
181
176 182
177/** 183/**
178 * usb_gadget_controller_number - support bcdDevice id convention 184 * usb_gadget_controller_number - support bcdDevice id convention
@@ -239,6 +245,8 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget)
239 return 0x23; 245 return 0x23;
240 else if (gadget_is_langwell(gadget)) 246 else if (gadget_is_langwell(gadget))
241 return 0x24; 247 return 0x24;
248 else if (gadget_is_r8a66597(gadget))
249 return 0x25;
242 return -ENOENT; 250 return -ENOENT;
243} 251}
244 252
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c
index 43dcf9e1af6b..a8c8543d1b08 100644
--- a/drivers/usb/gadget/m66592-udc.c
+++ b/drivers/usb/gadget/m66592-udc.c
@@ -25,44 +25,18 @@
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28 28#include <linux/err.h>
29#include <linux/usb/ch9.h> 29#include <linux/usb/ch9.h>
30#include <linux/usb/gadget.h> 30#include <linux/usb/gadget.h>
31 31
32#include "m66592-udc.h" 32#include "m66592-udc.h"
33 33
34
35MODULE_DESCRIPTION("M66592 USB gadget driver"); 34MODULE_DESCRIPTION("M66592 USB gadget driver");
36MODULE_LICENSE("GPL"); 35MODULE_LICENSE("GPL");
37MODULE_AUTHOR("Yoshihiro Shimoda"); 36MODULE_AUTHOR("Yoshihiro Shimoda");
38MODULE_ALIAS("platform:m66592_udc"); 37MODULE_ALIAS("platform:m66592_udc");
39 38
40#define DRIVER_VERSION "18 Oct 2007" 39#define DRIVER_VERSION "21 July 2009"
41
42/* module parameters */
43#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
44static unsigned short endian = M66592_LITTLE;
45module_param(endian, ushort, 0644);
46MODULE_PARM_DESC(endian, "data endian: big=0, little=0 (default=0)");
47#else
48static unsigned short clock = M66592_XTAL24;
49module_param(clock, ushort, 0644);
50MODULE_PARM_DESC(clock, "input clock: 48MHz=32768, 24MHz=16384, 12MHz=0 "
51 "(default=16384)");
52
53static unsigned short vif = M66592_LDRV;
54module_param(vif, ushort, 0644);
55MODULE_PARM_DESC(vif, "input VIF: 3.3V=32768, 1.5V=0 (default=32768)");
56
57static unsigned short endian;
58module_param(endian, ushort, 0644);
59MODULE_PARM_DESC(endian, "data endian: big=256, little=0 (default=0)");
60
61static unsigned short irq_sense = M66592_INTL;
62module_param(irq_sense, ushort, 0644);
63MODULE_PARM_DESC(irq_sense, "IRQ sense: low level=2, falling edge=0 "
64 "(default=2)");
65#endif
66 40
67static const char udc_name[] = "m66592_udc"; 41static const char udc_name[] = "m66592_udc";
68static const char *m66592_ep_name[] = { 42static const char *m66592_ep_name[] = {
@@ -244,6 +218,7 @@ static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum)
244static inline void pipe_change(struct m66592 *m66592, u16 pipenum) 218static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
245{ 219{
246 struct m66592_ep *ep = m66592->pipenum2ep[pipenum]; 220 struct m66592_ep *ep = m66592->pipenum2ep[pipenum];
221 unsigned short mbw;
247 222
248 if (ep->use_dma) 223 if (ep->use_dma)
249 return; 224 return;
@@ -252,7 +227,12 @@ static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
252 227
253 ndelay(450); 228 ndelay(450);
254 229
255 m66592_bset(m66592, M66592_MBW, ep->fifosel); 230 if (m66592->pdata->on_chip)
231 mbw = M66592_MBW_32;
232 else
233 mbw = M66592_MBW_16;
234
235 m66592_bset(m66592, mbw, ep->fifosel);
256} 236}
257 237
258static int pipe_buffer_setting(struct m66592 *m66592, 238static int pipe_buffer_setting(struct m66592 *m66592,
@@ -276,24 +256,27 @@ static int pipe_buffer_setting(struct m66592 *m66592,
276 buf_bsize = 0; 256 buf_bsize = 0;
277 break; 257 break;
278 case M66592_BULK: 258 case M66592_BULK:
279 bufnum = m66592->bi_bufnum + 259 /* isochronous pipes may be used as bulk pipes */
280 (info->pipe - M66592_BASE_PIPENUM_BULK) * 16; 260 if (info->pipe > M66592_BASE_PIPENUM_BULK)
281 m66592->bi_bufnum += 16; 261 bufnum = info->pipe - M66592_BASE_PIPENUM_BULK;
262 else
263 bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC;
264
265 bufnum = M66592_BASE_BUFNUM + (bufnum * 16);
282 buf_bsize = 7; 266 buf_bsize = 7;
283 pipecfg |= M66592_DBLB; 267 pipecfg |= M66592_DBLB;
284 if (!info->dir_in) 268 if (!info->dir_in)
285 pipecfg |= M66592_SHTNAK; 269 pipecfg |= M66592_SHTNAK;
286 break; 270 break;
287 case M66592_ISO: 271 case M66592_ISO:
288 bufnum = m66592->bi_bufnum + 272 bufnum = M66592_BASE_BUFNUM +
289 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16; 273 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16;
290 m66592->bi_bufnum += 16;
291 buf_bsize = 7; 274 buf_bsize = 7;
292 break; 275 break;
293 } 276 }
294 if (m66592->bi_bufnum > M66592_MAX_BUFNUM) { 277
295 pr_err("m66592 pipe memory is insufficient(%d)\n", 278 if (buf_bsize && ((bufnum + 16) >= M66592_MAX_BUFNUM)) {
296 m66592->bi_bufnum); 279 pr_err("m66592 pipe memory is insufficient\n");
297 return -ENOMEM; 280 return -ENOMEM;
298 } 281 }
299 282
@@ -313,17 +296,6 @@ static void pipe_buffer_release(struct m66592 *m66592,
313 if (info->pipe == 0) 296 if (info->pipe == 0)
314 return; 297 return;
315 298
316 switch (info->type) {
317 case M66592_BULK:
318 if (is_bulk_pipe(info->pipe))
319 m66592->bi_bufnum -= 16;
320 break;
321 case M66592_ISO:
322 if (is_isoc_pipe(info->pipe))
323 m66592->bi_bufnum -= 16;
324 break;
325 }
326
327 if (is_bulk_pipe(info->pipe)) { 299 if (is_bulk_pipe(info->pipe)) {
328 m66592->bulk--; 300 m66592->bulk--;
329 } else if (is_interrupt_pipe(info->pipe)) 301 } else if (is_interrupt_pipe(info->pipe))
@@ -340,6 +312,7 @@ static void pipe_buffer_release(struct m66592 *m66592,
340static void pipe_initialize(struct m66592_ep *ep) 312static void pipe_initialize(struct m66592_ep *ep)
341{ 313{
342 struct m66592 *m66592 = ep->m66592; 314 struct m66592 *m66592 = ep->m66592;
315 unsigned short mbw;
343 316
344 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel); 317 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel);
345 318
@@ -351,7 +324,12 @@ static void pipe_initialize(struct m66592_ep *ep)
351 324
352 ndelay(450); 325 ndelay(450);
353 326
354 m66592_bset(m66592, M66592_MBW, ep->fifosel); 327 if (m66592->pdata->on_chip)
328 mbw = M66592_MBW_32;
329 else
330 mbw = M66592_MBW_16;
331
332 m66592_bset(m66592, mbw, ep->fifosel);
355 } 333 }
356} 334}
357 335
@@ -367,15 +345,13 @@ static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep,
367 ep->fifosel = M66592_D0FIFOSEL; 345 ep->fifosel = M66592_D0FIFOSEL;
368 ep->fifoctr = M66592_D0FIFOCTR; 346 ep->fifoctr = M66592_D0FIFOCTR;
369 ep->fifotrn = M66592_D0FIFOTRN; 347 ep->fifotrn = M66592_D0FIFOTRN;
370#if !defined(CONFIG_SUPERH_BUILT_IN_M66592) 348 } else if (!m66592->pdata->on_chip && m66592->num_dma == 1) {
371 } else if (m66592->num_dma == 1) {
372 m66592->num_dma++; 349 m66592->num_dma++;
373 ep->use_dma = 1; 350 ep->use_dma = 1;
374 ep->fifoaddr = M66592_D1FIFO; 351 ep->fifoaddr = M66592_D1FIFO;
375 ep->fifosel = M66592_D1FIFOSEL; 352 ep->fifosel = M66592_D1FIFOSEL;
376 ep->fifoctr = M66592_D1FIFOCTR; 353 ep->fifoctr = M66592_D1FIFOCTR;
377 ep->fifotrn = M66592_D1FIFOTRN; 354 ep->fifotrn = M66592_D1FIFOTRN;
378#endif
379 } else { 355 } else {
380 ep->use_dma = 0; 356 ep->use_dma = 0;
381 ep->fifoaddr = M66592_CFIFO; 357 ep->fifoaddr = M66592_CFIFO;
@@ -620,76 +596,120 @@ static void start_ep0(struct m66592_ep *ep, struct m66592_request *req)
620 } 596 }
621} 597}
622 598
623#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
624static void init_controller(struct m66592 *m66592) 599static void init_controller(struct m66592 *m66592)
625{ 600{
626 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ 601 unsigned int endian;
627 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
628 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
629 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
630 602
631 /* This is a workaound for SH7722 2nd cut */ 603 if (m66592->pdata->on_chip) {
632 m66592_bset(m66592, 0x8000, M66592_DVSTCTR); 604 if (m66592->pdata->endian)
633 m66592_bset(m66592, 0x1000, M66592_TESTMODE); 605 endian = 0; /* big endian */
634 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR); 606 else
607 endian = M66592_LITTLE; /* little endian */
635 608
636 m66592_bset(m66592, M66592_INTL, M66592_INTENB1); 609 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
610 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
611 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
612 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
637 613
638 m66592_write(m66592, 0, M66592_CFBCFG); 614 /* This is a workaound for SH7722 2nd cut */
639 m66592_write(m66592, 0, M66592_D0FBCFG); 615 m66592_bset(m66592, 0x8000, M66592_DVSTCTR);
640 m66592_bset(m66592, endian, M66592_CFBCFG); 616 m66592_bset(m66592, 0x1000, M66592_TESTMODE);
641 m66592_bset(m66592, endian, M66592_D0FBCFG); 617 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR);
642}
643#else /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
644static void init_controller(struct m66592 *m66592)
645{
646 m66592_bset(m66592, (vif & M66592_LDRV) | (endian & M66592_BIGEND),
647 M66592_PINCFG);
648 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
649 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, M66592_SYSCFG);
650 618
651 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); 619 m66592_bset(m66592, M66592_INTL, M66592_INTENB1);
652 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); 620
653 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG); 621 m66592_write(m66592, 0, M66592_CFBCFG);
622 m66592_write(m66592, 0, M66592_D0FBCFG);
623 m66592_bset(m66592, endian, M66592_CFBCFG);
624 m66592_bset(m66592, endian, M66592_D0FBCFG);
625 } else {
626 unsigned int clock, vif, irq_sense;
627
628 if (m66592->pdata->endian)
629 endian = M66592_BIGEND; /* big endian */
630 else
631 endian = 0; /* little endian */
632
633 if (m66592->pdata->vif)
634 vif = M66592_LDRV; /* 3.3v */
635 else
636 vif = 0; /* 1.5v */
637
638 switch (m66592->pdata->xtal) {
639 case M66592_PLATDATA_XTAL_12MHZ:
640 clock = M66592_XTAL12;
641 break;
642 case M66592_PLATDATA_XTAL_24MHZ:
643 clock = M66592_XTAL24;
644 break;
645 case M66592_PLATDATA_XTAL_48MHZ:
646 clock = M66592_XTAL48;
647 break;
648 default:
649 pr_warning("m66592-udc: xtal configuration error\n");
650 clock = 0;
651 }
652
653 switch (m66592->irq_trigger) {
654 case IRQF_TRIGGER_LOW:
655 irq_sense = M66592_INTL;
656 break;
657 case IRQF_TRIGGER_FALLING:
658 irq_sense = 0;
659 break;
660 default:
661 pr_warning("m66592-udc: irq trigger config error\n");
662 irq_sense = 0;
663 }
654 664
655 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); 665 m66592_bset(m66592,
666 (vif & M66592_LDRV) | (endian & M66592_BIGEND),
667 M66592_PINCFG);
668 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
669 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL,
670 M66592_SYSCFG);
671 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
672 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
673 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
674
675 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
656 676
657 msleep(3); 677 msleep(3);
658 678
659 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); 679 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
660 680
661 msleep(1); 681 msleep(1);
662 682
663 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); 683 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
664 684
665 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1); 685 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1);
666 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR, 686 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR,
667 M66592_DMA0CFG); 687 M66592_DMA0CFG);
688 }
668} 689}
669#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
670 690
671static void disable_controller(struct m66592 *m66592) 691static void disable_controller(struct m66592 *m66592)
672{ 692{
673#if !defined(CONFIG_SUPERH_BUILT_IN_M66592) 693 if (!m66592->pdata->on_chip) {
674 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); 694 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
675 udelay(1); 695 udelay(1);
676 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); 696 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
677 udelay(1); 697 udelay(1);
678 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG); 698 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG);
679 udelay(1); 699 udelay(1);
680 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG); 700 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG);
681#endif 701 }
682} 702}
683 703
684static void m66592_start_xclock(struct m66592 *m66592) 704static void m66592_start_xclock(struct m66592 *m66592)
685{ 705{
686#if !defined(CONFIG_SUPERH_BUILT_IN_M66592)
687 u16 tmp; 706 u16 tmp;
688 707
689 tmp = m66592_read(m66592, M66592_SYSCFG); 708 if (!m66592->pdata->on_chip) {
690 if (!(tmp & M66592_XCKE)) 709 tmp = m66592_read(m66592, M66592_SYSCFG);
691 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); 710 if (!(tmp & M66592_XCKE))
692#endif 711 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
712 }
693} 713}
694 714
695/*-------------------------------------------------------------------------*/ 715/*-------------------------------------------------------------------------*/
@@ -1177,8 +1197,7 @@ static irqreturn_t m66592_irq(int irq, void *_m66592)
1177 intsts0 = m66592_read(m66592, M66592_INTSTS0); 1197 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1178 intenb0 = m66592_read(m66592, M66592_INTENB0); 1198 intenb0 = m66592_read(m66592, M66592_INTENB0);
1179 1199
1180#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 1200 if (m66592->pdata->on_chip && !intsts0 && !intenb0) {
1181 if (!intsts0 && !intenb0) {
1182 /* 1201 /*
1183 * When USB clock stops, it cannot read register. Even if a 1202 * When USB clock stops, it cannot read register. Even if a
1184 * clock stops, the interrupt occurs. So this driver turn on 1203 * clock stops, the interrupt occurs. So this driver turn on
@@ -1188,7 +1207,6 @@ static irqreturn_t m66592_irq(int irq, void *_m66592)
1188 intsts0 = m66592_read(m66592, M66592_INTSTS0); 1207 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1189 intenb0 = m66592_read(m66592, M66592_INTENB0); 1208 intenb0 = m66592_read(m66592, M66592_INTENB0);
1190 } 1209 }
1191#endif
1192 1210
1193 savepipe = m66592_read(m66592, M66592_CFIFOSEL); 1211 savepipe = m66592_read(m66592, M66592_CFIFOSEL);
1194 1212
@@ -1534,9 +1552,11 @@ static int __exit m66592_remove(struct platform_device *pdev)
1534 iounmap(m66592->reg); 1552 iounmap(m66592->reg);
1535 free_irq(platform_get_irq(pdev, 0), m66592); 1553 free_irq(platform_get_irq(pdev, 0), m66592);
1536 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); 1554 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1537#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1555#ifdef CONFIG_HAVE_CLK
1538 clk_disable(m66592->clk); 1556 if (m66592->pdata->on_chip) {
1539 clk_put(m66592->clk); 1557 clk_disable(m66592->clk);
1558 clk_put(m66592->clk);
1559 }
1540#endif 1560#endif
1541 kfree(m66592); 1561 kfree(m66592);
1542 return 0; 1562 return 0;
@@ -1548,11 +1568,10 @@ static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1548 1568
1549static int __init m66592_probe(struct platform_device *pdev) 1569static int __init m66592_probe(struct platform_device *pdev)
1550{ 1570{
1551 struct resource *res; 1571 struct resource *res, *ires;
1552 int irq;
1553 void __iomem *reg = NULL; 1572 void __iomem *reg = NULL;
1554 struct m66592 *m66592 = NULL; 1573 struct m66592 *m66592 = NULL;
1555#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1574#ifdef CONFIG_HAVE_CLK
1556 char clk_name[8]; 1575 char clk_name[8];
1557#endif 1576#endif
1558 int ret = 0; 1577 int ret = 0;
@@ -1565,10 +1584,11 @@ static int __init m66592_probe(struct platform_device *pdev)
1565 goto clean_up; 1584 goto clean_up;
1566 } 1585 }
1567 1586
1568 irq = platform_get_irq(pdev, 0); 1587 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1569 if (irq < 0) { 1588 if (!ires) {
1570 ret = -ENODEV; 1589 ret = -ENODEV;
1571 pr_err("platform_get_irq error.\n"); 1590 dev_err(&pdev->dev,
1591 "platform_get_resource IORESOURCE_IRQ error.\n");
1572 goto clean_up; 1592 goto clean_up;
1573 } 1593 }
1574 1594
@@ -1579,6 +1599,12 @@ static int __init m66592_probe(struct platform_device *pdev)
1579 goto clean_up; 1599 goto clean_up;
1580 } 1600 }
1581 1601
1602 if (pdev->dev.platform_data == NULL) {
1603 dev_err(&pdev->dev, "no platform data\n");
1604 ret = -ENODEV;
1605 goto clean_up;
1606 }
1607
1582 /* initialize ucd */ 1608 /* initialize ucd */
1583 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); 1609 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL);
1584 if (m66592 == NULL) { 1610 if (m66592 == NULL) {
@@ -1586,6 +1612,9 @@ static int __init m66592_probe(struct platform_device *pdev)
1586 goto clean_up; 1612 goto clean_up;
1587 } 1613 }
1588 1614
1615 m66592->pdata = pdev->dev.platform_data;
1616 m66592->irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1617
1589 spin_lock_init(&m66592->lock); 1618 spin_lock_init(&m66592->lock);
1590 dev_set_drvdata(&pdev->dev, m66592); 1619 dev_set_drvdata(&pdev->dev, m66592);
1591 1620
@@ -1603,24 +1632,25 @@ static int __init m66592_probe(struct platform_device *pdev)
1603 m66592->timer.data = (unsigned long)m66592; 1632 m66592->timer.data = (unsigned long)m66592;
1604 m66592->reg = reg; 1633 m66592->reg = reg;
1605 1634
1606 m66592->bi_bufnum = M66592_BASE_BUFNUM; 1635 ret = request_irq(ires->start, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1607
1608 ret = request_irq(irq, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1609 udc_name, m66592); 1636 udc_name, m66592);
1610 if (ret < 0) { 1637 if (ret < 0) {
1611 pr_err("request_irq error (%d)\n", ret); 1638 pr_err("request_irq error (%d)\n", ret);
1612 goto clean_up; 1639 goto clean_up;
1613 } 1640 }
1614 1641
1615#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1642#ifdef CONFIG_HAVE_CLK
1616 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id); 1643 if (m66592->pdata->on_chip) {
1617 m66592->clk = clk_get(&pdev->dev, clk_name); 1644 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id);
1618 if (IS_ERR(m66592->clk)) { 1645 m66592->clk = clk_get(&pdev->dev, clk_name);
1619 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); 1646 if (IS_ERR(m66592->clk)) {
1620 ret = PTR_ERR(m66592->clk); 1647 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
1621 goto clean_up2; 1648 clk_name);
1649 ret = PTR_ERR(m66592->clk);
1650 goto clean_up2;
1651 }
1652 clk_enable(m66592->clk);
1622 } 1653 }
1623 clk_enable(m66592->clk);
1624#endif 1654#endif
1625 INIT_LIST_HEAD(&m66592->gadget.ep_list); 1655 INIT_LIST_HEAD(&m66592->gadget.ep_list);
1626 m66592->gadget.ep0 = &m66592->ep[0].ep; 1656 m66592->gadget.ep0 = &m66592->ep[0].ep;
@@ -1662,12 +1692,14 @@ static int __init m66592_probe(struct platform_device *pdev)
1662 return 0; 1692 return 0;
1663 1693
1664clean_up3: 1694clean_up3:
1665#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1695#ifdef CONFIG_HAVE_CLK
1666 clk_disable(m66592->clk); 1696 if (m66592->pdata->on_chip) {
1667 clk_put(m66592->clk); 1697 clk_disable(m66592->clk);
1698 clk_put(m66592->clk);
1699 }
1668clean_up2: 1700clean_up2:
1669#endif 1701#endif
1670 free_irq(irq, m66592); 1702 free_irq(ires->start, m66592);
1671clean_up: 1703clean_up:
1672 if (m66592) { 1704 if (m66592) {
1673 if (m66592->ep0_req) 1705 if (m66592->ep0_req)
diff --git a/drivers/usb/gadget/m66592-udc.h b/drivers/usb/gadget/m66592-udc.h
index 286ce07e7960..8b960deed680 100644
--- a/drivers/usb/gadget/m66592-udc.h
+++ b/drivers/usb/gadget/m66592-udc.h
@@ -23,10 +23,12 @@
23#ifndef __M66592_UDC_H__ 23#ifndef __M66592_UDC_H__
24#define __M66592_UDC_H__ 24#define __M66592_UDC_H__
25 25
26#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 26#ifdef CONFIG_HAVE_CLK
27#include <linux/clk.h> 27#include <linux/clk.h>
28#endif 28#endif
29 29
30#include <linux/usb/m66592.h>
31
30#define M66592_SYSCFG 0x00 32#define M66592_SYSCFG 0x00
31#define M66592_XTAL 0xC000 /* b15-14: Crystal selection */ 33#define M66592_XTAL 0xC000 /* b15-14: Crystal selection */
32#define M66592_XTAL48 0x8000 /* 48MHz */ 34#define M66592_XTAL48 0x8000 /* 48MHz */
@@ -76,11 +78,11 @@
76#define M66592_P_TST_J 0x0001 /* PERI TEST J */ 78#define M66592_P_TST_J 0x0001 /* PERI TEST J */
77#define M66592_P_TST_NORMAL 0x0000 /* PERI Normal Mode */ 79#define M66592_P_TST_NORMAL 0x0000 /* PERI Normal Mode */
78 80
79#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 81/* built-in registers */
80#define M66592_CFBCFG 0x0A 82#define M66592_CFBCFG 0x0A
81#define M66592_D0FBCFG 0x0C 83#define M66592_D0FBCFG 0x0C
82#define M66592_LITTLE 0x0100 /* b8: Little endian mode */ 84#define M66592_LITTLE 0x0100 /* b8: Little endian mode */
83#else 85/* external chip case */
84#define M66592_PINCFG 0x0A 86#define M66592_PINCFG 0x0A
85#define M66592_LDRV 0x8000 /* b15: Drive Current Adjust */ 87#define M66592_LDRV 0x8000 /* b15: Drive Current Adjust */
86#define M66592_BIGEND 0x0100 /* b8: Big endian mode */ 88#define M66592_BIGEND 0x0100 /* b8: Big endian mode */
@@ -100,8 +102,8 @@
100#define M66592_PKTM 0x0020 /* b5: Packet mode */ 102#define M66592_PKTM 0x0020 /* b5: Packet mode */
101#define M66592_DENDE 0x0010 /* b4: Dend enable */ 103#define M66592_DENDE 0x0010 /* b4: Dend enable */
102#define M66592_OBUS 0x0004 /* b2: OUTbus mode */ 104#define M66592_OBUS 0x0004 /* b2: OUTbus mode */
103#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
104 105
106/* common case */
105#define M66592_CFIFO 0x10 107#define M66592_CFIFO 0x10
106#define M66592_D0FIFO 0x14 108#define M66592_D0FIFO 0x14
107#define M66592_D1FIFO 0x18 109#define M66592_D1FIFO 0x18
@@ -113,13 +115,9 @@
113#define M66592_REW 0x4000 /* b14: Buffer rewind */ 115#define M66592_REW 0x4000 /* b14: Buffer rewind */
114#define M66592_DCLRM 0x2000 /* b13: DMA buffer clear mode */ 116#define M66592_DCLRM 0x2000 /* b13: DMA buffer clear mode */
115#define M66592_DREQE 0x1000 /* b12: DREQ output enable */ 117#define M66592_DREQE 0x1000 /* b12: DREQ output enable */
116#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 118#define M66592_MBW_8 0x0000 /* 8bit */
117#define M66592_MBW 0x0800 /* b11: Maximum bit width for FIFO */ 119#define M66592_MBW_16 0x0400 /* 16bit */
118#else 120#define M66592_MBW_32 0x0800 /* 32bit */
119#define M66592_MBW 0x0400 /* b10: Maximum bit width for FIFO */
120#define M66592_MBW_8 0x0000 /* 8bit */
121#define M66592_MBW_16 0x0400 /* 16bit */
122#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
123#define M66592_TRENB 0x0200 /* b9: Transaction counter enable */ 121#define M66592_TRENB 0x0200 /* b9: Transaction counter enable */
124#define M66592_TRCLR 0x0100 /* b8: Transaction counter clear */ 122#define M66592_TRCLR 0x0100 /* b8: Transaction counter clear */
125#define M66592_DEZPM 0x0080 /* b7: Zero-length packet mode */ 123#define M66592_DEZPM 0x0080 /* b7: Zero-length packet mode */
@@ -480,9 +478,11 @@ struct m66592_ep {
480struct m66592 { 478struct m66592 {
481 spinlock_t lock; 479 spinlock_t lock;
482 void __iomem *reg; 480 void __iomem *reg;
483#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 481#ifdef CONFIG_HAVE_CLK
484 struct clk *clk; 482 struct clk *clk;
485#endif 483#endif
484 struct m66592_platdata *pdata;
485 unsigned long irq_trigger;
486 486
487 struct usb_gadget gadget; 487 struct usb_gadget gadget;
488 struct usb_gadget_driver *driver; 488 struct usb_gadget_driver *driver;
@@ -506,7 +506,6 @@ struct m66592 {
506 int interrupt; 506 int interrupt;
507 int isochronous; 507 int isochronous;
508 int num_dma; 508 int num_dma;
509 int bi_bufnum; /* bulk and isochronous's bufnum */
510}; 509};
511 510
512#define gadget_to_m66592(_gadget) container_of(_gadget, struct m66592, gadget) 511#define gadget_to_m66592(_gadget) container_of(_gadget, struct m66592, gadget)
@@ -547,13 +546,13 @@ static inline void m66592_read_fifo(struct m66592 *m66592,
547{ 546{
548 unsigned long fifoaddr = (unsigned long)m66592->reg + offset; 547 unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
549 548
550#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 549 if (m66592->pdata->on_chip) {
551 len = (len + 3) / 4; 550 len = (len + 3) / 4;
552 insl(fifoaddr, buf, len); 551 insl(fifoaddr, buf, len);
553#else 552 } else {
554 len = (len + 1) / 2; 553 len = (len + 1) / 2;
555 insw(fifoaddr, buf, len); 554 insw(fifoaddr, buf, len);
556#endif 555 }
557} 556}
558 557
559static inline void m66592_write(struct m66592 *m66592, u16 val, 558static inline void m66592_write(struct m66592 *m66592, u16 val,
@@ -567,33 +566,34 @@ static inline void m66592_write_fifo(struct m66592 *m66592,
567 void *buf, unsigned long len) 566 void *buf, unsigned long len)
568{ 567{
569 unsigned long fifoaddr = (unsigned long)m66592->reg + offset; 568 unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
570#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 569
571 unsigned long count; 570 if (m66592->pdata->on_chip) {
572 unsigned char *pb; 571 unsigned long count;
573 int i; 572 unsigned char *pb;
574 573 int i;
575 count = len / 4; 574
576 outsl(fifoaddr, buf, count); 575 count = len / 4;
577 576 outsl(fifoaddr, buf, count);
578 if (len & 0x00000003) { 577
579 pb = buf + count * 4; 578 if (len & 0x00000003) {
580 for (i = 0; i < (len & 0x00000003); i++) { 579 pb = buf + count * 4;
581 if (m66592_read(m66592, M66592_CFBCFG)) /* little */ 580 for (i = 0; i < (len & 0x00000003); i++) {
582 outb(pb[i], fifoaddr + (3 - i)); 581 if (m66592_read(m66592, M66592_CFBCFG)) /* le */
583 else 582 outb(pb[i], fifoaddr + (3 - i));
584 outb(pb[i], fifoaddr + i); 583 else
584 outb(pb[i], fifoaddr + i);
585 }
586 }
587 } else {
588 unsigned long odd = len & 0x0001;
589
590 len = len / 2;
591 outsw(fifoaddr, buf, len);
592 if (odd) {
593 unsigned char *p = buf + len*2;
594 outb(*p, fifoaddr);
585 } 595 }
586 } 596 }
587#else
588 unsigned long odd = len & 0x0001;
589
590 len = len / 2;
591 outsw(fifoaddr, buf, len);
592 if (odd) {
593 unsigned char *p = buf + len*2;
594 outb(*p, fifoaddr);
595 }
596#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
597} 597}
598 598
599static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat, 599static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat,
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c
new file mode 100644
index 000000000000..e220fb8091a3
--- /dev/null
+++ b/drivers/usb/gadget/r8a66597-udc.c
@@ -0,0 +1,1689 @@
1/*
2 * R8A66597 UDC (USB gadget)
3 *
4 * Copyright (C) 2006-2009 Renesas Solutions Corp.
5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 *
21 */
22
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26#include <linux/io.h>
27#include <linux/platform_device.h>
28#include <linux/clk.h>
29
30#include <linux/usb/ch9.h>
31#include <linux/usb/gadget.h>
32
33#include "r8a66597-udc.h"
34
35#define DRIVER_VERSION "2009-08-18"
36
37static const char udc_name[] = "r8a66597_udc";
38static const char *r8a66597_ep_name[] = {
39 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7",
40 "ep8", "ep9",
41};
42
43static void disable_controller(struct r8a66597 *r8a66597);
44static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req);
45static void irq_packet_write(struct r8a66597_ep *ep,
46 struct r8a66597_request *req);
47static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req,
48 gfp_t gfp_flags);
49
50static void transfer_complete(struct r8a66597_ep *ep,
51 struct r8a66597_request *req, int status);
52
53/*-------------------------------------------------------------------------*/
54static inline u16 get_usb_speed(struct r8a66597 *r8a66597)
55{
56 return r8a66597_read(r8a66597, DVSTCTR0) & RHST;
57}
58
59static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
60 unsigned long reg)
61{
62 u16 tmp;
63
64 tmp = r8a66597_read(r8a66597, INTENB0);
65 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
66 INTENB0);
67 r8a66597_bset(r8a66597, (1 << pipenum), reg);
68 r8a66597_write(r8a66597, tmp, INTENB0);
69}
70
71static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
72 unsigned long reg)
73{
74 u16 tmp;
75
76 tmp = r8a66597_read(r8a66597, INTENB0);
77 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
78 INTENB0);
79 r8a66597_bclr(r8a66597, (1 << pipenum), reg);
80 r8a66597_write(r8a66597, tmp, INTENB0);
81}
82
83static void r8a66597_usb_connect(struct r8a66597 *r8a66597)
84{
85 r8a66597_bset(r8a66597, CTRE, INTENB0);
86 r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0);
87
88 r8a66597_bset(r8a66597, DPRPU, SYSCFG0);
89}
90
91static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597)
92__releases(r8a66597->lock)
93__acquires(r8a66597->lock)
94{
95 r8a66597_bclr(r8a66597, CTRE, INTENB0);
96 r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0);
97 r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
98
99 r8a66597->gadget.speed = USB_SPEED_UNKNOWN;
100 spin_unlock(&r8a66597->lock);
101 r8a66597->driver->disconnect(&r8a66597->gadget);
102 spin_lock(&r8a66597->lock);
103
104 disable_controller(r8a66597);
105 INIT_LIST_HEAD(&r8a66597->ep[0].queue);
106}
107
108static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum)
109{
110 u16 pid = 0;
111 unsigned long offset;
112
113 if (pipenum == 0)
114 pid = r8a66597_read(r8a66597, DCPCTR) & PID;
115 else if (pipenum < R8A66597_MAX_NUM_PIPE) {
116 offset = get_pipectr_addr(pipenum);
117 pid = r8a66597_read(r8a66597, offset) & PID;
118 } else
119 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
120
121 return pid;
122}
123
124static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum,
125 u16 pid)
126{
127 unsigned long offset;
128
129 if (pipenum == 0)
130 r8a66597_mdfy(r8a66597, pid, PID, DCPCTR);
131 else if (pipenum < R8A66597_MAX_NUM_PIPE) {
132 offset = get_pipectr_addr(pipenum);
133 r8a66597_mdfy(r8a66597, pid, PID, offset);
134 } else
135 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
136}
137
138static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum)
139{
140 control_reg_set_pid(r8a66597, pipenum, PID_BUF);
141}
142
143static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum)
144{
145 control_reg_set_pid(r8a66597, pipenum, PID_NAK);
146}
147
148static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum)
149{
150 control_reg_set_pid(r8a66597, pipenum, PID_STALL);
151}
152
153static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum)
154{
155 u16 ret = 0;
156 unsigned long offset;
157
158 if (pipenum == 0)
159 ret = r8a66597_read(r8a66597, DCPCTR);
160 else if (pipenum < R8A66597_MAX_NUM_PIPE) {
161 offset = get_pipectr_addr(pipenum);
162 ret = r8a66597_read(r8a66597, offset);
163 } else
164 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
165
166 return ret;
167}
168
169static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum)
170{
171 unsigned long offset;
172
173 pipe_stop(r8a66597, pipenum);
174
175 if (pipenum == 0)
176 r8a66597_bset(r8a66597, SQCLR, DCPCTR);
177 else if (pipenum < R8A66597_MAX_NUM_PIPE) {
178 offset = get_pipectr_addr(pipenum);
179 r8a66597_bset(r8a66597, SQCLR, offset);
180 } else
181 printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum);
182}
183
184static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum)
185{
186 u16 tmp;
187 int size;
188
189 if (pipenum == 0) {
190 tmp = r8a66597_read(r8a66597, DCPCFG);
191 if ((tmp & R8A66597_CNTMD) != 0)
192 size = 256;
193 else {
194 tmp = r8a66597_read(r8a66597, DCPMAXP);
195 size = tmp & MAXP;
196 }
197 } else {
198 r8a66597_write(r8a66597, pipenum, PIPESEL);
199 tmp = r8a66597_read(r8a66597, PIPECFG);
200 if ((tmp & R8A66597_CNTMD) != 0) {
201 tmp = r8a66597_read(r8a66597, PIPEBUF);
202 size = ((tmp >> 10) + 1) * 64;
203 } else {
204 tmp = r8a66597_read(r8a66597, PIPEMAXP);
205 size = tmp & MXPS;
206 }
207 }
208
209 return size;
210}
211
212static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
213{
214 if (r8a66597->pdata->on_chip)
215 return MBW_32;
216 else
217 return MBW_16;
218}
219
220static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum)
221{
222 struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum];
223
224 if (ep->use_dma)
225 return;
226
227 r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel);
228
229 ndelay(450);
230
231 r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
232}
233
234static int pipe_buffer_setting(struct r8a66597 *r8a66597,
235 struct r8a66597_pipe_info *info)
236{
237 u16 bufnum = 0, buf_bsize = 0;
238 u16 pipecfg = 0;
239
240 if (info->pipe == 0)
241 return -EINVAL;
242
243 r8a66597_write(r8a66597, info->pipe, PIPESEL);
244
245 if (info->dir_in)
246 pipecfg |= R8A66597_DIR;
247 pipecfg |= info->type;
248 pipecfg |= info->epnum;
249 switch (info->type) {
250 case R8A66597_INT:
251 bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT);
252 buf_bsize = 0;
253 break;
254 case R8A66597_BULK:
255 /* isochronous pipes may be used as bulk pipes */
256 if (info->pipe > R8A66597_BASE_PIPENUM_BULK)
257 bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK;
258 else
259 bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC;
260
261 bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16);
262 buf_bsize = 7;
263 pipecfg |= R8A66597_DBLB;
264 if (!info->dir_in)
265 pipecfg |= R8A66597_SHTNAK;
266 break;
267 case R8A66597_ISO:
268 bufnum = R8A66597_BASE_BUFNUM +
269 (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16;
270 buf_bsize = 7;
271 break;
272 }
273
274 if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) {
275 pr_err(KERN_ERR "r8a66597 pipe memory is insufficient\n");
276 return -ENOMEM;
277 }
278
279 r8a66597_write(r8a66597, pipecfg, PIPECFG);
280 r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF);
281 r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP);
282 if (info->interval)
283 info->interval--;
284 r8a66597_write(r8a66597, info->interval, PIPEPERI);
285
286 return 0;
287}
288
289static void pipe_buffer_release(struct r8a66597 *r8a66597,
290 struct r8a66597_pipe_info *info)
291{
292 if (info->pipe == 0)
293 return;
294
295 if (is_bulk_pipe(info->pipe))
296 r8a66597->bulk--;
297 else if (is_interrupt_pipe(info->pipe))
298 r8a66597->interrupt--;
299 else if (is_isoc_pipe(info->pipe)) {
300 r8a66597->isochronous--;
301 if (info->type == R8A66597_BULK)
302 r8a66597->bulk--;
303 } else
304 printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n",
305 info->pipe);
306}
307
308static void pipe_initialize(struct r8a66597_ep *ep)
309{
310 struct r8a66597 *r8a66597 = ep->r8a66597;
311
312 r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel);
313
314 r8a66597_write(r8a66597, ACLRM, ep->pipectr);
315 r8a66597_write(r8a66597, 0, ep->pipectr);
316 r8a66597_write(r8a66597, SQCLR, ep->pipectr);
317 if (ep->use_dma) {
318 r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel);
319
320 ndelay(450);
321
322 r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
323 }
324}
325
326static void r8a66597_ep_setting(struct r8a66597 *r8a66597,
327 struct r8a66597_ep *ep,
328 const struct usb_endpoint_descriptor *desc,
329 u16 pipenum, int dma)
330{
331 ep->use_dma = 0;
332 ep->fifoaddr = CFIFO;
333 ep->fifosel = CFIFOSEL;
334 ep->fifoctr = CFIFOCTR;
335 ep->fifotrn = 0;
336
337 ep->pipectr = get_pipectr_addr(pipenum);
338 ep->pipenum = pipenum;
339 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
340 r8a66597->pipenum2ep[pipenum] = ep;
341 r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK]
342 = ep;
343 INIT_LIST_HEAD(&ep->queue);
344}
345
346static void r8a66597_ep_release(struct r8a66597_ep *ep)
347{
348 struct r8a66597 *r8a66597 = ep->r8a66597;
349 u16 pipenum = ep->pipenum;
350
351 if (pipenum == 0)
352 return;
353
354 if (ep->use_dma)
355 r8a66597->num_dma--;
356 ep->pipenum = 0;
357 ep->busy = 0;
358 ep->use_dma = 0;
359}
360
361static int alloc_pipe_config(struct r8a66597_ep *ep,
362 const struct usb_endpoint_descriptor *desc)
363{
364 struct r8a66597 *r8a66597 = ep->r8a66597;
365 struct r8a66597_pipe_info info;
366 int dma = 0;
367 unsigned char *counter;
368 int ret;
369
370 ep->desc = desc;
371
372 if (ep->pipenum) /* already allocated pipe */
373 return 0;
374
375 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
376 case USB_ENDPOINT_XFER_BULK:
377 if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) {
378 if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
379 printk(KERN_ERR "bulk pipe is insufficient\n");
380 return -ENODEV;
381 } else {
382 info.pipe = R8A66597_BASE_PIPENUM_ISOC
383 + r8a66597->isochronous;
384 counter = &r8a66597->isochronous;
385 }
386 } else {
387 info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk;
388 counter = &r8a66597->bulk;
389 }
390 info.type = R8A66597_BULK;
391 dma = 1;
392 break;
393 case USB_ENDPOINT_XFER_INT:
394 if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) {
395 printk(KERN_ERR "interrupt pipe is insufficient\n");
396 return -ENODEV;
397 }
398 info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt;
399 info.type = R8A66597_INT;
400 counter = &r8a66597->interrupt;
401 break;
402 case USB_ENDPOINT_XFER_ISOC:
403 if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
404 printk(KERN_ERR "isochronous pipe is insufficient\n");
405 return -ENODEV;
406 }
407 info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous;
408 info.type = R8A66597_ISO;
409 counter = &r8a66597->isochronous;
410 break;
411 default:
412 printk(KERN_ERR "unexpect xfer type\n");
413 return -EINVAL;
414 }
415 ep->type = info.type;
416
417 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
418 info.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
419 info.interval = desc->bInterval;
420 if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
421 info.dir_in = 1;
422 else
423 info.dir_in = 0;
424
425 ret = pipe_buffer_setting(r8a66597, &info);
426 if (ret < 0) {
427 printk(KERN_ERR "pipe_buffer_setting fail\n");
428 return ret;
429 }
430
431 (*counter)++;
432 if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK)
433 r8a66597->bulk++;
434
435 r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma);
436 pipe_initialize(ep);
437
438 return 0;
439}
440
441static int free_pipe_config(struct r8a66597_ep *ep)
442{
443 struct r8a66597 *r8a66597 = ep->r8a66597;
444 struct r8a66597_pipe_info info;
445
446 info.pipe = ep->pipenum;
447 info.type = ep->type;
448 pipe_buffer_release(r8a66597, &info);
449 r8a66597_ep_release(ep);
450
451 return 0;
452}
453
454/*-------------------------------------------------------------------------*/
455static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum)
456{
457 enable_irq_ready(r8a66597, pipenum);
458 enable_irq_nrdy(r8a66597, pipenum);
459}
460
461static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
462{
463 disable_irq_ready(r8a66597, pipenum);
464 disable_irq_nrdy(r8a66597, pipenum);
465}
466
467/* if complete is true, gadget driver complete function is not call */
468static void control_end(struct r8a66597 *r8a66597, unsigned ccpl)
469{
470 r8a66597->ep[0].internal_ccpl = ccpl;
471 pipe_start(r8a66597, 0);
472 r8a66597_bset(r8a66597, CCPL, DCPCTR);
473}
474
475static void start_ep0_write(struct r8a66597_ep *ep,
476 struct r8a66597_request *req)
477{
478 struct r8a66597 *r8a66597 = ep->r8a66597;
479
480 pipe_change(r8a66597, ep->pipenum);
481 r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL);
482 r8a66597_write(r8a66597, BCLR, ep->fifoctr);
483 if (req->req.length == 0) {
484 r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
485 pipe_start(r8a66597, 0);
486 transfer_complete(ep, req, 0);
487 } else {
488 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
489 irq_ep0_write(ep, req);
490 }
491}
492
493static void start_packet_write(struct r8a66597_ep *ep,
494 struct r8a66597_request *req)
495{
496 struct r8a66597 *r8a66597 = ep->r8a66597;
497 u16 tmp;
498
499 pipe_change(r8a66597, ep->pipenum);
500 disable_irq_empty(r8a66597, ep->pipenum);
501 pipe_start(r8a66597, ep->pipenum);
502
503 tmp = r8a66597_read(r8a66597, ep->fifoctr);
504 if (unlikely((tmp & FRDY) == 0))
505 pipe_irq_enable(r8a66597, ep->pipenum);
506 else
507 irq_packet_write(ep, req);
508}
509
510static void start_packet_read(struct r8a66597_ep *ep,
511 struct r8a66597_request *req)
512{
513 struct r8a66597 *r8a66597 = ep->r8a66597;
514 u16 pipenum = ep->pipenum;
515
516 if (ep->pipenum == 0) {
517 r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL);
518 r8a66597_write(r8a66597, BCLR, ep->fifoctr);
519 pipe_start(r8a66597, pipenum);
520 pipe_irq_enable(r8a66597, pipenum);
521 } else {
522 if (ep->use_dma) {
523 r8a66597_bset(r8a66597, TRCLR, ep->fifosel);
524 pipe_change(r8a66597, pipenum);
525 r8a66597_bset(r8a66597, TRENB, ep->fifosel);
526 r8a66597_write(r8a66597,
527 (req->req.length + ep->ep.maxpacket - 1)
528 / ep->ep.maxpacket,
529 ep->fifotrn);
530 }
531 pipe_start(r8a66597, pipenum); /* trigger once */
532 pipe_irq_enable(r8a66597, pipenum);
533 }
534}
535
536static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req)
537{
538 if (ep->desc->bEndpointAddress & USB_DIR_IN)
539 start_packet_write(ep, req);
540 else
541 start_packet_read(ep, req);
542}
543
544static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req)
545{
546 u16 ctsq;
547
548 ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ;
549
550 switch (ctsq) {
551 case CS_RDDS:
552 start_ep0_write(ep, req);
553 break;
554 case CS_WRDS:
555 start_packet_read(ep, req);
556 break;
557
558 case CS_WRND:
559 control_end(ep->r8a66597, 0);
560 break;
561 default:
562 printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq);
563 break;
564 }
565}
566
567static void init_controller(struct r8a66597 *r8a66597)
568{
569 u16 vif = r8a66597->pdata->vif ? LDRV : 0;
570 u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0;
571 u16 endian = r8a66597->pdata->endian ? BIGEND : 0;
572
573 if (r8a66597->pdata->on_chip) {
574 r8a66597_bset(r8a66597, 0x04, SYSCFG1);
575 r8a66597_bset(r8a66597, HSE, SYSCFG0);
576
577 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
578 r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
579 r8a66597_bset(r8a66597, USBE, SYSCFG0);
580
581 r8a66597_bset(r8a66597, SCKE, SYSCFG0);
582
583 r8a66597_bset(r8a66597, irq_sense, INTENB1);
584 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
585 DMA0CFG);
586 } else {
587 r8a66597_bset(r8a66597, vif | endian, PINCFG);
588 r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */
589 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
590 XTAL, SYSCFG0);
591
592 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
593 r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
594 r8a66597_bset(r8a66597, USBE, SYSCFG0);
595
596 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
597
598 msleep(3);
599
600 r8a66597_bset(r8a66597, PLLC, SYSCFG0);
601
602 msleep(1);
603
604 r8a66597_bset(r8a66597, SCKE, SYSCFG0);
605
606 r8a66597_bset(r8a66597, irq_sense, INTENB1);
607 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
608 DMA0CFG);
609 }
610}
611
612static void disable_controller(struct r8a66597 *r8a66597)
613{
614 if (r8a66597->pdata->on_chip) {
615 r8a66597_bset(r8a66597, SCKE, SYSCFG0);
616
617 /* disable interrupts */
618 r8a66597_write(r8a66597, 0, INTENB0);
619 r8a66597_write(r8a66597, 0, INTENB1);
620 r8a66597_write(r8a66597, 0, BRDYENB);
621 r8a66597_write(r8a66597, 0, BEMPENB);
622 r8a66597_write(r8a66597, 0, NRDYENB);
623
624 /* clear status */
625 r8a66597_write(r8a66597, 0, BRDYSTS);
626 r8a66597_write(r8a66597, 0, NRDYSTS);
627 r8a66597_write(r8a66597, 0, BEMPSTS);
628
629 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
630 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
631
632 } else {
633 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
634 udelay(1);
635 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
636 udelay(1);
637 udelay(1);
638 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
639 }
640}
641
642static void r8a66597_start_xclock(struct r8a66597 *r8a66597)
643{
644 u16 tmp;
645
646 if (!r8a66597->pdata->on_chip) {
647 tmp = r8a66597_read(r8a66597, SYSCFG0);
648 if (!(tmp & XCKE))
649 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
650 }
651}
652
653static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep)
654{
655 return list_entry(ep->queue.next, struct r8a66597_request, queue);
656}
657
658/*-------------------------------------------------------------------------*/
659static void transfer_complete(struct r8a66597_ep *ep,
660 struct r8a66597_request *req, int status)
661__releases(r8a66597->lock)
662__acquires(r8a66597->lock)
663{
664 int restart = 0;
665
666 if (unlikely(ep->pipenum == 0)) {
667 if (ep->internal_ccpl) {
668 ep->internal_ccpl = 0;
669 return;
670 }
671 }
672
673 list_del_init(&req->queue);
674 if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
675 req->req.status = -ESHUTDOWN;
676 else
677 req->req.status = status;
678
679 if (!list_empty(&ep->queue))
680 restart = 1;
681
682 spin_unlock(&ep->r8a66597->lock);
683 req->req.complete(&ep->ep, &req->req);
684 spin_lock(&ep->r8a66597->lock);
685
686 if (restart) {
687 req = get_request_from_ep(ep);
688 if (ep->desc)
689 start_packet(ep, req);
690 }
691}
692
693static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req)
694{
695 int i;
696 u16 tmp;
697 unsigned bufsize;
698 size_t size;
699 void *buf;
700 u16 pipenum = ep->pipenum;
701 struct r8a66597 *r8a66597 = ep->r8a66597;
702
703 pipe_change(r8a66597, pipenum);
704 r8a66597_bset(r8a66597, ISEL, ep->fifosel);
705
706 i = 0;
707 do {
708 tmp = r8a66597_read(r8a66597, ep->fifoctr);
709 if (i++ > 100000) {
710 printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus"
711 "conflict. please power off this controller.");
712 return;
713 }
714 ndelay(1);
715 } while ((tmp & FRDY) == 0);
716
717 /* prepare parameters */
718 bufsize = get_buffer_size(r8a66597, pipenum);
719 buf = req->req.buf + req->req.actual;
720 size = min(bufsize, req->req.length - req->req.actual);
721
722 /* write fifo */
723 if (req->req.buf) {
724 if (size > 0)
725 r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size);
726 if ((size == 0) || ((size % ep->ep.maxpacket) != 0))
727 r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
728 }
729
730 /* update parameters */
731 req->req.actual += size;
732
733 /* check transfer finish */
734 if ((!req->req.zero && (req->req.actual == req->req.length))
735 || (size % ep->ep.maxpacket)
736 || (size == 0)) {
737 disable_irq_ready(r8a66597, pipenum);
738 disable_irq_empty(r8a66597, pipenum);
739 } else {
740 disable_irq_ready(r8a66597, pipenum);
741 enable_irq_empty(r8a66597, pipenum);
742 }
743 pipe_start(r8a66597, pipenum);
744}
745
746static void irq_packet_write(struct r8a66597_ep *ep,
747 struct r8a66597_request *req)
748{
749 u16 tmp;
750 unsigned bufsize;
751 size_t size;
752 void *buf;
753 u16 pipenum = ep->pipenum;
754 struct r8a66597 *r8a66597 = ep->r8a66597;
755
756 pipe_change(r8a66597, pipenum);
757 tmp = r8a66597_read(r8a66597, ep->fifoctr);
758 if (unlikely((tmp & FRDY) == 0)) {
759 pipe_stop(r8a66597, pipenum);
760 pipe_irq_disable(r8a66597, pipenum);
761 printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum);
762 return;
763 }
764
765 /* prepare parameters */
766 bufsize = get_buffer_size(r8a66597, pipenum);
767 buf = req->req.buf + req->req.actual;
768 size = min(bufsize, req->req.length - req->req.actual);
769
770 /* write fifo */
771 if (req->req.buf) {
772 r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size);
773 if ((size == 0)
774 || ((size % ep->ep.maxpacket) != 0)
775 || ((bufsize != ep->ep.maxpacket)
776 && (bufsize > size)))
777 r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
778 }
779
780 /* update parameters */
781 req->req.actual += size;
782 /* check transfer finish */
783 if ((!req->req.zero && (req->req.actual == req->req.length))
784 || (size % ep->ep.maxpacket)
785 || (size == 0)) {
786 disable_irq_ready(r8a66597, pipenum);
787 enable_irq_empty(r8a66597, pipenum);
788 } else {
789 disable_irq_empty(r8a66597, pipenum);
790 pipe_irq_enable(r8a66597, pipenum);
791 }
792}
793
794static void irq_packet_read(struct r8a66597_ep *ep,
795 struct r8a66597_request *req)
796{
797 u16 tmp;
798 int rcv_len, bufsize, req_len;
799 int size;
800 void *buf;
801 u16 pipenum = ep->pipenum;
802 struct r8a66597 *r8a66597 = ep->r8a66597;
803 int finish = 0;
804
805 pipe_change(r8a66597, pipenum);
806 tmp = r8a66597_read(r8a66597, ep->fifoctr);
807 if (unlikely((tmp & FRDY) == 0)) {
808 req->req.status = -EPIPE;
809 pipe_stop(r8a66597, pipenum);
810 pipe_irq_disable(r8a66597, pipenum);
811 printk(KERN_ERR "read fifo not ready");
812 return;
813 }
814
815 /* prepare parameters */
816 rcv_len = tmp & DTLN;
817 bufsize = get_buffer_size(r8a66597, pipenum);
818
819 buf = req->req.buf + req->req.actual;
820 req_len = req->req.length - req->req.actual;
821 if (rcv_len < bufsize)
822 size = min(rcv_len, req_len);
823 else
824 size = min(bufsize, req_len);
825
826 /* update parameters */
827 req->req.actual += size;
828
829 /* check transfer finish */
830 if ((!req->req.zero && (req->req.actual == req->req.length))
831 || (size % ep->ep.maxpacket)
832 || (size == 0)) {
833 pipe_stop(r8a66597, pipenum);
834 pipe_irq_disable(r8a66597, pipenum);
835 finish = 1;
836 }
837
838 /* read fifo */
839 if (req->req.buf) {
840 if (size == 0)
841 r8a66597_write(r8a66597, BCLR, ep->fifoctr);
842 else
843 r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size);
844
845 }
846
847 if ((ep->pipenum != 0) && finish)
848 transfer_complete(ep, req, 0);
849}
850
851static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb)
852{
853 u16 check;
854 u16 pipenum;
855 struct r8a66597_ep *ep;
856 struct r8a66597_request *req;
857
858 if ((status & BRDY0) && (enb & BRDY0)) {
859 r8a66597_write(r8a66597, ~BRDY0, BRDYSTS);
860 r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL);
861
862 ep = &r8a66597->ep[0];
863 req = get_request_from_ep(ep);
864 irq_packet_read(ep, req);
865 } else {
866 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
867 check = 1 << pipenum;
868 if ((status & check) && (enb & check)) {
869 r8a66597_write(r8a66597, ~check, BRDYSTS);
870 ep = r8a66597->pipenum2ep[pipenum];
871 req = get_request_from_ep(ep);
872 if (ep->desc->bEndpointAddress & USB_DIR_IN)
873 irq_packet_write(ep, req);
874 else
875 irq_packet_read(ep, req);
876 }
877 }
878 }
879}
880
881static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb)
882{
883 u16 tmp;
884 u16 check;
885 u16 pipenum;
886 struct r8a66597_ep *ep;
887 struct r8a66597_request *req;
888
889 if ((status & BEMP0) && (enb & BEMP0)) {
890 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
891
892 ep = &r8a66597->ep[0];
893 req = get_request_from_ep(ep);
894 irq_ep0_write(ep, req);
895 } else {
896 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
897 check = 1 << pipenum;
898 if ((status & check) && (enb & check)) {
899 r8a66597_write(r8a66597, ~check, BEMPSTS);
900 tmp = control_reg_get(r8a66597, pipenum);
901 if ((tmp & INBUFM) == 0) {
902 disable_irq_empty(r8a66597, pipenum);
903 pipe_irq_disable(r8a66597, pipenum);
904 pipe_stop(r8a66597, pipenum);
905 ep = r8a66597->pipenum2ep[pipenum];
906 req = get_request_from_ep(ep);
907 if (!list_empty(&ep->queue))
908 transfer_complete(ep, req, 0);
909 }
910 }
911 }
912 }
913}
914
915static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
916__releases(r8a66597->lock)
917__acquires(r8a66597->lock)
918{
919 struct r8a66597_ep *ep;
920 u16 pid;
921 u16 status = 0;
922 u16 w_index = le16_to_cpu(ctrl->wIndex);
923
924 switch (ctrl->bRequestType & USB_RECIP_MASK) {
925 case USB_RECIP_DEVICE:
926 status = 1 << USB_DEVICE_SELF_POWERED;
927 break;
928 case USB_RECIP_INTERFACE:
929 status = 0;
930 break;
931 case USB_RECIP_ENDPOINT:
932 ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
933 pid = control_reg_get_pid(r8a66597, ep->pipenum);
934 if (pid == PID_STALL)
935 status = 1 << USB_ENDPOINT_HALT;
936 else
937 status = 0;
938 break;
939 default:
940 pipe_stall(r8a66597, 0);
941 return; /* exit */
942 }
943
944 r8a66597->ep0_data = cpu_to_le16(status);
945 r8a66597->ep0_req->buf = &r8a66597->ep0_data;
946 r8a66597->ep0_req->length = 2;
947 /* AV: what happens if we get called again before that gets through? */
948 spin_unlock(&r8a66597->lock);
949 r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL);
950 spin_lock(&r8a66597->lock);
951}
952
953static void clear_feature(struct r8a66597 *r8a66597,
954 struct usb_ctrlrequest *ctrl)
955{
956 switch (ctrl->bRequestType & USB_RECIP_MASK) {
957 case USB_RECIP_DEVICE:
958 control_end(r8a66597, 1);
959 break;
960 case USB_RECIP_INTERFACE:
961 control_end(r8a66597, 1);
962 break;
963 case USB_RECIP_ENDPOINT: {
964 struct r8a66597_ep *ep;
965 struct r8a66597_request *req;
966 u16 w_index = le16_to_cpu(ctrl->wIndex);
967
968 ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
969 if (!ep->wedge) {
970 pipe_stop(r8a66597, ep->pipenum);
971 control_reg_sqclr(r8a66597, ep->pipenum);
972 spin_unlock(&r8a66597->lock);
973 usb_ep_clear_halt(&ep->ep);
974 spin_lock(&r8a66597->lock);
975 }
976
977 control_end(r8a66597, 1);
978
979 req = get_request_from_ep(ep);
980 if (ep->busy) {
981 ep->busy = 0;
982 if (list_empty(&ep->queue))
983 break;
984 start_packet(ep, req);
985 } else if (!list_empty(&ep->queue))
986 pipe_start(r8a66597, ep->pipenum);
987 }
988 break;
989 default:
990 pipe_stall(r8a66597, 0);
991 break;
992 }
993}
994
995static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
996{
997
998 switch (ctrl->bRequestType & USB_RECIP_MASK) {
999 case USB_RECIP_DEVICE:
1000 control_end(r8a66597, 1);
1001 break;
1002 case USB_RECIP_INTERFACE:
1003 control_end(r8a66597, 1);
1004 break;
1005 case USB_RECIP_ENDPOINT: {
1006 struct r8a66597_ep *ep;
1007 u16 w_index = le16_to_cpu(ctrl->wIndex);
1008
1009 ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1010 pipe_stall(r8a66597, ep->pipenum);
1011
1012 control_end(r8a66597, 1);
1013 }
1014 break;
1015 default:
1016 pipe_stall(r8a66597, 0);
1017 break;
1018 }
1019}
1020
1021/* if return value is true, call class driver's setup() */
1022static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
1023{
1024 u16 *p = (u16 *)ctrl;
1025 unsigned long offset = USBREQ;
1026 int i, ret = 0;
1027
1028 /* read fifo */
1029 r8a66597_write(r8a66597, ~VALID, INTSTS0);
1030
1031 for (i = 0; i < 4; i++)
1032 p[i] = r8a66597_read(r8a66597, offset + i*2);
1033
1034 /* check request */
1035 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1036 switch (ctrl->bRequest) {
1037 case USB_REQ_GET_STATUS:
1038 get_status(r8a66597, ctrl);
1039 break;
1040 case USB_REQ_CLEAR_FEATURE:
1041 clear_feature(r8a66597, ctrl);
1042 break;
1043 case USB_REQ_SET_FEATURE:
1044 set_feature(r8a66597, ctrl);
1045 break;
1046 default:
1047 ret = 1;
1048 break;
1049 }
1050 } else
1051 ret = 1;
1052 return ret;
1053}
1054
1055static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597)
1056{
1057 u16 speed = get_usb_speed(r8a66597);
1058
1059 switch (speed) {
1060 case HSMODE:
1061 r8a66597->gadget.speed = USB_SPEED_HIGH;
1062 break;
1063 case FSMODE:
1064 r8a66597->gadget.speed = USB_SPEED_FULL;
1065 break;
1066 default:
1067 r8a66597->gadget.speed = USB_SPEED_UNKNOWN;
1068 printk(KERN_ERR "USB speed unknown\n");
1069 }
1070}
1071
1072static void irq_device_state(struct r8a66597 *r8a66597)
1073{
1074 u16 dvsq;
1075
1076 dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ;
1077 r8a66597_write(r8a66597, ~DVST, INTSTS0);
1078
1079 if (dvsq == DS_DFLT) {
1080 /* bus reset */
1081 r8a66597->driver->disconnect(&r8a66597->gadget);
1082 r8a66597_update_usb_speed(r8a66597);
1083 }
1084 if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG)
1085 r8a66597_update_usb_speed(r8a66597);
1086 if ((dvsq == DS_CNFG || dvsq == DS_ADDS)
1087 && r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
1088 r8a66597_update_usb_speed(r8a66597);
1089
1090 r8a66597->old_dvsq = dvsq;
1091}
1092
1093static void irq_control_stage(struct r8a66597 *r8a66597)
1094__releases(r8a66597->lock)
1095__acquires(r8a66597->lock)
1096{
1097 struct usb_ctrlrequest ctrl;
1098 u16 ctsq;
1099
1100 ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ;
1101 r8a66597_write(r8a66597, ~CTRT, INTSTS0);
1102
1103 switch (ctsq) {
1104 case CS_IDST: {
1105 struct r8a66597_ep *ep;
1106 struct r8a66597_request *req;
1107 ep = &r8a66597->ep[0];
1108 req = get_request_from_ep(ep);
1109 transfer_complete(ep, req, 0);
1110 }
1111 break;
1112
1113 case CS_RDDS:
1114 case CS_WRDS:
1115 case CS_WRND:
1116 if (setup_packet(r8a66597, &ctrl)) {
1117 spin_unlock(&r8a66597->lock);
1118 if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl)
1119 < 0)
1120 pipe_stall(r8a66597, 0);
1121 spin_lock(&r8a66597->lock);
1122 }
1123 break;
1124 case CS_RDSS:
1125 case CS_WRSS:
1126 control_end(r8a66597, 0);
1127 break;
1128 default:
1129 printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq);
1130 break;
1131 }
1132}
1133
1134static irqreturn_t r8a66597_irq(int irq, void *_r8a66597)
1135{
1136 struct r8a66597 *r8a66597 = _r8a66597;
1137 u16 intsts0;
1138 u16 intenb0;
1139 u16 brdysts, nrdysts, bempsts;
1140 u16 brdyenb, nrdyenb, bempenb;
1141 u16 savepipe;
1142 u16 mask0;
1143
1144 spin_lock(&r8a66597->lock);
1145
1146 intsts0 = r8a66597_read(r8a66597, INTSTS0);
1147 intenb0 = r8a66597_read(r8a66597, INTENB0);
1148
1149 savepipe = r8a66597_read(r8a66597, CFIFOSEL);
1150
1151 mask0 = intsts0 & intenb0;
1152 if (mask0) {
1153 brdysts = r8a66597_read(r8a66597, BRDYSTS);
1154 nrdysts = r8a66597_read(r8a66597, NRDYSTS);
1155 bempsts = r8a66597_read(r8a66597, BEMPSTS);
1156 brdyenb = r8a66597_read(r8a66597, BRDYENB);
1157 nrdyenb = r8a66597_read(r8a66597, NRDYENB);
1158 bempenb = r8a66597_read(r8a66597, BEMPENB);
1159
1160 if (mask0 & VBINT) {
1161 r8a66597_write(r8a66597, 0xffff & ~VBINT,
1162 INTSTS0);
1163 r8a66597_start_xclock(r8a66597);
1164
1165 /* start vbus sampling */
1166 r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0)
1167 & VBSTS;
1168 r8a66597->scount = R8A66597_MAX_SAMPLING;
1169
1170 mod_timer(&r8a66597->timer,
1171 jiffies + msecs_to_jiffies(50));
1172 }
1173 if (intsts0 & DVSQ)
1174 irq_device_state(r8a66597);
1175
1176 if ((intsts0 & BRDY) && (intenb0 & BRDYE)
1177 && (brdysts & brdyenb))
1178 irq_pipe_ready(r8a66597, brdysts, brdyenb);
1179 if ((intsts0 & BEMP) && (intenb0 & BEMPE)
1180 && (bempsts & bempenb))
1181 irq_pipe_empty(r8a66597, bempsts, bempenb);
1182
1183 if (intsts0 & CTRT)
1184 irq_control_stage(r8a66597);
1185 }
1186
1187 r8a66597_write(r8a66597, savepipe, CFIFOSEL);
1188
1189 spin_unlock(&r8a66597->lock);
1190 return IRQ_HANDLED;
1191}
1192
1193static void r8a66597_timer(unsigned long _r8a66597)
1194{
1195 struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597;
1196 unsigned long flags;
1197 u16 tmp;
1198
1199 spin_lock_irqsave(&r8a66597->lock, flags);
1200 tmp = r8a66597_read(r8a66597, SYSCFG0);
1201 if (r8a66597->scount > 0) {
1202 tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS;
1203 if (tmp == r8a66597->old_vbus) {
1204 r8a66597->scount--;
1205 if (r8a66597->scount == 0) {
1206 if (tmp == VBSTS)
1207 r8a66597_usb_connect(r8a66597);
1208 else
1209 r8a66597_usb_disconnect(r8a66597);
1210 } else {
1211 mod_timer(&r8a66597->timer,
1212 jiffies + msecs_to_jiffies(50));
1213 }
1214 } else {
1215 r8a66597->scount = R8A66597_MAX_SAMPLING;
1216 r8a66597->old_vbus = tmp;
1217 mod_timer(&r8a66597->timer,
1218 jiffies + msecs_to_jiffies(50));
1219 }
1220 }
1221 spin_unlock_irqrestore(&r8a66597->lock, flags);
1222}
1223
1224/*-------------------------------------------------------------------------*/
1225static int r8a66597_enable(struct usb_ep *_ep,
1226 const struct usb_endpoint_descriptor *desc)
1227{
1228 struct r8a66597_ep *ep;
1229
1230 ep = container_of(_ep, struct r8a66597_ep, ep);
1231 return alloc_pipe_config(ep, desc);
1232}
1233
1234static int r8a66597_disable(struct usb_ep *_ep)
1235{
1236 struct r8a66597_ep *ep;
1237 struct r8a66597_request *req;
1238 unsigned long flags;
1239
1240 ep = container_of(_ep, struct r8a66597_ep, ep);
1241 BUG_ON(!ep);
1242
1243 while (!list_empty(&ep->queue)) {
1244 req = get_request_from_ep(ep);
1245 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1246 transfer_complete(ep, req, -ECONNRESET);
1247 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1248 }
1249
1250 pipe_irq_disable(ep->r8a66597, ep->pipenum);
1251 return free_pipe_config(ep);
1252}
1253
1254static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep,
1255 gfp_t gfp_flags)
1256{
1257 struct r8a66597_request *req;
1258
1259 req = kzalloc(sizeof(struct r8a66597_request), gfp_flags);
1260 if (!req)
1261 return NULL;
1262
1263 INIT_LIST_HEAD(&req->queue);
1264
1265 return &req->req;
1266}
1267
1268static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req)
1269{
1270 struct r8a66597_request *req;
1271
1272 req = container_of(_req, struct r8a66597_request, req);
1273 kfree(req);
1274}
1275
1276static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req,
1277 gfp_t gfp_flags)
1278{
1279 struct r8a66597_ep *ep;
1280 struct r8a66597_request *req;
1281 unsigned long flags;
1282 int request = 0;
1283
1284 ep = container_of(_ep, struct r8a66597_ep, ep);
1285 req = container_of(_req, struct r8a66597_request, req);
1286
1287 if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
1288 return -ESHUTDOWN;
1289
1290 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1291
1292 if (list_empty(&ep->queue))
1293 request = 1;
1294
1295 list_add_tail(&req->queue, &ep->queue);
1296 req->req.actual = 0;
1297 req->req.status = -EINPROGRESS;
1298
1299 if (ep->desc == NULL) /* control */
1300 start_ep0(ep, req);
1301 else {
1302 if (request && !ep->busy)
1303 start_packet(ep, req);
1304 }
1305
1306 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1307
1308 return 0;
1309}
1310
1311static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1312{
1313 struct r8a66597_ep *ep;
1314 struct r8a66597_request *req;
1315 unsigned long flags;
1316
1317 ep = container_of(_ep, struct r8a66597_ep, ep);
1318 req = container_of(_req, struct r8a66597_request, req);
1319
1320 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1321 if (!list_empty(&ep->queue))
1322 transfer_complete(ep, req, -ECONNRESET);
1323 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1324
1325 return 0;
1326}
1327
1328static int r8a66597_set_halt(struct usb_ep *_ep, int value)
1329{
1330 struct r8a66597_ep *ep;
1331 struct r8a66597_request *req;
1332 unsigned long flags;
1333 int ret = 0;
1334
1335 ep = container_of(_ep, struct r8a66597_ep, ep);
1336 req = get_request_from_ep(ep);
1337
1338 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1339 if (!list_empty(&ep->queue)) {
1340 ret = -EAGAIN;
1341 goto out;
1342 }
1343 if (value) {
1344 ep->busy = 1;
1345 pipe_stall(ep->r8a66597, ep->pipenum);
1346 } else {
1347 ep->busy = 0;
1348 ep->wedge = 0;
1349 pipe_stop(ep->r8a66597, ep->pipenum);
1350 }
1351
1352out:
1353 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1354 return ret;
1355}
1356
1357static int r8a66597_set_wedge(struct usb_ep *_ep)
1358{
1359 struct r8a66597_ep *ep;
1360 unsigned long flags;
1361
1362 ep = container_of(_ep, struct r8a66597_ep, ep);
1363
1364 if (!ep || !ep->desc)
1365 return -EINVAL;
1366
1367 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1368 ep->wedge = 1;
1369 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1370
1371 return usb_ep_set_halt(_ep);
1372}
1373
1374static void r8a66597_fifo_flush(struct usb_ep *_ep)
1375{
1376 struct r8a66597_ep *ep;
1377 unsigned long flags;
1378
1379 ep = container_of(_ep, struct r8a66597_ep, ep);
1380 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1381 if (list_empty(&ep->queue) && !ep->busy) {
1382 pipe_stop(ep->r8a66597, ep->pipenum);
1383 r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr);
1384 }
1385 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1386}
1387
1388static struct usb_ep_ops r8a66597_ep_ops = {
1389 .enable = r8a66597_enable,
1390 .disable = r8a66597_disable,
1391
1392 .alloc_request = r8a66597_alloc_request,
1393 .free_request = r8a66597_free_request,
1394
1395 .queue = r8a66597_queue,
1396 .dequeue = r8a66597_dequeue,
1397
1398 .set_halt = r8a66597_set_halt,
1399 .set_wedge = r8a66597_set_wedge,
1400 .fifo_flush = r8a66597_fifo_flush,
1401};
1402
1403/*-------------------------------------------------------------------------*/
1404static struct r8a66597 *the_controller;
1405
1406int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1407{
1408 struct r8a66597 *r8a66597 = the_controller;
1409 int retval;
1410
1411 if (!driver
1412 || driver->speed != USB_SPEED_HIGH
1413 || !driver->bind
1414 || !driver->setup)
1415 return -EINVAL;
1416 if (!r8a66597)
1417 return -ENODEV;
1418 if (r8a66597->driver)
1419 return -EBUSY;
1420
1421 /* hook up the driver */
1422 driver->driver.bus = NULL;
1423 r8a66597->driver = driver;
1424 r8a66597->gadget.dev.driver = &driver->driver;
1425
1426 retval = device_add(&r8a66597->gadget.dev);
1427 if (retval) {
1428 printk(KERN_ERR "device_add error (%d)\n", retval);
1429 goto error;
1430 }
1431
1432 retval = driver->bind(&r8a66597->gadget);
1433 if (retval) {
1434 printk(KERN_ERR "bind to driver error (%d)\n", retval);
1435 device_del(&r8a66597->gadget.dev);
1436 goto error;
1437 }
1438
1439 r8a66597_bset(r8a66597, VBSE, INTENB0);
1440 if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) {
1441 r8a66597_start_xclock(r8a66597);
1442 /* start vbus sampling */
1443 r8a66597->old_vbus = r8a66597_read(r8a66597,
1444 INTSTS0) & VBSTS;
1445 r8a66597->scount = R8A66597_MAX_SAMPLING;
1446 mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50));
1447 }
1448
1449 return 0;
1450
1451error:
1452 r8a66597->driver = NULL;
1453 r8a66597->gadget.dev.driver = NULL;
1454
1455 return retval;
1456}
1457EXPORT_SYMBOL(usb_gadget_register_driver);
1458
1459int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1460{
1461 struct r8a66597 *r8a66597 = the_controller;
1462 unsigned long flags;
1463
1464 if (driver != r8a66597->driver || !driver->unbind)
1465 return -EINVAL;
1466
1467 spin_lock_irqsave(&r8a66597->lock, flags);
1468 if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN)
1469 r8a66597_usb_disconnect(r8a66597);
1470 spin_unlock_irqrestore(&r8a66597->lock, flags);
1471
1472 r8a66597_bclr(r8a66597, VBSE, INTENB0);
1473
1474 driver->unbind(&r8a66597->gadget);
1475
1476 init_controller(r8a66597);
1477 disable_controller(r8a66597);
1478
1479 device_del(&r8a66597->gadget.dev);
1480 r8a66597->driver = NULL;
1481 return 0;
1482}
1483EXPORT_SYMBOL(usb_gadget_unregister_driver);
1484
1485/*-------------------------------------------------------------------------*/
1486static int r8a66597_get_frame(struct usb_gadget *_gadget)
1487{
1488 struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget);
1489 return r8a66597_read(r8a66597, FRMNUM) & 0x03FF;
1490}
1491
1492static struct usb_gadget_ops r8a66597_gadget_ops = {
1493 .get_frame = r8a66597_get_frame,
1494};
1495
1496static int __exit r8a66597_remove(struct platform_device *pdev)
1497{
1498 struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev);
1499
1500 del_timer_sync(&r8a66597->timer);
1501 iounmap((void *)r8a66597->reg);
1502 free_irq(platform_get_irq(pdev, 0), r8a66597);
1503 r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req);
1504#ifdef CONFIG_HAVE_CLK
1505 if (r8a66597->pdata->on_chip) {
1506 clk_disable(r8a66597->clk);
1507 clk_put(r8a66597->clk);
1508 }
1509#endif
1510 kfree(r8a66597);
1511 return 0;
1512}
1513
1514static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1515{
1516}
1517
1518static int __init r8a66597_probe(struct platform_device *pdev)
1519{
1520#ifdef CONFIG_HAVE_CLK
1521 char clk_name[8];
1522#endif
1523 struct resource *res, *ires;
1524 int irq;
1525 void __iomem *reg = NULL;
1526 struct r8a66597 *r8a66597 = NULL;
1527 int ret = 0;
1528 int i;
1529 unsigned long irq_trigger;
1530
1531 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1532 if (!res) {
1533 ret = -ENODEV;
1534 printk(KERN_ERR "platform_get_resource error.\n");
1535 goto clean_up;
1536 }
1537
1538 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1539 irq = ires->start;
1540 irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1541
1542 if (irq < 0) {
1543 ret = -ENODEV;
1544 printk(KERN_ERR "platform_get_irq error.\n");
1545 goto clean_up;
1546 }
1547
1548 reg = ioremap(res->start, resource_size(res));
1549 if (reg == NULL) {
1550 ret = -ENOMEM;
1551 printk(KERN_ERR "ioremap error.\n");
1552 goto clean_up;
1553 }
1554
1555 /* initialize ucd */
1556 r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL);
1557 if (r8a66597 == NULL) {
1558 printk(KERN_ERR "kzalloc error\n");
1559 goto clean_up;
1560 }
1561
1562 spin_lock_init(&r8a66597->lock);
1563 dev_set_drvdata(&pdev->dev, r8a66597);
1564 r8a66597->pdata = pdev->dev.platform_data;
1565 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW;
1566
1567 r8a66597->gadget.ops = &r8a66597_gadget_ops;
1568 device_initialize(&r8a66597->gadget.dev);
1569 dev_set_name(&r8a66597->gadget.dev, "gadget");
1570 r8a66597->gadget.is_dualspeed = 1;
1571 r8a66597->gadget.dev.parent = &pdev->dev;
1572 r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask;
1573 r8a66597->gadget.dev.release = pdev->dev.release;
1574 r8a66597->gadget.name = udc_name;
1575
1576 init_timer(&r8a66597->timer);
1577 r8a66597->timer.function = r8a66597_timer;
1578 r8a66597->timer.data = (unsigned long)r8a66597;
1579 r8a66597->reg = (unsigned long)reg;
1580
1581#ifdef CONFIG_HAVE_CLK
1582 if (r8a66597->pdata->on_chip) {
1583 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id);
1584 r8a66597->clk = clk_get(&pdev->dev, clk_name);
1585 if (IS_ERR(r8a66597->clk)) {
1586 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
1587 clk_name);
1588 ret = PTR_ERR(r8a66597->clk);
1589 goto clean_up;
1590 }
1591 clk_enable(r8a66597->clk);
1592 }
1593#endif
1594
1595 disable_controller(r8a66597); /* make sure controller is disabled */
1596
1597 ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED,
1598 udc_name, r8a66597);
1599 if (ret < 0) {
1600 printk(KERN_ERR "request_irq error (%d)\n", ret);
1601 goto clean_up2;
1602 }
1603
1604 INIT_LIST_HEAD(&r8a66597->gadget.ep_list);
1605 r8a66597->gadget.ep0 = &r8a66597->ep[0].ep;
1606 INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list);
1607 for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) {
1608 struct r8a66597_ep *ep = &r8a66597->ep[i];
1609
1610 if (i != 0) {
1611 INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list);
1612 list_add_tail(&r8a66597->ep[i].ep.ep_list,
1613 &r8a66597->gadget.ep_list);
1614 }
1615 ep->r8a66597 = r8a66597;
1616 INIT_LIST_HEAD(&ep->queue);
1617 ep->ep.name = r8a66597_ep_name[i];
1618 ep->ep.ops = &r8a66597_ep_ops;
1619 ep->ep.maxpacket = 512;
1620 }
1621 r8a66597->ep[0].ep.maxpacket = 64;
1622 r8a66597->ep[0].pipenum = 0;
1623 r8a66597->ep[0].fifoaddr = CFIFO;
1624 r8a66597->ep[0].fifosel = CFIFOSEL;
1625 r8a66597->ep[0].fifoctr = CFIFOCTR;
1626 r8a66597->ep[0].fifotrn = 0;
1627 r8a66597->ep[0].pipectr = get_pipectr_addr(0);
1628 r8a66597->pipenum2ep[0] = &r8a66597->ep[0];
1629 r8a66597->epaddr2ep[0] = &r8a66597->ep[0];
1630
1631 the_controller = r8a66597;
1632
1633 r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep,
1634 GFP_KERNEL);
1635 if (r8a66597->ep0_req == NULL)
1636 goto clean_up3;
1637 r8a66597->ep0_req->complete = nop_completion;
1638
1639 init_controller(r8a66597);
1640
1641 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1642 return 0;
1643
1644clean_up3:
1645 free_irq(irq, r8a66597);
1646clean_up2:
1647#ifdef CONFIG_HAVE_CLK
1648 if (r8a66597->pdata->on_chip) {
1649 clk_disable(r8a66597->clk);
1650 clk_put(r8a66597->clk);
1651 }
1652#endif
1653clean_up:
1654 if (r8a66597) {
1655 if (r8a66597->ep0_req)
1656 r8a66597_free_request(&r8a66597->ep[0].ep,
1657 r8a66597->ep0_req);
1658 kfree(r8a66597);
1659 }
1660 if (reg)
1661 iounmap(reg);
1662
1663 return ret;
1664}
1665
1666/*-------------------------------------------------------------------------*/
1667static struct platform_driver r8a66597_driver = {
1668 .remove = __exit_p(r8a66597_remove),
1669 .driver = {
1670 .name = (char *) udc_name,
1671 },
1672};
1673
1674static int __init r8a66597_udc_init(void)
1675{
1676 return platform_driver_probe(&r8a66597_driver, r8a66597_probe);
1677}
1678module_init(r8a66597_udc_init);
1679
1680static void __exit r8a66597_udc_cleanup(void)
1681{
1682 platform_driver_unregister(&r8a66597_driver);
1683}
1684module_exit(r8a66597_udc_cleanup);
1685
1686MODULE_DESCRIPTION("R8A66597 USB gadget driver");
1687MODULE_LICENSE("GPL");
1688MODULE_AUTHOR("Yoshihiro Shimoda");
1689
diff --git a/drivers/usb/gadget/r8a66597-udc.h b/drivers/usb/gadget/r8a66597-udc.h
new file mode 100644
index 000000000000..03087e7b9190
--- /dev/null
+++ b/drivers/usb/gadget/r8a66597-udc.h
@@ -0,0 +1,256 @@
1/*
2 * R8A66597 UDC
3 *
4 * Copyright (C) 2007-2009 Renesas Solutions Corp.
5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 *
21 */
22
23#ifndef __R8A66597_H__
24#define __R8A66597_H__
25
26#ifdef CONFIG_HAVE_CLK
27#include <linux/clk.h>
28#endif
29
30#include <linux/usb/r8a66597.h>
31
32#define R8A66597_MAX_SAMPLING 10
33
34#define R8A66597_MAX_NUM_PIPE 8
35#define R8A66597_MAX_NUM_BULK 3
36#define R8A66597_MAX_NUM_ISOC 2
37#define R8A66597_MAX_NUM_INT 2
38
39#define R8A66597_BASE_PIPENUM_BULK 3
40#define R8A66597_BASE_PIPENUM_ISOC 1
41#define R8A66597_BASE_PIPENUM_INT 6
42
43#define R8A66597_BASE_BUFNUM 6
44#define R8A66597_MAX_BUFNUM 0x4F
45
46#define is_bulk_pipe(pipenum) \
47 ((pipenum >= R8A66597_BASE_PIPENUM_BULK) && \
48 (pipenum < (R8A66597_BASE_PIPENUM_BULK + R8A66597_MAX_NUM_BULK)))
49#define is_interrupt_pipe(pipenum) \
50 ((pipenum >= R8A66597_BASE_PIPENUM_INT) && \
51 (pipenum < (R8A66597_BASE_PIPENUM_INT + R8A66597_MAX_NUM_INT)))
52#define is_isoc_pipe(pipenum) \
53 ((pipenum >= R8A66597_BASE_PIPENUM_ISOC) && \
54 (pipenum < (R8A66597_BASE_PIPENUM_ISOC + R8A66597_MAX_NUM_ISOC)))
55
56struct r8a66597_pipe_info {
57 u16 pipe;
58 u16 epnum;
59 u16 maxpacket;
60 u16 type;
61 u16 interval;
62 u16 dir_in;
63};
64
65struct r8a66597_request {
66 struct usb_request req;
67 struct list_head queue;
68};
69
70struct r8a66597_ep {
71 struct usb_ep ep;
72 struct r8a66597 *r8a66597;
73
74 struct list_head queue;
75 unsigned busy:1;
76 unsigned wedge:1;
77 unsigned internal_ccpl:1; /* use only control */
78
79 /* this member can able to after r8a66597_enable */
80 unsigned use_dma:1;
81 u16 pipenum;
82 u16 type;
83 const struct usb_endpoint_descriptor *desc;
84 /* register address */
85 unsigned char fifoaddr;
86 unsigned char fifosel;
87 unsigned char fifoctr;
88 unsigned char fifotrn;
89 unsigned char pipectr;
90};
91
92struct r8a66597 {
93 spinlock_t lock;
94 unsigned long reg;
95
96#ifdef CONFIG_HAVE_CLK
97 struct clk *clk;
98#endif
99 struct r8a66597_platdata *pdata;
100
101 struct usb_gadget gadget;
102 struct usb_gadget_driver *driver;
103
104 struct r8a66597_ep ep[R8A66597_MAX_NUM_PIPE];
105 struct r8a66597_ep *pipenum2ep[R8A66597_MAX_NUM_PIPE];
106 struct r8a66597_ep *epaddr2ep[16];
107
108 struct timer_list timer;
109 struct usb_request *ep0_req; /* for internal request */
110 u16 ep0_data; /* for internal request */
111 u16 old_vbus;
112 u16 scount;
113 u16 old_dvsq;
114
115 /* pipe config */
116 unsigned char bulk;
117 unsigned char interrupt;
118 unsigned char isochronous;
119 unsigned char num_dma;
120
121 unsigned irq_sense_low:1;
122};
123
124#define gadget_to_r8a66597(_gadget) \
125 container_of(_gadget, struct r8a66597, gadget)
126#define r8a66597_to_gadget(r8a66597) (&r8a66597->gadget)
127
128static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
129{
130 return inw(r8a66597->reg + offset);
131}
132
133static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
134 unsigned long offset, u16 *buf,
135 int len)
136{
137 if (r8a66597->pdata->on_chip) {
138 unsigned long fifoaddr = r8a66597->reg + offset;
139 unsigned long count;
140 union {
141 unsigned long dword;
142 unsigned char byte[4];
143 } data;
144 unsigned char *pb;
145 int i;
146
147 count = len / 4;
148 insl(fifoaddr, buf, count);
149
150 if (len & 0x00000003) {
151 data.dword = inl(fifoaddr);
152 pb = (unsigned char *)buf + count * 4;
153 for (i = 0; i < (len & 0x00000003); i++)
154 pb[i] = data.byte[i];
155 }
156 } else {
157 len = (len + 1) / 2;
158 insw(r8a66597->reg + offset, buf, len);
159 }
160}
161
162static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
163 unsigned long offset)
164{
165 outw(val, r8a66597->reg + offset);
166}
167
168static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
169 unsigned long offset, u16 *buf,
170 int len)
171{
172 unsigned long fifoaddr = r8a66597->reg + offset;
173
174 if (r8a66597->pdata->on_chip) {
175 unsigned long count;
176 unsigned char *pb;
177 int i;
178
179 count = len / 4;
180 outsl(fifoaddr, buf, count);
181
182 if (len & 0x00000003) {
183 pb = (unsigned char *)buf + count * 4;
184 for (i = 0; i < (len & 0x00000003); i++) {
185 if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
186 outb(pb[i], fifoaddr + i);
187 else
188 outb(pb[i], fifoaddr + 3 - i);
189 }
190 }
191 } else {
192 int odd = len & 0x0001;
193
194 len = len / 2;
195 outsw(fifoaddr, buf, len);
196 if (unlikely(odd)) {
197 buf = &buf[len];
198 outb((unsigned char)*buf, fifoaddr);
199 }
200 }
201}
202
203static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
204 u16 val, u16 pat, unsigned long offset)
205{
206 u16 tmp;
207 tmp = r8a66597_read(r8a66597, offset);
208 tmp = tmp & (~pat);
209 tmp = tmp | val;
210 r8a66597_write(r8a66597, tmp, offset);
211}
212
213static inline u16 get_xtal_from_pdata(struct r8a66597_platdata *pdata)
214{
215 u16 clock = 0;
216
217 switch (pdata->xtal) {
218 case R8A66597_PLATDATA_XTAL_12MHZ:
219 clock = XTAL12;
220 break;
221 case R8A66597_PLATDATA_XTAL_24MHZ:
222 clock = XTAL24;
223 break;
224 case R8A66597_PLATDATA_XTAL_48MHZ:
225 clock = XTAL48;
226 break;
227 default:
228 printk(KERN_ERR "r8a66597: platdata clock is wrong.\n");
229 break;
230 }
231
232 return clock;
233}
234
235#define r8a66597_bclr(r8a66597, val, offset) \
236 r8a66597_mdfy(r8a66597, 0, val, offset)
237#define r8a66597_bset(r8a66597, val, offset) \
238 r8a66597_mdfy(r8a66597, val, 0, offset)
239
240#define get_pipectr_addr(pipenum) (PIPE1CTR + (pipenum - 1) * 2)
241
242#define enable_irq_ready(r8a66597, pipenum) \
243 enable_pipe_irq(r8a66597, pipenum, BRDYENB)
244#define disable_irq_ready(r8a66597, pipenum) \
245 disable_pipe_irq(r8a66597, pipenum, BRDYENB)
246#define enable_irq_empty(r8a66597, pipenum) \
247 enable_pipe_irq(r8a66597, pipenum, BEMPENB)
248#define disable_irq_empty(r8a66597, pipenum) \
249 disable_pipe_irq(r8a66597, pipenum, BEMPENB)
250#define enable_irq_nrdy(r8a66597, pipenum) \
251 enable_pipe_irq(r8a66597, pipenum, NRDYENB)
252#define disable_irq_nrdy(r8a66597, pipenum) \
253 disable_pipe_irq(r8a66597, pipenum, NRDYENB)
254
255#endif /* __R8A66597_H__ */
256
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-25 06:32:10 -0400