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Diffstat (limited to 'drivers/usb/gadget/r8a66597-udc.h')
-rw-r--r--drivers/usb/gadget/r8a66597-udc.h256
1 files changed, 256 insertions, 0 deletions
diff --git a/drivers/usb/gadget/r8a66597-udc.h b/drivers/usb/gadget/r8a66597-udc.h
new file mode 100644
index 000000000000..03087e7b9190
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+++ b/drivers/usb/gadget/r8a66597-udc.h
@@ -0,0 +1,256 @@
1/*
2 * R8A66597 UDC
3 *
4 * Copyright (C) 2007-2009 Renesas Solutions Corp.
5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 *
21 */
22
23#ifndef __R8A66597_H__
24#define __R8A66597_H__
25
26#ifdef CONFIG_HAVE_CLK
27#include <linux/clk.h>
28#endif
29
30#include <linux/usb/r8a66597.h>
31
32#define R8A66597_MAX_SAMPLING 10
33
34#define R8A66597_MAX_NUM_PIPE 8
35#define R8A66597_MAX_NUM_BULK 3
36#define R8A66597_MAX_NUM_ISOC 2
37#define R8A66597_MAX_NUM_INT 2
38
39#define R8A66597_BASE_PIPENUM_BULK 3
40#define R8A66597_BASE_PIPENUM_ISOC 1
41#define R8A66597_BASE_PIPENUM_INT 6
42
43#define R8A66597_BASE_BUFNUM 6
44#define R8A66597_MAX_BUFNUM 0x4F
45
46#define is_bulk_pipe(pipenum) \
47 ((pipenum >= R8A66597_BASE_PIPENUM_BULK) && \
48 (pipenum < (R8A66597_BASE_PIPENUM_BULK + R8A66597_MAX_NUM_BULK)))
49#define is_interrupt_pipe(pipenum) \
50 ((pipenum >= R8A66597_BASE_PIPENUM_INT) && \
51 (pipenum < (R8A66597_BASE_PIPENUM_INT + R8A66597_MAX_NUM_INT)))
52#define is_isoc_pipe(pipenum) \
53 ((pipenum >= R8A66597_BASE_PIPENUM_ISOC) && \
54 (pipenum < (R8A66597_BASE_PIPENUM_ISOC + R8A66597_MAX_NUM_ISOC)))
55
56struct r8a66597_pipe_info {
57 u16 pipe;
58 u16 epnum;
59 u16 maxpacket;
60 u16 type;
61 u16 interval;
62 u16 dir_in;
63};
64
65struct r8a66597_request {
66 struct usb_request req;
67 struct list_head queue;
68};
69
70struct r8a66597_ep {
71 struct usb_ep ep;
72 struct r8a66597 *r8a66597;
73
74 struct list_head queue;
75 unsigned busy:1;
76 unsigned wedge:1;
77 unsigned internal_ccpl:1; /* use only control */
78
79 /* this member can able to after r8a66597_enable */
80 unsigned use_dma:1;
81 u16 pipenum;
82 u16 type;
83 const struct usb_endpoint_descriptor *desc;
84 /* register address */
85 unsigned char fifoaddr;
86 unsigned char fifosel;
87 unsigned char fifoctr;
88 unsigned char fifotrn;
89 unsigned char pipectr;
90};
91
92struct r8a66597 {
93 spinlock_t lock;
94 unsigned long reg;
95
96#ifdef CONFIG_HAVE_CLK
97 struct clk *clk;
98#endif
99 struct r8a66597_platdata *pdata;
100
101 struct usb_gadget gadget;
102 struct usb_gadget_driver *driver;
103
104 struct r8a66597_ep ep[R8A66597_MAX_NUM_PIPE];
105 struct r8a66597_ep *pipenum2ep[R8A66597_MAX_NUM_PIPE];
106 struct r8a66597_ep *epaddr2ep[16];
107
108 struct timer_list timer;
109 struct usb_request *ep0_req; /* for internal request */
110 u16 ep0_data; /* for internal request */
111 u16 old_vbus;
112 u16 scount;
113 u16 old_dvsq;
114
115 /* pipe config */
116 unsigned char bulk;
117 unsigned char interrupt;
118 unsigned char isochronous;
119 unsigned char num_dma;
120
121 unsigned irq_sense_low:1;
122};
123
124#define gadget_to_r8a66597(_gadget) \
125 container_of(_gadget, struct r8a66597, gadget)
126#define r8a66597_to_gadget(r8a66597) (&r8a66597->gadget)
127
128static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
129{
130 return inw(r8a66597->reg + offset);
131}
132
133static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
134 unsigned long offset, u16 *buf,
135 int len)
136{
137 if (r8a66597->pdata->on_chip) {
138 unsigned long fifoaddr = r8a66597->reg + offset;
139 unsigned long count;
140 union {
141 unsigned long dword;
142 unsigned char byte[4];
143 } data;
144 unsigned char *pb;
145 int i;
146
147 count = len / 4;
148 insl(fifoaddr, buf, count);
149
150 if (len & 0x00000003) {
151 data.dword = inl(fifoaddr);
152 pb = (unsigned char *)buf + count * 4;
153 for (i = 0; i < (len & 0x00000003); i++)
154 pb[i] = data.byte[i];
155 }
156 } else {
157 len = (len + 1) / 2;
158 insw(r8a66597->reg + offset, buf, len);
159 }
160}
161
162static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
163 unsigned long offset)
164{
165 outw(val, r8a66597->reg + offset);
166}
167
168static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
169 unsigned long offset, u16 *buf,
170 int len)
171{
172 unsigned long fifoaddr = r8a66597->reg + offset;
173
174 if (r8a66597->pdata->on_chip) {
175 unsigned long count;
176 unsigned char *pb;
177 int i;
178
179 count = len / 4;
180 outsl(fifoaddr, buf, count);
181
182 if (len & 0x00000003) {
183 pb = (unsigned char *)buf + count * 4;
184 for (i = 0; i < (len & 0x00000003); i++) {
185 if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
186 outb(pb[i], fifoaddr + i);
187 else
188 outb(pb[i], fifoaddr + 3 - i);
189 }
190 }
191 } else {
192 int odd = len & 0x0001;
193
194 len = len / 2;
195 outsw(fifoaddr, buf, len);
196 if (unlikely(odd)) {
197 buf = &buf[len];
198 outb((unsigned char)*buf, fifoaddr);
199 }
200 }
201}
202
203static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
204 u16 val, u16 pat, unsigned long offset)
205{
206 u16 tmp;
207 tmp = r8a66597_read(r8a66597, offset);
208 tmp = tmp & (~pat);
209 tmp = tmp | val;
210 r8a66597_write(r8a66597, tmp, offset);
211}
212
213static inline u16 get_xtal_from_pdata(struct r8a66597_platdata *pdata)
214{
215 u16 clock = 0;
216
217 switch (pdata->xtal) {
218 case R8A66597_PLATDATA_XTAL_12MHZ:
219 clock = XTAL12;
220 break;
221 case R8A66597_PLATDATA_XTAL_24MHZ:
222 clock = XTAL24;
223 break;
224 case R8A66597_PLATDATA_XTAL_48MHZ:
225 clock = XTAL48;
226 break;
227 default:
228 printk(KERN_ERR "r8a66597: platdata clock is wrong.\n");
229 break;
230 }
231
232 return clock;
233}
234
235#define r8a66597_bclr(r8a66597, val, offset) \
236 r8a66597_mdfy(r8a66597, 0, val, offset)
237#define r8a66597_bset(r8a66597, val, offset) \
238 r8a66597_mdfy(r8a66597, val, 0, offset)
239
240#define get_pipectr_addr(pipenum) (PIPE1CTR + (pipenum - 1) * 2)
241
242#define enable_irq_ready(r8a66597, pipenum) \
243 enable_pipe_irq(r8a66597, pipenum, BRDYENB)
244#define disable_irq_ready(r8a66597, pipenum) \
245 disable_pipe_irq(r8a66597, pipenum, BRDYENB)
246#define enable_irq_empty(r8a66597, pipenum) \
247 enable_pipe_irq(r8a66597, pipenum, BEMPENB)
248#define disable_irq_empty(r8a66597, pipenum) \
249 disable_pipe_irq(r8a66597, pipenum, BEMPENB)
250#define enable_irq_nrdy(r8a66597, pipenum) \
251 enable_pipe_irq(r8a66597, pipenum, NRDYENB)
252#define disable_irq_nrdy(r8a66597, pipenum) \
253 disable_pipe_irq(r8a66597, pipenum, NRDYENB)
254
255#endif /* __R8A66597_H__ */
256
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 03:22:12 -0500