diff options
Diffstat (limited to 'drivers/usb/gadget/pch_udc.c')
-rw-r--r-- | drivers/usb/gadget/pch_udc.c | 127 |
1 files changed, 76 insertions, 51 deletions
diff --git a/drivers/usb/gadget/pch_udc.c b/drivers/usb/gadget/pch_udc.c index 0c8dd81dddca..b120dbb64d0f 100644 --- a/drivers/usb/gadget/pch_udc.c +++ b/drivers/usb/gadget/pch_udc.c | |||
@@ -198,10 +198,10 @@ | |||
198 | #define PCH_UDC_BRLEN 0x0F /* Burst length */ | 198 | #define PCH_UDC_BRLEN 0x0F /* Burst length */ |
199 | #define PCH_UDC_THLEN 0x1F /* Threshold length */ | 199 | #define PCH_UDC_THLEN 0x1F /* Threshold length */ |
200 | /* Value of EP Buffer Size */ | 200 | /* Value of EP Buffer Size */ |
201 | #define UDC_EP0IN_BUFF_SIZE 64 | 201 | #define UDC_EP0IN_BUFF_SIZE 16 |
202 | #define UDC_EPIN_BUFF_SIZE 512 | 202 | #define UDC_EPIN_BUFF_SIZE 256 |
203 | #define UDC_EP0OUT_BUFF_SIZE 64 | 203 | #define UDC_EP0OUT_BUFF_SIZE 16 |
204 | #define UDC_EPOUT_BUFF_SIZE 512 | 204 | #define UDC_EPOUT_BUFF_SIZE 256 |
205 | /* Value of EP maximum packet size */ | 205 | /* Value of EP maximum packet size */ |
206 | #define UDC_EP0IN_MAX_PKT_SIZE 64 | 206 | #define UDC_EP0IN_MAX_PKT_SIZE 64 |
207 | #define UDC_EP0OUT_MAX_PKT_SIZE 64 | 207 | #define UDC_EP0OUT_MAX_PKT_SIZE 64 |
@@ -351,7 +351,7 @@ struct pch_udc_dev { | |||
351 | struct pci_pool *data_requests; | 351 | struct pci_pool *data_requests; |
352 | struct pci_pool *stp_requests; | 352 | struct pci_pool *stp_requests; |
353 | dma_addr_t dma_addr; | 353 | dma_addr_t dma_addr; |
354 | unsigned long ep0out_buf[64]; | 354 | void *ep0out_buf; |
355 | struct usb_ctrlrequest setup_data; | 355 | struct usb_ctrlrequest setup_data; |
356 | unsigned long phys_addr; | 356 | unsigned long phys_addr; |
357 | void __iomem *base_addr; | 357 | void __iomem *base_addr; |
@@ -361,6 +361,8 @@ struct pch_udc_dev { | |||
361 | 361 | ||
362 | #define PCH_UDC_PCI_BAR 1 | 362 | #define PCH_UDC_PCI_BAR 1 |
363 | #define PCI_DEVICE_ID_INTEL_EG20T_UDC 0x8808 | 363 | #define PCI_DEVICE_ID_INTEL_EG20T_UDC 0x8808 |
364 | #define PCI_VENDOR_ID_ROHM 0x10DB | ||
365 | #define PCI_DEVICE_ID_ML7213_IOH_UDC 0x801D | ||
364 | 366 | ||
365 | static const char ep0_string[] = "ep0in"; | 367 | static const char ep0_string[] = "ep0in"; |
366 | static DEFINE_SPINLOCK(udc_stall_spinlock); /* stall spin lock */ | 368 | static DEFINE_SPINLOCK(udc_stall_spinlock); /* stall spin lock */ |
@@ -1219,11 +1221,11 @@ static void complete_req(struct pch_udc_ep *ep, struct pch_udc_request *req, | |||
1219 | dev = ep->dev; | 1221 | dev = ep->dev; |
1220 | if (req->dma_mapped) { | 1222 | if (req->dma_mapped) { |
1221 | if (ep->in) | 1223 | if (ep->in) |
1222 | pci_unmap_single(dev->pdev, req->req.dma, | 1224 | dma_unmap_single(&dev->pdev->dev, req->req.dma, |
1223 | req->req.length, PCI_DMA_TODEVICE); | 1225 | req->req.length, DMA_TO_DEVICE); |
1224 | else | 1226 | else |
1225 | pci_unmap_single(dev->pdev, req->req.dma, | 1227 | dma_unmap_single(&dev->pdev->dev, req->req.dma, |
1226 | req->req.length, PCI_DMA_FROMDEVICE); | 1228 | req->req.length, DMA_FROM_DEVICE); |
1227 | req->dma_mapped = 0; | 1229 | req->dma_mapped = 0; |
1228 | req->req.dma = DMA_ADDR_INVALID; | 1230 | req->req.dma = DMA_ADDR_INVALID; |
1229 | } | 1231 | } |
@@ -1414,7 +1416,6 @@ static void pch_udc_start_rxrequest(struct pch_udc_ep *ep, | |||
1414 | 1416 | ||
1415 | pch_udc_clear_dma(ep->dev, DMA_DIR_RX); | 1417 | pch_udc_clear_dma(ep->dev, DMA_DIR_RX); |
1416 | td_data = req->td_data; | 1418 | td_data = req->td_data; |
1417 | ep->td_data = req->td_data; | ||
1418 | /* Set the status bits for all descriptors */ | 1419 | /* Set the status bits for all descriptors */ |
1419 | while (1) { | 1420 | while (1) { |
1420 | td_data->status = (td_data->status & ~PCH_UDC_BUFF_STS) | | 1421 | td_data->status = (td_data->status & ~PCH_UDC_BUFF_STS) | |
@@ -1613,15 +1614,19 @@ static int pch_udc_pcd_queue(struct usb_ep *usbep, struct usb_request *usbreq, | |||
1613 | if (usbreq->length && | 1614 | if (usbreq->length && |
1614 | ((usbreq->dma == DMA_ADDR_INVALID) || !usbreq->dma)) { | 1615 | ((usbreq->dma == DMA_ADDR_INVALID) || !usbreq->dma)) { |
1615 | if (ep->in) | 1616 | if (ep->in) |
1616 | usbreq->dma = pci_map_single(dev->pdev, usbreq->buf, | 1617 | usbreq->dma = dma_map_single(&dev->pdev->dev, |
1617 | usbreq->length, PCI_DMA_TODEVICE); | 1618 | usbreq->buf, |
1619 | usbreq->length, | ||
1620 | DMA_TO_DEVICE); | ||
1618 | else | 1621 | else |
1619 | usbreq->dma = pci_map_single(dev->pdev, usbreq->buf, | 1622 | usbreq->dma = dma_map_single(&dev->pdev->dev, |
1620 | usbreq->length, PCI_DMA_FROMDEVICE); | 1623 | usbreq->buf, |
1624 | usbreq->length, | ||
1625 | DMA_FROM_DEVICE); | ||
1621 | req->dma_mapped = 1; | 1626 | req->dma_mapped = 1; |
1622 | } | 1627 | } |
1623 | if (usbreq->length > 0) { | 1628 | if (usbreq->length > 0) { |
1624 | retval = prepare_dma(ep, req, gfp); | 1629 | retval = prepare_dma(ep, req, GFP_ATOMIC); |
1625 | if (retval) | 1630 | if (retval) |
1626 | goto probe_end; | 1631 | goto probe_end; |
1627 | } | 1632 | } |
@@ -1646,7 +1651,6 @@ static int pch_udc_pcd_queue(struct usb_ep *usbep, struct usb_request *usbreq, | |||
1646 | pch_udc_wait_ep_stall(ep); | 1651 | pch_udc_wait_ep_stall(ep); |
1647 | pch_udc_ep_clear_nak(ep); | 1652 | pch_udc_ep_clear_nak(ep); |
1648 | pch_udc_enable_ep_interrupts(ep->dev, (1 << ep->num)); | 1653 | pch_udc_enable_ep_interrupts(ep->dev, (1 << ep->num)); |
1649 | pch_udc_set_dma(dev, DMA_DIR_TX); | ||
1650 | } | 1654 | } |
1651 | } | 1655 | } |
1652 | /* Now add this request to the ep's pending requests */ | 1656 | /* Now add this request to the ep's pending requests */ |
@@ -1926,6 +1930,7 @@ static void pch_udc_complete_receiver(struct pch_udc_ep *ep) | |||
1926 | PCH_UDC_BS_DMA_DONE) | 1930 | PCH_UDC_BS_DMA_DONE) |
1927 | return; | 1931 | return; |
1928 | pch_udc_clear_dma(ep->dev, DMA_DIR_RX); | 1932 | pch_udc_clear_dma(ep->dev, DMA_DIR_RX); |
1933 | pch_udc_ep_set_ddptr(ep, 0); | ||
1929 | if ((req->td_data_last->status & PCH_UDC_RXTX_STS) != | 1934 | if ((req->td_data_last->status & PCH_UDC_RXTX_STS) != |
1930 | PCH_UDC_RTS_SUCC) { | 1935 | PCH_UDC_RTS_SUCC) { |
1931 | dev_err(&dev->pdev->dev, "Invalid RXTX status (0x%08x) " | 1936 | dev_err(&dev->pdev->dev, "Invalid RXTX status (0x%08x) " |
@@ -1963,7 +1968,7 @@ static void pch_udc_svc_data_in(struct pch_udc_dev *dev, int ep_num) | |||
1963 | u32 epsts; | 1968 | u32 epsts; |
1964 | struct pch_udc_ep *ep; | 1969 | struct pch_udc_ep *ep; |
1965 | 1970 | ||
1966 | ep = &dev->ep[2*ep_num]; | 1971 | ep = &dev->ep[UDC_EPIN_IDX(ep_num)]; |
1967 | epsts = ep->epsts; | 1972 | epsts = ep->epsts; |
1968 | ep->epsts = 0; | 1973 | ep->epsts = 0; |
1969 | 1974 | ||
@@ -2008,7 +2013,7 @@ static void pch_udc_svc_data_out(struct pch_udc_dev *dev, int ep_num) | |||
2008 | struct pch_udc_ep *ep; | 2013 | struct pch_udc_ep *ep; |
2009 | struct pch_udc_request *req = NULL; | 2014 | struct pch_udc_request *req = NULL; |
2010 | 2015 | ||
2011 | ep = &dev->ep[2*ep_num + 1]; | 2016 | ep = &dev->ep[UDC_EPOUT_IDX(ep_num)]; |
2012 | epsts = ep->epsts; | 2017 | epsts = ep->epsts; |
2013 | ep->epsts = 0; | 2018 | ep->epsts = 0; |
2014 | 2019 | ||
@@ -2025,10 +2030,11 @@ static void pch_udc_svc_data_out(struct pch_udc_dev *dev, int ep_num) | |||
2025 | } | 2030 | } |
2026 | if (epsts & UDC_EPSTS_HE) | 2031 | if (epsts & UDC_EPSTS_HE) |
2027 | return; | 2032 | return; |
2028 | if (epsts & UDC_EPSTS_RSS) | 2033 | if (epsts & UDC_EPSTS_RSS) { |
2029 | pch_udc_ep_set_stall(ep); | 2034 | pch_udc_ep_set_stall(ep); |
2030 | pch_udc_enable_ep_interrupts(ep->dev, | 2035 | pch_udc_enable_ep_interrupts(ep->dev, |
2031 | PCH_UDC_EPINT(ep->in, ep->num)); | 2036 | PCH_UDC_EPINT(ep->in, ep->num)); |
2037 | } | ||
2032 | if (epsts & UDC_EPSTS_RCS) { | 2038 | if (epsts & UDC_EPSTS_RCS) { |
2033 | if (!dev->prot_stall) { | 2039 | if (!dev->prot_stall) { |
2034 | pch_udc_ep_clear_stall(ep); | 2040 | pch_udc_ep_clear_stall(ep); |
@@ -2060,8 +2066,10 @@ static void pch_udc_svc_control_in(struct pch_udc_dev *dev) | |||
2060 | { | 2066 | { |
2061 | u32 epsts; | 2067 | u32 epsts; |
2062 | struct pch_udc_ep *ep; | 2068 | struct pch_udc_ep *ep; |
2069 | struct pch_udc_ep *ep_out; | ||
2063 | 2070 | ||
2064 | ep = &dev->ep[UDC_EP0IN_IDX]; | 2071 | ep = &dev->ep[UDC_EP0IN_IDX]; |
2072 | ep_out = &dev->ep[UDC_EP0OUT_IDX]; | ||
2065 | epsts = ep->epsts; | 2073 | epsts = ep->epsts; |
2066 | ep->epsts = 0; | 2074 | ep->epsts = 0; |
2067 | 2075 | ||
@@ -2073,8 +2081,16 @@ static void pch_udc_svc_control_in(struct pch_udc_dev *dev) | |||
2073 | return; | 2081 | return; |
2074 | if (epsts & UDC_EPSTS_HE) | 2082 | if (epsts & UDC_EPSTS_HE) |
2075 | return; | 2083 | return; |
2076 | if ((epsts & UDC_EPSTS_TDC) && (!dev->stall)) | 2084 | if ((epsts & UDC_EPSTS_TDC) && (!dev->stall)) { |
2077 | pch_udc_complete_transfer(ep); | 2085 | pch_udc_complete_transfer(ep); |
2086 | pch_udc_clear_dma(dev, DMA_DIR_RX); | ||
2087 | ep_out->td_data->status = (ep_out->td_data->status & | ||
2088 | ~PCH_UDC_BUFF_STS) | | ||
2089 | PCH_UDC_BS_HST_RDY; | ||
2090 | pch_udc_ep_clear_nak(ep_out); | ||
2091 | pch_udc_set_dma(dev, DMA_DIR_RX); | ||
2092 | pch_udc_ep_set_rrdy(ep_out); | ||
2093 | } | ||
2078 | /* On IN interrupt, provide data if we have any */ | 2094 | /* On IN interrupt, provide data if we have any */ |
2079 | if ((epsts & UDC_EPSTS_IN) && !(epsts & UDC_EPSTS_TDC) && | 2095 | if ((epsts & UDC_EPSTS_IN) && !(epsts & UDC_EPSTS_TDC) && |
2080 | !(epsts & UDC_EPSTS_TXEMPTY)) | 2096 | !(epsts & UDC_EPSTS_TXEMPTY)) |
@@ -2102,11 +2118,9 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev) | |||
2102 | dev->stall = 0; | 2118 | dev->stall = 0; |
2103 | dev->ep[UDC_EP0IN_IDX].halted = 0; | 2119 | dev->ep[UDC_EP0IN_IDX].halted = 0; |
2104 | dev->ep[UDC_EP0OUT_IDX].halted = 0; | 2120 | dev->ep[UDC_EP0OUT_IDX].halted = 0; |
2105 | /* In data not ready */ | ||
2106 | pch_udc_ep_set_nak(&(dev->ep[UDC_EP0IN_IDX])); | ||
2107 | dev->setup_data = ep->td_stp->request; | 2121 | dev->setup_data = ep->td_stp->request; |
2108 | pch_udc_init_setup_buff(ep->td_stp); | 2122 | pch_udc_init_setup_buff(ep->td_stp); |
2109 | pch_udc_clear_dma(dev, DMA_DIR_TX); | 2123 | pch_udc_clear_dma(dev, DMA_DIR_RX); |
2110 | pch_udc_ep_fifo_flush(&(dev->ep[UDC_EP0IN_IDX]), | 2124 | pch_udc_ep_fifo_flush(&(dev->ep[UDC_EP0IN_IDX]), |
2111 | dev->ep[UDC_EP0IN_IDX].in); | 2125 | dev->ep[UDC_EP0IN_IDX].in); |
2112 | if ((dev->setup_data.bRequestType & USB_DIR_IN)) | 2126 | if ((dev->setup_data.bRequestType & USB_DIR_IN)) |
@@ -2122,14 +2136,23 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev) | |||
2122 | setup_supported = dev->driver->setup(&dev->gadget, | 2136 | setup_supported = dev->driver->setup(&dev->gadget, |
2123 | &dev->setup_data); | 2137 | &dev->setup_data); |
2124 | spin_lock(&dev->lock); | 2138 | spin_lock(&dev->lock); |
2139 | |||
2140 | if (dev->setup_data.bRequestType & USB_DIR_IN) { | ||
2141 | ep->td_data->status = (ep->td_data->status & | ||
2142 | ~PCH_UDC_BUFF_STS) | | ||
2143 | PCH_UDC_BS_HST_RDY; | ||
2144 | pch_udc_ep_set_ddptr(ep, ep->td_data_phys); | ||
2145 | } | ||
2125 | /* ep0 in returns data on IN phase */ | 2146 | /* ep0 in returns data on IN phase */ |
2126 | if (setup_supported >= 0 && setup_supported < | 2147 | if (setup_supported >= 0 && setup_supported < |
2127 | UDC_EP0IN_MAX_PKT_SIZE) { | 2148 | UDC_EP0IN_MAX_PKT_SIZE) { |
2128 | pch_udc_ep_clear_nak(&(dev->ep[UDC_EP0IN_IDX])); | 2149 | pch_udc_ep_clear_nak(&(dev->ep[UDC_EP0IN_IDX])); |
2129 | /* Gadget would have queued a request when | 2150 | /* Gadget would have queued a request when |
2130 | * we called the setup */ | 2151 | * we called the setup */ |
2131 | pch_udc_set_dma(dev, DMA_DIR_RX); | 2152 | if (!(dev->setup_data.bRequestType & USB_DIR_IN)) { |
2132 | pch_udc_ep_clear_nak(ep); | 2153 | pch_udc_set_dma(dev, DMA_DIR_RX); |
2154 | pch_udc_ep_clear_nak(ep); | ||
2155 | } | ||
2133 | } else if (setup_supported < 0) { | 2156 | } else if (setup_supported < 0) { |
2134 | /* if unsupported request, then stall */ | 2157 | /* if unsupported request, then stall */ |
2135 | pch_udc_ep_set_stall(&(dev->ep[UDC_EP0IN_IDX])); | 2158 | pch_udc_ep_set_stall(&(dev->ep[UDC_EP0IN_IDX])); |
@@ -2142,22 +2165,13 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev) | |||
2142 | } | 2165 | } |
2143 | } else if ((((stat & UDC_EPSTS_OUT_MASK) >> UDC_EPSTS_OUT_SHIFT) == | 2166 | } else if ((((stat & UDC_EPSTS_OUT_MASK) >> UDC_EPSTS_OUT_SHIFT) == |
2144 | UDC_EPSTS_OUT_DATA) && !dev->stall) { | 2167 | UDC_EPSTS_OUT_DATA) && !dev->stall) { |
2145 | if (list_empty(&ep->queue)) { | 2168 | pch_udc_clear_dma(dev, DMA_DIR_RX); |
2146 | dev_err(&dev->pdev->dev, "%s: No request\n", __func__); | 2169 | pch_udc_ep_set_ddptr(ep, 0); |
2147 | ep->td_data->status = (ep->td_data->status & | 2170 | if (!list_empty(&ep->queue)) { |
2148 | ~PCH_UDC_BUFF_STS) | | ||
2149 | PCH_UDC_BS_HST_RDY; | ||
2150 | pch_udc_set_dma(dev, DMA_DIR_RX); | ||
2151 | } else { | ||
2152 | /* control write */ | ||
2153 | /* next function will pickuo an clear the status */ | ||
2154 | ep->epsts = stat; | 2171 | ep->epsts = stat; |
2155 | 2172 | pch_udc_svc_data_out(dev, PCH_UDC_EP0); | |
2156 | pch_udc_svc_data_out(dev, 0); | ||
2157 | /* re-program desc. pointer for possible ZLPs */ | ||
2158 | pch_udc_ep_set_ddptr(ep, ep->td_data_phys); | ||
2159 | pch_udc_set_dma(dev, DMA_DIR_RX); | ||
2160 | } | 2173 | } |
2174 | pch_udc_set_dma(dev, DMA_DIR_RX); | ||
2161 | } | 2175 | } |
2162 | pch_udc_ep_set_rrdy(ep); | 2176 | pch_udc_ep_set_rrdy(ep); |
2163 | } | 2177 | } |
@@ -2174,7 +2188,7 @@ static void pch_udc_postsvc_epinters(struct pch_udc_dev *dev, int ep_num) | |||
2174 | struct pch_udc_ep *ep; | 2188 | struct pch_udc_ep *ep; |
2175 | struct pch_udc_request *req; | 2189 | struct pch_udc_request *req; |
2176 | 2190 | ||
2177 | ep = &dev->ep[2*ep_num]; | 2191 | ep = &dev->ep[UDC_EPIN_IDX(ep_num)]; |
2178 | if (!list_empty(&ep->queue)) { | 2192 | if (!list_empty(&ep->queue)) { |
2179 | req = list_entry(ep->queue.next, struct pch_udc_request, queue); | 2193 | req = list_entry(ep->queue.next, struct pch_udc_request, queue); |
2180 | pch_udc_enable_ep_interrupts(ep->dev, | 2194 | pch_udc_enable_ep_interrupts(ep->dev, |
@@ -2196,13 +2210,13 @@ static void pch_udc_read_all_epstatus(struct pch_udc_dev *dev, u32 ep_intr) | |||
2196 | for (i = 0; i < PCH_UDC_USED_EP_NUM; i++) { | 2210 | for (i = 0; i < PCH_UDC_USED_EP_NUM; i++) { |
2197 | /* IN */ | 2211 | /* IN */ |
2198 | if (ep_intr & (0x1 << i)) { | 2212 | if (ep_intr & (0x1 << i)) { |
2199 | ep = &dev->ep[2*i]; | 2213 | ep = &dev->ep[UDC_EPIN_IDX(i)]; |
2200 | ep->epsts = pch_udc_read_ep_status(ep); | 2214 | ep->epsts = pch_udc_read_ep_status(ep); |
2201 | pch_udc_clear_ep_status(ep, ep->epsts); | 2215 | pch_udc_clear_ep_status(ep, ep->epsts); |
2202 | } | 2216 | } |
2203 | /* OUT */ | 2217 | /* OUT */ |
2204 | if (ep_intr & (0x10000 << i)) { | 2218 | if (ep_intr & (0x10000 << i)) { |
2205 | ep = &dev->ep[2*i+1]; | 2219 | ep = &dev->ep[UDC_EPOUT_IDX(i)]; |
2206 | ep->epsts = pch_udc_read_ep_status(ep); | 2220 | ep->epsts = pch_udc_read_ep_status(ep); |
2207 | pch_udc_clear_ep_status(ep, ep->epsts); | 2221 | pch_udc_clear_ep_status(ep, ep->epsts); |
2208 | } | 2222 | } |
@@ -2563,9 +2577,6 @@ static void pch_udc_pcd_reinit(struct pch_udc_dev *dev) | |||
2563 | dev->ep[UDC_EP0IN_IDX].ep.maxpacket = UDC_EP0IN_MAX_PKT_SIZE; | 2577 | dev->ep[UDC_EP0IN_IDX].ep.maxpacket = UDC_EP0IN_MAX_PKT_SIZE; |
2564 | dev->ep[UDC_EP0OUT_IDX].ep.maxpacket = UDC_EP0OUT_MAX_PKT_SIZE; | 2578 | dev->ep[UDC_EP0OUT_IDX].ep.maxpacket = UDC_EP0OUT_MAX_PKT_SIZE; |
2565 | 2579 | ||
2566 | dev->dma_addr = pci_map_single(dev->pdev, dev->ep0out_buf, 256, | ||
2567 | PCI_DMA_FROMDEVICE); | ||
2568 | |||
2569 | /* remove ep0 in and out from the list. They have own pointer */ | 2580 | /* remove ep0 in and out from the list. They have own pointer */ |
2570 | list_del_init(&dev->ep[UDC_EP0IN_IDX].ep.ep_list); | 2581 | list_del_init(&dev->ep[UDC_EP0IN_IDX].ep.ep_list); |
2571 | list_del_init(&dev->ep[UDC_EP0OUT_IDX].ep.ep_list); | 2582 | list_del_init(&dev->ep[UDC_EP0OUT_IDX].ep.ep_list); |
@@ -2637,6 +2648,13 @@ static int init_dma_pools(struct pch_udc_dev *dev) | |||
2637 | dev->ep[UDC_EP0IN_IDX].td_stp_phys = 0; | 2648 | dev->ep[UDC_EP0IN_IDX].td_stp_phys = 0; |
2638 | dev->ep[UDC_EP0IN_IDX].td_data = NULL; | 2649 | dev->ep[UDC_EP0IN_IDX].td_data = NULL; |
2639 | dev->ep[UDC_EP0IN_IDX].td_data_phys = 0; | 2650 | dev->ep[UDC_EP0IN_IDX].td_data_phys = 0; |
2651 | |||
2652 | dev->ep0out_buf = kzalloc(UDC_EP0OUT_BUFF_SIZE * 4, GFP_KERNEL); | ||
2653 | if (!dev->ep0out_buf) | ||
2654 | return -ENOMEM; | ||
2655 | dev->dma_addr = dma_map_single(&dev->pdev->dev, dev->ep0out_buf, | ||
2656 | UDC_EP0OUT_BUFF_SIZE * 4, | ||
2657 | DMA_FROM_DEVICE); | ||
2640 | return 0; | 2658 | return 0; |
2641 | } | 2659 | } |
2642 | 2660 | ||
@@ -2700,7 +2718,8 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |||
2700 | 2718 | ||
2701 | pch_udc_disable_interrupts(dev, UDC_DEVINT_MSK); | 2719 | pch_udc_disable_interrupts(dev, UDC_DEVINT_MSK); |
2702 | 2720 | ||
2703 | /* Assues that there are no pending requets with this driver */ | 2721 | /* Assures that there are no pending requests with this driver */ |
2722 | driver->disconnect(&dev->gadget); | ||
2704 | driver->unbind(&dev->gadget); | 2723 | driver->unbind(&dev->gadget); |
2705 | dev->gadget.dev.driver = NULL; | 2724 | dev->gadget.dev.driver = NULL; |
2706 | dev->driver = NULL; | 2725 | dev->driver = NULL; |
@@ -2750,6 +2769,11 @@ static void pch_udc_remove(struct pci_dev *pdev) | |||
2750 | pci_pool_destroy(dev->stp_requests); | 2769 | pci_pool_destroy(dev->stp_requests); |
2751 | } | 2770 | } |
2752 | 2771 | ||
2772 | if (dev->dma_addr) | ||
2773 | dma_unmap_single(&dev->pdev->dev, dev->dma_addr, | ||
2774 | UDC_EP0OUT_BUFF_SIZE * 4, DMA_FROM_DEVICE); | ||
2775 | kfree(dev->ep0out_buf); | ||
2776 | |||
2753 | pch_udc_exit(dev); | 2777 | pch_udc_exit(dev); |
2754 | 2778 | ||
2755 | if (dev->irq_registered) | 2779 | if (dev->irq_registered) |
@@ -2792,11 +2816,7 @@ static int pch_udc_resume(struct pci_dev *pdev) | |||
2792 | int ret; | 2816 | int ret; |
2793 | 2817 | ||
2794 | pci_set_power_state(pdev, PCI_D0); | 2818 | pci_set_power_state(pdev, PCI_D0); |
2795 | ret = pci_restore_state(pdev); | 2819 | pci_restore_state(pdev); |
2796 | if (ret) { | ||
2797 | dev_err(&pdev->dev, "%s: pci_restore_state failed\n", __func__); | ||
2798 | return ret; | ||
2799 | } | ||
2800 | ret = pci_enable_device(pdev); | 2820 | ret = pci_enable_device(pdev); |
2801 | if (ret) { | 2821 | if (ret) { |
2802 | dev_err(&pdev->dev, "%s: pci_enable_device failed\n", __func__); | 2822 | dev_err(&pdev->dev, "%s: pci_enable_device failed\n", __func__); |
@@ -2914,6 +2934,11 @@ static DEFINE_PCI_DEVICE_TABLE(pch_udc_pcidev_id) = { | |||
2914 | .class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe, | 2934 | .class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe, |
2915 | .class_mask = 0xffffffff, | 2935 | .class_mask = 0xffffffff, |
2916 | }, | 2936 | }, |
2937 | { | ||
2938 | PCI_DEVICE(PCI_VENDOR_ID_ROHM, PCI_DEVICE_ID_ML7213_IOH_UDC), | ||
2939 | .class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe, | ||
2940 | .class_mask = 0xffffffff, | ||
2941 | }, | ||
2917 | { 0 }, | 2942 | { 0 }, |
2918 | }; | 2943 | }; |
2919 | 2944 | ||