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path: root/drivers/usb/gadget/fsl_mxc_udc.c
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Diffstat (limited to 'drivers/usb/gadget/fsl_mxc_udc.c')
-rw-r--r--drivers/usb/gadget/fsl_mxc_udc.c40
1 files changed, 26 insertions, 14 deletions
diff --git a/drivers/usb/gadget/fsl_mxc_udc.c b/drivers/usb/gadget/fsl_mxc_udc.c
index 1b0f086426bd..d3bd7b095ba3 100644
--- a/drivers/usb/gadget/fsl_mxc_udc.c
+++ b/drivers/usb/gadget/fsl_mxc_udc.c
@@ -18,14 +18,13 @@
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <mach/hardware.h>
22
23static struct clk *mxc_ahb_clk; 21static struct clk *mxc_ahb_clk;
24static struct clk *mxc_per_clk; 22static struct clk *mxc_per_clk;
25static struct clk *mxc_ipg_clk; 23static struct clk *mxc_ipg_clk;
26 24
27/* workaround ENGcm09152 for i.MX35 */ 25/* workaround ENGcm09152 for i.MX35 */
28#define USBPHYCTRL_OTGBASE_OFFSET 0x608 26#define MX35_USBPHYCTRL_OFFSET 0x600
27#define USBPHYCTRL_OTGBASE_OFFSET 0x8
29#define USBPHYCTRL_EVDO (1 << 23) 28#define USBPHYCTRL_EVDO (1 << 23)
30 29
31int fsl_udc_clk_init(struct platform_device *pdev) 30int fsl_udc_clk_init(struct platform_device *pdev)
@@ -59,7 +58,7 @@ int fsl_udc_clk_init(struct platform_device *pdev)
59 clk_prepare_enable(mxc_per_clk); 58 clk_prepare_enable(mxc_per_clk);
60 59
61 /* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */ 60 /* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */
62 if (!cpu_is_mx51()) { 61 if (!strcmp(pdev->id_entry->name, "imx-udc-mx27")) {
63 freq = clk_get_rate(mxc_per_clk); 62 freq = clk_get_rate(mxc_per_clk);
64 if (pdata->phy_mode != FSL_USB2_PHY_ULPI && 63 if (pdata->phy_mode != FSL_USB2_PHY_ULPI &&
65 (freq < 59999000 || freq > 60001000)) { 64 (freq < 59999000 || freq > 60001000)) {
@@ -79,27 +78,40 @@ eclkrate:
79 return ret; 78 return ret;
80} 79}
81 80
82void fsl_udc_clk_finalize(struct platform_device *pdev) 81int fsl_udc_clk_finalize(struct platform_device *pdev)
83{ 82{
84 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; 83 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
85 if (cpu_is_mx35()) { 84 int ret = 0;
86 unsigned int v;
87 85
88 /* workaround ENGcm09152 for i.MX35 */ 86 /* workaround ENGcm09152 for i.MX35 */
89 if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) { 87 if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) {
90 v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + 88 unsigned int v;
91 USBPHYCTRL_OTGBASE_OFFSET)); 89 struct resource *res = platform_get_resource
92 writel(v | USBPHYCTRL_EVDO, 90 (pdev, IORESOURCE_MEM, 0);
93 MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + 91 void __iomem *phy_regs = ioremap(res->start +
94 USBPHYCTRL_OTGBASE_OFFSET)); 92 MX35_USBPHYCTRL_OFFSET, 512);
93 if (!phy_regs) {
94 dev_err(&pdev->dev, "ioremap for phy address fails\n");
95 ret = -EINVAL;
96 goto ioremap_err;
95 } 97 }
98
99 v = readl(phy_regs + USBPHYCTRL_OTGBASE_OFFSET);
100 writel(v | USBPHYCTRL_EVDO,
101 phy_regs + USBPHYCTRL_OTGBASE_OFFSET);
102
103 iounmap(phy_regs);
96 } 104 }
97 105
106
107ioremap_err:
98 /* ULPI transceivers don't need usbpll */ 108 /* ULPI transceivers don't need usbpll */
99 if (pdata->phy_mode == FSL_USB2_PHY_ULPI) { 109 if (pdata->phy_mode == FSL_USB2_PHY_ULPI) {
100 clk_disable_unprepare(mxc_per_clk); 110 clk_disable_unprepare(mxc_per_clk);
101 mxc_per_clk = NULL; 111 mxc_per_clk = NULL;
102 } 112 }
113
114 return ret;
103} 115}
104 116
105void fsl_udc_clk_release(void) 117void fsl_udc_clk_release(void)