diff options
Diffstat (limited to 'drivers/usb/dwc3/ep0.c')
-rw-r--r-- | drivers/usb/dwc3/ep0.c | 48 |
1 files changed, 36 insertions, 12 deletions
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index b35938777dde..711b23019d54 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c | |||
@@ -256,7 +256,7 @@ static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc) | |||
256 | 256 | ||
257 | /* stall is always issued on EP0 */ | 257 | /* stall is always issued on EP0 */ |
258 | dep = dwc->eps[0]; | 258 | dep = dwc->eps[0]; |
259 | __dwc3_gadget_ep_set_halt(dep, 1); | 259 | __dwc3_gadget_ep_set_halt(dep, 1, false); |
260 | dep->flags = DWC3_EP_ENABLED; | 260 | dep->flags = DWC3_EP_ENABLED; |
261 | dwc->delayed_status = false; | 261 | dwc->delayed_status = false; |
262 | 262 | ||
@@ -271,7 +271,7 @@ static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc) | |||
271 | dwc3_ep0_out_start(dwc); | 271 | dwc3_ep0_out_start(dwc); |
272 | } | 272 | } |
273 | 273 | ||
274 | int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value) | 274 | int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value) |
275 | { | 275 | { |
276 | struct dwc3_ep *dep = to_dwc3_ep(ep); | 276 | struct dwc3_ep *dep = to_dwc3_ep(ep); |
277 | struct dwc3 *dwc = dep->dwc; | 277 | struct dwc3 *dwc = dep->dwc; |
@@ -281,6 +281,20 @@ int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value) | |||
281 | return 0; | 281 | return 0; |
282 | } | 282 | } |
283 | 283 | ||
284 | int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value) | ||
285 | { | ||
286 | struct dwc3_ep *dep = to_dwc3_ep(ep); | ||
287 | struct dwc3 *dwc = dep->dwc; | ||
288 | unsigned long flags; | ||
289 | int ret; | ||
290 | |||
291 | spin_lock_irqsave(&dwc->lock, flags); | ||
292 | ret = __dwc3_gadget_ep0_set_halt(ep, value); | ||
293 | spin_unlock_irqrestore(&dwc->lock, flags); | ||
294 | |||
295 | return ret; | ||
296 | } | ||
297 | |||
284 | void dwc3_ep0_out_start(struct dwc3 *dwc) | 298 | void dwc3_ep0_out_start(struct dwc3 *dwc) |
285 | { | 299 | { |
286 | int ret; | 300 | int ret; |
@@ -466,7 +480,7 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc, | |||
466 | return -EINVAL; | 480 | return -EINVAL; |
467 | if (set == 0 && (dep->flags & DWC3_EP_WEDGE)) | 481 | if (set == 0 && (dep->flags & DWC3_EP_WEDGE)) |
468 | break; | 482 | break; |
469 | ret = __dwc3_gadget_ep_set_halt(dep, set); | 483 | ret = __dwc3_gadget_ep_set_halt(dep, set, true); |
470 | if (ret) | 484 | if (ret) |
471 | return -EINVAL; | 485 | return -EINVAL; |
472 | break; | 486 | break; |
@@ -775,9 +789,6 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, | |||
775 | 789 | ||
776 | dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS; | 790 | dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS; |
777 | 791 | ||
778 | r = next_request(&ep0->request_list); | ||
779 | ur = &r->request; | ||
780 | |||
781 | trb = dwc->ep0_trb; | 792 | trb = dwc->ep0_trb; |
782 | 793 | ||
783 | status = DWC3_TRB_SIZE_TRBSTS(trb->size); | 794 | status = DWC3_TRB_SIZE_TRBSTS(trb->size); |
@@ -790,6 +801,12 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, | |||
790 | return; | 801 | return; |
791 | } | 802 | } |
792 | 803 | ||
804 | r = next_request(&ep0->request_list); | ||
805 | if (!r) | ||
806 | return; | ||
807 | |||
808 | ur = &r->request; | ||
809 | |||
793 | length = trb->size & DWC3_TRB_SIZE_MASK; | 810 | length = trb->size & DWC3_TRB_SIZE_MASK; |
794 | 811 | ||
795 | if (dwc->ep0_bounced) { | 812 | if (dwc->ep0_bounced) { |
@@ -811,12 +828,19 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, | |||
811 | 828 | ||
812 | dwc3_ep0_stall_and_restart(dwc); | 829 | dwc3_ep0_stall_and_restart(dwc); |
813 | } else { | 830 | } else { |
814 | /* | 831 | dwc3_gadget_giveback(ep0, r, 0); |
815 | * handle the case where we have to send a zero packet. This | 832 | |
816 | * seems to be case when req.length > maxpacket. Could it be? | 833 | if (IS_ALIGNED(ur->length, ep0->endpoint.maxpacket) && |
817 | */ | 834 | ur->length && ur->zero) { |
818 | if (r) | 835 | int ret; |
819 | dwc3_gadget_giveback(ep0, r, 0); | 836 | |
837 | dwc->ep0_next_event = DWC3_EP0_COMPLETE; | ||
838 | |||
839 | ret = dwc3_ep0_start_trans(dwc, epnum, | ||
840 | dwc->ctrl_req_addr, 0, | ||
841 | DWC3_TRBCTL_CONTROL_DATA); | ||
842 | WARN_ON(ret < 0); | ||
843 | } | ||
820 | } | 844 | } |
821 | } | 845 | } |
822 | 846 | ||