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-rw-r--r--drivers/uio/uio_pci_generic.c79
1 files changed, 7 insertions, 72 deletions
diff --git a/drivers/uio/uio_pci_generic.c b/drivers/uio/uio_pci_generic.c
index 56d00c6258f0..0bd08ef2b394 100644
--- a/drivers/uio/uio_pci_generic.c
+++ b/drivers/uio/uio_pci_generic.c
@@ -45,78 +45,12 @@ to_uio_pci_generic_dev(struct uio_info *info)
45static irqreturn_t irqhandler(int irq, struct uio_info *info) 45static irqreturn_t irqhandler(int irq, struct uio_info *info)
46{ 46{
47 struct uio_pci_generic_dev *gdev = to_uio_pci_generic_dev(info); 47 struct uio_pci_generic_dev *gdev = to_uio_pci_generic_dev(info);
48 struct pci_dev *pdev = gdev->pdev;
49 irqreturn_t ret = IRQ_NONE;
50 u32 cmd_status_dword;
51 u16 origcmd, newcmd, status;
52
53 /* We do a single dword read to retrieve both command and status.
54 * Document assumptions that make this possible. */
55 BUILD_BUG_ON(PCI_COMMAND % 4);
56 BUILD_BUG_ON(PCI_COMMAND + 2 != PCI_STATUS);
57
58 if (!pci_cfg_access_trylock(pdev))
59 goto error;
60
61 /* Read both command and status registers in a single 32-bit operation.
62 * Note: we could cache the value for command and move the status read
63 * out of the lock if there was a way to get notified of user changes
64 * to command register through sysfs. Should be good for shared irqs. */
65 pci_read_config_dword(pdev, PCI_COMMAND, &cmd_status_dword);
66 origcmd = cmd_status_dword;
67 status = cmd_status_dword >> 16;
68
69 /* Check interrupt status register to see whether our device
70 * triggered the interrupt. */
71 if (!(status & PCI_STATUS_INTERRUPT))
72 goto done;
73
74 /* We triggered the interrupt, disable it. */
75 newcmd = origcmd | PCI_COMMAND_INTX_DISABLE;
76 if (newcmd != origcmd)
77 pci_write_config_word(pdev, PCI_COMMAND, newcmd);
78 48
79 /* UIO core will signal the user process. */ 49 if (!pci_check_and_mask_intx(gdev->pdev))
80 ret = IRQ_HANDLED; 50 return IRQ_NONE;
81done:
82
83 pci_cfg_access_lock(pdev);
84 return ret;
85}
86 51
87/* Verify that the device supports Interrupt Disable bit in command register, 52 /* UIO core will signal the user process. */
88 * per PCI 2.3, by flipping this bit and reading it back: this bit was readonly 53 return IRQ_HANDLED;
89 * in PCI 2.2. */
90static int __devinit verify_pci_2_3(struct pci_dev *pdev)
91{
92 u16 orig, new;
93 int err = 0;
94
95 pci_cfg_access_lock(pdev);
96 pci_read_config_word(pdev, PCI_COMMAND, &orig);
97 pci_write_config_word(pdev, PCI_COMMAND,
98 orig ^ PCI_COMMAND_INTX_DISABLE);
99 pci_read_config_word(pdev, PCI_COMMAND, &new);
100 /* There's no way to protect against
101 * hardware bugs or detect them reliably, but as long as we know
102 * what the value should be, let's go ahead and check it. */
103 if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) {
104 err = -EBUSY;
105 dev_err(&pdev->dev, "Command changed from 0x%x to 0x%x: "
106 "driver or HW bug?\n", orig, new);
107 goto err;
108 }
109 if (!((new ^ orig) & PCI_COMMAND_INTX_DISABLE)) {
110 dev_warn(&pdev->dev, "Device does not support "
111 "disabling interrupts: unable to bind.\n");
112 err = -ENODEV;
113 goto err;
114 }
115 /* Now restore the original value. */
116 pci_write_config_word(pdev, PCI_COMMAND, orig);
117err:
118 pci_cfg_access_unlock(pdev);
119 return err;
120} 54}
121 55
122static int __devinit probe(struct pci_dev *pdev, 56static int __devinit probe(struct pci_dev *pdev,
@@ -139,9 +73,10 @@ static int __devinit probe(struct pci_dev *pdev,
139 return -ENODEV; 73 return -ENODEV;
140 } 74 }
141 75
142 err = verify_pci_2_3(pdev); 76 if (!pci_intx_mask_supported(pdev)) {
143 if (err) 77 err = -ENODEV;
144 goto err_verify; 78 goto err_verify;
79 }
145 80
146 gdev = kzalloc(sizeof(struct uio_pci_generic_dev), GFP_KERNEL); 81 gdev = kzalloc(sizeof(struct uio_pci_generic_dev), GFP_KERNEL);
147 if (!gdev) { 82 if (!gdev) {