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-rw-r--r--drivers/tty/bfin_jtag_comm.c2
-rw-r--r--drivers/tty/hvc/hvc_dcc.c21
-rw-r--r--drivers/tty/hvc/hvc_vio.c5
-rw-r--r--drivers/tty/n_tty.c13
-rw-r--r--drivers/tty/nozomi.c6
-rw-r--r--drivers/tty/serial/8250/8250_core.c2
-rw-r--r--drivers/tty/serial/8250/8250_dw.c76
-rw-r--r--drivers/tty/serial/8250/8250_em.c6
-rw-r--r--drivers/tty/serial/8250/8250_pci.c347
-rw-r--r--drivers/tty/serial/Kconfig3
-rw-r--r--drivers/tty/serial/amba-pl010.c3
-rw-r--r--drivers/tty/serial/amba-pl011.c3
-rw-r--r--drivers/tty/serial/arc_uart.c2
-rw-r--r--drivers/tty/serial/atmel_serial.c28
-rw-r--r--drivers/tty/serial/bfin_sport_uart.c11
-rw-r--r--drivers/tty/serial/bfin_uart.c21
-rw-r--r--drivers/tty/serial/clps711x.c2
-rw-r--r--drivers/tty/serial/ifx6x60.c2
-rw-r--r--drivers/tty/serial/imx.c82
-rw-r--r--drivers/tty/serial/ip22zilog.c2
-rw-r--r--drivers/tty/serial/max310x.c2
-rw-r--r--drivers/tty/serial/mfd.c13
-rw-r--r--drivers/tty/serial/mpc52xx_uart.c5
-rw-r--r--drivers/tty/serial/mpsc.c2
-rw-r--r--drivers/tty/serial/mrst_max3110.c45
-rw-r--r--drivers/tty/serial/mxs-auart.c9
-rw-r--r--drivers/tty/serial/omap-serial.c141
-rw-r--r--drivers/tty/serial/pch_uart.c3
-rw-r--r--drivers/tty/serial/pmac_zilog.c2
-rw-r--r--drivers/tty/serial/sa1100.c5
-rw-r--r--drivers/tty/serial/samsung.c22
-rw-r--r--drivers/tty/serial/samsung.h2
-rw-r--r--drivers/tty/serial/sccnxp.c1
-rw-r--r--drivers/tty/serial/serial-tegra.c2
-rw-r--r--drivers/tty/serial/serial_txx9.c2
-rw-r--r--drivers/tty/serial/sirfsoc_uart.c11
-rw-r--r--drivers/tty/serial/sirfsoc_uart.h12
-rw-r--r--drivers/tty/serial/sunsab.c2
-rw-r--r--drivers/tty/serial/sunsu.c2
-rw-r--r--drivers/tty/serial/sunzilog.c6
-rw-r--r--drivers/tty/serial/ucc_uart.c2
-rw-r--r--drivers/tty/serial/xilinx_uartps.c551
-rw-r--r--drivers/tty/sysrq.c2
-rw-r--r--drivers/tty/tty_port.c10
-rw-r--r--drivers/tty/vt/vt.c33
45 files changed, 1176 insertions, 348 deletions
diff --git a/drivers/tty/bfin_jtag_comm.c b/drivers/tty/bfin_jtag_comm.c
index a93a424873fa..8096fcbe2dc1 100644
--- a/drivers/tty/bfin_jtag_comm.c
+++ b/drivers/tty/bfin_jtag_comm.c
@@ -349,7 +349,7 @@ bfin_jc_early_write(struct console *co, const char *buf, unsigned int count)
349 bfin_jc_straight_buffer_write(buf, count); 349 bfin_jc_straight_buffer_write(buf, count);
350} 350}
351 351
352static struct __initdata console bfin_jc_early_console = { 352static struct console bfin_jc_early_console __initdata = {
353 .name = "early_BFJC", 353 .name = "early_BFJC",
354 .write = bfin_jc_early_write, 354 .write = bfin_jc_early_write,
355 .flags = CON_ANYTIME | CON_PRINTBUFFER, 355 .flags = CON_ANYTIME | CON_PRINTBUFFER,
diff --git a/drivers/tty/hvc/hvc_dcc.c b/drivers/tty/hvc/hvc_dcc.c
index 44fbebab5075..3502a7bbb69e 100644
--- a/drivers/tty/hvc/hvc_dcc.c
+++ b/drivers/tty/hvc/hvc_dcc.c
@@ -86,6 +86,21 @@ static int hvc_dcc_get_chars(uint32_t vt, char *buf, int count)
86 return i; 86 return i;
87} 87}
88 88
89static bool hvc_dcc_check(void)
90{
91 unsigned long time = jiffies + (HZ / 10);
92
93 /* Write a test character to check if it is handled */
94 __dcc_putchar('\n');
95
96 while (time_is_after_jiffies(time)) {
97 if (!(__dcc_getstatus() & DCC_STATUS_TX))
98 return true;
99 }
100
101 return false;
102}
103
89static const struct hv_ops hvc_dcc_get_put_ops = { 104static const struct hv_ops hvc_dcc_get_put_ops = {
90 .get_chars = hvc_dcc_get_chars, 105 .get_chars = hvc_dcc_get_chars,
91 .put_chars = hvc_dcc_put_chars, 106 .put_chars = hvc_dcc_put_chars,
@@ -93,6 +108,9 @@ static const struct hv_ops hvc_dcc_get_put_ops = {
93 108
94static int __init hvc_dcc_console_init(void) 109static int __init hvc_dcc_console_init(void)
95{ 110{
111 if (!hvc_dcc_check())
112 return -ENODEV;
113
96 hvc_instantiate(0, 0, &hvc_dcc_get_put_ops); 114 hvc_instantiate(0, 0, &hvc_dcc_get_put_ops);
97 return 0; 115 return 0;
98} 116}
@@ -100,6 +118,9 @@ console_initcall(hvc_dcc_console_init);
100 118
101static int __init hvc_dcc_init(void) 119static int __init hvc_dcc_init(void)
102{ 120{
121 if (!hvc_dcc_check())
122 return -ENODEV;
123
103 hvc_alloc(0, 0, &hvc_dcc_get_put_ops, 128); 124 hvc_alloc(0, 0, &hvc_dcc_get_put_ops, 128);
104 return 0; 125 return 0;
105} 126}
diff --git a/drivers/tty/hvc/hvc_vio.c b/drivers/tty/hvc/hvc_vio.c
index c791b18cdd08..b594abfbf21e 100644
--- a/drivers/tty/hvc/hvc_vio.c
+++ b/drivers/tty/hvc/hvc_vio.c
@@ -48,6 +48,7 @@
48#include <asm/prom.h> 48#include <asm/prom.h>
49#include <asm/hvsi.h> 49#include <asm/hvsi.h>
50#include <asm/udbg.h> 50#include <asm/udbg.h>
51#include <asm/machdep.h>
51 52
52#include "hvc_console.h" 53#include "hvc_console.h"
53 54
@@ -457,7 +458,9 @@ void __init hvc_vio_init_early(void)
457 if (hvterm_priv0.proto == HV_PROTOCOL_HVSI) 458 if (hvterm_priv0.proto == HV_PROTOCOL_HVSI)
458 goto out; 459 goto out;
459#endif 460#endif
460 add_preferred_console("hvc", 0, NULL); 461 /* Check whether the user has requested a different console. */
462 if (!strstr(cmd_line, "console="))
463 add_preferred_console("hvc", 0, NULL);
461 hvc_instantiate(0, 0, ops); 464 hvc_instantiate(0, 0, ops);
462out: 465out:
463 of_node_put(stdout_node); 466 of_node_put(stdout_node);
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index 7a744b69c3d1..7cdd1eb9406c 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -767,7 +767,7 @@ static size_t __process_echoes(struct tty_struct *tty)
767 * of echo overrun before the next commit), then discard enough 767 * of echo overrun before the next commit), then discard enough
768 * data at the tail to prevent a subsequent overrun */ 768 * data at the tail to prevent a subsequent overrun */
769 while (ldata->echo_commit - tail >= ECHO_DISCARD_WATERMARK) { 769 while (ldata->echo_commit - tail >= ECHO_DISCARD_WATERMARK) {
770 if (echo_buf(ldata, tail == ECHO_OP_START)) { 770 if (echo_buf(ldata, tail) == ECHO_OP_START) {
771 if (echo_buf(ldata, tail) == ECHO_OP_ERASE_TAB) 771 if (echo_buf(ldata, tail) == ECHO_OP_ERASE_TAB)
772 tail += 3; 772 tail += 3;
773 else 773 else
@@ -1752,20 +1752,14 @@ int is_ignored(int sig)
1752static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old) 1752static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
1753{ 1753{
1754 struct n_tty_data *ldata = tty->disc_data; 1754 struct n_tty_data *ldata = tty->disc_data;
1755 int canon_change = 1;
1756 1755
1757 if (old) 1756 if (!old || (old->c_lflag ^ tty->termios.c_lflag) & ICANON) {
1758 canon_change = (old->c_lflag ^ tty->termios.c_lflag) & ICANON;
1759 if (canon_change) {
1760 bitmap_zero(ldata->read_flags, N_TTY_BUF_SIZE); 1757 bitmap_zero(ldata->read_flags, N_TTY_BUF_SIZE);
1761 ldata->line_start = ldata->canon_head = ldata->read_tail; 1758 ldata->line_start = ldata->canon_head = ldata->read_tail;
1762 ldata->erasing = 0; 1759 ldata->erasing = 0;
1763 ldata->lnext = 0; 1760 ldata->lnext = 0;
1764 } 1761 }
1765 1762
1766 if (canon_change && !L_ICANON(tty) && read_cnt(ldata))
1767 wake_up_interruptible(&tty->read_wait);
1768
1769 ldata->icanon = (L_ICANON(tty) != 0); 1763 ldata->icanon = (L_ICANON(tty) != 0);
1770 1764
1771 if (I_ISTRIP(tty) || I_IUCLC(tty) || I_IGNCR(tty) || 1765 if (I_ISTRIP(tty) || I_IUCLC(tty) || I_IGNCR(tty) ||
@@ -1820,9 +1814,8 @@ static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
1820 * Fix tty hang when I_IXON(tty) is cleared, but the tty 1814 * Fix tty hang when I_IXON(tty) is cleared, but the tty
1821 * been stopped by STOP_CHAR(tty) before it. 1815 * been stopped by STOP_CHAR(tty) before it.
1822 */ 1816 */
1823 if (!I_IXON(tty) && old && (old->c_iflag & IXON) && !tty->flow_stopped) { 1817 if (!I_IXON(tty) && old && (old->c_iflag & IXON) && !tty->flow_stopped)
1824 start_tty(tty); 1818 start_tty(tty);
1825 }
1826 1819
1827 /* The termios change make the tty ready for I/O */ 1820 /* The termios change make the tty ready for I/O */
1828 wake_up_interruptible(&tty->write_wait); 1821 wake_up_interruptible(&tty->write_wait);
diff --git a/drivers/tty/nozomi.c b/drivers/tty/nozomi.c
index d6080c3831ef..cd0429369557 100644
--- a/drivers/tty/nozomi.c
+++ b/drivers/tty/nozomi.c
@@ -959,7 +959,7 @@ static int receive_flow_control(struct nozomi *dc)
959 dev_err(&dc->pdev->dev, 959 dev_err(&dc->pdev->dev,
960 "ERROR: flow control received for non-existing port\n"); 960 "ERROR: flow control received for non-existing port\n");
961 return 0; 961 return 0;
962 }; 962 }
963 963
964 DBG1("0x%04X->0x%04X", *((u16 *)&dc->port[port].ctrl_dl), 964 DBG1("0x%04X->0x%04X", *((u16 *)&dc->port[port].ctrl_dl),
965 *((u16 *)&ctrl_dl)); 965 *((u16 *)&ctrl_dl));
@@ -1025,7 +1025,7 @@ static enum ctrl_port_type port2ctrl(enum port_type port,
1025 dev_err(&dc->pdev->dev, 1025 dev_err(&dc->pdev->dev,
1026 "ERROR: send flow control " \ 1026 "ERROR: send flow control " \
1027 "received for non-existing port\n"); 1027 "received for non-existing port\n");
1028 }; 1028 }
1029 return CTRL_ERROR; 1029 return CTRL_ERROR;
1030} 1030}
1031 1031
@@ -1805,7 +1805,7 @@ static int ntty_ioctl(struct tty_struct *tty,
1805 default: 1805 default:
1806 DBG1("ERR: 0x%08X, %d", cmd, cmd); 1806 DBG1("ERR: 0x%08X, %d", cmd, cmd);
1807 break; 1807 break;
1808 }; 1808 }
1809 1809
1810 return rval; 1810 return rval;
1811} 1811}
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index 570df9d2a5d2..e33d38cb170f 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -2322,7 +2322,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2322 2322
2323 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) { 2323 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2324 fcr = uart_config[port->type].fcr; 2324 fcr = uart_config[port->type].fcr;
2325 if (baud < 2400 || fifo_bug) { 2325 if ((baud < 2400 && !up->dma) || fifo_bug) {
2326 fcr &= ~UART_FCR_TRIGGER_MASK; 2326 fcr &= ~UART_FCR_TRIGGER_MASK;
2327 fcr |= UART_FCR_TRIGGER_1; 2327 fcr |= UART_FCR_TRIGGER_1;
2328 } 2328 }
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index daf710f5c3fc..4658e3e0ec42 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -56,11 +56,11 @@
56 56
57 57
58struct dw8250_data { 58struct dw8250_data {
59 int last_lcr; 59 u8 usr_reg;
60 int last_mcr; 60 int last_mcr;
61 int line; 61 int line;
62 struct clk *clk; 62 struct clk *clk;
63 u8 usr_reg; 63 struct uart_8250_dma dma;
64}; 64};
65 65
66static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value) 66static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value)
@@ -76,17 +76,33 @@ static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value)
76 return value; 76 return value;
77} 77}
78 78
79static void dw8250_force_idle(struct uart_port *p)
80{
81 serial8250_clear_and_reinit_fifos(container_of
82 (p, struct uart_8250_port, port));
83 (void)p->serial_in(p, UART_RX);
84}
85
79static void dw8250_serial_out(struct uart_port *p, int offset, int value) 86static void dw8250_serial_out(struct uart_port *p, int offset, int value)
80{ 87{
81 struct dw8250_data *d = p->private_data; 88 struct dw8250_data *d = p->private_data;
82 89
83 if (offset == UART_LCR)
84 d->last_lcr = value;
85
86 if (offset == UART_MCR) 90 if (offset == UART_MCR)
87 d->last_mcr = value; 91 d->last_mcr = value;
88 92
89 writeb(value, p->membase + (offset << p->regshift)); 93 writeb(value, p->membase + (offset << p->regshift));
94
95 /* Make sure LCR write wasn't ignored */
96 if (offset == UART_LCR) {
97 int tries = 1000;
98 while (tries--) {
99 if (value == p->serial_in(p, UART_LCR))
100 return;
101 dw8250_force_idle(p);
102 writeb(value, p->membase + (UART_LCR << p->regshift));
103 }
104 dev_err(p->dev, "Couldn't set LCR to %d\n", value);
105 }
90} 106}
91 107
92static unsigned int dw8250_serial_in(struct uart_port *p, int offset) 108static unsigned int dw8250_serial_in(struct uart_port *p, int offset)
@@ -107,13 +123,22 @@ static void dw8250_serial_out32(struct uart_port *p, int offset, int value)
107{ 123{
108 struct dw8250_data *d = p->private_data; 124 struct dw8250_data *d = p->private_data;
109 125
110 if (offset == UART_LCR)
111 d->last_lcr = value;
112
113 if (offset == UART_MCR) 126 if (offset == UART_MCR)
114 d->last_mcr = value; 127 d->last_mcr = value;
115 128
116 writel(value, p->membase + (offset << p->regshift)); 129 writel(value, p->membase + (offset << p->regshift));
130
131 /* Make sure LCR write wasn't ignored */
132 if (offset == UART_LCR) {
133 int tries = 1000;
134 while (tries--) {
135 if (value == p->serial_in(p, UART_LCR))
136 return;
137 dw8250_force_idle(p);
138 writel(value, p->membase + (UART_LCR << p->regshift));
139 }
140 dev_err(p->dev, "Couldn't set LCR to %d\n", value);
141 }
117} 142}
118 143
119static unsigned int dw8250_serial_in32(struct uart_port *p, int offset) 144static unsigned int dw8250_serial_in32(struct uart_port *p, int offset)
@@ -131,9 +156,8 @@ static int dw8250_handle_irq(struct uart_port *p)
131 if (serial8250_handle_irq(p, iir)) { 156 if (serial8250_handle_irq(p, iir)) {
132 return 1; 157 return 1;
133 } else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) { 158 } else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
134 /* Clear the USR and write the LCR again. */ 159 /* Clear the USR */
135 (void)p->serial_in(p, d->usr_reg); 160 (void)p->serial_in(p, d->usr_reg);
136 p->serial_out(p, UART_LCR, d->last_lcr);
137 161
138 return 1; 162 return 1;
139 } 163 }
@@ -153,6 +177,14 @@ dw8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
153 pm_runtime_put_sync_suspend(port->dev); 177 pm_runtime_put_sync_suspend(port->dev);
154} 178}
155 179
180static bool dw8250_dma_filter(struct dma_chan *chan, void *param)
181{
182 struct dw8250_data *data = param;
183
184 return chan->chan_id == data->dma.tx_chan_id ||
185 chan->chan_id == data->dma.rx_chan_id;
186}
187
156static void dw8250_setup_port(struct uart_8250_port *up) 188static void dw8250_setup_port(struct uart_8250_port *up)
157{ 189{
158 struct uart_port *p = &up->port; 190 struct uart_port *p = &up->port;
@@ -241,7 +273,8 @@ static int dw8250_probe_of(struct uart_port *p,
241} 273}
242 274
243#ifdef CONFIG_ACPI 275#ifdef CONFIG_ACPI
244static int dw8250_probe_acpi(struct uart_8250_port *up) 276static int dw8250_probe_acpi(struct uart_8250_port *up,
277 struct dw8250_data *data)
245{ 278{
246 const struct acpi_device_id *id; 279 const struct acpi_device_id *id;
247 struct uart_port *p = &up->port; 280 struct uart_port *p = &up->port;
@@ -260,9 +293,7 @@ static int dw8250_probe_acpi(struct uart_8250_port *up)
260 if (!p->uartclk) 293 if (!p->uartclk)
261 p->uartclk = (unsigned int)id->driver_data; 294 p->uartclk = (unsigned int)id->driver_data;
262 295
263 up->dma = devm_kzalloc(p->dev, sizeof(*up->dma), GFP_KERNEL); 296 up->dma = &data->dma;
264 if (!up->dma)
265 return -ENOMEM;
266 297
267 up->dma->rxconf.src_maxburst = p->fifosize / 4; 298 up->dma->rxconf.src_maxburst = p->fifosize / 4;
268 up->dma->txconf.dst_maxburst = p->fifosize / 4; 299 up->dma->txconf.dst_maxburst = p->fifosize / 4;
@@ -270,7 +301,8 @@ static int dw8250_probe_acpi(struct uart_8250_port *up)
270 return 0; 301 return 0;
271} 302}
272#else 303#else
273static inline int dw8250_probe_acpi(struct uart_8250_port *up) 304static inline int dw8250_probe_acpi(struct uart_8250_port *up,
305 struct dw8250_data *data)
274{ 306{
275 return -ENODEV; 307 return -ENODEV;
276} 308}
@@ -314,6 +346,12 @@ static int dw8250_probe(struct platform_device *pdev)
314 uart.port.uartclk = clk_get_rate(data->clk); 346 uart.port.uartclk = clk_get_rate(data->clk);
315 } 347 }
316 348
349 data->dma.rx_chan_id = -1;
350 data->dma.tx_chan_id = -1;
351 data->dma.rx_param = data;
352 data->dma.tx_param = data;
353 data->dma.fn = dw8250_dma_filter;
354
317 uart.port.iotype = UPIO_MEM; 355 uart.port.iotype = UPIO_MEM;
318 uart.port.serial_in = dw8250_serial_in; 356 uart.port.serial_in = dw8250_serial_in;
319 uart.port.serial_out = dw8250_serial_out; 357 uart.port.serial_out = dw8250_serial_out;
@@ -324,7 +362,7 @@ static int dw8250_probe(struct platform_device *pdev)
324 if (err) 362 if (err)
325 return err; 363 return err;
326 } else if (ACPI_HANDLE(&pdev->dev)) { 364 } else if (ACPI_HANDLE(&pdev->dev)) {
327 err = dw8250_probe_acpi(&uart); 365 err = dw8250_probe_acpi(&uart, data);
328 if (err) 366 if (err)
329 return err; 367 return err;
330 } else { 368 } else {
diff --git a/drivers/tty/serial/8250/8250_em.c b/drivers/tty/serial/8250/8250_em.c
index 5f3bba12c159..d1a9078003bd 100644
--- a/drivers/tty/serial/8250/8250_em.c
+++ b/drivers/tty/serial/8250/8250_em.c
@@ -122,7 +122,7 @@ static int serial8250_em_probe(struct platform_device *pdev)
122 up.port.dev = &pdev->dev; 122 up.port.dev = &pdev->dev;
123 up.port.private_data = priv; 123 up.port.private_data = priv;
124 124
125 clk_enable(priv->sclk); 125 clk_prepare_enable(priv->sclk);
126 up.port.uartclk = clk_get_rate(priv->sclk); 126 up.port.uartclk = clk_get_rate(priv->sclk);
127 127
128 up.port.iotype = UPIO_MEM32; 128 up.port.iotype = UPIO_MEM32;
@@ -134,7 +134,7 @@ static int serial8250_em_probe(struct platform_device *pdev)
134 ret = serial8250_register_8250_port(&up); 134 ret = serial8250_register_8250_port(&up);
135 if (ret < 0) { 135 if (ret < 0) {
136 dev_err(&pdev->dev, "unable to register 8250 port\n"); 136 dev_err(&pdev->dev, "unable to register 8250 port\n");
137 clk_disable(priv->sclk); 137 clk_disable_unprepare(priv->sclk);
138 return ret; 138 return ret;
139 } 139 }
140 140
@@ -148,7 +148,7 @@ static int serial8250_em_remove(struct platform_device *pdev)
148 struct serial8250_em_priv *priv = platform_get_drvdata(pdev); 148 struct serial8250_em_priv *priv = platform_get_drvdata(pdev);
149 149
150 serial8250_unregister_port(priv->line); 150 serial8250_unregister_port(priv->line);
151 clk_disable(priv->sclk); 151 clk_disable_unprepare(priv->sclk);
152 return 0; 152 return 0;
153} 153}
154 154
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index c810da7c7a88..4697a514b80a 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -9,6 +9,7 @@
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License. 10 * the Free Software Foundation; either version 2 of the License.
11 */ 11 */
12#undef DEBUG
12#include <linux/module.h> 13#include <linux/module.h>
13#include <linux/init.h> 14#include <linux/init.h>
14#include <linux/pci.h> 15#include <linux/pci.h>
@@ -27,8 +28,6 @@
27 28
28#include "8250.h" 29#include "8250.h"
29 30
30#undef SERIAL_DEBUG_PCI
31
32/* 31/*
33 * init function returns: 32 * init function returns:
34 * > 0 - number of ports 33 * > 0 - number of ports
@@ -63,7 +62,7 @@ static int pci_default_setup(struct serial_private*,
63 62
64static void moan_device(const char *str, struct pci_dev *dev) 63static void moan_device(const char *str, struct pci_dev *dev)
65{ 64{
66 printk(KERN_WARNING 65 dev_err(&dev->dev,
67 "%s: %s\n" 66 "%s: %s\n"
68 "Please send the output of lspci -vv, this\n" 67 "Please send the output of lspci -vv, this\n"
69 "message (0x%04x,0x%04x,0x%04x,0x%04x), the\n" 68 "message (0x%04x,0x%04x,0x%04x,0x%04x), the\n"
@@ -233,7 +232,7 @@ static int pci_inteli960ni_init(struct pci_dev *dev)
233 /* is firmware started? */ 232 /* is firmware started? */
234 pci_read_config_dword(dev, 0x44, (void *)&oldval); 233 pci_read_config_dword(dev, 0x44, (void *)&oldval);
235 if (oldval == 0x00001000L) { /* RESET value */ 234 if (oldval == 0x00001000L) { /* RESET value */
236 printk(KERN_DEBUG "Local i960 firmware missing"); 235 dev_dbg(&dev->dev, "Local i960 firmware missing\n");
237 return -ENODEV; 236 return -ENODEV;
238 } 237 }
239 return 0; 238 return 0;
@@ -827,7 +826,7 @@ static int pci_netmos_9900_numports(struct pci_dev *dev)
827 if (sub_serports > 0) { 826 if (sub_serports > 0) {
828 return sub_serports; 827 return sub_serports;
829 } else { 828 } else {
830 printk(KERN_NOTICE "NetMos/Mostech serial driver ignoring port on ambiguous config.\n"); 829 dev_err(&dev->dev, "NetMos/Mostech serial driver ignoring port on ambiguous config.\n");
831 return 0; 830 return 0;
832 } 831 }
833 } 832 }
@@ -931,7 +930,7 @@ static int pci_ite887x_init(struct pci_dev *dev)
931 } 930 }
932 931
933 if (!inta_addr[i]) { 932 if (!inta_addr[i]) {
934 printk(KERN_ERR "ite887x: could not find iobase\n"); 933 dev_err(&dev->dev, "ite887x: could not find iobase\n");
935 return -ENODEV; 934 return -ENODEV;
936 } 935 }
937 936
@@ -1024,9 +1023,9 @@ static int pci_oxsemi_tornado_init(struct pci_dev *dev)
1024 /* Tornado device */ 1023 /* Tornado device */
1025 if (deviceID == 0x07000200) { 1024 if (deviceID == 0x07000200) {
1026 number_uarts = ioread8(p + 4); 1025 number_uarts = ioread8(p + 4);
1027 printk(KERN_DEBUG 1026 dev_dbg(&dev->dev,
1028 "%d ports detected on Oxford PCI Express device\n", 1027 "%d ports detected on Oxford PCI Express device\n",
1029 number_uarts); 1028 number_uarts);
1030 } 1029 }
1031 pci_iounmap(dev, p); 1030 pci_iounmap(dev, p);
1032 return number_uarts; 1031 return number_uarts;
@@ -1308,6 +1307,29 @@ static int pci_default_setup(struct serial_private *priv,
1308 return setup_port(priv, port, bar, offset, board->reg_shift); 1307 return setup_port(priv, port, bar, offset, board->reg_shift);
1309} 1308}
1310 1309
1310static int pci_pericom_setup(struct serial_private *priv,
1311 const struct pciserial_board *board,
1312 struct uart_8250_port *port, int idx)
1313{
1314 unsigned int bar, offset = board->first_offset, maxnr;
1315
1316 bar = FL_GET_BASE(board->flags);
1317 if (board->flags & FL_BASE_BARS)
1318 bar += idx;
1319 else
1320 offset += idx * board->uart_offset;
1321
1322 maxnr = (pci_resource_len(priv->dev, bar) - board->first_offset) >>
1323 (board->reg_shift + 3);
1324
1325 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr)
1326 return 1;
1327
1328 port->port.uartclk = 14745600;
1329
1330 return setup_port(priv, port, bar, offset, board->reg_shift);
1331}
1332
1311static int 1333static int
1312ce4100_serial_setup(struct serial_private *priv, 1334ce4100_serial_setup(struct serial_private *priv,
1313 const struct pciserial_board *board, 1335 const struct pciserial_board *board,
@@ -1324,6 +1346,120 @@ ce4100_serial_setup(struct serial_private *priv,
1324 return ret; 1346 return ret;
1325} 1347}
1326 1348
1349#define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a
1350#define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c
1351
1352#define BYT_PRV_CLK 0x800
1353#define BYT_PRV_CLK_EN (1 << 0)
1354#define BYT_PRV_CLK_M_VAL_SHIFT 1
1355#define BYT_PRV_CLK_N_VAL_SHIFT 16
1356#define BYT_PRV_CLK_UPDATE (1 << 31)
1357
1358#define BYT_GENERAL_REG 0x808
1359#define BYT_GENERAL_DIS_RTS_N_OVERRIDE (1 << 3)
1360
1361#define BYT_TX_OVF_INT 0x820
1362#define BYT_TX_OVF_INT_MASK (1 << 1)
1363
1364static void
1365byt_set_termios(struct uart_port *p, struct ktermios *termios,
1366 struct ktermios *old)
1367{
1368 unsigned int baud = tty_termios_baud_rate(termios);
1369 unsigned int m = 6912;
1370 unsigned int n = 15625;
1371 u32 reg;
1372
1373 /* For baud rates 1M, 2M, 3M and 4M the dividers must be adjusted. */
1374 if (baud == 1000000 || baud == 2000000 || baud == 4000000) {
1375 m = 64;
1376 n = 100;
1377
1378 p->uartclk = 64000000;
1379 } else if (baud == 3000000) {
1380 m = 48;
1381 n = 100;
1382
1383 p->uartclk = 48000000;
1384 } else {
1385 p->uartclk = 44236800;
1386 }
1387
1388 /* Reset the clock */
1389 reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
1390 writel(reg, p->membase + BYT_PRV_CLK);
1391 reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
1392 writel(reg, p->membase + BYT_PRV_CLK);
1393
1394 /*
1395 * If auto-handshake mechanism is not enabled,
1396 * disable rts_n override
1397 */
1398 reg = readl(p->membase + BYT_GENERAL_REG);
1399 reg &= ~BYT_GENERAL_DIS_RTS_N_OVERRIDE;
1400 if (termios->c_cflag & CRTSCTS)
1401 reg |= BYT_GENERAL_DIS_RTS_N_OVERRIDE;
1402 writel(reg, p->membase + BYT_GENERAL_REG);
1403
1404 serial8250_do_set_termios(p, termios, old);
1405}
1406
1407static bool byt_dma_filter(struct dma_chan *chan, void *param)
1408{
1409 return chan->chan_id == *(int *)param;
1410}
1411
1412static int
1413byt_serial_setup(struct serial_private *priv,
1414 const struct pciserial_board *board,
1415 struct uart_8250_port *port, int idx)
1416{
1417 struct uart_8250_dma *dma;
1418 int ret;
1419
1420 dma = devm_kzalloc(port->port.dev, sizeof(*dma), GFP_KERNEL);
1421 if (!dma)
1422 return -ENOMEM;
1423
1424 switch (priv->dev->device) {
1425 case PCI_DEVICE_ID_INTEL_BYT_UART1:
1426 dma->rx_chan_id = 3;
1427 dma->tx_chan_id = 2;
1428 break;
1429 case PCI_DEVICE_ID_INTEL_BYT_UART2:
1430 dma->rx_chan_id = 5;
1431 dma->tx_chan_id = 4;
1432 break;
1433 default:
1434 return -EINVAL;
1435 }
1436
1437 dma->rxconf.slave_id = dma->rx_chan_id;
1438 dma->rxconf.src_maxburst = 16;
1439
1440 dma->txconf.slave_id = dma->tx_chan_id;
1441 dma->txconf.dst_maxburst = 16;
1442
1443 dma->fn = byt_dma_filter;
1444 dma->rx_param = &dma->rx_chan_id;
1445 dma->tx_param = &dma->tx_chan_id;
1446
1447 ret = pci_default_setup(priv, board, port, idx);
1448 port->port.iotype = UPIO_MEM;
1449 port->port.type = PORT_16550A;
1450 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE);
1451 port->port.set_termios = byt_set_termios;
1452 port->port.fifosize = 64;
1453 port->tx_loadsz = 64;
1454 port->dma = dma;
1455 port->capabilities = UART_CAP_FIFO | UART_CAP_AFE;
1456
1457 /* Disable Tx counter interrupts */
1458 writel(BYT_TX_OVF_INT_MASK, port->port.membase + BYT_TX_OVF_INT);
1459
1460 return ret;
1461}
1462
1327static int 1463static int
1328pci_omegapci_setup(struct serial_private *priv, 1464pci_omegapci_setup(struct serial_private *priv,
1329 const struct pciserial_board *board, 1465 const struct pciserial_board *board,
@@ -1344,17 +1480,80 @@ pci_brcm_trumanage_setup(struct serial_private *priv,
1344 return ret; 1480 return ret;
1345} 1481}
1346 1482
1483static int pci_fintek_setup(struct serial_private *priv,
1484 const struct pciserial_board *board,
1485 struct uart_8250_port *port, int idx)
1486{
1487 struct pci_dev *pdev = priv->dev;
1488 unsigned long base;
1489 unsigned long iobase;
1490 unsigned long ciobase = 0;
1491 u8 config_base;
1492
1493 /*
1494 * We are supposed to be able to read these from the PCI config space,
1495 * but the values there don't seem to match what we need to use, so
1496 * just use these hard-coded values for now, as they are correct.
1497 */
1498 switch (idx) {
1499 case 0: iobase = 0xe000; config_base = 0x40; break;
1500 case 1: iobase = 0xe008; config_base = 0x48; break;
1501 case 2: iobase = 0xe010; config_base = 0x50; break;
1502 case 3: iobase = 0xe018; config_base = 0x58; break;
1503 case 4: iobase = 0xe020; config_base = 0x60; break;
1504 case 5: iobase = 0xe028; config_base = 0x68; break;
1505 case 6: iobase = 0xe030; config_base = 0x70; break;
1506 case 7: iobase = 0xe038; config_base = 0x78; break;
1507 case 8: iobase = 0xe040; config_base = 0x80; break;
1508 case 9: iobase = 0xe048; config_base = 0x88; break;
1509 case 10: iobase = 0xe050; config_base = 0x90; break;
1510 case 11: iobase = 0xe058; config_base = 0x98; break;
1511 default:
1512 /* Unknown number of ports, get out of here */
1513 return -EINVAL;
1514 }
1515
1516 if (idx < 4) {
1517 base = pci_resource_start(priv->dev, 3);
1518 ciobase = (int)(base + (0x8 * idx));
1519 }
1520
1521 dev_dbg(&pdev->dev, "%s: idx=%d iobase=0x%lx ciobase=0x%lx config_base=0x%2x\n",
1522 __func__, idx, iobase, ciobase, config_base);
1523
1524 /* Enable UART I/O port */
1525 pci_write_config_byte(pdev, config_base + 0x00, 0x01);
1526
1527 /* Select 128-byte FIFO and 8x FIFO threshold */
1528 pci_write_config_byte(pdev, config_base + 0x01, 0x33);
1529
1530 /* LSB UART */
1531 pci_write_config_byte(pdev, config_base + 0x04, (u8)(iobase & 0xff));
1532
1533 /* MSB UART */
1534 pci_write_config_byte(pdev, config_base + 0x05, (u8)((iobase & 0xff00) >> 8));
1535
1536 /* irq number, this usually fails, but the spec says to do it anyway. */
1537 pci_write_config_byte(pdev, config_base + 0x06, pdev->irq);
1538
1539 port->port.iotype = UPIO_PORT;
1540 port->port.iobase = iobase;
1541 port->port.mapbase = 0;
1542 port->port.membase = NULL;
1543 port->port.regshift = 0;
1544
1545 return 0;
1546}
1547
1347static int skip_tx_en_setup(struct serial_private *priv, 1548static int skip_tx_en_setup(struct serial_private *priv,
1348 const struct pciserial_board *board, 1549 const struct pciserial_board *board,
1349 struct uart_8250_port *port, int idx) 1550 struct uart_8250_port *port, int idx)
1350{ 1551{
1351 port->port.flags |= UPF_NO_TXEN_TEST; 1552 port->port.flags |= UPF_NO_TXEN_TEST;
1352 printk(KERN_DEBUG "serial8250: skipping TxEn test for device " 1553 dev_dbg(&priv->dev->dev,
1353 "[%04x:%04x] subsystem [%04x:%04x]\n", 1554 "serial8250: skipping TxEn test for device [%04x:%04x] subsystem [%04x:%04x]\n",
1354 priv->dev->vendor, 1555 priv->dev->vendor, priv->dev->device,
1355 priv->dev->device, 1556 priv->dev->subsystem_vendor, priv->dev->subsystem_device);
1356 priv->dev->subsystem_vendor,
1357 priv->dev->subsystem_device);
1358 1557
1359 return pci_default_setup(priv, board, port, idx); 1558 return pci_default_setup(priv, board, port, idx);
1360} 1559}
@@ -1662,6 +1861,20 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
1662 .subdevice = PCI_ANY_ID, 1861 .subdevice = PCI_ANY_ID,
1663 .setup = kt_serial_setup, 1862 .setup = kt_serial_setup,
1664 }, 1863 },
1864 {
1865 .vendor = PCI_VENDOR_ID_INTEL,
1866 .device = PCI_DEVICE_ID_INTEL_BYT_UART1,
1867 .subvendor = PCI_ANY_ID,
1868 .subdevice = PCI_ANY_ID,
1869 .setup = byt_serial_setup,
1870 },
1871 {
1872 .vendor = PCI_VENDOR_ID_INTEL,
1873 .device = PCI_DEVICE_ID_INTEL_BYT_UART2,
1874 .subvendor = PCI_ANY_ID,
1875 .subdevice = PCI_ANY_ID,
1876 .setup = byt_serial_setup,
1877 },
1665 /* 1878 /*
1666 * ITE 1879 * ITE
1667 */ 1880 */
@@ -1826,6 +2039,31 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
1826 .exit = pci_plx9050_exit, 2039 .exit = pci_plx9050_exit,
1827 }, 2040 },
1828 /* 2041 /*
2042 * Pericom
2043 */
2044 {
2045 .vendor = 0x12d8,
2046 .device = 0x7952,
2047 .subvendor = PCI_ANY_ID,
2048 .subdevice = PCI_ANY_ID,
2049 .setup = pci_pericom_setup,
2050 },
2051 {
2052 .vendor = 0x12d8,
2053 .device = 0x7954,
2054 .subvendor = PCI_ANY_ID,
2055 .subdevice = PCI_ANY_ID,
2056 .setup = pci_pericom_setup,
2057 },
2058 {
2059 .vendor = 0x12d8,
2060 .device = 0x7958,
2061 .subvendor = PCI_ANY_ID,
2062 .subdevice = PCI_ANY_ID,
2063 .setup = pci_pericom_setup,
2064 },
2065
2066 /*
1829 * PLX 2067 * PLX
1830 */ 2068 */
1831 { 2069 {
@@ -2255,6 +2493,27 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
2255 .subdevice = PCI_ANY_ID, 2493 .subdevice = PCI_ANY_ID,
2256 .setup = pci_brcm_trumanage_setup, 2494 .setup = pci_brcm_trumanage_setup,
2257 }, 2495 },
2496 {
2497 .vendor = 0x1c29,
2498 .device = 0x1104,
2499 .subvendor = PCI_ANY_ID,
2500 .subdevice = PCI_ANY_ID,
2501 .setup = pci_fintek_setup,
2502 },
2503 {
2504 .vendor = 0x1c29,
2505 .device = 0x1108,
2506 .subvendor = PCI_ANY_ID,
2507 .subdevice = PCI_ANY_ID,
2508 .setup = pci_fintek_setup,
2509 },
2510 {
2511 .vendor = 0x1c29,
2512 .device = 0x1112,
2513 .subvendor = PCI_ANY_ID,
2514 .subdevice = PCI_ANY_ID,
2515 .setup = pci_fintek_setup,
2516 },
2258 2517
2259 /* 2518 /*
2260 * Default "match everything" terminator entry 2519 * Default "match everything" terminator entry
@@ -2449,9 +2708,13 @@ enum pci_board_num_t {
2449 pbn_ADDIDATA_PCIe_4_3906250, 2708 pbn_ADDIDATA_PCIe_4_3906250,
2450 pbn_ADDIDATA_PCIe_8_3906250, 2709 pbn_ADDIDATA_PCIe_8_3906250,
2451 pbn_ce4100_1_115200, 2710 pbn_ce4100_1_115200,
2711 pbn_byt,
2452 pbn_omegapci, 2712 pbn_omegapci,
2453 pbn_NETMOS9900_2s_115200, 2713 pbn_NETMOS9900_2s_115200,
2454 pbn_brcm_trumanage, 2714 pbn_brcm_trumanage,
2715 pbn_fintek_4,
2716 pbn_fintek_8,
2717 pbn_fintek_12,
2455}; 2718};
2456 2719
2457/* 2720/*
@@ -3185,6 +3448,13 @@ static struct pciserial_board pci_boards[] = {
3185 .base_baud = 921600, 3448 .base_baud = 921600,
3186 .reg_shift = 2, 3449 .reg_shift = 2,
3187 }, 3450 },
3451 [pbn_byt] = {
3452 .flags = FL_BASE0,
3453 .num_ports = 1,
3454 .base_baud = 2764800,
3455 .uart_offset = 0x80,
3456 .reg_shift = 2,
3457 },
3188 [pbn_omegapci] = { 3458 [pbn_omegapci] = {
3189 .flags = FL_BASE0, 3459 .flags = FL_BASE0,
3190 .num_ports = 8, 3460 .num_ports = 8,
@@ -3202,6 +3472,24 @@ static struct pciserial_board pci_boards[] = {
3202 .reg_shift = 2, 3472 .reg_shift = 2,
3203 .base_baud = 115200, 3473 .base_baud = 115200,
3204 }, 3474 },
3475 [pbn_fintek_4] = {
3476 .num_ports = 4,
3477 .uart_offset = 8,
3478 .base_baud = 115200,
3479 .first_offset = 0x40,
3480 },
3481 [pbn_fintek_8] = {
3482 .num_ports = 8,
3483 .uart_offset = 8,
3484 .base_baud = 115200,
3485 .first_offset = 0x40,
3486 },
3487 [pbn_fintek_12] = {
3488 .num_ports = 12,
3489 .uart_offset = 8,
3490 .base_baud = 115200,
3491 .first_offset = 0x40,
3492 },
3205}; 3493};
3206 3494
3207static const struct pci_device_id blacklist[] = { 3495static const struct pci_device_id blacklist[] = {
@@ -3362,14 +3650,15 @@ pciserial_init_ports(struct pci_dev *dev, const struct pciserial_board *board)
3362 if (quirk->setup(priv, board, &uart, i)) 3650 if (quirk->setup(priv, board, &uart, i))
3363 break; 3651 break;
3364 3652
3365#ifdef SERIAL_DEBUG_PCI 3653 dev_dbg(&dev->dev, "Setup PCI port: port %lx, irq %d, type %d\n",
3366 printk(KERN_DEBUG "Setup PCI port: port %lx, irq %d, type %d\n", 3654 uart.port.iobase, uart.port.irq, uart.port.iotype);
3367 uart.port.iobase, uart.port.irq, uart.port.iotype);
3368#endif
3369 3655
3370 priv->line[i] = serial8250_register_8250_port(&uart); 3656 priv->line[i] = serial8250_register_8250_port(&uart);
3371 if (priv->line[i] < 0) { 3657 if (priv->line[i] < 0) {
3372 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), priv->line[i]); 3658 dev_err(&dev->dev,
3659 "Couldn't register serial port %lx, irq %d, type %d, error %d\n",
3660 uart.port.iobase, uart.port.irq,
3661 uart.port.iotype, priv->line[i]);
3373 break; 3662 break;
3374 } 3663 }
3375 } 3664 }
@@ -3462,7 +3751,7 @@ pciserial_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
3462 } 3751 }
3463 3752
3464 if (ent->driver_data >= ARRAY_SIZE(pci_boards)) { 3753 if (ent->driver_data >= ARRAY_SIZE(pci_boards)) {
3465 printk(KERN_ERR "pci_init_one: invalid driver_data: %ld\n", 3754 dev_err(&dev->dev, "invalid driver_data: %ld\n",
3466 ent->driver_data); 3755 ent->driver_data);
3467 return -EINVAL; 3756 return -EINVAL;
3468 } 3757 }
@@ -3520,8 +3809,6 @@ static void pciserial_remove_one(struct pci_dev *dev)
3520{ 3809{
3521 struct serial_private *priv = pci_get_drvdata(dev); 3810 struct serial_private *priv = pci_get_drvdata(dev);
3522 3811
3523 pci_set_drvdata(dev, NULL);
3524
3525 pciserial_remove_ports(priv); 3812 pciserial_remove_ports(priv);
3526 3813
3527 pci_disable_device(dev); 3814 pci_disable_device(dev);
@@ -3555,7 +3842,7 @@ static int pciserial_resume_one(struct pci_dev *dev)
3555 err = pci_enable_device(dev); 3842 err = pci_enable_device(dev);
3556 /* FIXME: We cannot simply error out here */ 3843 /* FIXME: We cannot simply error out here */
3557 if (err) 3844 if (err)
3558 printk(KERN_ERR "pciserial: Unable to re-enable ports, trying to continue.\n"); 3845 dev_err(&dev->dev, "Unable to re-enable ports, trying to continue.\n");
3559 pciserial_resume_ports(priv); 3846 pciserial_resume_ports(priv);
3560 } 3847 }
3561 return 0; 3848 return 0;
@@ -4848,6 +5135,15 @@ static struct pci_device_id serial_pci_tbl[] = {
4848 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CE4100_UART, 5135 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CE4100_UART,
4849 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5136 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
4850 pbn_ce4100_1_115200 }, 5137 pbn_ce4100_1_115200 },
5138 /* Intel BayTrail */
5139 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_UART1,
5140 PCI_ANY_ID, PCI_ANY_ID,
5141 PCI_CLASS_COMMUNICATION_SERIAL << 8, 0xff0000,
5142 pbn_byt },
5143 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_UART2,
5144 PCI_ANY_ID, PCI_ANY_ID,
5145 PCI_CLASS_COMMUNICATION_SERIAL << 8, 0xff0000,
5146 pbn_byt },
4851 5147
4852 /* 5148 /*
4853 * Cronyx Omega PCI 5149 * Cronyx Omega PCI
@@ -4918,6 +5214,11 @@ static struct pci_device_id serial_pci_tbl[] = {
4918 0, 5214 0,
4919 0, pbn_exar_XR17V358 }, 5215 0, pbn_exar_XR17V358 },
4920 5216
5217 /* Fintek PCI serial cards */
5218 { PCI_DEVICE(0x1c29, 0x1104), .driver_data = pbn_fintek_4 },
5219 { PCI_DEVICE(0x1c29, 0x1108), .driver_data = pbn_fintek_8 },
5220 { PCI_DEVICE(0x1c29, 0x1112), .driver_data = pbn_fintek_12 },
5221
4921 /* 5222 /*
4922 * These entries match devices with class COMMUNICATION_SERIAL, 5223 * These entries match devices with class COMMUNICATION_SERIAL,
4923 * COMMUNICATION_MODEM or COMMUNICATION_MULTISERIAL 5224 * COMMUNICATION_MODEM or COMMUNICATION_MULTISERIAL
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index febd45cd5027..a3817ab8602f 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -709,7 +709,7 @@ config SERIAL_IP22_ZILOG_CONSOLE
709 709
710config SERIAL_SH_SCI 710config SERIAL_SH_SCI
711 tristate "SuperH SCI(F) serial port support" 711 tristate "SuperH SCI(F) serial port support"
712 depends on HAVE_CLK && (SUPERH || ARCH_SHMOBILE) 712 depends on HAVE_CLK && (SUPERH || ARM || COMPILE_TEST)
713 select SERIAL_CORE 713 select SERIAL_CORE
714 714
715config SERIAL_SH_SCI_NR_UARTS 715config SERIAL_SH_SCI_NR_UARTS
@@ -1512,6 +1512,7 @@ config SERIAL_FSL_LPUART_CONSOLE
1512config SERIAL_ST_ASC 1512config SERIAL_ST_ASC
1513 tristate "ST ASC serial port support" 1513 tristate "ST ASC serial port support"
1514 select SERIAL_CORE 1514 select SERIAL_CORE
1515 depends on ARM || COMPILE_TEST
1515 help 1516 help
1516 This driver is for the on-chip Asychronous Serial Controller on 1517 This driver is for the on-chip Asychronous Serial Controller on
1517 STMicroelectronics STi SoCs. 1518 STMicroelectronics STi SoCs.
diff --git a/drivers/tty/serial/amba-pl010.c b/drivers/tty/serial/amba-pl010.c
index 8b90f0b6dfdf..33bd8606be62 100644
--- a/drivers/tty/serial/amba-pl010.c
+++ b/drivers/tty/serial/amba-pl010.c
@@ -728,7 +728,6 @@ static int pl010_probe(struct amba_device *dev, const struct amba_id *id)
728 amba_set_drvdata(dev, uap); 728 amba_set_drvdata(dev, uap);
729 ret = uart_add_one_port(&amba_reg, &uap->port); 729 ret = uart_add_one_port(&amba_reg, &uap->port);
730 if (ret) { 730 if (ret) {
731 amba_set_drvdata(dev, NULL);
732 amba_ports[i] = NULL; 731 amba_ports[i] = NULL;
733 clk_put(uap->clk); 732 clk_put(uap->clk);
734 unmap: 733 unmap:
@@ -745,8 +744,6 @@ static int pl010_remove(struct amba_device *dev)
745 struct uart_amba_port *uap = amba_get_drvdata(dev); 744 struct uart_amba_port *uap = amba_get_drvdata(dev);
746 int i; 745 int i;
747 746
748 amba_set_drvdata(dev, NULL);
749
750 uart_remove_one_port(&amba_reg, &uap->port); 747 uart_remove_one_port(&amba_reg, &uap->port);
751 748
752 for (i = 0; i < ARRAY_SIZE(amba_ports); i++) 749 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index aaa22867e656..7203864992a5 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -2147,7 +2147,6 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
2147 amba_set_drvdata(dev, uap); 2147 amba_set_drvdata(dev, uap);
2148 ret = uart_add_one_port(&amba_reg, &uap->port); 2148 ret = uart_add_one_port(&amba_reg, &uap->port);
2149 if (ret) { 2149 if (ret) {
2150 amba_set_drvdata(dev, NULL);
2151 amba_ports[i] = NULL; 2150 amba_ports[i] = NULL;
2152 pl011_dma_remove(uap); 2151 pl011_dma_remove(uap);
2153 } 2152 }
@@ -2160,8 +2159,6 @@ static int pl011_remove(struct amba_device *dev)
2160 struct uart_amba_port *uap = amba_get_drvdata(dev); 2159 struct uart_amba_port *uap = amba_get_drvdata(dev);
2161 int i; 2160 int i;
2162 2161
2163 amba_set_drvdata(dev, NULL);
2164
2165 uart_remove_one_port(&amba_reg, &uap->port); 2162 uart_remove_one_port(&amba_reg, &uap->port);
2166 2163
2167 for (i = 0; i < ARRAY_SIZE(amba_ports); i++) 2164 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
diff --git a/drivers/tty/serial/arc_uart.c b/drivers/tty/serial/arc_uart.c
index 569872f4c9b8..c9f5c9dcc15c 100644
--- a/drivers/tty/serial/arc_uart.c
+++ b/drivers/tty/serial/arc_uart.c
@@ -533,7 +533,7 @@ arc_uart_init_one(struct platform_device *pdev, int dev_id)
533 unsigned long *plat_data; 533 unsigned long *plat_data;
534 struct arc_uart_port *uart = &arc_uart_ports[dev_id]; 534 struct arc_uart_port *uart = &arc_uart_ports[dev_id];
535 535
536 plat_data = (unsigned long *)dev_get_platdata(&pdev->dev); 536 plat_data = dev_get_platdata(&pdev->dev);
537 if (!plat_data) 537 if (!plat_data)
538 return -ENODEV; 538 return -ENODEV;
539 539
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index d067285a2d20..c7d99af46a96 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -99,6 +99,7 @@ static void atmel_stop_rx(struct uart_port *port);
99#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) 99#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
100#define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR) 100#define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
101#define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME) 101#define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME)
102#define UART_GET_IP_VERSION(port) __raw_readl((port)->membase + ATMEL_US_VERSION)
102 103
103 /* PDC registers */ 104 /* PDC registers */
104#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) 105#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
@@ -1499,10 +1500,11 @@ static void atmel_set_ops(struct uart_port *port)
1499/* 1500/*
1500 * Get ip name usart or uart 1501 * Get ip name usart or uart
1501 */ 1502 */
1502static int atmel_get_ip_name(struct uart_port *port) 1503static void atmel_get_ip_name(struct uart_port *port)
1503{ 1504{
1504 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1505 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1505 int name = UART_GET_IP_NAME(port); 1506 int name = UART_GET_IP_NAME(port);
1507 u32 version;
1506 int usart, uart; 1508 int usart, uart;
1507 /* usart and uart ascii */ 1509 /* usart and uart ascii */
1508 usart = 0x55534152; 1510 usart = 0x55534152;
@@ -1517,11 +1519,23 @@ static int atmel_get_ip_name(struct uart_port *port)
1517 dev_dbg(port->dev, "This is uart\n"); 1519 dev_dbg(port->dev, "This is uart\n");
1518 atmel_port->is_usart = false; 1520 atmel_port->is_usart = false;
1519 } else { 1521 } else {
1520 dev_err(port->dev, "Not supported ip name, set to uart\n"); 1522 /* fallback for older SoCs: use version field */
1521 return -EINVAL; 1523 version = UART_GET_IP_VERSION(port);
1524 switch (version) {
1525 case 0x302:
1526 case 0x10213:
1527 dev_dbg(port->dev, "This version is usart\n");
1528 atmel_port->is_usart = true;
1529 break;
1530 case 0x203:
1531 case 0x10202:
1532 dev_dbg(port->dev, "This version is uart\n");
1533 atmel_port->is_usart = false;
1534 break;
1535 default:
1536 dev_err(port->dev, "Not supported ip name nor version, set to uart\n");
1537 }
1522 } 1538 }
1523
1524 return 0;
1525} 1539}
1526 1540
1527/* 1541/*
@@ -2405,9 +2419,7 @@ static int atmel_serial_probe(struct platform_device *pdev)
2405 /* 2419 /*
2406 * Get port name of usart or uart 2420 * Get port name of usart or uart
2407 */ 2421 */
2408 ret = atmel_get_ip_name(&port->uart); 2422 atmel_get_ip_name(&port->uart);
2409 if (ret < 0)
2410 goto err_add_port;
2411 2423
2412 return 0; 2424 return 0;
2413 2425
diff --git a/drivers/tty/serial/bfin_sport_uart.c b/drivers/tty/serial/bfin_sport_uart.c
index 87636cc61a21..4f229703328b 100644
--- a/drivers/tty/serial/bfin_sport_uart.c
+++ b/drivers/tty/serial/bfin_sport_uart.c
@@ -766,9 +766,8 @@ static int sport_uart_probe(struct platform_device *pdev)
766 return -ENOMEM; 766 return -ENOMEM;
767 } 767 }
768 768
769 ret = peripheral_request_list( 769 ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
770 (unsigned short *)dev_get_platdata(&pdev->dev), 770 DRV_NAME);
771 DRV_NAME);
772 if (ret) { 771 if (ret) {
773 dev_err(&pdev->dev, 772 dev_err(&pdev->dev,
774 "Fail to request SPORT peripherals\n"); 773 "Fail to request SPORT peripherals\n");
@@ -844,8 +843,7 @@ static int sport_uart_probe(struct platform_device *pdev)
844out_error_unmap: 843out_error_unmap:
845 iounmap(sport->port.membase); 844 iounmap(sport->port.membase);
846out_error_free_peripherals: 845out_error_free_peripherals:
847 peripheral_free_list( 846 peripheral_free_list(dev_get_platdata(&pdev->dev));
848 (unsigned short *)dev_get_platdata(&pdev->dev));
849out_error_free_mem: 847out_error_free_mem:
850 kfree(sport); 848 kfree(sport);
851 bfin_sport_uart_ports[pdev->id] = NULL; 849 bfin_sport_uart_ports[pdev->id] = NULL;
@@ -864,8 +862,7 @@ static int sport_uart_remove(struct platform_device *pdev)
864 if (sport) { 862 if (sport) {
865 uart_remove_one_port(&sport_uart_reg, &sport->port); 863 uart_remove_one_port(&sport_uart_reg, &sport->port);
866 iounmap(sport->port.membase); 864 iounmap(sport->port.membase);
867 peripheral_free_list( 865 peripheral_free_list(dev_get_platdata(&pdev->dev));
868 (unsigned short *)dev_get_platdata(&pdev->dev));
869 kfree(sport); 866 kfree(sport);
870 bfin_sport_uart_ports[pdev->id] = NULL; 867 bfin_sport_uart_ports[pdev->id] = NULL;
871 } 868 }
diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c
index 3c75e8e04028..869ceba2ec57 100644
--- a/drivers/tty/serial/bfin_uart.c
+++ b/drivers/tty/serial/bfin_uart.c
@@ -680,7 +680,7 @@ static int bfin_serial_startup(struct uart_port *port)
680 default: 680 default:
681 uart_dma_ch_rx = uart_dma_ch_tx = 0; 681 uart_dma_ch_rx = uart_dma_ch_tx = 0;
682 break; 682 break;
683 }; 683 }
684 684
685 if (uart_dma_ch_rx && 685 if (uart_dma_ch_rx &&
686 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) { 686 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
@@ -726,7 +726,7 @@ static int bfin_serial_startup(struct uart_port *port)
726#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS 726#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
727 if (uart->cts_pin >= 0) { 727 if (uart->cts_pin >= 0) {
728 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int, 728 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
729 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) { 729 0, "BFIN_UART_MODEM_STATUS", uart)) {
730 uart->cts_pin = -1; 730 uart->cts_pin = -1;
731 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n"); 731 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
732 } 732 }
@@ -765,7 +765,7 @@ static void bfin_serial_shutdown(struct uart_port *port)
765 break; 765 break;
766 default: 766 default:
767 break; 767 break;
768 }; 768 }
769#endif 769#endif
770 free_irq(uart->rx_irq, uart); 770 free_irq(uart->rx_irq, uart);
771 free_irq(uart->tx_irq, uart); 771 free_irq(uart->tx_irq, uart);
@@ -1240,7 +1240,7 @@ static int bfin_serial_probe(struct platform_device *pdev)
1240 */ 1240 */
1241#endif 1241#endif
1242 ret = peripheral_request_list( 1242 ret = peripheral_request_list(
1243 (unsigned short *)dev_get_platdata(&pdev->dev), 1243 dev_get_platdata(&pdev->dev),
1244 DRIVER_NAME); 1244 DRIVER_NAME);
1245 if (ret) { 1245 if (ret) {
1246 dev_err(&pdev->dev, 1246 dev_err(&pdev->dev,
@@ -1358,8 +1358,7 @@ static int bfin_serial_probe(struct platform_device *pdev)
1358out_error_unmap: 1358out_error_unmap:
1359 iounmap(uart->port.membase); 1359 iounmap(uart->port.membase);
1360out_error_free_peripherals: 1360out_error_free_peripherals:
1361 peripheral_free_list( 1361 peripheral_free_list(dev_get_platdata(&pdev->dev));
1362 (unsigned short *)dev_get_platdata(&pdev->dev));
1363out_error_free_mem: 1362out_error_free_mem:
1364 kfree(uart); 1363 kfree(uart);
1365 bfin_serial_ports[pdev->id] = NULL; 1364 bfin_serial_ports[pdev->id] = NULL;
@@ -1377,8 +1376,7 @@ static int bfin_serial_remove(struct platform_device *pdev)
1377 if (uart) { 1376 if (uart) {
1378 uart_remove_one_port(&bfin_serial_reg, &uart->port); 1377 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1379 iounmap(uart->port.membase); 1378 iounmap(uart->port.membase);
1380 peripheral_free_list( 1379 peripheral_free_list(dev_get_platdata(&pdev->dev));
1381 (unsigned short *)dev_get_platdata(&pdev->dev));
1382 kfree(uart); 1380 kfree(uart);
1383 bfin_serial_ports[pdev->id] = NULL; 1381 bfin_serial_ports[pdev->id] = NULL;
1384 } 1382 }
@@ -1432,8 +1430,8 @@ static int bfin_earlyprintk_probe(struct platform_device *pdev)
1432 return -ENOENT; 1430 return -ENOENT;
1433 } 1431 }
1434 1432
1435 ret = peripheral_request_list( 1433 ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
1436 (unsigned short *)dev_get_platdata(&pdev->dev), DRIVER_NAME); 1434 DRIVER_NAME);
1437 if (ret) { 1435 if (ret) {
1438 dev_err(&pdev->dev, 1436 dev_err(&pdev->dev,
1439 "fail to request bfin serial peripherals\n"); 1437 "fail to request bfin serial peripherals\n");
@@ -1463,8 +1461,7 @@ static int bfin_earlyprintk_probe(struct platform_device *pdev)
1463 return 0; 1461 return 0;
1464 1462
1465out_error_free_peripherals: 1463out_error_free_peripherals:
1466 peripheral_free_list( 1464 peripheral_free_list(dev_get_platdata(&pdev->dev));
1467 (unsigned short *)dev_get_platdata(&pdev->dev));
1468 1465
1469 return ret; 1466 return ret;
1470} 1467}
diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c
index 7e4e4088471c..8d0b994357c8 100644
--- a/drivers/tty/serial/clps711x.c
+++ b/drivers/tty/serial/clps711x.c
@@ -459,7 +459,6 @@ static int uart_clps711x_probe(struct platform_device *pdev)
459 ret = uart_register_driver(&s->uart); 459 ret = uart_register_driver(&s->uart);
460 if (ret) { 460 if (ret) {
461 dev_err(&pdev->dev, "Registering UART driver failed\n"); 461 dev_err(&pdev->dev, "Registering UART driver failed\n");
462 devm_clk_put(&pdev->dev, s->uart_clk);
463 return ret; 462 return ret;
464 } 463 }
465 464
@@ -487,7 +486,6 @@ static int uart_clps711x_remove(struct platform_device *pdev)
487 for (i = 0; i < UART_CLPS711X_NR; i++) 486 for (i = 0; i < UART_CLPS711X_NR; i++)
488 uart_remove_one_port(&s->uart, &s->port[i]); 487 uart_remove_one_port(&s->uart, &s->port[i]);
489 488
490 devm_clk_put(&pdev->dev, s->uart_clk);
491 uart_unregister_driver(&s->uart); 489 uart_unregister_driver(&s->uart);
492 490
493 return 0; 491 return 0;
diff --git a/drivers/tty/serial/ifx6x60.c b/drivers/tty/serial/ifx6x60.c
index af286e6713eb..590390970996 100644
--- a/drivers/tty/serial/ifx6x60.c
+++ b/drivers/tty/serial/ifx6x60.c
@@ -1008,7 +1008,7 @@ static int ifx_spi_spi_probe(struct spi_device *spi)
1008 return -ENODEV; 1008 return -ENODEV;
1009 } 1009 }
1010 1010
1011 pl_data = (struct ifx_modem_platform_data *)dev_get_platdata(&spi->dev); 1011 pl_data = dev_get_platdata(&spi->dev);
1012 if (!pl_data) { 1012 if (!pl_data) {
1013 dev_err(&spi->dev, "missing platform data!"); 1013 dev_err(&spi->dev, "missing platform data!");
1014 return -ENODEV; 1014 return -ENODEV;
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 042aa077b5b3..b2cfdb661947 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -223,8 +223,7 @@ struct imx_port {
223 struct dma_chan *dma_chan_rx, *dma_chan_tx; 223 struct dma_chan *dma_chan_rx, *dma_chan_tx;
224 struct scatterlist rx_sgl, tx_sgl[2]; 224 struct scatterlist rx_sgl, tx_sgl[2];
225 void *rx_buf; 225 void *rx_buf;
226 unsigned int rx_bytes, tx_bytes; 226 unsigned int tx_bytes;
227 struct work_struct tsk_dma_rx, tsk_dma_tx;
228 unsigned int dma_tx_nents; 227 unsigned int dma_tx_nents;
229 wait_queue_head_t dma_wait; 228 wait_queue_head_t dma_wait;
230}; 229};
@@ -505,34 +504,25 @@ static void dma_tx_callback(void *data)
505 dev_dbg(sport->port.dev, "exit in %s.\n", __func__); 504 dev_dbg(sport->port.dev, "exit in %s.\n", __func__);
506 return; 505 return;
507 } 506 }
508
509 schedule_work(&sport->tsk_dma_tx);
510} 507}
511 508
512static void dma_tx_work(struct work_struct *w) 509static void imx_dma_tx(struct imx_port *sport)
513{ 510{
514 struct imx_port *sport = container_of(w, struct imx_port, tsk_dma_tx);
515 struct circ_buf *xmit = &sport->port.state->xmit; 511 struct circ_buf *xmit = &sport->port.state->xmit;
516 struct scatterlist *sgl = sport->tx_sgl; 512 struct scatterlist *sgl = sport->tx_sgl;
517 struct dma_async_tx_descriptor *desc; 513 struct dma_async_tx_descriptor *desc;
518 struct dma_chan *chan = sport->dma_chan_tx; 514 struct dma_chan *chan = sport->dma_chan_tx;
519 struct device *dev = sport->port.dev; 515 struct device *dev = sport->port.dev;
520 enum dma_status status; 516 enum dma_status status;
521 unsigned long flags;
522 int ret; 517 int ret;
523 518
524 status = chan->device->device_tx_status(chan, (dma_cookie_t)0, NULL); 519 status = dmaengine_tx_status(chan, (dma_cookie_t)0, NULL);
525 if (DMA_IN_PROGRESS == status) 520 if (DMA_IN_PROGRESS == status)
526 return; 521 return;
527 522
528 spin_lock_irqsave(&sport->port.lock, flags);
529 sport->tx_bytes = uart_circ_chars_pending(xmit); 523 sport->tx_bytes = uart_circ_chars_pending(xmit);
530 if (sport->tx_bytes == 0) {
531 spin_unlock_irqrestore(&sport->port.lock, flags);
532 return;
533 }
534 524
535 if (xmit->tail > xmit->head) { 525 if (xmit->tail > xmit->head && xmit->head > 0) {
536 sport->dma_tx_nents = 2; 526 sport->dma_tx_nents = 2;
537 sg_init_table(sgl, 2); 527 sg_init_table(sgl, 2);
538 sg_set_buf(sgl, xmit->buf + xmit->tail, 528 sg_set_buf(sgl, xmit->buf + xmit->tail,
@@ -542,7 +532,6 @@ static void dma_tx_work(struct work_struct *w)
542 sport->dma_tx_nents = 1; 532 sport->dma_tx_nents = 1;
543 sg_init_one(sgl, xmit->buf + xmit->tail, sport->tx_bytes); 533 sg_init_one(sgl, xmit->buf + xmit->tail, sport->tx_bytes);
544 } 534 }
545 spin_unlock_irqrestore(&sport->port.lock, flags);
546 535
547 ret = dma_map_sg(dev, sgl, sport->dma_tx_nents, DMA_TO_DEVICE); 536 ret = dma_map_sg(dev, sgl, sport->dma_tx_nents, DMA_TO_DEVICE);
548 if (ret == 0) { 537 if (ret == 0) {
@@ -609,11 +598,7 @@ static void imx_start_tx(struct uart_port *port)
609 } 598 }
610 599
611 if (sport->dma_is_enabled) { 600 if (sport->dma_is_enabled) {
612 /* 601 imx_dma_tx(sport);
613 * We may in the interrupt context, so arise a work_struct to
614 * do the real job.
615 */
616 schedule_work(&sport->tsk_dma_tx);
617 return; 602 return;
618 } 603 }
619 604
@@ -732,6 +717,7 @@ out:
732 return IRQ_HANDLED; 717 return IRQ_HANDLED;
733} 718}
734 719
720static int start_rx_dma(struct imx_port *sport);
735/* 721/*
736 * If the RXFIFO is filled with some data, and then we 722 * If the RXFIFO is filled with some data, and then we
737 * arise a DMA operation to receive them. 723 * arise a DMA operation to receive them.
@@ -750,7 +736,7 @@ static void imx_dma_rxint(struct imx_port *sport)
750 writel(temp, sport->port.membase + UCR1); 736 writel(temp, sport->port.membase + UCR1);
751 737
752 /* tell the DMA to receive the data. */ 738 /* tell the DMA to receive the data. */
753 schedule_work(&sport->tsk_dma_rx); 739 start_rx_dma(sport);
754 } 740 }
755} 741}
756 742
@@ -795,8 +781,15 @@ static irqreturn_t imx_int(int irq, void *dev_id)
795static unsigned int imx_tx_empty(struct uart_port *port) 781static unsigned int imx_tx_empty(struct uart_port *port)
796{ 782{
797 struct imx_port *sport = (struct imx_port *)port; 783 struct imx_port *sport = (struct imx_port *)port;
784 unsigned int ret;
785
786 ret = (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0;
798 787
799 return (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; 788 /* If the TX DMA is working, return 0. */
789 if (sport->dma_is_enabled && sport->dma_is_txing)
790 ret = 0;
791
792 return ret;
800} 793}
801 794
802/* 795/*
@@ -865,22 +858,6 @@ static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
865} 858}
866 859
867#define RX_BUF_SIZE (PAGE_SIZE) 860#define RX_BUF_SIZE (PAGE_SIZE)
868static int start_rx_dma(struct imx_port *sport);
869static void dma_rx_work(struct work_struct *w)
870{
871 struct imx_port *sport = container_of(w, struct imx_port, tsk_dma_rx);
872 struct tty_port *port = &sport->port.state->port;
873
874 if (sport->rx_bytes) {
875 tty_insert_flip_string(port, sport->rx_buf, sport->rx_bytes);
876 tty_flip_buffer_push(port);
877 sport->rx_bytes = 0;
878 }
879
880 if (sport->dma_is_rxing)
881 start_rx_dma(sport);
882}
883
884static void imx_rx_dma_done(struct imx_port *sport) 861static void imx_rx_dma_done(struct imx_port *sport)
885{ 862{
886 unsigned long temp; 863 unsigned long temp;
@@ -912,6 +889,7 @@ static void dma_rx_callback(void *data)
912 struct imx_port *sport = data; 889 struct imx_port *sport = data;
913 struct dma_chan *chan = sport->dma_chan_rx; 890 struct dma_chan *chan = sport->dma_chan_rx;
914 struct scatterlist *sgl = &sport->rx_sgl; 891 struct scatterlist *sgl = &sport->rx_sgl;
892 struct tty_port *port = &sport->port.state->port;
915 struct dma_tx_state state; 893 struct dma_tx_state state;
916 enum dma_status status; 894 enum dma_status status;
917 unsigned int count; 895 unsigned int count;
@@ -919,13 +897,15 @@ static void dma_rx_callback(void *data)
919 /* unmap it first */ 897 /* unmap it first */
920 dma_unmap_sg(sport->port.dev, sgl, 1, DMA_FROM_DEVICE); 898 dma_unmap_sg(sport->port.dev, sgl, 1, DMA_FROM_DEVICE);
921 899
922 status = chan->device->device_tx_status(chan, (dma_cookie_t)0, &state); 900 status = dmaengine_tx_status(chan, (dma_cookie_t)0, &state);
923 count = RX_BUF_SIZE - state.residue; 901 count = RX_BUF_SIZE - state.residue;
924 dev_dbg(sport->port.dev, "We get %d bytes.\n", count); 902 dev_dbg(sport->port.dev, "We get %d bytes.\n", count);
925 903
926 if (count) { 904 if (count) {
927 sport->rx_bytes = count; 905 tty_insert_flip_string(port, sport->rx_buf, count);
928 schedule_work(&sport->tsk_dma_rx); 906 tty_flip_buffer_push(port);
907
908 start_rx_dma(sport);
929 } else 909 } else
930 imx_rx_dma_done(sport); 910 imx_rx_dma_done(sport);
931} 911}
@@ -1007,7 +987,6 @@ static int imx_uart_dma_init(struct imx_port *sport)
1007 ret = -ENOMEM; 987 ret = -ENOMEM;
1008 goto err; 988 goto err;
1009 } 989 }
1010 sport->rx_bytes = 0;
1011 990
1012 /* Prepare for TX : */ 991 /* Prepare for TX : */
1013 sport->dma_chan_tx = dma_request_slave_channel(dev, "tx"); 992 sport->dma_chan_tx = dma_request_slave_channel(dev, "tx");
@@ -1038,11 +1017,7 @@ err:
1038static void imx_enable_dma(struct imx_port *sport) 1017static void imx_enable_dma(struct imx_port *sport)
1039{ 1018{
1040 unsigned long temp; 1019 unsigned long temp;
1041 struct tty_port *port = &sport->port.state->port;
1042 1020
1043 port->low_latency = 1;
1044 INIT_WORK(&sport->tsk_dma_tx, dma_tx_work);
1045 INIT_WORK(&sport->tsk_dma_rx, dma_rx_work);
1046 init_waitqueue_head(&sport->dma_wait); 1021 init_waitqueue_head(&sport->dma_wait);
1047 1022
1048 /* set UCR1 */ 1023 /* set UCR1 */
@@ -1063,7 +1038,6 @@ static void imx_enable_dma(struct imx_port *sport)
1063static void imx_disable_dma(struct imx_port *sport) 1038static void imx_disable_dma(struct imx_port *sport)
1064{ 1039{
1065 unsigned long temp; 1040 unsigned long temp;
1066 struct tty_port *port = &sport->port.state->port;
1067 1041
1068 /* clear UCR1 */ 1042 /* clear UCR1 */
1069 temp = readl(sport->port.membase + UCR1); 1043 temp = readl(sport->port.membase + UCR1);
@@ -1081,7 +1055,6 @@ static void imx_disable_dma(struct imx_port *sport)
1081 writel(temp, sport->port.membase + UCR4); 1055 writel(temp, sport->port.membase + UCR4);
1082 1056
1083 sport->dma_is_enabled = 0; 1057 sport->dma_is_enabled = 0;
1084 port->low_latency = 0;
1085} 1058}
1086 1059
1087/* half the RX buffer size */ 1060/* half the RX buffer size */
@@ -1303,6 +1276,16 @@ static void imx_shutdown(struct uart_port *port)
1303 clk_disable_unprepare(sport->clk_ipg); 1276 clk_disable_unprepare(sport->clk_ipg);
1304} 1277}
1305 1278
1279static void imx_flush_buffer(struct uart_port *port)
1280{
1281 struct imx_port *sport = (struct imx_port *)port;
1282
1283 if (sport->dma_is_enabled) {
1284 sport->tx_bytes = 0;
1285 dmaengine_terminate_all(sport->dma_chan_tx);
1286 }
1287}
1288
1306static void 1289static void
1307imx_set_termios(struct uart_port *port, struct ktermios *termios, 1290imx_set_termios(struct uart_port *port, struct ktermios *termios,
1308 struct ktermios *old) 1291 struct ktermios *old)
@@ -1539,7 +1522,7 @@ imx_verify_port(struct uart_port *port, struct serial_struct *ser)
1539 ret = -EINVAL; 1522 ret = -EINVAL;
1540 if (sport->port.uartclk / 16 != ser->baud_base) 1523 if (sport->port.uartclk / 16 != ser->baud_base)
1541 ret = -EINVAL; 1524 ret = -EINVAL;
1542 if ((void *)sport->port.mapbase != ser->iomem_base) 1525 if (sport->port.mapbase != (unsigned long)ser->iomem_base)
1543 ret = -EINVAL; 1526 ret = -EINVAL;
1544 if (sport->port.iobase != ser->port) 1527 if (sport->port.iobase != ser->port)
1545 ret = -EINVAL; 1528 ret = -EINVAL;
@@ -1623,6 +1606,7 @@ static struct uart_ops imx_pops = {
1623 .break_ctl = imx_break_ctl, 1606 .break_ctl = imx_break_ctl,
1624 .startup = imx_startup, 1607 .startup = imx_startup,
1625 .shutdown = imx_shutdown, 1608 .shutdown = imx_shutdown,
1609 .flush_buffer = imx_flush_buffer,
1626 .set_termios = imx_set_termios, 1610 .set_termios = imx_set_termios,
1627 .type = imx_type, 1611 .type = imx_type,
1628 .release_port = imx_release_port, 1612 .release_port = imx_release_port,
diff --git a/drivers/tty/serial/ip22zilog.c b/drivers/tty/serial/ip22zilog.c
index cb3c81eb0996..1d9420548e16 100644
--- a/drivers/tty/serial/ip22zilog.c
+++ b/drivers/tty/serial/ip22zilog.c
@@ -832,7 +832,7 @@ ip22zilog_convert_to_zs(struct uart_ip22zilog_port *up, unsigned int cflag,
832 up->curregs[5] |= Tx8; 832 up->curregs[5] |= Tx8;
833 up->parity_mask = 0xff; 833 up->parity_mask = 0xff;
834 break; 834 break;
835 }; 835 }
836 up->curregs[4] &= ~0x0c; 836 up->curregs[4] &= ~0x0c;
837 if (cflag & CSTOPB) 837 if (cflag & CSTOPB)
838 up->curregs[4] |= SB2; 838 up->curregs[4] |= SB2;
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index b2e707aa603a..8d71e4047bb3 100644
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -690,7 +690,7 @@ static void max310x_handle_tx(struct uart_port *port)
690 max310x_port_write(port, MAX310X_THR_REG, 690 max310x_port_write(port, MAX310X_THR_REG,
691 xmit->buf[xmit->tail]); 691 xmit->buf[xmit->tail]);
692 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 692 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
693 }; 693 }
694 } 694 }
695 695
696 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 696 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
diff --git a/drivers/tty/serial/mfd.c b/drivers/tty/serial/mfd.c
index d3db042f649e..52c930fac210 100644
--- a/drivers/tty/serial/mfd.c
+++ b/drivers/tty/serial/mfd.c
@@ -293,7 +293,7 @@ static void serial_hsu_enable_ms(struct uart_port *port)
293 serial_out(up, UART_IER, up->ier); 293 serial_out(up, UART_IER, up->ier);
294} 294}
295 295
296void hsu_dma_tx(struct uart_hsu_port *up) 296static void hsu_dma_tx(struct uart_hsu_port *up)
297{ 297{
298 struct circ_buf *xmit = &up->port.state->xmit; 298 struct circ_buf *xmit = &up->port.state->xmit;
299 struct hsu_dma_buffer *dbuf = &up->txbuf; 299 struct hsu_dma_buffer *dbuf = &up->txbuf;
@@ -340,7 +340,8 @@ void hsu_dma_tx(struct uart_hsu_port *up)
340} 340}
341 341
342/* The buffer is already cache coherent */ 342/* The buffer is already cache coherent */
343void hsu_dma_start_rx_chan(struct hsu_dma_chan *rxc, struct hsu_dma_buffer *dbuf) 343static void hsu_dma_start_rx_chan(struct hsu_dma_chan *rxc,
344 struct hsu_dma_buffer *dbuf)
344{ 345{
345 dbuf->ofs = 0; 346 dbuf->ofs = 0;
346 347
@@ -386,7 +387,8 @@ static void serial_hsu_stop_tx(struct uart_port *port)
386 387
387/* This is always called in spinlock protected mode, so 388/* This is always called in spinlock protected mode, so
388 * modify timeout timer is safe here */ 389 * modify timeout timer is safe here */
389void hsu_dma_rx(struct uart_hsu_port *up, u32 int_sts, unsigned long *flags) 390static void hsu_dma_rx(struct uart_hsu_port *up, u32 int_sts,
391 unsigned long *flags)
390{ 392{
391 struct hsu_dma_buffer *dbuf = &up->rxbuf; 393 struct hsu_dma_buffer *dbuf = &up->rxbuf;
392 struct hsu_dma_chan *chan = up->rxc; 394 struct hsu_dma_chan *chan = up->rxc;
@@ -1183,7 +1185,7 @@ static struct console serial_hsu_console = {
1183#define SERIAL_HSU_CONSOLE NULL 1185#define SERIAL_HSU_CONSOLE NULL
1184#endif 1186#endif
1185 1187
1186struct uart_ops serial_hsu_pops = { 1188static struct uart_ops serial_hsu_pops = {
1187 .tx_empty = serial_hsu_tx_empty, 1189 .tx_empty = serial_hsu_tx_empty,
1188 .set_mctrl = serial_hsu_set_mctrl, 1190 .set_mctrl = serial_hsu_set_mctrl,
1189 .get_mctrl = serial_hsu_get_mctrl, 1191 .get_mctrl = serial_hsu_get_mctrl,
@@ -1451,7 +1453,6 @@ static void serial_hsu_remove(struct pci_dev *pdev)
1451 uart_remove_one_port(&serial_hsu_reg, &up->port); 1453 uart_remove_one_port(&serial_hsu_reg, &up->port);
1452 } 1454 }
1453 1455
1454 pci_set_drvdata(pdev, NULL);
1455 free_irq(pdev->irq, priv); 1456 free_irq(pdev->irq, priv);
1456 pci_disable_device(pdev); 1457 pci_disable_device(pdev);
1457} 1458}
@@ -1504,4 +1505,4 @@ module_init(hsu_pci_init);
1504module_exit(hsu_pci_exit); 1505module_exit(hsu_pci_exit);
1505 1506
1506MODULE_LICENSE("GPL v2"); 1507MODULE_LICENSE("GPL v2");
1507MODULE_ALIAS("platform:medfield-hsu"); 1508MODULE_DEVICE_TABLE(pci, pci_ids);
diff --git a/drivers/tty/serial/mpc52xx_uart.c b/drivers/tty/serial/mpc52xx_uart.c
index 5be1df39f9f5..ec06505e3ae6 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -1301,7 +1301,6 @@ static struct uart_ops mpc52xx_uart_ops = {
1301 .shutdown = mpc52xx_uart_shutdown, 1301 .shutdown = mpc52xx_uart_shutdown,
1302 .set_termios = mpc52xx_uart_set_termios, 1302 .set_termios = mpc52xx_uart_set_termios,
1303/* .pm = mpc52xx_uart_pm, Not supported yet */ 1303/* .pm = mpc52xx_uart_pm, Not supported yet */
1304/* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
1305 .type = mpc52xx_uart_type, 1304 .type = mpc52xx_uart_type,
1306 .release_port = mpc52xx_uart_release_port, 1305 .release_port = mpc52xx_uart_release_port,
1307 .request_port = mpc52xx_uart_request_port, 1306 .request_port = mpc52xx_uart_request_port,
@@ -1766,7 +1765,7 @@ mpc52xx_uart_of_remove(struct platform_device *op)
1766static int 1765static int
1767mpc52xx_uart_of_suspend(struct platform_device *op, pm_message_t state) 1766mpc52xx_uart_of_suspend(struct platform_device *op, pm_message_t state)
1768{ 1767{
1769 struct uart_port *port = (struct uart_port *) platform_get_drvdata(op); 1768 struct uart_port *port = platform_get_drvdata(op);
1770 1769
1771 if (port) 1770 if (port)
1772 uart_suspend_port(&mpc52xx_uart_driver, port); 1771 uart_suspend_port(&mpc52xx_uart_driver, port);
@@ -1777,7 +1776,7 @@ mpc52xx_uart_of_suspend(struct platform_device *op, pm_message_t state)
1777static int 1776static int
1778mpc52xx_uart_of_resume(struct platform_device *op) 1777mpc52xx_uart_of_resume(struct platform_device *op)
1779{ 1778{
1780 struct uart_port *port = (struct uart_port *) platform_get_drvdata(op); 1779 struct uart_port *port = platform_get_drvdata(op);
1781 1780
1782 if (port) 1781 if (port)
1783 uart_resume_port(&mpc52xx_uart_driver, port); 1782 uart_resume_port(&mpc52xx_uart_driver, port);
diff --git a/drivers/tty/serial/mpsc.c b/drivers/tty/serial/mpsc.c
index 8d702677acc5..e30a3ca3cea3 100644
--- a/drivers/tty/serial/mpsc.c
+++ b/drivers/tty/serial/mpsc.c
@@ -2030,7 +2030,7 @@ static void mpsc_drv_get_platform_data(struct mpsc_port_info *pi,
2030{ 2030{
2031 struct mpsc_pdata *pdata; 2031 struct mpsc_pdata *pdata;
2032 2032
2033 pdata = (struct mpsc_pdata *)dev_get_platdata(&pd->dev); 2033 pdata = dev_get_platdata(&pd->dev);
2034 2034
2035 pi->port.uartclk = pdata->brg_clk_freq; 2035 pi->port.uartclk = pdata->brg_clk_freq;
2036 pi->port.iotype = UPIO_MEM; 2036 pi->port.iotype = UPIO_MEM;
diff --git a/drivers/tty/serial/mrst_max3110.c b/drivers/tty/serial/mrst_max3110.c
index a67e7081f001..db0448ae59dc 100644
--- a/drivers/tty/serial/mrst_max3110.c
+++ b/drivers/tty/serial/mrst_max3110.c
@@ -43,6 +43,7 @@
43 43
44#include <linux/kthread.h> 44#include <linux/kthread.h>
45#include <linux/spi/spi.h> 45#include <linux/spi/spi.h>
46#include <linux/pm.h>
46 47
47#include "mrst_max3110.h" 48#include "mrst_max3110.h"
48 49
@@ -61,6 +62,7 @@ struct uart_max3110 {
61 struct task_struct *main_thread; 62 struct task_struct *main_thread;
62 struct task_struct *read_thread; 63 struct task_struct *read_thread;
63 struct mutex thread_mutex; 64 struct mutex thread_mutex;
65 struct mutex io_mutex;
64 66
65 u32 baud; 67 u32 baud;
66 u16 cur_conf; 68 u16 cur_conf;
@@ -90,6 +92,7 @@ static int max3110_write_then_read(struct uart_max3110 *max,
90 struct spi_transfer x; 92 struct spi_transfer x;
91 int ret; 93 int ret;
92 94
95 mutex_lock(&max->io_mutex);
93 spi_message_init(&message); 96 spi_message_init(&message);
94 memset(&x, 0, sizeof x); 97 memset(&x, 0, sizeof x);
95 x.len = len; 98 x.len = len;
@@ -104,6 +107,7 @@ static int max3110_write_then_read(struct uart_max3110 *max,
104 107
105 /* Do the i/o */ 108 /* Do the i/o */
106 ret = spi_sync(spi, &message); 109 ret = spi_sync(spi, &message);
110 mutex_unlock(&max->io_mutex);
107 return ret; 111 return ret;
108} 112}
109 113
@@ -491,19 +495,9 @@ static int serial_m3110_startup(struct uart_port *port)
491 port->state->port.low_latency = 1; 495 port->state->port.low_latency = 1;
492 496
493 if (max->irq) { 497 if (max->irq) {
494 max->read_thread = NULL; 498 /* Enable RX IRQ only */
495 ret = request_irq(max->irq, serial_m3110_irq, 499 config |= WC_RXA_IRQ_ENABLE;
496 IRQ_TYPE_EDGE_FALLING, "max3110", max); 500 } else {
497 if (ret) {
498 max->irq = 0;
499 pr_err(PR_FMT "unable to allocate IRQ, polling\n");
500 } else {
501 /* Enable RX IRQ only */
502 config |= WC_RXA_IRQ_ENABLE;
503 }
504 }
505
506 if (max->irq == 0) {
507 /* If IRQ is disabled, start a read thread for input data */ 501 /* If IRQ is disabled, start a read thread for input data */
508 max->read_thread = 502 max->read_thread =
509 kthread_run(max3110_read_thread, max, "max3110_read"); 503 kthread_run(max3110_read_thread, max, "max3110_read");
@@ -517,8 +511,6 @@ static int serial_m3110_startup(struct uart_port *port)
517 511
518 ret = max3110_out(max, config); 512 ret = max3110_out(max, config);
519 if (ret) { 513 if (ret) {
520 if (max->irq)
521 free_irq(max->irq, max);
522 if (max->read_thread) 514 if (max->read_thread)
523 kthread_stop(max->read_thread); 515 kthread_stop(max->read_thread);
524 max->read_thread = NULL; 516 max->read_thread = NULL;
@@ -540,9 +532,6 @@ static void serial_m3110_shutdown(struct uart_port *port)
540 max->read_thread = NULL; 532 max->read_thread = NULL;
541 } 533 }
542 534
543 if (max->irq)
544 free_irq(max->irq, max);
545
546 /* Disable interrupts from this port */ 535 /* Disable interrupts from this port */
547 config = WC_TAG | WC_SW_SHDI; 536 config = WC_TAG | WC_SW_SHDI;
548 max3110_out(max, config); 537 max3110_out(max, config);
@@ -749,7 +738,8 @@ static int serial_m3110_suspend(struct device *dev)
749 struct spi_device *spi = to_spi_device(dev); 738 struct spi_device *spi = to_spi_device(dev);
750 struct uart_max3110 *max = spi_get_drvdata(spi); 739 struct uart_max3110 *max = spi_get_drvdata(spi);
751 740
752 disable_irq(max->irq); 741 if (max->irq > 0)
742 disable_irq(max->irq);
753 uart_suspend_port(&serial_m3110_reg, &max->port); 743 uart_suspend_port(&serial_m3110_reg, &max->port);
754 max3110_out(max, max->cur_conf | WC_SW_SHDI); 744 max3110_out(max, max->cur_conf | WC_SW_SHDI);
755 return 0; 745 return 0;
@@ -762,7 +752,8 @@ static int serial_m3110_resume(struct device *dev)
762 752
763 max3110_out(max, max->cur_conf); 753 max3110_out(max, max->cur_conf);
764 uart_resume_port(&serial_m3110_reg, &max->port); 754 uart_resume_port(&serial_m3110_reg, &max->port);
765 enable_irq(max->irq); 755 if (max->irq > 0)
756 enable_irq(max->irq);
766 return 0; 757 return 0;
767} 758}
768 759
@@ -803,6 +794,7 @@ static int serial_m3110_probe(struct spi_device *spi)
803 max->irq = (u16)spi->irq; 794 max->irq = (u16)spi->irq;
804 795
805 mutex_init(&max->thread_mutex); 796 mutex_init(&max->thread_mutex);
797 mutex_init(&max->io_mutex);
806 798
807 max->word_7bits = 0; 799 max->word_7bits = 0;
808 max->parity = 0; 800 max->parity = 0;
@@ -840,6 +832,16 @@ static int serial_m3110_probe(struct spi_device *spi)
840 goto err_kthread; 832 goto err_kthread;
841 } 833 }
842 834
835 if (max->irq) {
836 ret = request_irq(max->irq, serial_m3110_irq,
837 IRQ_TYPE_EDGE_FALLING, "max3110", max);
838 if (ret) {
839 max->irq = 0;
840 dev_warn(&spi->dev,
841 "unable to allocate IRQ, will use polling method\n");
842 }
843 }
844
843 spi_set_drvdata(spi, max); 845 spi_set_drvdata(spi, max);
844 pmax = max; 846 pmax = max;
845 847
@@ -867,6 +869,9 @@ static int serial_m3110_remove(struct spi_device *dev)
867 869
868 free_page((unsigned long)max->con_xmit.buf); 870 free_page((unsigned long)max->con_xmit.buf);
869 871
872 if (max->irq)
873 free_irq(max->irq, max);
874
870 if (max->main_thread) 875 if (max->main_thread)
871 kthread_stop(max->main_thread); 876 kthread_stop(max->main_thread);
872 877
diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c
index 10e9d70b5c40..d8b6fee77a03 100644
--- a/drivers/tty/serial/mxs-auart.c
+++ b/drivers/tty/serial/mxs-auart.c
@@ -39,6 +39,7 @@
39#include <asm/cacheflush.h> 39#include <asm/cacheflush.h>
40 40
41#define MXS_AUART_PORTS 5 41#define MXS_AUART_PORTS 5
42#define MXS_AUART_FIFO_SIZE 16
42 43
43#define AUART_CTRL0 0x00000000 44#define AUART_CTRL0 0x00000000
44#define AUART_CTRL0_SET 0x00000004 45#define AUART_CTRL0_SET 0x00000004
@@ -548,6 +549,9 @@ static int mxs_auart_dma_init(struct mxs_auart_port *s)
548 s->flags |= MXS_AUART_DMA_ENABLED; 549 s->flags |= MXS_AUART_DMA_ENABLED;
549 dev_dbg(s->dev, "enabled the DMA support."); 550 dev_dbg(s->dev, "enabled the DMA support.");
550 551
552 /* The DMA buffer is now the FIFO the TTY subsystem can use */
553 s->port.fifosize = UART_XMIT_SIZE;
554
551 return 0; 555 return 0;
552 556
553err_out: 557err_out:
@@ -741,6 +745,9 @@ static int mxs_auart_startup(struct uart_port *u)
741 writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN, 745 writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN,
742 u->membase + AUART_INTR); 746 u->membase + AUART_INTR);
743 747
748 /* Reset FIFO size (it could have changed if DMA was enabled) */
749 u->fifosize = MXS_AUART_FIFO_SIZE;
750
744 /* 751 /*
745 * Enable fifo so all four bytes of a DMA word are written to 752 * Enable fifo so all four bytes of a DMA word are written to
746 * output (otherwise, only the LSB is written, ie. 1 in 4 bytes) 753 * output (otherwise, only the LSB is written, ie. 1 in 4 bytes)
@@ -1056,7 +1063,7 @@ static int mxs_auart_probe(struct platform_device *pdev)
1056 s->port.membase = ioremap(r->start, resource_size(r)); 1063 s->port.membase = ioremap(r->start, resource_size(r));
1057 s->port.ops = &mxs_auart_ops; 1064 s->port.ops = &mxs_auart_ops;
1058 s->port.iotype = UPIO_MEM; 1065 s->port.iotype = UPIO_MEM;
1059 s->port.fifosize = 16; 1066 s->port.fifosize = MXS_AUART_FIFO_SIZE;
1060 s->port.uartclk = clk_get_rate(s->clk); 1067 s->port.uartclk = clk_get_rate(s->clk);
1061 s->port.type = PORT_IMX; 1068 s->port.type = PORT_IMX;
1062 s->port.dev = s->dev = &pdev->dev; 1069 s->port.dev = s->dev = &pdev->dev;
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 816d1a23f9d0..fa511ebab67c 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -39,6 +39,7 @@
39#include <linux/irq.h> 39#include <linux/irq.h>
40#include <linux/pm_runtime.h> 40#include <linux/pm_runtime.h>
41#include <linux/of.h> 41#include <linux/of.h>
42#include <linux/of_irq.h>
42#include <linux/gpio.h> 43#include <linux/gpio.h>
43#include <linux/of_gpio.h> 44#include <linux/of_gpio.h>
44#include <linux/platform_data/serial-omap.h> 45#include <linux/platform_data/serial-omap.h>
@@ -134,6 +135,7 @@ struct uart_omap_port {
134 struct uart_port port; 135 struct uart_port port;
135 struct uart_omap_dma uart_dma; 136 struct uart_omap_dma uart_dma;
136 struct device *dev; 137 struct device *dev;
138 int wakeirq;
137 139
138 unsigned char ier; 140 unsigned char ier;
139 unsigned char lcr; 141 unsigned char lcr;
@@ -175,7 +177,7 @@ struct uart_omap_port {
175 bool is_suspending; 177 bool is_suspending;
176}; 178};
177 179
178#define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) 180#define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port)))
179 181
180static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 182static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
181 183
@@ -214,10 +216,23 @@ static int serial_omap_get_context_loss_count(struct uart_omap_port *up)
214 return pdata->get_context_loss_count(up->dev); 216 return pdata->get_context_loss_count(up->dev);
215} 217}
216 218
219static inline void serial_omap_enable_wakeirq(struct uart_omap_port *up,
220 bool enable)
221{
222 if (!up->wakeirq)
223 return;
224
225 if (enable)
226 enable_irq(up->wakeirq);
227 else
228 disable_irq(up->wakeirq);
229}
230
217static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 231static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable)
218{ 232{
219 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 233 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev);
220 234
235 serial_omap_enable_wakeirq(up, enable);
221 if (!pdata || !pdata->enable_wakeup) 236 if (!pdata || !pdata->enable_wakeup)
222 return; 237 return;
223 238
@@ -242,12 +257,12 @@ serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud)
242 unsigned int n16 = port->uartclk / (16 * baud); 257 unsigned int n16 = port->uartclk / (16 * baud);
243 int baudAbsDiff13 = baud - (port->uartclk / (13 * n13)); 258 int baudAbsDiff13 = baud - (port->uartclk / (13 * n13));
244 int baudAbsDiff16 = baud - (port->uartclk / (16 * n16)); 259 int baudAbsDiff16 = baud - (port->uartclk / (16 * n16));
245 if(baudAbsDiff13 < 0) 260 if (baudAbsDiff13 < 0)
246 baudAbsDiff13 = -baudAbsDiff13; 261 baudAbsDiff13 = -baudAbsDiff13;
247 if(baudAbsDiff16 < 0) 262 if (baudAbsDiff16 < 0)
248 baudAbsDiff16 = -baudAbsDiff16; 263 baudAbsDiff16 = -baudAbsDiff16;
249 264
250 return (baudAbsDiff13 > baudAbsDiff16); 265 return (baudAbsDiff13 >= baudAbsDiff16);
251} 266}
252 267
253/* 268/*
@@ -258,13 +273,13 @@ serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud)
258static unsigned int 273static unsigned int
259serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 274serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
260{ 275{
261 unsigned int divisor; 276 unsigned int mode;
262 277
263 if (!serial_omap_baud_is_mode16(port, baud)) 278 if (!serial_omap_baud_is_mode16(port, baud))
264 divisor = 13; 279 mode = 13;
265 else 280 else
266 divisor = 16; 281 mode = 16;
267 return port->uartclk/(baud * divisor); 282 return port->uartclk/(mode * baud);
268} 283}
269 284
270static void serial_omap_enable_ms(struct uart_port *port) 285static void serial_omap_enable_ms(struct uart_port *port)
@@ -283,28 +298,40 @@ static void serial_omap_enable_ms(struct uart_port *port)
283static void serial_omap_stop_tx(struct uart_port *port) 298static void serial_omap_stop_tx(struct uart_port *port)
284{ 299{
285 struct uart_omap_port *up = to_uart_omap_port(port); 300 struct uart_omap_port *up = to_uart_omap_port(port);
286 struct circ_buf *xmit = &up->port.state->xmit;
287 int res; 301 int res;
288 302
289 pm_runtime_get_sync(up->dev); 303 pm_runtime_get_sync(up->dev);
290 304
291 /* handle rs485 */ 305 /* Handle RS-485 */
292 if (up->rs485.flags & SER_RS485_ENABLED) { 306 if (up->rs485.flags & SER_RS485_ENABLED) {
293 /* do nothing if current tx not yet completed */ 307 if (up->scr & OMAP_UART_SCR_TX_EMPTY) {
294 res = serial_in(up, UART_LSR) & UART_LSR_TEMT; 308 /* THR interrupt is fired when both TX FIFO and TX
295 if (!res) 309 * shift register are empty. This means there's nothing
296 return; 310 * left to transmit now, so make sure the THR interrupt
297 311 * is fired when TX FIFO is below the trigger level,
298 /* if there's no more data to send, turn off rts */ 312 * disable THR interrupts and toggle the RS-485 GPIO
299 if (uart_circ_empty(xmit)) { 313 * data direction pin if needed.
300 /* if rts not already disabled */ 314 */
315 up->scr &= ~OMAP_UART_SCR_TX_EMPTY;
316 serial_out(up, UART_OMAP_SCR, up->scr);
301 res = (up->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? 1 : 0; 317 res = (up->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? 1 : 0;
302 if (gpio_get_value(up->rts_gpio) != res) { 318 if (gpio_get_value(up->rts_gpio) != res) {
303 if (up->rs485.delay_rts_after_send > 0) { 319 if (up->rs485.delay_rts_after_send > 0)
304 mdelay(up->rs485.delay_rts_after_send); 320 mdelay(up->rs485.delay_rts_after_send);
305 }
306 gpio_set_value(up->rts_gpio, res); 321 gpio_set_value(up->rts_gpio, res);
307 } 322 }
323 } else {
324 /* We're asked to stop, but there's still stuff in the
325 * UART FIFO, so make sure the THR interrupt is fired
326 * when both TX FIFO and TX shift register are empty.
327 * The next THR interrupt (if no transmission is started
328 * in the meantime) will indicate the end of a
329 * transmission. Therefore we _don't_ disable THR
330 * interrupts in this situation.
331 */
332 up->scr |= OMAP_UART_SCR_TX_EMPTY;
333 serial_out(up, UART_OMAP_SCR, up->scr);
334 return;
308 } 335 }
309 } 336 }
310 337
@@ -384,15 +411,18 @@ static void serial_omap_start_tx(struct uart_port *port)
384 411
385 pm_runtime_get_sync(up->dev); 412 pm_runtime_get_sync(up->dev);
386 413
387 /* handle rs485 */ 414 /* Handle RS-485 */
388 if (up->rs485.flags & SER_RS485_ENABLED) { 415 if (up->rs485.flags & SER_RS485_ENABLED) {
416 /* Fire THR interrupts when FIFO is below trigger level */
417 up->scr &= ~OMAP_UART_SCR_TX_EMPTY;
418 serial_out(up, UART_OMAP_SCR, up->scr);
419
389 /* if rts not already enabled */ 420 /* if rts not already enabled */
390 res = (up->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; 421 res = (up->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0;
391 if (gpio_get_value(up->rts_gpio) != res) { 422 if (gpio_get_value(up->rts_gpio) != res) {
392 gpio_set_value(up->rts_gpio, res); 423 gpio_set_value(up->rts_gpio, res);
393 if (up->rs485.delay_rts_before_send > 0) { 424 if (up->rs485.delay_rts_before_send > 0)
394 mdelay(up->rs485.delay_rts_before_send); 425 mdelay(up->rs485.delay_rts_before_send);
395 }
396 } 426 }
397 } 427 }
398 428
@@ -699,6 +729,20 @@ static int serial_omap_startup(struct uart_port *port)
699 if (retval) 729 if (retval)
700 return retval; 730 return retval;
701 731
732 /* Optional wake-up IRQ */
733 if (up->wakeirq) {
734 retval = request_irq(up->wakeirq, serial_omap_irq,
735 up->port.irqflags, up->name, up);
736 if (retval) {
737 free_irq(up->port.irq, up);
738 return retval;
739 }
740 disable_irq(up->wakeirq);
741 } else {
742 dev_info(up->port.dev, "no wakeirq for uart%d\n",
743 up->port.line);
744 }
745
702 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 746 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line);
703 747
704 pm_runtime_get_sync(up->dev); 748 pm_runtime_get_sync(up->dev);
@@ -787,6 +831,8 @@ static void serial_omap_shutdown(struct uart_port *port)
787 pm_runtime_mark_last_busy(up->dev); 831 pm_runtime_mark_last_busy(up->dev);
788 pm_runtime_put_autosuspend(up->dev); 832 pm_runtime_put_autosuspend(up->dev);
789 free_irq(up->port.irq, up); 833 free_irq(up->port.irq, up);
834 if (up->wakeirq)
835 free_irq(up->wakeirq, up);
790} 836}
791 837
792static void serial_omap_uart_qos_work(struct work_struct *work) 838static void serial_omap_uart_qos_work(struct work_struct *work)
@@ -938,7 +984,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
938 */ 984 */
939 985
940 /* Set receive FIFO threshold to 16 characters and 986 /* Set receive FIFO threshold to 16 characters and
941 * transmit FIFO threshold to 16 spaces 987 * transmit FIFO threshold to 32 spaces
942 */ 988 */
943 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 989 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
944 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; 990 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK;
@@ -1060,15 +1106,6 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
1060 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 1106 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
1061} 1107}
1062 1108
1063static int serial_omap_set_wake(struct uart_port *port, unsigned int state)
1064{
1065 struct uart_omap_port *up = to_uart_omap_port(port);
1066
1067 serial_omap_enable_wakeup(up, state);
1068
1069 return 0;
1070}
1071
1072static void 1109static void
1073serial_omap_pm(struct uart_port *port, unsigned int state, 1110serial_omap_pm(struct uart_port *port, unsigned int state,
1074 unsigned int oldstate) 1111 unsigned int oldstate)
@@ -1353,6 +1390,15 @@ serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
1353 up->ier = mode; 1390 up->ier = mode;
1354 serial_out(up, UART_IER, up->ier); 1391 serial_out(up, UART_IER, up->ier);
1355 1392
1393 /* If RS-485 is disabled, make sure the THR interrupt is fired when
1394 * TX FIFO is below the trigger level.
1395 */
1396 if (!(up->rs485.flags & SER_RS485_ENABLED) &&
1397 (up->scr & OMAP_UART_SCR_TX_EMPTY)) {
1398 up->scr &= ~OMAP_UART_SCR_TX_EMPTY;
1399 serial_out(up, UART_OMAP_SCR, up->scr);
1400 }
1401
1356 spin_unlock_irqrestore(&up->port.lock, flags); 1402 spin_unlock_irqrestore(&up->port.lock, flags);
1357 pm_runtime_mark_last_busy(up->dev); 1403 pm_runtime_mark_last_busy(up->dev);
1358 pm_runtime_put_autosuspend(up->dev); 1404 pm_runtime_put_autosuspend(up->dev);
@@ -1401,7 +1447,6 @@ static struct uart_ops serial_omap_pops = {
1401 .shutdown = serial_omap_shutdown, 1447 .shutdown = serial_omap_shutdown,
1402 .set_termios = serial_omap_set_termios, 1448 .set_termios = serial_omap_set_termios,
1403 .pm = serial_omap_pm, 1449 .pm = serial_omap_pm,
1404 .set_wake = serial_omap_set_wake,
1405 .type = serial_omap_type, 1450 .type = serial_omap_type,
1406 .release_port = serial_omap_release_port, 1451 .release_port = serial_omap_release_port,
1407 .request_port = serial_omap_request_port, 1452 .request_port = serial_omap_request_port,
@@ -1582,11 +1627,23 @@ static int serial_omap_probe(struct platform_device *pdev)
1582 struct uart_omap_port *up; 1627 struct uart_omap_port *up;
1583 struct resource *mem, *irq; 1628 struct resource *mem, *irq;
1584 struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev); 1629 struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev);
1585 int ret; 1630 int ret, uartirq = 0, wakeirq = 0;
1586 1631
1632 /* The optional wakeirq may be specified in the board dts file */
1587 if (pdev->dev.of_node) { 1633 if (pdev->dev.of_node) {
1634 uartirq = irq_of_parse_and_map(pdev->dev.of_node, 0);
1635 if (!uartirq)
1636 return -EPROBE_DEFER;
1637 wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1);
1588 omap_up_info = of_get_uart_port_info(&pdev->dev); 1638 omap_up_info = of_get_uart_port_info(&pdev->dev);
1589 pdev->dev.platform_data = omap_up_info; 1639 pdev->dev.platform_data = omap_up_info;
1640 } else {
1641 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1642 if (!irq) {
1643 dev_err(&pdev->dev, "no irq resource?\n");
1644 return -ENODEV;
1645 }
1646 uartirq = irq->start;
1590 } 1647 }
1591 1648
1592 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1649 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1595,12 +1652,6 @@ static int serial_omap_probe(struct platform_device *pdev)
1595 return -ENODEV; 1652 return -ENODEV;
1596 } 1653 }
1597 1654
1598 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1599 if (!irq) {
1600 dev_err(&pdev->dev, "no irq resource?\n");
1601 return -ENODEV;
1602 }
1603
1604 if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem), 1655 if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem),
1605 pdev->dev.driver->name)) { 1656 pdev->dev.driver->name)) {
1606 dev_err(&pdev->dev, "memory region already claimed\n"); 1657 dev_err(&pdev->dev, "memory region already claimed\n");
@@ -1634,7 +1685,8 @@ static int serial_omap_probe(struct platform_device *pdev)
1634 up->port.dev = &pdev->dev; 1685 up->port.dev = &pdev->dev;
1635 up->port.type = PORT_OMAP; 1686 up->port.type = PORT_OMAP;
1636 up->port.iotype = UPIO_MEM; 1687 up->port.iotype = UPIO_MEM;
1637 up->port.irq = irq->start; 1688 up->port.irq = uartirq;
1689 up->wakeirq = wakeirq;
1638 1690
1639 up->port.regshift = 2; 1691 up->port.regshift = 2;
1640 up->port.fifosize = 64; 1692 up->port.fifosize = 64;
@@ -1670,8 +1722,9 @@ static int serial_omap_probe(struct platform_device *pdev)
1670 up->port.uartclk = omap_up_info->uartclk; 1722 up->port.uartclk = omap_up_info->uartclk;
1671 if (!up->port.uartclk) { 1723 if (!up->port.uartclk) {
1672 up->port.uartclk = DEFAULT_CLK_SPEED; 1724 up->port.uartclk = DEFAULT_CLK_SPEED;
1673 dev_warn(&pdev->dev, "No clock speed specified: using default:" 1725 dev_warn(&pdev->dev,
1674 "%d\n", DEFAULT_CLK_SPEED); 1726 "No clock speed specified: using default: %d\n",
1727 DEFAULT_CLK_SPEED);
1675 } 1728 }
1676 1729
1677 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1730 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 44077c0b7670..0aa2b528ef3d 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -1614,7 +1614,6 @@ static struct uart_ops pch_uart_ops = {
1614 .shutdown = pch_uart_shutdown, 1614 .shutdown = pch_uart_shutdown,
1615 .set_termios = pch_uart_set_termios, 1615 .set_termios = pch_uart_set_termios,
1616/* .pm = pch_uart_pm, Not supported yet */ 1616/* .pm = pch_uart_pm, Not supported yet */
1617/* .set_wake = pch_uart_set_wake, Not supported yet */
1618 .type = pch_uart_type, 1617 .type = pch_uart_type,
1619 .release_port = pch_uart_release_port, 1618 .release_port = pch_uart_release_port,
1620 .request_port = pch_uart_request_port, 1619 .request_port = pch_uart_request_port,
@@ -1996,6 +1995,8 @@ module_exit(pch_uart_module_exit);
1996 1995
1997MODULE_LICENSE("GPL v2"); 1996MODULE_LICENSE("GPL v2");
1998MODULE_DESCRIPTION("Intel EG20T PCH UART PCI Driver"); 1997MODULE_DESCRIPTION("Intel EG20T PCH UART PCI Driver");
1998MODULE_DEVICE_TABLE(pci, pch_uart_pci_id);
1999
1999module_param(default_baud, uint, S_IRUGO); 2000module_param(default_baud, uint, S_IRUGO);
2000MODULE_PARM_DESC(default_baud, 2001MODULE_PARM_DESC(default_baud,
2001 "Default BAUD for initial driver state and console (default 9600)"); 2002 "Default BAUD for initial driver state and console (default 9600)");
diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c
index f87f1a0c8c6e..95917cefe14f 100644
--- a/drivers/tty/serial/pmac_zilog.c
+++ b/drivers/tty/serial/pmac_zilog.c
@@ -1072,7 +1072,7 @@ static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
1072 uap->curregs[5] |= Tx8; 1072 uap->curregs[5] |= Tx8;
1073 uap->parity_mask = 0xff; 1073 uap->parity_mask = 0xff;
1074 break; 1074 break;
1075 }; 1075 }
1076 uap->curregs[4] &= ~(SB_MASK); 1076 uap->curregs[4] &= ~(SB_MASK);
1077 if (cflag & CSTOPB) 1077 if (cflag & CSTOPB)
1078 uap->curregs[4] |= SB2; 1078 uap->curregs[4] |= SB2;
diff --git a/drivers/tty/serial/sa1100.c b/drivers/tty/serial/sa1100.c
index ba25722a7131..753d4525b367 100644
--- a/drivers/tty/serial/sa1100.c
+++ b/drivers/tty/serial/sa1100.c
@@ -647,7 +647,10 @@ void sa1100_register_uart_fns(struct sa1100_port_fns *fns)
647 sa1100_pops.set_mctrl = fns->set_mctrl; 647 sa1100_pops.set_mctrl = fns->set_mctrl;
648 648
649 sa1100_pops.pm = fns->pm; 649 sa1100_pops.pm = fns->pm;
650 sa1100_pops.set_wake = fns->set_wake; 650 /*
651 * FIXME: fns->set_wake is unused - this should be called from
652 * the suspend() callback if device_may_wakeup(dev)) is set.
653 */
651} 654}
652 655
653void __init sa1100_register_uart(int idx, int port) 656void __init sa1100_register_uart(int idx, int port)
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index f3dfa19a1cb8..c1af04d46682 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -407,7 +407,14 @@ static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port)
407 407
408static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) 408static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
409{ 409{
410 /* todo - possibly remove AFC and do manual CTS */ 410 unsigned int umcon = rd_regl(port, S3C2410_UMCON);
411
412 if (mctrl & TIOCM_RTS)
413 umcon |= S3C2410_UMCOM_RTS_LOW;
414 else
415 umcon &= ~S3C2410_UMCOM_RTS_LOW;
416
417 wr_regl(port, S3C2410_UMCON, umcon);
411} 418}
412 419
413static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state) 420static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state)
@@ -774,8 +781,6 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
774 if (termios->c_cflag & CSTOPB) 781 if (termios->c_cflag & CSTOPB)
775 ulcon |= S3C2410_LCON_STOPB; 782 ulcon |= S3C2410_LCON_STOPB;
776 783
777 umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0;
778
779 if (termios->c_cflag & PARENB) { 784 if (termios->c_cflag & PARENB) {
780 if (termios->c_cflag & PARODD) 785 if (termios->c_cflag & PARODD)
781 ulcon |= S3C2410_LCON_PODD; 786 ulcon |= S3C2410_LCON_PODD;
@@ -792,6 +797,15 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
792 797
793 wr_regl(port, S3C2410_ULCON, ulcon); 798 wr_regl(port, S3C2410_ULCON, ulcon);
794 wr_regl(port, S3C2410_UBRDIV, quot); 799 wr_regl(port, S3C2410_UBRDIV, quot);
800
801 umcon = rd_regl(port, S3C2410_UMCON);
802 if (termios->c_cflag & CRTSCTS) {
803 umcon |= S3C2410_UMCOM_AFC;
804 /* Disable RTS when RX FIFO contains 63 bytes */
805 umcon &= ~S3C2412_UMCON_AFC_8;
806 } else {
807 umcon &= ~S3C2410_UMCOM_AFC;
808 }
795 wr_regl(port, S3C2410_UMCON, umcon); 809 wr_regl(port, S3C2410_UMCON, umcon);
796 810
797 if (ourport->info->has_divslot) 811 if (ourport->info->has_divslot)
@@ -1254,7 +1268,7 @@ static int s3c24xx_serial_probe(struct platform_device *pdev)
1254 ourport->baudclk = ERR_PTR(-EINVAL); 1268 ourport->baudclk = ERR_PTR(-EINVAL);
1255 ourport->info = ourport->drv_data->info; 1269 ourport->info = ourport->drv_data->info;
1256 ourport->cfg = (dev_get_platdata(&pdev->dev)) ? 1270 ourport->cfg = (dev_get_platdata(&pdev->dev)) ?
1257 (struct s3c2410_uartcfg *)dev_get_platdata(&pdev->dev) : 1271 dev_get_platdata(&pdev->dev) :
1258 ourport->drv_data->def_cfg; 1272 ourport->drv_data->def_cfg;
1259 1273
1260 ourport->port.fifosize = (ourport->info->fifosize) ? 1274 ourport->port.fifosize = (ourport->info->fifosize) ?
diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
index aaa617a6c499..8827e5424cef 100644
--- a/drivers/tty/serial/samsung.h
+++ b/drivers/tty/serial/samsung.h
@@ -63,7 +63,7 @@ struct s3c24xx_uart_port {
63 63
64/* conversion functions */ 64/* conversion functions */
65 65
66#define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) 66#define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev)
67 67
68/* register access controls */ 68/* register access controls */
69 69
diff --git a/drivers/tty/serial/sccnxp.c b/drivers/tty/serial/sccnxp.c
index 49e9bbfe6cab..a447f71538ef 100644
--- a/drivers/tty/serial/sccnxp.c
+++ b/drivers/tty/serial/sccnxp.c
@@ -986,6 +986,7 @@ static int sccnxp_probe(struct platform_device *pdev)
986 return 0; 986 return 0;
987 } 987 }
988 988
989 uart_unregister_driver(&s->uart);
989err_out: 990err_out:
990 if (!IS_ERR(s->regulator)) 991 if (!IS_ERR(s->regulator))
991 return regulator_disable(s->regulator); 992 return regulator_disable(s->regulator);
diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index 0489a2bdcdf9..dfe79ccc4fb3 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -1018,7 +1018,7 @@ static int tegra_uart_startup(struct uart_port *u)
1018 goto fail_hw_init; 1018 goto fail_hw_init;
1019 } 1019 }
1020 1020
1021 ret = request_irq(u->irq, tegra_uart_isr, IRQF_DISABLED, 1021 ret = request_irq(u->irq, tegra_uart_isr, 0,
1022 dev_name(u->dev), tup); 1022 dev_name(u->dev), tup);
1023 if (ret < 0) { 1023 if (ret < 0) {
1024 dev_err(u->dev, "Failed to register ISR for IRQ %d\n", u->irq); 1024 dev_err(u->dev, "Failed to register ISR for IRQ %d\n", u->irq);
diff --git a/drivers/tty/serial/serial_txx9.c b/drivers/tty/serial/serial_txx9.c
index 440a962412da..90a080b1f9ee 100644
--- a/drivers/tty/serial/serial_txx9.c
+++ b/drivers/tty/serial/serial_txx9.c
@@ -1220,8 +1220,6 @@ static void pciserial_txx9_remove_one(struct pci_dev *dev)
1220{ 1220{
1221 struct uart_txx9_port *up = pci_get_drvdata(dev); 1221 struct uart_txx9_port *up = pci_get_drvdata(dev);
1222 1222
1223 pci_set_drvdata(dev, NULL);
1224
1225 if (up) { 1223 if (up) {
1226 serial_txx9_unregister_port(up->port.line); 1224 serial_txx9_unregister_port(up->port.line);
1227 pci_disable_device(dev); 1225 pci_disable_device(dev);
diff --git a/drivers/tty/serial/sirfsoc_uart.c b/drivers/tty/serial/sirfsoc_uart.c
index 61c1ad03db5b..f186a8fb8887 100644
--- a/drivers/tty/serial/sirfsoc_uart.c
+++ b/drivers/tty/serial/sirfsoc_uart.c
@@ -529,7 +529,7 @@ static void sirfsoc_rx_tmo_process_tl(unsigned long param)
529 while (sirfport->rx_completed != sirfport->rx_issued) { 529 while (sirfport->rx_completed != sirfport->rx_issued) {
530 sirfsoc_uart_insert_rx_buf_to_tty(sirfport, 530 sirfsoc_uart_insert_rx_buf_to_tty(sirfport,
531 SIRFSOC_RX_DMA_BUF_SIZE); 531 SIRFSOC_RX_DMA_BUF_SIZE);
532 sirfsoc_rx_submit_one_dma_desc(port, sirfport->rx_completed++); 532 sirfport->rx_completed++;
533 sirfport->rx_completed %= SIRFSOC_RX_LOOP_BUF_CNT; 533 sirfport->rx_completed %= SIRFSOC_RX_LOOP_BUF_CNT;
534 } 534 }
535 count = CIRC_CNT(sirfport->rx_dma_items[sirfport->rx_issued].xmit.head, 535 count = CIRC_CNT(sirfport->rx_dma_items[sirfport->rx_issued].xmit.head,
@@ -706,12 +706,19 @@ static void sirfsoc_uart_rx_dma_complete_tl(unsigned long param)
706{ 706{
707 struct sirfsoc_uart_port *sirfport = (struct sirfsoc_uart_port *)param; 707 struct sirfsoc_uart_port *sirfport = (struct sirfsoc_uart_port *)param;
708 struct uart_port *port = &sirfport->port; 708 struct uart_port *port = &sirfport->port;
709 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg;
710 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en;
709 unsigned long flags; 711 unsigned long flags;
710 spin_lock_irqsave(&sirfport->rx_lock, flags); 712 spin_lock_irqsave(&sirfport->rx_lock, flags);
711 while (sirfport->rx_completed != sirfport->rx_issued) { 713 while (sirfport->rx_completed != sirfport->rx_issued) {
712 sirfsoc_uart_insert_rx_buf_to_tty(sirfport, 714 sirfsoc_uart_insert_rx_buf_to_tty(sirfport,
713 SIRFSOC_RX_DMA_BUF_SIZE); 715 SIRFSOC_RX_DMA_BUF_SIZE);
714 sirfsoc_rx_submit_one_dma_desc(port, sirfport->rx_completed++); 716 if (rd_regl(port, ureg->sirfsoc_int_en_reg) &
717 uint_en->sirfsoc_rx_timeout_en)
718 sirfsoc_rx_submit_one_dma_desc(port,
719 sirfport->rx_completed++);
720 else
721 sirfport->rx_completed++;
715 sirfport->rx_completed %= SIRFSOC_RX_LOOP_BUF_CNT; 722 sirfport->rx_completed %= SIRFSOC_RX_LOOP_BUF_CNT;
716 } 723 }
717 spin_unlock_irqrestore(&sirfport->rx_lock, flags); 724 spin_unlock_irqrestore(&sirfport->rx_lock, flags);
diff --git a/drivers/tty/serial/sirfsoc_uart.h b/drivers/tty/serial/sirfsoc_uart.h
index fb8d0a002607..b7d679c0881b 100644
--- a/drivers/tty/serial/sirfsoc_uart.h
+++ b/drivers/tty/serial/sirfsoc_uart.h
@@ -368,15 +368,6 @@ struct sirfsoc_uart_register sirfsoc_uart = {
368#define SIRFSOC_UART_NR 6 368#define SIRFSOC_UART_NR 6
369#define SIRFSOC_PORT_TYPE 0xa5 369#define SIRFSOC_PORT_TYPE 0xa5
370 370
371/* Baud Rate Calculation */
372#define SIRF_MIN_SAMPLE_DIV 0xf
373#define SIRF_MAX_SAMPLE_DIV 0x3f
374#define SIRF_IOCLK_DIV_MAX 0xffff
375#define SIRF_SAMPLE_DIV_SHIFT 16
376#define SIRF_IOCLK_DIV_MASK 0xffff
377#define SIRF_SAMPLE_DIV_MASK 0x3f0000
378#define SIRF_BAUD_RATE_SUPPORT_NR 18
379
380/* Uart Common Use Macro*/ 371/* Uart Common Use Macro*/
381#define SIRFSOC_RX_DMA_BUF_SIZE 256 372#define SIRFSOC_RX_DMA_BUF_SIZE 256
382#define BYTES_TO_ALIGN(dma_addr) ((unsigned long)(dma_addr) & 0x3) 373#define BYTES_TO_ALIGN(dma_addr) ((unsigned long)(dma_addr) & 0x3)
@@ -453,9 +444,6 @@ struct sirfsoc_uart_port {
453 int rx_issued; 444 int rx_issued;
454}; 445};
455 446
456/* Hardware Flow Control */
457#define SIRFUART_AFC_CTRL_RX_THD 0x70
458
459/* Register Access Control */ 447/* Register Access Control */
460#define portaddr(port, reg) ((port)->membase + (reg)) 448#define portaddr(port, reg) ((port)->membase + (reg))
461#define rd_regb(port, reg) (__raw_readb(portaddr(port, reg))) 449#define rd_regb(port, reg) (__raw_readb(portaddr(port, reg)))
diff --git a/drivers/tty/serial/sunsab.c b/drivers/tty/serial/sunsab.c
index 5d6136b2a04a..380fb5355cb2 100644
--- a/drivers/tty/serial/sunsab.c
+++ b/drivers/tty/serial/sunsab.c
@@ -894,7 +894,7 @@ static int sunsab_console_setup(struct console *con, char *options)
894 case B115200: baud = 115200; break; 894 case B115200: baud = 115200; break;
895 case B230400: baud = 230400; break; 895 case B230400: baud = 230400; break;
896 case B460800: baud = 460800; break; 896 case B460800: baud = 460800; break;
897 }; 897 }
898 898
899 /* 899 /*
900 * Temporary fix. 900 * Temporary fix.
diff --git a/drivers/tty/serial/sunsu.c b/drivers/tty/serial/sunsu.c
index 699cc1b5f6aa..db79b76f5c8e 100644
--- a/drivers/tty/serial/sunsu.c
+++ b/drivers/tty/serial/sunsu.c
@@ -522,7 +522,7 @@ static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
522 serio_interrupt(&up->serio, ch, 0); 522 serio_interrupt(&up->serio, ch, 0);
523#endif 523#endif
524 break; 524 break;
525 }; 525 }
526 } 526 }
527 } while (serial_in(up, UART_LSR) & UART_LSR_DR); 527 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
528} 528}
diff --git a/drivers/tty/serial/sunzilog.c b/drivers/tty/serial/sunzilog.c
index 135a15203532..45a8c6aa5837 100644
--- a/drivers/tty/serial/sunzilog.c
+++ b/drivers/tty/serial/sunzilog.c
@@ -319,7 +319,7 @@ static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up,
319 serio_interrupt(&up->serio, ch, 0); 319 serio_interrupt(&up->serio, ch, 0);
320#endif 320#endif
321 break; 321 break;
322 }; 322 }
323 } 323 }
324} 324}
325 325
@@ -897,7 +897,7 @@ sunzilog_convert_to_zs(struct uart_sunzilog_port *up, unsigned int cflag,
897 up->curregs[R5] |= Tx8; 897 up->curregs[R5] |= Tx8;
898 up->parity_mask = 0xff; 898 up->parity_mask = 0xff;
899 break; 899 break;
900 }; 900 }
901 up->curregs[R4] &= ~0x0c; 901 up->curregs[R4] &= ~0x0c;
902 if (cflag & CSTOPB) 902 if (cflag & CSTOPB)
903 up->curregs[R4] |= SB2; 903 up->curregs[R4] |= SB2;
@@ -1239,7 +1239,7 @@ static int __init sunzilog_console_setup(struct console *con, char *options)
1239 default: case B9600: baud = 9600; break; 1239 default: case B9600: baud = 9600; break;
1240 case B19200: baud = 19200; break; 1240 case B19200: baud = 19200; break;
1241 case B38400: baud = 38400; break; 1241 case B38400: baud = 38400; break;
1242 }; 1242 }
1243 1243
1244 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); 1244 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
1245 1245
diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c
index 88317482b81f..2fd1e1789811 100644
--- a/drivers/tty/serial/ucc_uart.c
+++ b/drivers/tty/serial/ucc_uart.c
@@ -269,7 +269,7 @@ static unsigned int qe_uart_tx_empty(struct uart_port *port)
269 return 1; 269 return 1;
270 270
271 bdp++; 271 bdp++;
272 }; 272 }
273} 273}
274 274
275/* 275/*
diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
index 7e4150aa69c6..e46e9f3f19b9 100644
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Xilinx PS UART driver 2 * Xilinx PS UART driver
3 * 3 *
4 * 2011 (c) Xilinx Inc. 4 * 2011 - 2013 (C) Xilinx Inc.
5 * 5 *
6 * This program is free software; you can redistribute it 6 * This program is free software; you can redistribute it
7 * and/or modify it under the terms of the GNU General Public 7 * and/or modify it under the terms of the GNU General Public
@@ -11,13 +11,17 @@
11 * 11 *
12 */ 12 */
13 13
14#if defined(CONFIG_SERIAL_XILINX_PS_UART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15#define SUPPORT_SYSRQ
16#endif
17
14#include <linux/platform_device.h> 18#include <linux/platform_device.h>
15#include <linux/serial.h> 19#include <linux/serial.h>
20#include <linux/console.h>
16#include <linux/serial_core.h> 21#include <linux/serial_core.h>
17#include <linux/slab.h> 22#include <linux/slab.h>
18#include <linux/tty.h> 23#include <linux/tty.h>
19#include <linux/tty_flip.h> 24#include <linux/tty_flip.h>
20#include <linux/console.h>
21#include <linux/clk.h> 25#include <linux/clk.h>
22#include <linux/irq.h> 26#include <linux/irq.h>
23#include <linux/io.h> 27#include <linux/io.h>
@@ -29,12 +33,22 @@
29#define XUARTPS_MAJOR 0 /* use dynamic node allocation */ 33#define XUARTPS_MAJOR 0 /* use dynamic node allocation */
30#define XUARTPS_MINOR 0 /* works best with devtmpfs */ 34#define XUARTPS_MINOR 0 /* works best with devtmpfs */
31#define XUARTPS_NR_PORTS 2 35#define XUARTPS_NR_PORTS 2
32#define XUARTPS_FIFO_SIZE 16 /* FIFO size */ 36#define XUARTPS_FIFO_SIZE 64 /* FIFO size */
33#define XUARTPS_REGISTER_SPACE 0xFFF 37#define XUARTPS_REGISTER_SPACE 0xFFF
34 38
35#define xuartps_readl(offset) ioread32(port->membase + offset) 39#define xuartps_readl(offset) ioread32(port->membase + offset)
36#define xuartps_writel(val, offset) iowrite32(val, port->membase + offset) 40#define xuartps_writel(val, offset) iowrite32(val, port->membase + offset)
37 41
42/* Rx Trigger level */
43static int rx_trigger_level = 56;
44module_param(rx_trigger_level, uint, S_IRUGO);
45MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");
46
47/* Rx Timeout */
48static int rx_timeout = 10;
49module_param(rx_timeout, uint, S_IRUGO);
50MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
51
38/********************************Register Map********************************/ 52/********************************Register Map********************************/
39/** UART 53/** UART
40 * 54 *
@@ -128,6 +142,9 @@
128#define XUARTPS_IXR_RXEMPTY 0x00000002 /* RX FIFO empty interrupt. */ 142#define XUARTPS_IXR_RXEMPTY 0x00000002 /* RX FIFO empty interrupt. */
129#define XUARTPS_IXR_MASK 0x00001FFF /* Valid bit mask */ 143#define XUARTPS_IXR_MASK 0x00001FFF /* Valid bit mask */
130 144
145/* Goes in read_status_mask for break detection as the HW doesn't do it*/
146#define XUARTPS_IXR_BRK 0x80000000
147
131/** Channel Status Register 148/** Channel Status Register
132 * 149 *
133 * The channel status register (CSR) is provided to enable the control logic 150 * The channel status register (CSR) is provided to enable the control logic
@@ -139,15 +156,27 @@
139#define XUARTPS_SR_TXFULL 0x00000010 /* TX FIFO full */ 156#define XUARTPS_SR_TXFULL 0x00000010 /* TX FIFO full */
140#define XUARTPS_SR_RXTRIG 0x00000001 /* Rx Trigger */ 157#define XUARTPS_SR_RXTRIG 0x00000001 /* Rx Trigger */
141 158
159/* baud dividers min/max values */
160#define XUARTPS_BDIV_MIN 4
161#define XUARTPS_BDIV_MAX 255
162#define XUARTPS_CD_MAX 65535
163
142/** 164/**
143 * struct xuartps - device data 165 * struct xuartps - device data
144 * @refclk Reference clock 166 * @port Pointer to the UART port
145 * @aperclk APB clock 167 * @refclk Reference clock
168 * @aperclk APB clock
169 * @baud Current baud rate
170 * @clk_rate_change_nb Notifier block for clock changes
146 */ 171 */
147struct xuartps { 172struct xuartps {
173 struct uart_port *port;
148 struct clk *refclk; 174 struct clk *refclk;
149 struct clk *aperclk; 175 struct clk *aperclk;
176 unsigned int baud;
177 struct notifier_block clk_rate_change_nb;
150}; 178};
179#define to_xuartps(_nb) container_of(_nb, struct xuartps, clk_rate_change_nb);
151 180
152/** 181/**
153 * xuartps_isr - Interrupt handler 182 * xuartps_isr - Interrupt handler
@@ -171,6 +200,23 @@ static irqreturn_t xuartps_isr(int irq, void *dev_id)
171 */ 200 */
172 isrstatus = xuartps_readl(XUARTPS_ISR_OFFSET); 201 isrstatus = xuartps_readl(XUARTPS_ISR_OFFSET);
173 202
203 /*
204 * There is no hardware break detection, so we interpret framing
205 * error with all-zeros data as a break sequence. Most of the time,
206 * there's another non-zero byte at the end of the sequence.
207 */
208
209 if (isrstatus & XUARTPS_IXR_FRAMING) {
210 while (!(xuartps_readl(XUARTPS_SR_OFFSET) &
211 XUARTPS_SR_RXEMPTY)) {
212 if (!xuartps_readl(XUARTPS_FIFO_OFFSET)) {
213 port->read_status_mask |= XUARTPS_IXR_BRK;
214 isrstatus &= ~XUARTPS_IXR_FRAMING;
215 }
216 }
217 xuartps_writel(XUARTPS_IXR_FRAMING, XUARTPS_ISR_OFFSET);
218 }
219
174 /* drop byte with parity error if IGNPAR specified */ 220 /* drop byte with parity error if IGNPAR specified */
175 if (isrstatus & port->ignore_status_mask & XUARTPS_IXR_PARITY) 221 if (isrstatus & port->ignore_status_mask & XUARTPS_IXR_PARITY)
176 isrstatus &= ~(XUARTPS_IXR_RXTRIG | XUARTPS_IXR_TOUT); 222 isrstatus &= ~(XUARTPS_IXR_RXTRIG | XUARTPS_IXR_TOUT);
@@ -184,6 +230,30 @@ static irqreturn_t xuartps_isr(int irq, void *dev_id)
184 while ((xuartps_readl(XUARTPS_SR_OFFSET) & 230 while ((xuartps_readl(XUARTPS_SR_OFFSET) &
185 XUARTPS_SR_RXEMPTY) != XUARTPS_SR_RXEMPTY) { 231 XUARTPS_SR_RXEMPTY) != XUARTPS_SR_RXEMPTY) {
186 data = xuartps_readl(XUARTPS_FIFO_OFFSET); 232 data = xuartps_readl(XUARTPS_FIFO_OFFSET);
233
234 /* Non-NULL byte after BREAK is garbage (99%) */
235 if (data && (port->read_status_mask &
236 XUARTPS_IXR_BRK)) {
237 port->read_status_mask &= ~XUARTPS_IXR_BRK;
238 port->icount.brk++;
239 if (uart_handle_break(port))
240 continue;
241 }
242
243 /*
244 * uart_handle_sysrq_char() doesn't work if
245 * spinlocked, for some reason
246 */
247 if (port->sysrq) {
248 spin_unlock(&port->lock);
249 if (uart_handle_sysrq_char(port,
250 (unsigned char)data)) {
251 spin_lock(&port->lock);
252 continue;
253 }
254 spin_lock(&port->lock);
255 }
256
187 port->icount.rx++; 257 port->icount.rx++;
188 258
189 if (isrstatus & XUARTPS_IXR_PARITY) { 259 if (isrstatus & XUARTPS_IXR_PARITY) {
@@ -247,63 +317,196 @@ static irqreturn_t xuartps_isr(int irq, void *dev_id)
247} 317}
248 318
249/** 319/**
250 * xuartps_set_baud_rate - Calculate and set the baud rate 320 * xuartps_calc_baud_divs - Calculate baud rate divisors
251 * @port: Handle to the uart port structure 321 * @clk: UART module input clock
252 * @baud: Baud rate to set 322 * @baud: Desired baud rate
253 * 323 * @rbdiv: BDIV value (return value)
324 * @rcd: CD value (return value)
325 * @div8: Value for clk_sel bit in mod (return value)
254 * Returns baud rate, requested baud when possible, or actual baud when there 326 * Returns baud rate, requested baud when possible, or actual baud when there
255 * was too much error 327 * was too much error, zero if no valid divisors are found.
256 **/ 328 *
257static unsigned int xuartps_set_baud_rate(struct uart_port *port, 329 * Formula to obtain baud rate is
258 unsigned int baud) 330 * baud_tx/rx rate = clk/CD * (BDIV + 1)
331 * input_clk = (Uart User Defined Clock or Apb Clock)
332 * depends on UCLKEN in MR Reg
333 * clk = input_clk or input_clk/8;
334 * depends on CLKS in MR reg
335 * CD and BDIV depends on values in
336 * baud rate generate register
337 * baud rate clock divisor register
338 */
339static unsigned int xuartps_calc_baud_divs(unsigned int clk, unsigned int baud,
340 u32 *rbdiv, u32 *rcd, int *div8)
259{ 341{
260 unsigned int sel_clk; 342 u32 cd, bdiv;
261 unsigned int calc_baud = 0; 343 unsigned int calc_baud;
262 unsigned int brgr_val, brdiv_val; 344 unsigned int bestbaud = 0;
263 unsigned int bauderror; 345 unsigned int bauderror;
346 unsigned int besterror = ~0;
264 347
265 /* Formula to obtain baud rate is 348 if (baud < clk / ((XUARTPS_BDIV_MAX + 1) * XUARTPS_CD_MAX)) {
266 * baud_tx/rx rate = sel_clk/CD * (BDIV + 1) 349 *div8 = 1;
267 * input_clk = (Uart User Defined Clock or Apb Clock) 350 clk /= 8;
268 * depends on UCLKEN in MR Reg 351 } else {
269 * sel_clk = input_clk or input_clk/8; 352 *div8 = 0;
270 * depends on CLKS in MR reg 353 }
271 * CD and BDIV depends on values in
272 * baud rate generate register
273 * baud rate clock divisor register
274 */
275 sel_clk = port->uartclk;
276 if (xuartps_readl(XUARTPS_MR_OFFSET) & XUARTPS_MR_CLKSEL)
277 sel_clk = sel_clk / 8;
278
279 /* Find the best values for baud generation */
280 for (brdiv_val = 4; brdiv_val < 255; brdiv_val++) {
281 354
282 brgr_val = sel_clk / (baud * (brdiv_val + 1)); 355 for (bdiv = XUARTPS_BDIV_MIN; bdiv <= XUARTPS_BDIV_MAX; bdiv++) {
283 if (brgr_val < 2 || brgr_val > 65535) 356 cd = DIV_ROUND_CLOSEST(clk, baud * (bdiv + 1));
357 if (cd < 1 || cd > XUARTPS_CD_MAX)
284 continue; 358 continue;
285 359
286 calc_baud = sel_clk / (brgr_val * (brdiv_val + 1)); 360 calc_baud = clk / (cd * (bdiv + 1));
287 361
288 if (baud > calc_baud) 362 if (baud > calc_baud)
289 bauderror = baud - calc_baud; 363 bauderror = baud - calc_baud;
290 else 364 else
291 bauderror = calc_baud - baud; 365 bauderror = calc_baud - baud;
292 366
293 /* use the values when percent error is acceptable */ 367 if (besterror > bauderror) {
294 if (((bauderror * 100) / baud) < 3) { 368 *rbdiv = bdiv;
295 calc_baud = baud; 369 *rcd = cd;
296 break; 370 bestbaud = calc_baud;
371 besterror = bauderror;
297 } 372 }
298 } 373 }
374 /* use the values when percent error is acceptable */
375 if (((besterror * 100) / baud) < 3)
376 bestbaud = baud;
377
378 return bestbaud;
379}
299 380
300 /* Set the values for the new baud rate */ 381/**
301 xuartps_writel(brgr_val, XUARTPS_BAUDGEN_OFFSET); 382 * xuartps_set_baud_rate - Calculate and set the baud rate
302 xuartps_writel(brdiv_val, XUARTPS_BAUDDIV_OFFSET); 383 * @port: Handle to the uart port structure
384 * @baud: Baud rate to set
385 * Returns baud rate, requested baud when possible, or actual baud when there
386 * was too much error, zero if no valid divisors are found.
387 */
388static unsigned int xuartps_set_baud_rate(struct uart_port *port,
389 unsigned int baud)
390{
391 unsigned int calc_baud;
392 u32 cd = 0, bdiv = 0;
393 u32 mreg;
394 int div8;
395 struct xuartps *xuartps = port->private_data;
396
397 calc_baud = xuartps_calc_baud_divs(port->uartclk, baud, &bdiv, &cd,
398 &div8);
399
400 /* Write new divisors to hardware */
401 mreg = xuartps_readl(XUARTPS_MR_OFFSET);
402 if (div8)
403 mreg |= XUARTPS_MR_CLKSEL;
404 else
405 mreg &= ~XUARTPS_MR_CLKSEL;
406 xuartps_writel(mreg, XUARTPS_MR_OFFSET);
407 xuartps_writel(cd, XUARTPS_BAUDGEN_OFFSET);
408 xuartps_writel(bdiv, XUARTPS_BAUDDIV_OFFSET);
409 xuartps->baud = baud;
303 410
304 return calc_baud; 411 return calc_baud;
305} 412}
306 413
414#ifdef CONFIG_COMMON_CLK
415/**
416 * xuartps_clk_notitifer_cb - Clock notifier callback
417 * @nb: Notifier block
418 * @event: Notify event
419 * @data: Notifier data
420 * Returns NOTIFY_OK on success, NOTIFY_BAD on error.
421 */
422static int xuartps_clk_notifier_cb(struct notifier_block *nb,
423 unsigned long event, void *data)
424{
425 u32 ctrl_reg;
426 struct uart_port *port;
427 int locked = 0;
428 struct clk_notifier_data *ndata = data;
429 unsigned long flags = 0;
430 struct xuartps *xuartps = to_xuartps(nb);
431
432 port = xuartps->port;
433 if (port->suspended)
434 return NOTIFY_OK;
435
436 switch (event) {
437 case PRE_RATE_CHANGE:
438 {
439 u32 bdiv;
440 u32 cd;
441 int div8;
442
443 /*
444 * Find out if current baud-rate can be achieved with new clock
445 * frequency.
446 */
447 if (!xuartps_calc_baud_divs(ndata->new_rate, xuartps->baud,
448 &bdiv, &cd, &div8))
449 return NOTIFY_BAD;
450
451 spin_lock_irqsave(&xuartps->port->lock, flags);
452
453 /* Disable the TX and RX to set baud rate */
454 xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
455 (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS),
456 XUARTPS_CR_OFFSET);
457
458 spin_unlock_irqrestore(&xuartps->port->lock, flags);
459
460 return NOTIFY_OK;
461 }
462 case POST_RATE_CHANGE:
463 /*
464 * Set clk dividers to generate correct baud with new clock
465 * frequency.
466 */
467
468 spin_lock_irqsave(&xuartps->port->lock, flags);
469
470 locked = 1;
471 port->uartclk = ndata->new_rate;
472
473 xuartps->baud = xuartps_set_baud_rate(xuartps->port,
474 xuartps->baud);
475 /* fall through */
476 case ABORT_RATE_CHANGE:
477 if (!locked)
478 spin_lock_irqsave(&xuartps->port->lock, flags);
479
480 /* Set TX/RX Reset */
481 xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
482 (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
483 XUARTPS_CR_OFFSET);
484
485 while (xuartps_readl(XUARTPS_CR_OFFSET) &
486 (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
487 cpu_relax();
488
489 /*
490 * Clear the RX disable and TX disable bits and then set the TX
491 * enable bit and RX enable bit to enable the transmitter and
492 * receiver.
493 */
494 xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
495 ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
496 xuartps_writel(
497 (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) |
498 (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
499 XUARTPS_CR_OFFSET);
500
501 spin_unlock_irqrestore(&xuartps->port->lock, flags);
502
503 return NOTIFY_OK;
504 default:
505 return NOTIFY_DONE;
506 }
507}
508#endif
509
307/*----------------------Uart Operations---------------------------*/ 510/*----------------------Uart Operations---------------------------*/
308 511
309/** 512/**
@@ -346,7 +549,7 @@ static void xuartps_start_tx(struct uart_port *port)
346 port->state->xmit.tail = (port->state->xmit.tail + 1) & 549 port->state->xmit.tail = (port->state->xmit.tail + 1) &
347 (UART_XMIT_SIZE - 1); 550 (UART_XMIT_SIZE - 1);
348 } 551 }
349 552 xuartps_writel(XUARTPS_IXR_TXEMPTY, XUARTPS_ISR_OFFSET);
350 /* Enable the TX Empty interrupt */ 553 /* Enable the TX Empty interrupt */
351 xuartps_writel(XUARTPS_IXR_TXEMPTY, XUARTPS_IER_OFFSET); 554 xuartps_writel(XUARTPS_IXR_TXEMPTY, XUARTPS_IER_OFFSET);
352 555
@@ -437,7 +640,7 @@ static void xuartps_set_termios(struct uart_port *port,
437 struct ktermios *termios, struct ktermios *old) 640 struct ktermios *termios, struct ktermios *old)
438{ 641{
439 unsigned int cval = 0; 642 unsigned int cval = 0;
440 unsigned int baud; 643 unsigned int baud, minbaud, maxbaud;
441 unsigned long flags; 644 unsigned long flags;
442 unsigned int ctrl_reg, mode_reg; 645 unsigned int ctrl_reg, mode_reg;
443 646
@@ -454,8 +657,14 @@ static void xuartps_set_termios(struct uart_port *port,
454 (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS), 657 (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS),
455 XUARTPS_CR_OFFSET); 658 XUARTPS_CR_OFFSET);
456 659
457 /* Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk */ 660 /*
458 baud = uart_get_baud_rate(port, termios, old, 0, 10000000); 661 * Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk
662 * min and max baud should be calculated here based on port->uartclk.
663 * this way we get a valid baud and can safely call set_baud()
664 */
665 minbaud = port->uartclk / ((XUARTPS_BDIV_MAX + 1) * XUARTPS_CD_MAX * 8);
666 maxbaud = port->uartclk / (XUARTPS_BDIV_MIN + 1);
667 baud = uart_get_baud_rate(port, termios, old, minbaud, maxbaud);
459 baud = xuartps_set_baud_rate(port, baud); 668 baud = xuartps_set_baud_rate(port, baud);
460 if (tty_termios_baud_rate(termios)) 669 if (tty_termios_baud_rate(termios))
461 tty_termios_encode_baud_rate(termios, baud, baud); 670 tty_termios_encode_baud_rate(termios, baud, baud);
@@ -480,7 +689,7 @@ static void xuartps_set_termios(struct uart_port *port,
480 | (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), 689 | (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
481 XUARTPS_CR_OFFSET); 690 XUARTPS_CR_OFFSET);
482 691
483 xuartps_writel(10, XUARTPS_RXTOUT_OFFSET); 692 xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
484 693
485 port->read_status_mask = XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_RXTRIG | 694 port->read_status_mask = XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_RXTRIG |
486 XUARTPS_IXR_OVERRUN | XUARTPS_IXR_TOUT; 695 XUARTPS_IXR_OVERRUN | XUARTPS_IXR_TOUT;
@@ -531,13 +740,17 @@ static void xuartps_set_termios(struct uart_port *port,
531 cval |= XUARTPS_MR_PARITY_MARK; 740 cval |= XUARTPS_MR_PARITY_MARK;
532 else 741 else
533 cval |= XUARTPS_MR_PARITY_SPACE; 742 cval |= XUARTPS_MR_PARITY_SPACE;
534 } else if (termios->c_cflag & PARODD) 743 } else {
744 if (termios->c_cflag & PARODD)
535 cval |= XUARTPS_MR_PARITY_ODD; 745 cval |= XUARTPS_MR_PARITY_ODD;
536 else 746 else
537 cval |= XUARTPS_MR_PARITY_EVEN; 747 cval |= XUARTPS_MR_PARITY_EVEN;
538 } else 748 }
749 } else {
539 cval |= XUARTPS_MR_PARITY_NONE; 750 cval |= XUARTPS_MR_PARITY_NONE;
540 xuartps_writel(cval , XUARTPS_MR_OFFSET); 751 }
752 cval |= mode_reg & 1;
753 xuartps_writel(cval, XUARTPS_MR_OFFSET);
541 754
542 spin_unlock_irqrestore(&port->lock, flags); 755 spin_unlock_irqrestore(&port->lock, flags);
543} 756}
@@ -583,11 +796,17 @@ static int xuartps_startup(struct uart_port *port)
583 | XUARTPS_MR_PARITY_NONE | XUARTPS_MR_CHARLEN_8_BIT, 796 | XUARTPS_MR_PARITY_NONE | XUARTPS_MR_CHARLEN_8_BIT,
584 XUARTPS_MR_OFFSET); 797 XUARTPS_MR_OFFSET);
585 798
586 /* Set the RX FIFO Trigger level to 14 assuming FIFO size as 16 */ 799 /*
587 xuartps_writel(14, XUARTPS_RXWM_OFFSET); 800 * Set the RX FIFO Trigger level to use most of the FIFO, but it
801 * can be tuned with a module parameter
802 */
803 xuartps_writel(rx_trigger_level, XUARTPS_RXWM_OFFSET);
588 804
589 /* Receive Timeout register is enabled with value of 10 */ 805 /*
590 xuartps_writel(10, XUARTPS_RXTOUT_OFFSET); 806 * Receive Timeout register is enabled but it
807 * can be tuned with a module parameter
808 */
809 xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
591 810
592 /* Clear out any pending interrupts before enabling them */ 811 /* Clear out any pending interrupts before enabling them */
593 xuartps_writel(xuartps_readl(XUARTPS_ISR_OFFSET), XUARTPS_ISR_OFFSET); 812 xuartps_writel(xuartps_readl(XUARTPS_ISR_OFFSET), XUARTPS_ISR_OFFSET);
@@ -727,6 +946,54 @@ static void xuartps_enable_ms(struct uart_port *port)
727 /* N/A */ 946 /* N/A */
728} 947}
729 948
949#ifdef CONFIG_CONSOLE_POLL
950static int xuartps_poll_get_char(struct uart_port *port)
951{
952 u32 imr;
953 int c;
954
955 /* Disable all interrupts */
956 imr = xuartps_readl(XUARTPS_IMR_OFFSET);
957 xuartps_writel(imr, XUARTPS_IDR_OFFSET);
958
959 /* Check if FIFO is empty */
960 if (xuartps_readl(XUARTPS_SR_OFFSET) & XUARTPS_SR_RXEMPTY)
961 c = NO_POLL_CHAR;
962 else /* Read a character */
963 c = (unsigned char) xuartps_readl(XUARTPS_FIFO_OFFSET);
964
965 /* Enable interrupts */
966 xuartps_writel(imr, XUARTPS_IER_OFFSET);
967
968 return c;
969}
970
971static void xuartps_poll_put_char(struct uart_port *port, unsigned char c)
972{
973 u32 imr;
974
975 /* Disable all interrupts */
976 imr = xuartps_readl(XUARTPS_IMR_OFFSET);
977 xuartps_writel(imr, XUARTPS_IDR_OFFSET);
978
979 /* Wait until FIFO is empty */
980 while (!(xuartps_readl(XUARTPS_SR_OFFSET) & XUARTPS_SR_TXEMPTY))
981 cpu_relax();
982
983 /* Write a character */
984 xuartps_writel(c, XUARTPS_FIFO_OFFSET);
985
986 /* Wait until FIFO is empty */
987 while (!(xuartps_readl(XUARTPS_SR_OFFSET) & XUARTPS_SR_TXEMPTY))
988 cpu_relax();
989
990 /* Enable interrupts */
991 xuartps_writel(imr, XUARTPS_IER_OFFSET);
992
993 return;
994}
995#endif
996
730/** The UART operations structure 997/** The UART operations structure
731 */ 998 */
732static struct uart_ops xuartps_ops = { 999static struct uart_ops xuartps_ops = {
@@ -759,6 +1026,10 @@ static struct uart_ops xuartps_ops = {
759 .config_port = xuartps_config_port, /* Configure when driver 1026 .config_port = xuartps_config_port, /* Configure when driver
760 * adds a xuartps port 1027 * adds a xuartps port
761 */ 1028 */
1029#ifdef CONFIG_CONSOLE_POLL
1030 .poll_get_char = xuartps_poll_get_char,
1031 .poll_put_char = xuartps_poll_put_char,
1032#endif
762}; 1033};
763 1034
764static struct uart_port xuartps_port[2]; 1035static struct uart_port xuartps_port[2];
@@ -837,7 +1108,7 @@ static void xuartps_console_write(struct console *co, const char *s,
837{ 1108{
838 struct uart_port *port = &xuartps_port[co->index]; 1109 struct uart_port *port = &xuartps_port[co->index];
839 unsigned long flags; 1110 unsigned long flags;
840 unsigned int imr; 1111 unsigned int imr, ctrl;
841 int locked = 1; 1112 int locked = 1;
842 1113
843 if (oops_in_progress) 1114 if (oops_in_progress)
@@ -849,9 +1120,19 @@ static void xuartps_console_write(struct console *co, const char *s,
849 imr = xuartps_readl(XUARTPS_IMR_OFFSET); 1120 imr = xuartps_readl(XUARTPS_IMR_OFFSET);
850 xuartps_writel(imr, XUARTPS_IDR_OFFSET); 1121 xuartps_writel(imr, XUARTPS_IDR_OFFSET);
851 1122
1123 /*
1124 * Make sure that the tx part is enabled. Set the TX enable bit and
1125 * clear the TX disable bit to enable the transmitter.
1126 */
1127 ctrl = xuartps_readl(XUARTPS_CR_OFFSET);
1128 xuartps_writel((ctrl & ~XUARTPS_CR_TX_DIS) | XUARTPS_CR_TX_EN,
1129 XUARTPS_CR_OFFSET);
1130
852 uart_console_write(port, s, count, xuartps_console_putchar); 1131 uart_console_write(port, s, count, xuartps_console_putchar);
853 xuartps_console_wait_tx(port); 1132 xuartps_console_wait_tx(port);
854 1133
1134 xuartps_writel(ctrl, XUARTPS_CR_OFFSET);
1135
855 /* restore interrupt state, it seems like there may be a h/w bug 1136 /* restore interrupt state, it seems like there may be a h/w bug
856 * in that the interrupt enable register should not need to be 1137 * in that the interrupt enable register should not need to be
857 * written based on the data sheet 1138 * written based on the data sheet
@@ -933,6 +1214,119 @@ static struct uart_driver xuartps_uart_driver = {
933#endif 1214#endif
934}; 1215};
935 1216
1217#ifdef CONFIG_PM_SLEEP
1218/**
1219 * xuartps_suspend - suspend event
1220 * @device: Pointer to the device structure
1221 *
1222 * Returns 0
1223 */
1224static int xuartps_suspend(struct device *device)
1225{
1226 struct uart_port *port = dev_get_drvdata(device);
1227 struct tty_struct *tty;
1228 struct device *tty_dev;
1229 int may_wake = 0;
1230
1231 /* Get the tty which could be NULL so don't assume it's valid */
1232 tty = tty_port_tty_get(&port->state->port);
1233 if (tty) {
1234 tty_dev = tty->dev;
1235 may_wake = device_may_wakeup(tty_dev);
1236 tty_kref_put(tty);
1237 }
1238
1239 /*
1240 * Call the API provided in serial_core.c file which handles
1241 * the suspend.
1242 */
1243 uart_suspend_port(&xuartps_uart_driver, port);
1244 if (console_suspend_enabled && !may_wake) {
1245 struct xuartps *xuartps = port->private_data;
1246
1247 clk_disable(xuartps->refclk);
1248 clk_disable(xuartps->aperclk);
1249 } else {
1250 unsigned long flags = 0;
1251
1252 spin_lock_irqsave(&port->lock, flags);
1253 /* Empty the receive FIFO 1st before making changes */
1254 while (!(xuartps_readl(XUARTPS_SR_OFFSET) & XUARTPS_SR_RXEMPTY))
1255 xuartps_readl(XUARTPS_FIFO_OFFSET);
1256 /* set RX trigger level to 1 */
1257 xuartps_writel(1, XUARTPS_RXWM_OFFSET);
1258 /* disable RX timeout interrups */
1259 xuartps_writel(XUARTPS_IXR_TOUT, XUARTPS_IDR_OFFSET);
1260 spin_unlock_irqrestore(&port->lock, flags);
1261 }
1262
1263 return 0;
1264}
1265
1266/**
1267 * xuartps_resume - Resume after a previous suspend
1268 * @device: Pointer to the device structure
1269 *
1270 * Returns 0
1271 */
1272static int xuartps_resume(struct device *device)
1273{
1274 struct uart_port *port = dev_get_drvdata(device);
1275 unsigned long flags = 0;
1276 u32 ctrl_reg;
1277 struct tty_struct *tty;
1278 struct device *tty_dev;
1279 int may_wake = 0;
1280
1281 /* Get the tty which could be NULL so don't assume it's valid */
1282 tty = tty_port_tty_get(&port->state->port);
1283 if (tty) {
1284 tty_dev = tty->dev;
1285 may_wake = device_may_wakeup(tty_dev);
1286 tty_kref_put(tty);
1287 }
1288
1289 if (console_suspend_enabled && !may_wake) {
1290 struct xuartps *xuartps = port->private_data;
1291
1292 clk_enable(xuartps->aperclk);
1293 clk_enable(xuartps->refclk);
1294
1295 spin_lock_irqsave(&port->lock, flags);
1296
1297 /* Set TX/RX Reset */
1298 xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
1299 (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
1300 XUARTPS_CR_OFFSET);
1301 while (xuartps_readl(XUARTPS_CR_OFFSET) &
1302 (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
1303 cpu_relax();
1304
1305 /* restore rx timeout value */
1306 xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
1307 /* Enable Tx/Rx */
1308 ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
1309 xuartps_writel(
1310 (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) |
1311 (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
1312 XUARTPS_CR_OFFSET);
1313
1314 spin_unlock_irqrestore(&port->lock, flags);
1315 } else {
1316 spin_lock_irqsave(&port->lock, flags);
1317 /* restore original rx trigger level */
1318 xuartps_writel(rx_trigger_level, XUARTPS_RXWM_OFFSET);
1319 /* enable RX timeout interrupt */
1320 xuartps_writel(XUARTPS_IXR_TOUT, XUARTPS_IER_OFFSET);
1321 spin_unlock_irqrestore(&port->lock, flags);
1322 }
1323
1324 return uart_resume_port(&xuartps_uart_driver, port);
1325}
1326#endif /* ! CONFIG_PM_SLEEP */
1327
1328static SIMPLE_DEV_PM_OPS(xuartps_dev_pm_ops, xuartps_suspend, xuartps_resume);
1329
936/* --------------------------------------------------------------------- 1330/* ---------------------------------------------------------------------
937 * Platform bus binding 1331 * Platform bus binding
938 */ 1332 */
@@ -949,27 +1343,26 @@ static int xuartps_probe(struct platform_device *pdev)
949 struct resource *res, *res2; 1343 struct resource *res, *res2;
950 struct xuartps *xuartps_data; 1344 struct xuartps *xuartps_data;
951 1345
952 xuartps_data = kzalloc(sizeof(*xuartps_data), GFP_KERNEL); 1346 xuartps_data = devm_kzalloc(&pdev->dev, sizeof(*xuartps_data),
1347 GFP_KERNEL);
953 if (!xuartps_data) 1348 if (!xuartps_data)
954 return -ENOMEM; 1349 return -ENOMEM;
955 1350
956 xuartps_data->aperclk = clk_get(&pdev->dev, "aper_clk"); 1351 xuartps_data->aperclk = devm_clk_get(&pdev->dev, "aper_clk");
957 if (IS_ERR(xuartps_data->aperclk)) { 1352 if (IS_ERR(xuartps_data->aperclk)) {
958 dev_err(&pdev->dev, "aper_clk clock not found.\n"); 1353 dev_err(&pdev->dev, "aper_clk clock not found.\n");
959 rc = PTR_ERR(xuartps_data->aperclk); 1354 return PTR_ERR(xuartps_data->aperclk);
960 goto err_out_free;
961 } 1355 }
962 xuartps_data->refclk = clk_get(&pdev->dev, "ref_clk"); 1356 xuartps_data->refclk = devm_clk_get(&pdev->dev, "ref_clk");
963 if (IS_ERR(xuartps_data->refclk)) { 1357 if (IS_ERR(xuartps_data->refclk)) {
964 dev_err(&pdev->dev, "ref_clk clock not found.\n"); 1358 dev_err(&pdev->dev, "ref_clk clock not found.\n");
965 rc = PTR_ERR(xuartps_data->refclk); 1359 return PTR_ERR(xuartps_data->refclk);
966 goto err_out_clk_put_aper;
967 } 1360 }
968 1361
969 rc = clk_prepare_enable(xuartps_data->aperclk); 1362 rc = clk_prepare_enable(xuartps_data->aperclk);
970 if (rc) { 1363 if (rc) {
971 dev_err(&pdev->dev, "Unable to enable APER clock.\n"); 1364 dev_err(&pdev->dev, "Unable to enable APER clock.\n");
972 goto err_out_clk_put; 1365 return rc;
973 } 1366 }
974 rc = clk_prepare_enable(xuartps_data->refclk); 1367 rc = clk_prepare_enable(xuartps_data->refclk);
975 if (rc) { 1368 if (rc) {
@@ -989,13 +1382,21 @@ static int xuartps_probe(struct platform_device *pdev)
989 goto err_out_clk_disable; 1382 goto err_out_clk_disable;
990 } 1383 }
991 1384
1385#ifdef CONFIG_COMMON_CLK
1386 xuartps_data->clk_rate_change_nb.notifier_call =
1387 xuartps_clk_notifier_cb;
1388 if (clk_notifier_register(xuartps_data->refclk,
1389 &xuartps_data->clk_rate_change_nb))
1390 dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
1391#endif
1392
992 /* Initialize the port structure */ 1393 /* Initialize the port structure */
993 port = xuartps_get_port(); 1394 port = xuartps_get_port();
994 1395
995 if (!port) { 1396 if (!port) {
996 dev_err(&pdev->dev, "Cannot get uart_port structure\n"); 1397 dev_err(&pdev->dev, "Cannot get uart_port structure\n");
997 rc = -ENODEV; 1398 rc = -ENODEV;
998 goto err_out_clk_disable; 1399 goto err_out_notif_unreg;
999 } else { 1400 } else {
1000 /* Register the port. 1401 /* Register the port.
1001 * This function also registers this device with the tty layer 1402 * This function also registers this device with the tty layer
@@ -1006,26 +1407,26 @@ static int xuartps_probe(struct platform_device *pdev)
1006 port->dev = &pdev->dev; 1407 port->dev = &pdev->dev;
1007 port->uartclk = clk_get_rate(xuartps_data->refclk); 1408 port->uartclk = clk_get_rate(xuartps_data->refclk);
1008 port->private_data = xuartps_data; 1409 port->private_data = xuartps_data;
1410 xuartps_data->port = port;
1009 platform_set_drvdata(pdev, port); 1411 platform_set_drvdata(pdev, port);
1010 rc = uart_add_one_port(&xuartps_uart_driver, port); 1412 rc = uart_add_one_port(&xuartps_uart_driver, port);
1011 if (rc) { 1413 if (rc) {
1012 dev_err(&pdev->dev, 1414 dev_err(&pdev->dev,
1013 "uart_add_one_port() failed; err=%i\n", rc); 1415 "uart_add_one_port() failed; err=%i\n", rc);
1014 goto err_out_clk_disable; 1416 goto err_out_notif_unreg;
1015 } 1417 }
1016 return 0; 1418 return 0;
1017 } 1419 }
1018 1420
1421err_out_notif_unreg:
1422#ifdef CONFIG_COMMON_CLK
1423 clk_notifier_unregister(xuartps_data->refclk,
1424 &xuartps_data->clk_rate_change_nb);
1425#endif
1019err_out_clk_disable: 1426err_out_clk_disable:
1020 clk_disable_unprepare(xuartps_data->refclk); 1427 clk_disable_unprepare(xuartps_data->refclk);
1021err_out_clk_dis_aper: 1428err_out_clk_dis_aper:
1022 clk_disable_unprepare(xuartps_data->aperclk); 1429 clk_disable_unprepare(xuartps_data->aperclk);
1023err_out_clk_put:
1024 clk_put(xuartps_data->refclk);
1025err_out_clk_put_aper:
1026 clk_put(xuartps_data->aperclk);
1027err_out_free:
1028 kfree(xuartps_data);
1029 1430
1030 return rc; 1431 return rc;
1031} 1432}
@@ -1043,13 +1444,14 @@ static int xuartps_remove(struct platform_device *pdev)
1043 int rc; 1444 int rc;
1044 1445
1045 /* Remove the xuartps port from the serial core */ 1446 /* Remove the xuartps port from the serial core */
1447#ifdef CONFIG_COMMON_CLK
1448 clk_notifier_unregister(xuartps_data->refclk,
1449 &xuartps_data->clk_rate_change_nb);
1450#endif
1046 rc = uart_remove_one_port(&xuartps_uart_driver, port); 1451 rc = uart_remove_one_port(&xuartps_uart_driver, port);
1047 port->mapbase = 0; 1452 port->mapbase = 0;
1048 clk_disable_unprepare(xuartps_data->refclk); 1453 clk_disable_unprepare(xuartps_data->refclk);
1049 clk_disable_unprepare(xuartps_data->aperclk); 1454 clk_disable_unprepare(xuartps_data->aperclk);
1050 clk_put(xuartps_data->refclk);
1051 clk_put(xuartps_data->aperclk);
1052 kfree(xuartps_data);
1053 return rc; 1455 return rc;
1054} 1456}
1055 1457
@@ -1067,6 +1469,7 @@ static struct platform_driver xuartps_platform_driver = {
1067 .owner = THIS_MODULE, 1469 .owner = THIS_MODULE,
1068 .name = XUARTPS_NAME, /* Driver name */ 1470 .name = XUARTPS_NAME, /* Driver name */
1069 .of_match_table = xuartps_of_match, 1471 .of_match_table = xuartps_of_match,
1472 .pm = &xuartps_dev_pm_ops,
1070 }, 1473 },
1071}; 1474};
1072 1475
diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c
index 40a9fe9d3b10..ce396ecdf412 100644
--- a/drivers/tty/sysrq.c
+++ b/drivers/tty/sysrq.c
@@ -51,7 +51,7 @@
51#include <asm/irq_regs.h> 51#include <asm/irq_regs.h>
52 52
53/* Whether we react on sysrq keys or just ignore them */ 53/* Whether we react on sysrq keys or just ignore them */
54static int __read_mostly sysrq_enabled = SYSRQ_DEFAULT_ENABLE; 54static int __read_mostly sysrq_enabled = CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE;
55static bool __read_mostly sysrq_always_enabled; 55static bool __read_mostly sysrq_always_enabled;
56 56
57unsigned short platform_sysrq_reset_seq[] __weak = { KEY_RESERVED }; 57unsigned short platform_sysrq_reset_seq[] __weak = { KEY_RESERVED };
diff --git a/drivers/tty/tty_port.c b/drivers/tty/tty_port.c
index f597e88a705d..c94d2349dd06 100644
--- a/drivers/tty/tty_port.c
+++ b/drivers/tty/tty_port.c
@@ -140,6 +140,10 @@ EXPORT_SYMBOL(tty_port_destroy);
140static void tty_port_destructor(struct kref *kref) 140static void tty_port_destructor(struct kref *kref)
141{ 141{
142 struct tty_port *port = container_of(kref, struct tty_port, kref); 142 struct tty_port *port = container_of(kref, struct tty_port, kref);
143
144 /* check if last port ref was dropped before tty release */
145 if (WARN_ON(port->itty))
146 return;
143 if (port->xmit_buf) 147 if (port->xmit_buf)
144 free_page((unsigned long)port->xmit_buf); 148 free_page((unsigned long)port->xmit_buf);
145 tty_port_destroy(port); 149 tty_port_destroy(port);
@@ -480,8 +484,6 @@ int tty_port_close_start(struct tty_port *port,
480 484
481 if (port->count) { 485 if (port->count) {
482 spin_unlock_irqrestore(&port->lock, flags); 486 spin_unlock_irqrestore(&port->lock, flags);
483 if (port->ops->drop)
484 port->ops->drop(port);
485 return 0; 487 return 0;
486 } 488 }
487 set_bit(ASYNCB_CLOSING, &port->flags); 489 set_bit(ASYNCB_CLOSING, &port->flags);
@@ -500,9 +502,7 @@ int tty_port_close_start(struct tty_port *port,
500 /* Flush the ldisc buffering */ 502 /* Flush the ldisc buffering */
501 tty_ldisc_flush(tty); 503 tty_ldisc_flush(tty);
502 504
503 /* Don't call port->drop for the last reference. Callers will want 505 /* Report to caller this is the last port reference */
504 to drop the last active reference in ->shutdown() or the tty
505 shutdown path */
506 return 1; 506 return 1;
507} 507}
508EXPORT_SYMBOL(tty_port_close_start); 508EXPORT_SYMBOL(tty_port_close_start);
diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c
index 9a8e8c5a0c73..61b1137d7e56 100644
--- a/drivers/tty/vt/vt.c
+++ b/drivers/tty/vt/vt.c
@@ -1300,21 +1300,30 @@ static void csi_m(struct vc_data *vc)
1300 case 27: 1300 case 27:
1301 vc->vc_reverse = 0; 1301 vc->vc_reverse = 0;
1302 break; 1302 break;
1303 case 38: /* ANSI X3.64-1979 (SCO-ish?) 1303 case 38:
1304 * Enables underscore, white foreground 1304 case 48: /* ITU T.416
1305 * with white underscore (Linux - use 1305 * Higher colour modes.
1306 * default foreground). 1306 * They break the usual properties of SGR codes
1307 * and thus need to be detected and ignored by
1308 * hand. Strictly speaking, that standard also
1309 * wants : rather than ; as separators, contrary
1310 * to ECMA-48, but no one produces such codes
1311 * and almost no one accepts them.
1307 */ 1312 */
1308 vc->vc_color = (vc->vc_def_color & 0x0f) | (vc->vc_color & 0xf0); 1313 i++;
1309 vc->vc_underline = 1; 1314 if (i > vc->vc_npar)
1315 break;
1316 if (vc->vc_par[i] == 5) /* 256 colours */
1317 i++; /* ubiquitous */
1318 else if (vc->vc_par[i] == 2) /* 24 bit colours */
1319 i += 3; /* extremely rare */
1320 /* Subcommands 3 (CMY) and 4 (CMYK) are so insane
1321 * that detecting them is not worth the few extra
1322 * bytes of kernel's size.
1323 */
1310 break; 1324 break;
1311 case 39: /* ANSI X3.64-1979 (SCO-ish?) 1325 case 39:
1312 * Disable underline option.
1313 * Reset colour to default? It did this
1314 * before...
1315 */
1316 vc->vc_color = (vc->vc_def_color & 0x0f) | (vc->vc_color & 0xf0); 1326 vc->vc_color = (vc->vc_def_color & 0x0f) | (vc->vc_color & 0xf0);
1317 vc->vc_underline = 0;
1318 break; 1327 break;
1319 case 49: 1328 case 49:
1320 vc->vc_color = (vc->vc_def_color & 0xf0) | (vc->vc_color & 0x0f); 1329 vc->vc_color = (vc->vc_def_color & 0xf0) | (vc->vc_color & 0x0f);