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-rw-r--r--drivers/tty/serial/s3c2410.c31
-rw-r--r--drivers/tty/serial/s3c2412.c55
-rw-r--r--drivers/tty/serial/s3c2440.c58
-rw-r--r--drivers/tty/serial/s3c6400.c54
-rw-r--r--drivers/tty/serial/s5pv210.c60
-rw-r--r--drivers/tty/serial/samsung.h5
6 files changed, 20 insertions, 243 deletions
diff --git a/drivers/tty/serial/s3c2410.c b/drivers/tty/serial/s3c2410.c
index b1d7e7c1849d..e668a9d2bbc9 100644
--- a/drivers/tty/serial/s3c2410.c
+++ b/drivers/tty/serial/s3c2410.c
@@ -25,31 +25,6 @@
25 25
26#include "samsung.h" 26#include "samsung.h"
27 27
28static int s3c2410_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 if (strcmp(clk->name, "uclk") == 0)
34 ucon |= S3C2410_UCON_UCLK;
35 else
36 ucon &= ~S3C2410_UCON_UCLK;
37
38 wr_regl(port, S3C2410_UCON, ucon);
39 return 0;
40}
41
42static int s3c2410_serial_getsource(struct uart_port *port,
43 struct s3c24xx_uart_clksrc *clk)
44{
45 unsigned long ucon = rd_regl(port, S3C2410_UCON);
46
47 clk->divisor = 1;
48 clk->name = (ucon & S3C2410_UCON_UCLK) ? "uclk" : "pclk";
49
50 return 0;
51}
52
53static int s3c2410_serial_resetport(struct uart_port *port, 28static int s3c2410_serial_resetport(struct uart_port *port,
54 struct s3c2410_uartcfg *cfg) 29 struct s3c2410_uartcfg *cfg)
55{ 30{
@@ -77,8 +52,10 @@ static struct s3c24xx_uart_info s3c2410_uart_inf = {
77 .tx_fifofull = S3C2410_UFSTAT_TXFULL, 52 .tx_fifofull = S3C2410_UFSTAT_TXFULL,
78 .tx_fifomask = S3C2410_UFSTAT_TXMASK, 53 .tx_fifomask = S3C2410_UFSTAT_TXMASK,
79 .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT, 54 .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT,
80 .get_clksrc = s3c2410_serial_getsource, 55 .def_clk_sel = S3C2410_UCON_CLKSEL0,
81 .set_clksrc = s3c2410_serial_setsource, 56 .num_clks = 2,
57 .clksel_mask = S3C2410_UCON_CLKMASK,
58 .clksel_shift = S3C2410_UCON_CLKSHIFT,
82 .reset_port = s3c2410_serial_resetport, 59 .reset_port = s3c2410_serial_resetport,
83}; 60};
84 61
diff --git a/drivers/tty/serial/s3c2412.c b/drivers/tty/serial/s3c2412.c
index 2234bf9ced45..5b85c1953c51 100644
--- a/drivers/tty/serial/s3c2412.c
+++ b/drivers/tty/serial/s3c2412.c
@@ -25,55 +25,6 @@
25 25
26#include "samsung.h" 26#include "samsung.h"
27 27
28static int s3c2412_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 ucon &= ~S3C2412_UCON_CLKMASK;
34
35 if (strcmp(clk->name, "uclk") == 0)
36 ucon |= S3C2440_UCON_UCLK;
37 else if (strcmp(clk->name, "pclk") == 0)
38 ucon |= S3C2440_UCON_PCLK;
39 else if (strcmp(clk->name, "usysclk") == 0)
40 ucon |= S3C2412_UCON_USYSCLK;
41 else {
42 printk(KERN_ERR "unknown clock source %s\n", clk->name);
43 return -EINVAL;
44 }
45
46 wr_regl(port, S3C2410_UCON, ucon);
47 return 0;
48}
49
50
51static int s3c2412_serial_getsource(struct uart_port *port,
52 struct s3c24xx_uart_clksrc *clk)
53{
54 unsigned long ucon = rd_regl(port, S3C2410_UCON);
55
56 switch (ucon & S3C2412_UCON_CLKMASK) {
57 case S3C2412_UCON_UCLK:
58 clk->divisor = 1;
59 clk->name = "uclk";
60 break;
61
62 case S3C2412_UCON_PCLK:
63 case S3C2412_UCON_PCLK2:
64 clk->divisor = 1;
65 clk->name = "pclk";
66 break;
67
68 case S3C2412_UCON_USYSCLK:
69 clk->divisor = 1;
70 clk->name = "usysclk";
71 break;
72 }
73
74 return 0;
75}
76
77static int s3c2412_serial_resetport(struct uart_port *port, 28static int s3c2412_serial_resetport(struct uart_port *port,
78 struct s3c2410_uartcfg *cfg) 29 struct s3c2410_uartcfg *cfg)
79{ 30{
@@ -108,8 +59,10 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = {
108 .tx_fifofull = S3C2440_UFSTAT_TXFULL, 59 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
109 .tx_fifomask = S3C2440_UFSTAT_TXMASK, 60 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
110 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, 61 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
111 .get_clksrc = s3c2412_serial_getsource, 62 .def_clk_sel = S3C2410_UCON_CLKSEL2,
112 .set_clksrc = s3c2412_serial_setsource, 63 .num_clks = 4,
64 .clksel_mask = S3C2412_UCON_CLKMASK,
65 .clksel_shift = S3C2412_UCON_CLKSHIFT,
113 .reset_port = s3c2412_serial_resetport, 66 .reset_port = s3c2412_serial_resetport,
114}; 67};
115 68
diff --git a/drivers/tty/serial/s3c2440.c b/drivers/tty/serial/s3c2440.c
index 4498828630f1..39930f819fa2 100644
--- a/drivers/tty/serial/s3c2440.c
+++ b/drivers/tty/serial/s3c2440.c
@@ -25,58 +25,6 @@
25 25
26#include "samsung.h" 26#include "samsung.h"
27 27
28
29static int s3c2440_serial_setsource(struct uart_port *port,
30 struct s3c24xx_uart_clksrc *clk)
31{
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 /* todo - proper fclk<>nonfclk switch. */
35
36 ucon &= ~S3C2440_UCON_CLKMASK;
37
38 if (strcmp(clk->name, "uclk") == 0)
39 ucon |= S3C2440_UCON_UCLK;
40 else if (strcmp(clk->name, "pclk") == 0)
41 ucon |= S3C2440_UCON_PCLK;
42 else if (strcmp(clk->name, "fclk_n") == 0)
43 ucon |= S3C2440_UCON_FCLK;
44 else {
45 printk(KERN_ERR "unknown clock source %s\n", clk->name);
46 return -EINVAL;
47 }
48
49 wr_regl(port, S3C2410_UCON, ucon);
50 return 0;
51}
52
53
54static int s3c2440_serial_getsource(struct uart_port *port,
55 struct s3c24xx_uart_clksrc *clk)
56{
57 unsigned long ucon = rd_regl(port, S3C2410_UCON);
58
59 switch (ucon & S3C2440_UCON_CLKMASK) {
60 case S3C2440_UCON_UCLK:
61 clk->divisor = 1;
62 clk->name = "uclk";
63 break;
64
65 case S3C2440_UCON_PCLK:
66 case S3C2440_UCON_PCLK2:
67 clk->divisor = 1;
68 clk->name = "pclk";
69 break;
70
71 case S3C2440_UCON_FCLK:
72 clk->divisor = 1;
73 clk->name = "fclk_n";
74 break;
75 }
76
77 return 0;
78}
79
80static int s3c2440_serial_resetport(struct uart_port *port, 28static int s3c2440_serial_resetport(struct uart_port *port,
81 struct s3c2410_uartcfg *cfg) 29 struct s3c2410_uartcfg *cfg)
82{ 30{
@@ -110,8 +58,10 @@ static struct s3c24xx_uart_info s3c2440_uart_inf = {
110 .tx_fifofull = S3C2440_UFSTAT_TXFULL, 58 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
111 .tx_fifomask = S3C2440_UFSTAT_TXMASK, 59 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
112 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, 60 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
113 .get_clksrc = s3c2440_serial_getsource, 61 .def_clk_sel = S3C2410_UCON_CLKSEL2,
114 .set_clksrc = s3c2440_serial_setsource, 62 .num_clks = 4,
63 .clksel_mask = S3C2440_UCON_CLKMASK,
64 .clksel_shift = S3C2440_UCON_CLKSHIFT,
115 .reset_port = s3c2440_serial_resetport, 65 .reset_port = s3c2440_serial_resetport,
116}; 66};
117 67
diff --git a/drivers/tty/serial/s3c6400.c b/drivers/tty/serial/s3c6400.c
index e2f6913d84d5..c5a6d4645089 100644
--- a/drivers/tty/serial/s3c6400.c
+++ b/drivers/tty/serial/s3c6400.c
@@ -26,54 +26,6 @@
26 26
27#include "samsung.h" 27#include "samsung.h"
28 28
29static int s3c6400_serial_setsource(struct uart_port *port,
30 struct s3c24xx_uart_clksrc *clk)
31{
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 if (strcmp(clk->name, "uclk0") == 0) {
35 ucon &= ~S3C6400_UCON_CLKMASK;
36 ucon |= S3C6400_UCON_UCLK0;
37 } else if (strcmp(clk->name, "uclk1") == 0)
38 ucon |= S3C6400_UCON_UCLK1;
39 else if (strcmp(clk->name, "pclk") == 0) {
40 /* See notes about transitioning from UCLK to PCLK */
41 ucon &= ~S3C6400_UCON_UCLK0;
42 } else {
43 printk(KERN_ERR "unknown clock source %s\n", clk->name);
44 return -EINVAL;
45 }
46
47 wr_regl(port, S3C2410_UCON, ucon);
48 return 0;
49}
50
51
52static int s3c6400_serial_getsource(struct uart_port *port,
53 struct s3c24xx_uart_clksrc *clk)
54{
55 u32 ucon = rd_regl(port, S3C2410_UCON);
56
57 clk->divisor = 1;
58
59 switch (ucon & S3C6400_UCON_CLKMASK) {
60 case S3C6400_UCON_UCLK0:
61 clk->name = "uclk0";
62 break;
63
64 case S3C6400_UCON_UCLK1:
65 clk->name = "uclk1";
66 break;
67
68 case S3C6400_UCON_PCLK:
69 case S3C6400_UCON_PCLK2:
70 clk->name = "pclk";
71 break;
72 }
73
74 return 0;
75}
76
77static int s3c6400_serial_resetport(struct uart_port *port, 29static int s3c6400_serial_resetport(struct uart_port *port,
78 struct s3c2410_uartcfg *cfg) 30 struct s3c2410_uartcfg *cfg)
79{ 31{
@@ -108,8 +60,10 @@ static struct s3c24xx_uart_info s3c6400_uart_inf = {
108 .tx_fifofull = S3C2440_UFSTAT_TXFULL, 60 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
109 .tx_fifomask = S3C2440_UFSTAT_TXMASK, 61 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
110 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, 62 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
111 .get_clksrc = s3c6400_serial_getsource, 63 .def_clk_sel = S3C2410_UCON_CLKSEL2,
112 .set_clksrc = s3c6400_serial_setsource, 64 .num_clks = 4,
65 .clksel_mask = S3C6400_UCON_CLKMASK,
66 .clksel_shift = S3C6400_UCON_CLKSHIFT,
113 .reset_port = s3c6400_serial_resetport, 67 .reset_port = s3c6400_serial_resetport,
114}; 68};
115 69
diff --git a/drivers/tty/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c
index 03b249e35bf1..173df5afb0fa 100644
--- a/drivers/tty/serial/s5pv210.c
+++ b/drivers/tty/serial/s5pv210.c
@@ -25,60 +25,6 @@
25#include <plat/regs-serial.h> 25#include <plat/regs-serial.h>
26#include "samsung.h" 26#include "samsung.h"
27 27
28static int s5pv210_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 struct s3c24xx_uart_port *ourport;
32 struct s3c2410_uartcfg *cfg;
33 unsigned long ucon = rd_regl(port, S3C2410_UCON);
34
35 ourport = container_of(port, struct s3c24xx_uart_port, port);
36 cfg = ourport->cfg;
37
38 if (cfg->flags & NO_NEED_CHECK_CLKSRC)
39 return 0;
40
41 if (strcmp(clk->name, "pclk") == 0)
42 ucon &= ~S5PV210_UCON_CLKMASK;
43 else if (strcmp(clk->name, "uclk1") == 0)
44 ucon |= S5PV210_UCON_CLKMASK;
45 else {
46 printk(KERN_ERR "unknown clock source %s\n", clk->name);
47 return -EINVAL;
48 }
49
50 wr_regl(port, S3C2410_UCON, ucon);
51 return 0;
52}
53
54
55static int s5pv210_serial_getsource(struct uart_port *port,
56 struct s3c24xx_uart_clksrc *clk)
57{
58 struct s3c24xx_uart_port *ourport;
59 struct s3c2410_uartcfg *cfg;
60 u32 ucon = rd_regl(port, S3C2410_UCON);
61
62 ourport = container_of(port, struct s3c24xx_uart_port, port);
63 cfg = ourport->cfg;
64
65 clk->divisor = 1;
66
67 if (cfg->flags & NO_NEED_CHECK_CLKSRC)
68 return 0;
69
70 switch (ucon & S5PV210_UCON_CLKMASK) {
71 case S5PV210_UCON_PCLK:
72 clk->name = "pclk";
73 break;
74 case S5PV210_UCON_UCLK:
75 clk->name = "uclk1";
76 break;
77 }
78
79 return 0;
80}
81
82static int s5pv210_serial_resetport(struct uart_port *port, 28static int s5pv210_serial_resetport(struct uart_port *port,
83 struct s3c2410_uartcfg *cfg) 29 struct s3c2410_uartcfg *cfg)
84{ 30{
@@ -109,8 +55,10 @@ static int s5pv210_serial_resetport(struct uart_port *port,
109 .tx_fifofull = S5PV210_UFSTAT_TXFULL, \ 55 .tx_fifofull = S5PV210_UFSTAT_TXFULL, \
110 .tx_fifomask = S5PV210_UFSTAT_TXMASK, \ 56 .tx_fifomask = S5PV210_UFSTAT_TXMASK, \
111 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \ 57 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \
112 .get_clksrc = s5pv210_serial_getsource, \ 58 .def_clk_sel = S3C2410_UCON_CLKSEL0, \
113 .set_clksrc = s5pv210_serial_setsource, \ 59 .num_clks = 2, \
60 .clksel_mask = S5PV210_UCON_CLKMASK, \
61 .clksel_shift = S5PV210_UCON_CLKSHIFT, \
114 .reset_port = s5pv210_serial_resetport 62 .reset_port = s5pv210_serial_resetport
115 63
116static struct s3c24xx_uart_info s5p_port_fifo256 = { 64static struct s3c24xx_uart_info s5p_port_fifo256 = {
diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
index 40e9ef19bd12..c9cab2c5ae0d 100644
--- a/drivers/tty/serial/samsung.h
+++ b/drivers/tty/serial/samsung.h
@@ -28,11 +28,6 @@ struct s3c24xx_uart_info {
28 28
29 unsigned int has_divslot:1; 29 unsigned int has_divslot:1;
30 30
31 /* clock source control */
32
33 int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk);
34 int (*set_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk);
35
36 /* uart controls */ 31 /* uart controls */
37 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); 32 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *);
38}; 33};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-06 11:45:47 -0500