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-rw-r--r--drivers/tty/serial/pch_uart.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index a5ce9a5c018d..a9ad7f33526d 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -21,6 +21,7 @@
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/dmi.h>
24 25
25#include <linux/dmaengine.h> 26#include <linux/dmaengine.h>
26#include <linux/pch_dma.h> 27#include <linux/pch_dma.h>
@@ -1404,14 +1405,18 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1404 if (!rxbuf) 1405 if (!rxbuf)
1405 goto init_port_free_txbuf; 1406 goto init_port_free_txbuf;
1406 1407
1408 base_baud = 1843200; /* 1.8432MHz */
1409
1410 /* quirk for CM-iTC board */
1411 if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
1412 base_baud = 192000000; /* 192.0MHz */
1413
1407 switch (port_type) { 1414 switch (port_type) {
1408 case PORT_UNKNOWN: 1415 case PORT_UNKNOWN:
1409 fifosize = 256; /* EG20T/ML7213: UART0 */ 1416 fifosize = 256; /* EG20T/ML7213: UART0 */
1410 base_baud = 1843200; /* 1.8432MHz */
1411 break; 1417 break;
1412 case PORT_8250: 1418 case PORT_8250:
1413 fifosize = 64; /* EG20T:UART1~3 ML7213: UART1~2*/ 1419 fifosize = 64; /* EG20T:UART1~3 ML7213: UART1~2*/
1414 base_baud = 1843200; /* 1.8432MHz */
1415 break; 1420 break;
1416 default: 1421 default:
1417 dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type); 1422 dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type);