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path: root/drivers/tty/serial/samsung.c
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Diffstat (limited to 'drivers/tty/serial/samsung.c')
-rw-r--r--drivers/tty/serial/samsung.c360
1 files changed, 244 insertions, 116 deletions
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 78aea1a49ad8..c89987b64c15 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -206,7 +206,7 @@ static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport,
206 struct s3c24xx_uart_info *info = ourport->info; 206 struct s3c24xx_uart_info *info = ourport->info;
207 207
208 if (ufstat & info->rx_fifofull) 208 if (ufstat & info->rx_fifofull)
209 return info->fifosize; 209 return ourport->port.fifosize;
210 210
211 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; 211 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift;
212} 212}
@@ -1079,11 +1079,10 @@ static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *p
1079 */ 1079 */
1080 1080
1081static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, 1081static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1082 struct s3c24xx_uart_info *info,
1083 struct platform_device *platdev) 1082 struct platform_device *platdev)
1084{ 1083{
1085 struct uart_port *port = &ourport->port; 1084 struct uart_port *port = &ourport->port;
1086 struct s3c2410_uartcfg *cfg = platdev->dev.platform_data; 1085 struct s3c2410_uartcfg *cfg = ourport->cfg;
1087 struct resource *res; 1086 struct resource *res;
1088 int ret; 1087 int ret;
1089 1088
@@ -1095,32 +1094,13 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1095 if (port->mapbase != 0) 1094 if (port->mapbase != 0)
1096 return 0; 1095 return 0;
1097 1096
1098 /*
1099 * If platform data is supplied, keep a copy of the location of
1100 * platform data in the driver's private data.
1101 */
1102 if (cfg)
1103 ourport->cfg = cfg;
1104
1105 if (cfg->hwport > CONFIG_SERIAL_SAMSUNG_UARTS) {
1106 printk(KERN_ERR "%s: port %d bigger than %d\n", __func__,
1107 cfg->hwport, CONFIG_SERIAL_SAMSUNG_UARTS);
1108 return -ERANGE;
1109 }
1110
1111 /* setup info for port */ 1097 /* setup info for port */
1112 port->dev = &platdev->dev; 1098 port->dev = &platdev->dev;
1113 ourport->info = info;
1114 1099
1115 /* Startup sequence is different for s3c64xx and higher SoC's */ 1100 /* Startup sequence is different for s3c64xx and higher SoC's */
1116 if (s3c24xx_serial_has_interrupt_mask(port)) 1101 if (s3c24xx_serial_has_interrupt_mask(port))
1117 s3c24xx_serial_ops.startup = s3c64xx_serial_startup; 1102 s3c24xx_serial_ops.startup = s3c64xx_serial_startup;
1118 1103
1119 /* copy the info in from provided structure */
1120 ourport->port.fifosize = info->fifosize;
1121
1122 dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport);
1123
1124 port->uartclk = 1; 1104 port->uartclk = 1;
1125 1105
1126 if (cfg->uart_flags & UPF_CONS_FLOW) { 1106 if (cfg->uart_flags & UPF_CONS_FLOW) {
@@ -1187,34 +1167,46 @@ static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL);
1187 1167
1188static int probe_index; 1168static int probe_index;
1189 1169
1190int s3c24xx_serial_probe(struct platform_device *dev, 1170static int s3c24xx_serial_probe(struct platform_device *pdev)
1191 struct s3c24xx_uart_info *info)
1192{ 1171{
1193 struct s3c24xx_uart_port *ourport; 1172 struct s3c24xx_uart_port *ourport;
1194 int ret; 1173 int ret;
1195 1174
1196 dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index); 1175 dbg("s3c24xx_serial_probe(%p) %d\n", pdev, probe_index);
1197 1176
1198 ourport = &s3c24xx_serial_ports[probe_index]; 1177 ourport = &s3c24xx_serial_ports[probe_index];
1178
1179 ourport->drv_data = (struct s3c24xx_serial_drv_data *)
1180 platform_get_device_id(pdev)->driver_data;
1181
1182 ourport->info = ourport->drv_data->info;
1183 ourport->cfg = (pdev->dev.platform_data) ?
1184 (struct s3c2410_uartcfg *)pdev->dev.platform_data :
1185 ourport->drv_data->def_cfg;
1186
1187 ourport->port.fifosize = (ourport->info->fifosize) ?
1188 ourport->info->fifosize :
1189 ourport->drv_data->fifosize[probe_index];
1190
1199 probe_index++; 1191 probe_index++;
1200 1192
1201 dbg("%s: initialising port %p...\n", __func__, ourport); 1193 dbg("%s: initialising port %p...\n", __func__, ourport);
1202 1194
1203 ret = s3c24xx_serial_init_port(ourport, info, dev); 1195 ret = s3c24xx_serial_init_port(ourport, pdev);
1204 if (ret < 0) 1196 if (ret < 0)
1205 goto probe_err; 1197 goto probe_err;
1206 1198
1207 dbg("%s: adding port\n", __func__); 1199 dbg("%s: adding port\n", __func__);
1208 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); 1200 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
1209 platform_set_drvdata(dev, &ourport->port); 1201 platform_set_drvdata(pdev, &ourport->port);
1210 1202
1211 ret = device_create_file(&dev->dev, &dev_attr_clock_source); 1203 ret = device_create_file(&pdev->dev, &dev_attr_clock_source);
1212 if (ret < 0) 1204 if (ret < 0)
1213 printk(KERN_ERR "%s: failed to add clksrc attr.\n", __func__); 1205 dev_err(&pdev->dev, "failed to add clock source attr.\n");
1214 1206
1215 ret = s3c24xx_serial_cpufreq_register(ourport); 1207 ret = s3c24xx_serial_cpufreq_register(ourport);
1216 if (ret < 0) 1208 if (ret < 0)
1217 dev_err(&dev->dev, "failed to add cpufreq notifier\n"); 1209 dev_err(&pdev->dev, "failed to add cpufreq notifier\n");
1218 1210
1219 return 0; 1211 return 0;
1220 1212
@@ -1222,9 +1214,7 @@ int s3c24xx_serial_probe(struct platform_device *dev,
1222 return ret; 1214 return ret;
1223} 1215}
1224 1216
1225EXPORT_SYMBOL_GPL(s3c24xx_serial_probe); 1217static int __devexit s3c24xx_serial_remove(struct platform_device *dev)
1226
1227int __devexit s3c24xx_serial_remove(struct platform_device *dev)
1228{ 1218{
1229 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); 1219 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
1230 1220
@@ -1237,8 +1227,6 @@ int __devexit s3c24xx_serial_remove(struct platform_device *dev)
1237 return 0; 1227 return 0;
1238} 1228}
1239 1229
1240EXPORT_SYMBOL_GPL(s3c24xx_serial_remove);
1241
1242/* UART power management code */ 1230/* UART power management code */
1243#ifdef CONFIG_PM_SLEEP 1231#ifdef CONFIG_PM_SLEEP
1244static int s3c24xx_serial_suspend(struct device *dev) 1232static int s3c24xx_serial_suspend(struct device *dev)
@@ -1278,41 +1266,6 @@ static const struct dev_pm_ops s3c24xx_serial_pm_ops = {
1278#define SERIAL_SAMSUNG_PM_OPS NULL 1266#define SERIAL_SAMSUNG_PM_OPS NULL
1279#endif /* CONFIG_PM_SLEEP */ 1267#endif /* CONFIG_PM_SLEEP */
1280 1268
1281int s3c24xx_serial_init(struct platform_driver *drv,
1282 struct s3c24xx_uart_info *info)
1283{
1284 dbg("s3c24xx_serial_init(%p,%p)\n", drv, info);
1285
1286 drv->driver.pm = SERIAL_SAMSUNG_PM_OPS;
1287
1288 return platform_driver_register(drv);
1289}
1290
1291EXPORT_SYMBOL_GPL(s3c24xx_serial_init);
1292
1293/* module initialisation code */
1294
1295static int __init s3c24xx_serial_modinit(void)
1296{
1297 int ret;
1298
1299 ret = uart_register_driver(&s3c24xx_uart_drv);
1300 if (ret < 0) {
1301 printk(KERN_ERR "failed to register UART driver\n");
1302 return -1;
1303 }
1304
1305 return 0;
1306}
1307
1308static void __exit s3c24xx_serial_modexit(void)
1309{
1310 uart_unregister_driver(&s3c24xx_uart_drv);
1311}
1312
1313module_init(s3c24xx_serial_modinit);
1314module_exit(s3c24xx_serial_modexit);
1315
1316/* Console code */ 1269/* Console code */
1317 1270
1318#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE 1271#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
@@ -1418,36 +1371,12 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud,
1418 else 1371 else
1419 rate = 1; 1372 rate = 1;
1420 1373
1421
1422 *baud = rate / (16 * (ubrdiv + 1)); 1374 *baud = rate / (16 * (ubrdiv + 1));
1423 dbg("calculated baud %d\n", *baud); 1375 dbg("calculated baud %d\n", *baud);
1424 } 1376 }
1425 1377
1426} 1378}
1427 1379
1428/* s3c24xx_serial_init_ports
1429 *
1430 * initialise the serial ports from the machine provided initialisation
1431 * data.
1432*/
1433
1434static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info **info)
1435{
1436 struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
1437 struct platform_device **platdev_ptr;
1438 int i;
1439
1440 dbg("s3c24xx_serial_init_ports: initialising ports...\n");
1441
1442 platdev_ptr = s3c24xx_uart_devs;
1443
1444 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) {
1445 s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr);
1446 }
1447
1448 return 0;
1449}
1450
1451static int __init 1380static int __init
1452s3c24xx_serial_console_setup(struct console *co, char *options) 1381s3c24xx_serial_console_setup(struct console *co, char *options)
1453{ 1382{
@@ -1491,11 +1420,6 @@ s3c24xx_serial_console_setup(struct console *co, char *options)
1491 return uart_set_options(port, co, baud, parity, bits, flow); 1420 return uart_set_options(port, co, baud, parity, bits, flow);
1492} 1421}
1493 1422
1494/* s3c24xx_serial_initconsole
1495 *
1496 * initialise the console from one of the uart drivers
1497*/
1498
1499static struct console s3c24xx_serial_console = { 1423static struct console s3c24xx_serial_console = {
1500 .name = S3C24XX_SERIAL_NAME, 1424 .name = S3C24XX_SERIAL_NAME,
1501 .device = uart_console_device, 1425 .device = uart_console_device,
@@ -1505,34 +1429,238 @@ static struct console s3c24xx_serial_console = {
1505 .setup = s3c24xx_serial_console_setup, 1429 .setup = s3c24xx_serial_console_setup,
1506 .data = &s3c24xx_uart_drv, 1430 .data = &s3c24xx_uart_drv,
1507}; 1431};
1432#endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */
1433
1434#ifdef CONFIG_CPU_S3C2410
1435static struct s3c24xx_serial_drv_data s3c2410_serial_drv_data = {
1436 .info = &(struct s3c24xx_uart_info) {
1437 .name = "Samsung S3C2410 UART",
1438 .type = PORT_S3C2410,
1439 .fifosize = 16,
1440 .rx_fifomask = S3C2410_UFSTAT_RXMASK,
1441 .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT,
1442 .rx_fifofull = S3C2410_UFSTAT_RXFULL,
1443 .tx_fifofull = S3C2410_UFSTAT_TXFULL,
1444 .tx_fifomask = S3C2410_UFSTAT_TXMASK,
1445 .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT,
1446 .def_clk_sel = S3C2410_UCON_CLKSEL0,
1447 .num_clks = 2,
1448 .clksel_mask = S3C2410_UCON_CLKMASK,
1449 .clksel_shift = S3C2410_UCON_CLKSHIFT,
1450 },
1451 .def_cfg = &(struct s3c2410_uartcfg) {
1452 .ucon = S3C2410_UCON_DEFAULT,
1453 .ufcon = S3C2410_UFCON_DEFAULT,
1454 },
1455};
1456#define S3C2410_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2410_serial_drv_data)
1457#else
1458#define S3C2410_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1459#endif
1508 1460
1509int s3c24xx_serial_initconsole(struct platform_driver *drv, 1461#ifdef CONFIG_CPU_S3C2412
1510 struct s3c24xx_uart_info **info) 1462static struct s3c24xx_serial_drv_data s3c2412_serial_drv_data = {
1463 .info = &(struct s3c24xx_uart_info) {
1464 .name = "Samsung S3C2412 UART",
1465 .type = PORT_S3C2412,
1466 .fifosize = 64,
1467 .has_divslot = 1,
1468 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
1469 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
1470 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
1471 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
1472 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
1473 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
1474 .def_clk_sel = S3C2410_UCON_CLKSEL2,
1475 .num_clks = 4,
1476 .clksel_mask = S3C2412_UCON_CLKMASK,
1477 .clksel_shift = S3C2412_UCON_CLKSHIFT,
1478 },
1479 .def_cfg = &(struct s3c2410_uartcfg) {
1480 .ucon = S3C2410_UCON_DEFAULT,
1481 .ufcon = S3C2410_UFCON_DEFAULT,
1482 },
1483};
1484#define S3C2412_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2412_serial_drv_data)
1485#else
1486#define S3C2412_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1487#endif
1511 1488
1512{ 1489#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2416) || \
1513 struct platform_device *dev = s3c24xx_uart_devs[0]; 1490 defined(CONFIG_CPU_S3C2443)
1491static struct s3c24xx_serial_drv_data s3c2440_serial_drv_data = {
1492 .info = &(struct s3c24xx_uart_info) {
1493 .name = "Samsung S3C2440 UART",
1494 .type = PORT_S3C2440,
1495 .fifosize = 64,
1496 .has_divslot = 1,
1497 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
1498 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
1499 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
1500 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
1501 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
1502 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
1503 .def_clk_sel = S3C2410_UCON_CLKSEL2,
1504 .num_clks = 4,
1505 .clksel_mask = S3C2412_UCON_CLKMASK,
1506 .clksel_shift = S3C2412_UCON_CLKSHIFT,
1507 },
1508 .def_cfg = &(struct s3c2410_uartcfg) {
1509 .ucon = S3C2410_UCON_DEFAULT,
1510 .ufcon = S3C2410_UFCON_DEFAULT,
1511 },
1512};
1513#define S3C2440_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2440_serial_drv_data)
1514#else
1515#define S3C2440_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1516#endif
1514 1517
1515 dbg("s3c24xx_serial_initconsole\n"); 1518#if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) || \
1519 defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) || \
1520 defined(CONFIG_CPU_S5PC100)
1521static struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = {
1522 .info = &(struct s3c24xx_uart_info) {
1523 .name = "Samsung S3C6400 UART",
1524 .type = PORT_S3C6400,
1525 .fifosize = 64,
1526 .has_divslot = 1,
1527 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
1528 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
1529 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
1530 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
1531 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
1532 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
1533 .def_clk_sel = S3C2410_UCON_CLKSEL2,
1534 .num_clks = 4,
1535 .clksel_mask = S3C6400_UCON_CLKMASK,
1536 .clksel_shift = S3C6400_UCON_CLKSHIFT,
1537 },
1538 .def_cfg = &(struct s3c2410_uartcfg) {
1539 .ucon = S3C2410_UCON_DEFAULT,
1540 .ufcon = S3C2410_UFCON_DEFAULT,
1541 },
1542};
1543#define S3C6400_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c6400_serial_drv_data)
1544#else
1545#define S3C6400_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1546#endif
1516 1547
1517 /* select driver based on the cpu */ 1548#ifdef CONFIG_CPU_S5PV210
1549static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
1550 .info = &(struct s3c24xx_uart_info) {
1551 .name = "Samsung S5PV210 UART",
1552 .type = PORT_S3C6400,
1553 .has_divslot = 1,
1554 .rx_fifomask = S5PV210_UFSTAT_RXMASK,
1555 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT,
1556 .rx_fifofull = S5PV210_UFSTAT_RXFULL,
1557 .tx_fifofull = S5PV210_UFSTAT_TXFULL,
1558 .tx_fifomask = S5PV210_UFSTAT_TXMASK,
1559 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT,
1560 .def_clk_sel = S3C2410_UCON_CLKSEL0,
1561 .num_clks = 2,
1562 .clksel_mask = S5PV210_UCON_CLKMASK,
1563 .clksel_shift = S5PV210_UCON_CLKSHIFT,
1564 },
1565 .def_cfg = &(struct s3c2410_uartcfg) {
1566 .ucon = S5PV210_UCON_DEFAULT,
1567 .ufcon = S5PV210_UFCON_DEFAULT,
1568 },
1569 .fifosize = { 256, 64, 16, 16 },
1570};
1571#define S5PV210_SERIAL_DRV_DATA ((kernel_ulong_t)&s5pv210_serial_drv_data)
1572#else
1573#define S5PV210_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1574#endif
1518 1575
1519 if (dev == NULL) { 1576#ifdef CONFIG_CPU_EXYNOS4210
1520 printk(KERN_ERR "s3c24xx: no devices for console init\n"); 1577static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {
1521 return 0; 1578 .info = &(struct s3c24xx_uart_info) {
1522 } 1579 .name = "Samsung Exynos4 UART",
1580 .type = PORT_S3C6400,
1581 .has_divslot = 1,
1582 .rx_fifomask = S5PV210_UFSTAT_RXMASK,
1583 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT,
1584 .rx_fifofull = S5PV210_UFSTAT_RXFULL,
1585 .tx_fifofull = S5PV210_UFSTAT_TXFULL,
1586 .tx_fifomask = S5PV210_UFSTAT_TXMASK,
1587 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT,
1588 .def_clk_sel = S3C2410_UCON_CLKSEL0,
1589 .num_clks = 1,
1590 .clksel_mask = 0,
1591 .clksel_shift = 0,
1592 },
1593 .def_cfg = &(struct s3c2410_uartcfg) {
1594 .ucon = S5PV210_UCON_DEFAULT,
1595 .ufcon = S5PV210_UFCON_DEFAULT,
1596 .has_fracval = 1,
1597 },
1598 .fifosize = { 256, 64, 16, 16 },
1599};
1600#define EXYNOS4210_SERIAL_DRV_DATA ((kernel_ulong_t)&exynos4210_serial_drv_data)
1601#else
1602#define EXYNOS4210_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1603#endif
1523 1604
1524 if (strcmp(dev->name, drv->driver.name) != 0) 1605static struct platform_device_id s3c24xx_serial_driver_ids[] = {
1525 return 0; 1606 {
1607 .name = "s3c2410-uart",
1608 .driver_data = S3C2410_SERIAL_DRV_DATA,
1609 }, {
1610 .name = "s3c2412-uart",
1611 .driver_data = S3C2412_SERIAL_DRV_DATA,
1612 }, {
1613 .name = "s3c2440-uart",
1614 .driver_data = S3C2440_SERIAL_DRV_DATA,
1615 }, {
1616 .name = "s3c6400-uart",
1617 .driver_data = S3C6400_SERIAL_DRV_DATA,
1618 }, {
1619 .name = "s5pv210-uart",
1620 .driver_data = S5PV210_SERIAL_DRV_DATA,
1621 }, {
1622 .name = "exynos4210-uart",
1623 .driver_data = EXYNOS4210_SERIAL_DRV_DATA,
1624 },
1625 { },
1626};
1627MODULE_DEVICE_TABLE(platform, s3c24xx_serial_driver_ids);
1628
1629static struct platform_driver samsung_serial_driver = {
1630 .probe = s3c24xx_serial_probe,
1631 .remove = __devexit_p(s3c24xx_serial_remove),
1632 .id_table = s3c24xx_serial_driver_ids,
1633 .driver = {
1634 .name = "samsung-uart",
1635 .owner = THIS_MODULE,
1636 .pm = SERIAL_SAMSUNG_PM_OPS,
1637 },
1638};
1526 1639
1527 s3c24xx_serial_console.data = &s3c24xx_uart_drv; 1640/* module initialisation code */
1528 s3c24xx_serial_init_ports(info);
1529 1641
1530 register_console(&s3c24xx_serial_console); 1642static int __init s3c24xx_serial_modinit(void)
1531 return 0; 1643{
1644 int ret;
1645
1646 ret = uart_register_driver(&s3c24xx_uart_drv);
1647 if (ret < 0) {
1648 printk(KERN_ERR "failed to register UART driver\n");
1649 return -1;
1650 }
1651
1652 return platform_driver_register(&samsung_serial_driver);
1532} 1653}
1533 1654
1534#endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */ 1655static void __exit s3c24xx_serial_modexit(void)
1656{
1657 uart_unregister_driver(&s3c24xx_uart_drv);
1658}
1659
1660module_init(s3c24xx_serial_modinit);
1661module_exit(s3c24xx_serial_modexit);
1535 1662
1663MODULE_ALIAS("platform:samsung-uart");
1536MODULE_DESCRIPTION("Samsung SoC Serial port driver"); 1664MODULE_DESCRIPTION("Samsung SoC Serial port driver");
1537MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 1665MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1538MODULE_LICENSE("GPL v2"); 1666MODULE_LICENSE("GPL v2");