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path: root/drivers/tty/serial/s3c2440.c
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Diffstat (limited to 'drivers/tty/serial/s3c2440.c')
-rw-r--r--drivers/tty/serial/s3c2440.c58
1 files changed, 4 insertions, 54 deletions
diff --git a/drivers/tty/serial/s3c2440.c b/drivers/tty/serial/s3c2440.c
index 4498828630f1..39930f819fa2 100644
--- a/drivers/tty/serial/s3c2440.c
+++ b/drivers/tty/serial/s3c2440.c
@@ -25,58 +25,6 @@
25 25
26#include "samsung.h" 26#include "samsung.h"
27 27
28
29static int s3c2440_serial_setsource(struct uart_port *port,
30 struct s3c24xx_uart_clksrc *clk)
31{
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 /* todo - proper fclk<>nonfclk switch. */
35
36 ucon &= ~S3C2440_UCON_CLKMASK;
37
38 if (strcmp(clk->name, "uclk") == 0)
39 ucon |= S3C2440_UCON_UCLK;
40 else if (strcmp(clk->name, "pclk") == 0)
41 ucon |= S3C2440_UCON_PCLK;
42 else if (strcmp(clk->name, "fclk_n") == 0)
43 ucon |= S3C2440_UCON_FCLK;
44 else {
45 printk(KERN_ERR "unknown clock source %s\n", clk->name);
46 return -EINVAL;
47 }
48
49 wr_regl(port, S3C2410_UCON, ucon);
50 return 0;
51}
52
53
54static int s3c2440_serial_getsource(struct uart_port *port,
55 struct s3c24xx_uart_clksrc *clk)
56{
57 unsigned long ucon = rd_regl(port, S3C2410_UCON);
58
59 switch (ucon & S3C2440_UCON_CLKMASK) {
60 case S3C2440_UCON_UCLK:
61 clk->divisor = 1;
62 clk->name = "uclk";
63 break;
64
65 case S3C2440_UCON_PCLK:
66 case S3C2440_UCON_PCLK2:
67 clk->divisor = 1;
68 clk->name = "pclk";
69 break;
70
71 case S3C2440_UCON_FCLK:
72 clk->divisor = 1;
73 clk->name = "fclk_n";
74 break;
75 }
76
77 return 0;
78}
79
80static int s3c2440_serial_resetport(struct uart_port *port, 28static int s3c2440_serial_resetport(struct uart_port *port,
81 struct s3c2410_uartcfg *cfg) 29 struct s3c2410_uartcfg *cfg)
82{ 30{
@@ -110,8 +58,10 @@ static struct s3c24xx_uart_info s3c2440_uart_inf = {
110 .tx_fifofull = S3C2440_UFSTAT_TXFULL, 58 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
111 .tx_fifomask = S3C2440_UFSTAT_TXMASK, 59 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
112 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, 60 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
113 .get_clksrc = s3c2440_serial_getsource, 61 .def_clk_sel = S3C2410_UCON_CLKSEL2,
114 .set_clksrc = s3c2440_serial_setsource, 62 .num_clks = 4,
63 .clksel_mask = S3C2440_UCON_CLKMASK,
64 .clksel_shift = S3C2440_UCON_CLKSHIFT,
115 .reset_port = s3c2440_serial_resetport, 65 .reset_port = s3c2440_serial_resetport,
116}; 66};
117 67