diff options
Diffstat (limited to 'drivers/tty/serial/pch_uart.c')
-rw-r--r-- | drivers/tty/serial/pch_uart.c | 329 |
1 files changed, 240 insertions, 89 deletions
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c index 70a61458ec42..a9ad7f33526d 100644 --- a/drivers/tty/serial/pch_uart.c +++ b/drivers/tty/serial/pch_uart.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/serial_core.h> | 21 | #include <linux/serial_core.h> |
22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/dmi.h> | ||
24 | 25 | ||
25 | #include <linux/dmaengine.h> | 26 | #include <linux/dmaengine.h> |
26 | #include <linux/pch_dma.h> | 27 | #include <linux/pch_dma.h> |
@@ -40,10 +41,11 @@ enum { | |||
40 | 41 | ||
41 | #define PCH_UART_DRIVER_DEVICE "ttyPCH" | 42 | #define PCH_UART_DRIVER_DEVICE "ttyPCH" |
42 | 43 | ||
43 | #define PCH_UART_NR_GE_256FIFO 1 | 44 | /* Set the max number of UART port |
44 | #define PCH_UART_NR_GE_64FIFO 3 | 45 | * Intel EG20T PCH: 4 port |
45 | #define PCH_UART_NR_GE (PCH_UART_NR_GE_256FIFO+PCH_UART_NR_GE_64FIFO) | 46 | * OKI SEMICONDUCTOR ML7213 IOH: 3 port |
46 | #define PCH_UART_NR PCH_UART_NR_GE | 47 | */ |
48 | #define PCH_UART_NR 4 | ||
47 | 49 | ||
48 | #define PCH_UART_HANDLED_RX_INT (1<<((PCH_UART_HANDLED_RX_INT_SHIFT)<<1)) | 50 | #define PCH_UART_HANDLED_RX_INT (1<<((PCH_UART_HANDLED_RX_INT_SHIFT)<<1)) |
49 | #define PCH_UART_HANDLED_TX_INT (1<<((PCH_UART_HANDLED_TX_INT_SHIFT)<<1)) | 51 | #define PCH_UART_HANDLED_TX_INT (1<<((PCH_UART_HANDLED_TX_INT_SHIFT)<<1)) |
@@ -192,6 +194,8 @@ enum { | |||
192 | #define PCH_UART_HAL_LOOP (PCH_UART_MCR_LOOP) | 194 | #define PCH_UART_HAL_LOOP (PCH_UART_MCR_LOOP) |
193 | #define PCH_UART_HAL_AFE (PCH_UART_MCR_AFE) | 195 | #define PCH_UART_HAL_AFE (PCH_UART_MCR_AFE) |
194 | 196 | ||
197 | #define PCI_VENDOR_ID_ROHM 0x10DB | ||
198 | |||
195 | struct pch_uart_buffer { | 199 | struct pch_uart_buffer { |
196 | unsigned char *buf; | 200 | unsigned char *buf; |
197 | int size; | 201 | int size; |
@@ -215,6 +219,7 @@ struct eg20t_port { | |||
215 | struct pch_uart_buffer rxbuf; | 219 | struct pch_uart_buffer rxbuf; |
216 | unsigned int dmsr; | 220 | unsigned int dmsr; |
217 | unsigned int fcr; | 221 | unsigned int fcr; |
222 | unsigned int mcr; | ||
218 | unsigned int use_dma; | 223 | unsigned int use_dma; |
219 | unsigned int use_dma_flag; | 224 | unsigned int use_dma_flag; |
220 | struct dma_async_tx_descriptor *desc_tx; | 225 | struct dma_async_tx_descriptor *desc_tx; |
@@ -223,13 +228,44 @@ struct eg20t_port { | |||
223 | struct pch_dma_slave param_rx; | 228 | struct pch_dma_slave param_rx; |
224 | struct dma_chan *chan_tx; | 229 | struct dma_chan *chan_tx; |
225 | struct dma_chan *chan_rx; | 230 | struct dma_chan *chan_rx; |
226 | struct scatterlist sg_tx; | 231 | struct scatterlist *sg_tx_p; |
232 | int nent; | ||
227 | struct scatterlist sg_rx; | 233 | struct scatterlist sg_rx; |
228 | int tx_dma_use; | 234 | int tx_dma_use; |
229 | void *rx_buf_virt; | 235 | void *rx_buf_virt; |
230 | dma_addr_t rx_buf_dma; | 236 | dma_addr_t rx_buf_dma; |
231 | }; | 237 | }; |
232 | 238 | ||
239 | /** | ||
240 | * struct pch_uart_driver_data - private data structure for UART-DMA | ||
241 | * @port_type: The number of DMA channel | ||
242 | * @line_no: UART port line number (0, 1, 2...) | ||
243 | */ | ||
244 | struct pch_uart_driver_data { | ||
245 | int port_type; | ||
246 | int line_no; | ||
247 | }; | ||
248 | |||
249 | enum pch_uart_num_t { | ||
250 | pch_et20t_uart0 = 0, | ||
251 | pch_et20t_uart1, | ||
252 | pch_et20t_uart2, | ||
253 | pch_et20t_uart3, | ||
254 | pch_ml7213_uart0, | ||
255 | pch_ml7213_uart1, | ||
256 | pch_ml7213_uart2, | ||
257 | }; | ||
258 | |||
259 | static struct pch_uart_driver_data drv_dat[] = { | ||
260 | [pch_et20t_uart0] = {PCH_UART_8LINE, 0}, | ||
261 | [pch_et20t_uart1] = {PCH_UART_2LINE, 1}, | ||
262 | [pch_et20t_uart2] = {PCH_UART_2LINE, 2}, | ||
263 | [pch_et20t_uart3] = {PCH_UART_2LINE, 3}, | ||
264 | [pch_ml7213_uart0] = {PCH_UART_8LINE, 0}, | ||
265 | [pch_ml7213_uart1] = {PCH_UART_2LINE, 1}, | ||
266 | [pch_ml7213_uart2] = {PCH_UART_2LINE, 2}, | ||
267 | }; | ||
268 | |||
233 | static unsigned int default_baud = 9600; | 269 | static unsigned int default_baud = 9600; |
234 | static const int trigger_level_256[4] = { 1, 64, 128, 224 }; | 270 | static const int trigger_level_256[4] = { 1, 64, 128, 224 }; |
235 | static const int trigger_level_64[4] = { 1, 16, 32, 56 }; | 271 | static const int trigger_level_64[4] = { 1, 16, 32, 56 }; |
@@ -278,7 +314,7 @@ static int pch_uart_hal_set_line(struct eg20t_port *priv, int baud, | |||
278 | 314 | ||
279 | div = DIV_ROUND(priv->base_baud / 16, baud); | 315 | div = DIV_ROUND(priv->base_baud / 16, baud); |
280 | if (div < 0 || USHRT_MAX <= div) { | 316 | if (div < 0 || USHRT_MAX <= div) { |
281 | pr_err("Invalid Baud(div=0x%x)\n", div); | 317 | dev_err(priv->port.dev, "Invalid Baud(div=0x%x)\n", div); |
282 | return -EINVAL; | 318 | return -EINVAL; |
283 | } | 319 | } |
284 | 320 | ||
@@ -286,17 +322,17 @@ static int pch_uart_hal_set_line(struct eg20t_port *priv, int baud, | |||
286 | dlm = ((unsigned int)div >> 8) & 0x00FFU; | 322 | dlm = ((unsigned int)div >> 8) & 0x00FFU; |
287 | 323 | ||
288 | if (parity & ~(PCH_UART_LCR_PEN | PCH_UART_LCR_EPS | PCH_UART_LCR_SP)) { | 324 | if (parity & ~(PCH_UART_LCR_PEN | PCH_UART_LCR_EPS | PCH_UART_LCR_SP)) { |
289 | pr_err("Invalid parity(0x%x)\n", parity); | 325 | dev_err(priv->port.dev, "Invalid parity(0x%x)\n", parity); |
290 | return -EINVAL; | 326 | return -EINVAL; |
291 | } | 327 | } |
292 | 328 | ||
293 | if (bits & ~PCH_UART_LCR_WLS) { | 329 | if (bits & ~PCH_UART_LCR_WLS) { |
294 | pr_err("Invalid bits(0x%x)\n", bits); | 330 | dev_err(priv->port.dev, "Invalid bits(0x%x)\n", bits); |
295 | return -EINVAL; | 331 | return -EINVAL; |
296 | } | 332 | } |
297 | 333 | ||
298 | if (stb & ~PCH_UART_LCR_STB) { | 334 | if (stb & ~PCH_UART_LCR_STB) { |
299 | pr_err("Invalid STB(0x%x)\n", stb); | 335 | dev_err(priv->port.dev, "Invalid STB(0x%x)\n", stb); |
300 | return -EINVAL; | 336 | return -EINVAL; |
301 | } | 337 | } |
302 | 338 | ||
@@ -304,7 +340,7 @@ static int pch_uart_hal_set_line(struct eg20t_port *priv, int baud, | |||
304 | lcr |= bits; | 340 | lcr |= bits; |
305 | lcr |= stb; | 341 | lcr |= stb; |
306 | 342 | ||
307 | pr_debug("%s:baud = %d, div = %04x, lcr = %02x (%lu)\n", | 343 | dev_dbg(priv->port.dev, "%s:baud = %d, div = %04x, lcr = %02x (%lu)\n", |
308 | __func__, baud, div, lcr, jiffies); | 344 | __func__, baud, div, lcr, jiffies); |
309 | iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR); | 345 | iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR); |
310 | iowrite8(dll, priv->membase + PCH_UART_DLL); | 346 | iowrite8(dll, priv->membase + PCH_UART_DLL); |
@@ -318,7 +354,8 @@ static int pch_uart_hal_fifo_reset(struct eg20t_port *priv, | |||
318 | unsigned int flag) | 354 | unsigned int flag) |
319 | { | 355 | { |
320 | if (flag & ~(PCH_UART_FCR_TFR | PCH_UART_FCR_RFR)) { | 356 | if (flag & ~(PCH_UART_FCR_TFR | PCH_UART_FCR_RFR)) { |
321 | pr_err("%s:Invalid flag(0x%x)\n", __func__, flag); | 357 | dev_err(priv->port.dev, "%s:Invalid flag(0x%x)\n", |
358 | __func__, flag); | ||
322 | return -EINVAL; | 359 | return -EINVAL; |
323 | } | 360 | } |
324 | 361 | ||
@@ -337,17 +374,20 @@ static int pch_uart_hal_set_fifo(struct eg20t_port *priv, | |||
337 | u8 fcr; | 374 | u8 fcr; |
338 | 375 | ||
339 | if (dmamode & ~PCH_UART_FCR_DMS) { | 376 | if (dmamode & ~PCH_UART_FCR_DMS) { |
340 | pr_err("%s:Invalid DMA Mode(0x%x)\n", __func__, dmamode); | 377 | dev_err(priv->port.dev, "%s:Invalid DMA Mode(0x%x)\n", |
378 | __func__, dmamode); | ||
341 | return -EINVAL; | 379 | return -EINVAL; |
342 | } | 380 | } |
343 | 381 | ||
344 | if (fifo_size & ~(PCH_UART_FCR_FIFOE | PCH_UART_FCR_FIFO256)) { | 382 | if (fifo_size & ~(PCH_UART_FCR_FIFOE | PCH_UART_FCR_FIFO256)) { |
345 | pr_err("%s:Invalid FIFO SIZE(0x%x)\n", __func__, fifo_size); | 383 | dev_err(priv->port.dev, "%s:Invalid FIFO SIZE(0x%x)\n", |
384 | __func__, fifo_size); | ||
346 | return -EINVAL; | 385 | return -EINVAL; |
347 | } | 386 | } |
348 | 387 | ||
349 | if (trigger & ~PCH_UART_FCR_RFTL) { | 388 | if (trigger & ~PCH_UART_FCR_RFTL) { |
350 | pr_err("%s:Invalid TRIGGER(0x%x)\n", __func__, trigger); | 389 | dev_err(priv->port.dev, "%s:Invalid TRIGGER(0x%x)\n", |
390 | __func__, trigger); | ||
351 | return -EINVAL; | 391 | return -EINVAL; |
352 | } | 392 | } |
353 | 393 | ||
@@ -386,7 +426,7 @@ static u8 pch_uart_hal_get_modem(struct eg20t_port *priv) | |||
386 | return get_msr(priv, priv->membase); | 426 | return get_msr(priv, priv->membase); |
387 | } | 427 | } |
388 | 428 | ||
389 | static int pch_uart_hal_write(struct eg20t_port *priv, | 429 | static void pch_uart_hal_write(struct eg20t_port *priv, |
390 | const unsigned char *buf, int tx_size) | 430 | const unsigned char *buf, int tx_size) |
391 | { | 431 | { |
392 | int i; | 432 | int i; |
@@ -396,7 +436,6 @@ static int pch_uart_hal_write(struct eg20t_port *priv, | |||
396 | thr = buf[i++]; | 436 | thr = buf[i++]; |
397 | iowrite8(thr, priv->membase + PCH_UART_THR); | 437 | iowrite8(thr, priv->membase + PCH_UART_THR); |
398 | } | 438 | } |
399 | return i; | ||
400 | } | 439 | } |
401 | 440 | ||
402 | static int pch_uart_hal_read(struct eg20t_port *priv, unsigned char *buf, | 441 | static int pch_uart_hal_read(struct eg20t_port *priv, unsigned char *buf, |
@@ -452,7 +491,7 @@ static int push_rx(struct eg20t_port *priv, const unsigned char *buf, | |||
452 | port = &priv->port; | 491 | port = &priv->port; |
453 | tty = tty_port_tty_get(&port->state->port); | 492 | tty = tty_port_tty_get(&port->state->port); |
454 | if (!tty) { | 493 | if (!tty) { |
455 | pr_debug("%s:tty is busy now", __func__); | 494 | dev_dbg(priv->port.dev, "%s:tty is busy now", __func__); |
456 | return -EBUSY; | 495 | return -EBUSY; |
457 | } | 496 | } |
458 | 497 | ||
@@ -469,8 +508,8 @@ static int pop_tx_x(struct eg20t_port *priv, unsigned char *buf) | |||
469 | struct uart_port *port = &priv->port; | 508 | struct uart_port *port = &priv->port; |
470 | 509 | ||
471 | if (port->x_char) { | 510 | if (port->x_char) { |
472 | pr_debug("%s:X character send %02x (%lu)\n", __func__, | 511 | dev_dbg(priv->port.dev, "%s:X character send %02x (%lu)\n", |
473 | port->x_char, jiffies); | 512 | __func__, port->x_char, jiffies); |
474 | buf[0] = port->x_char; | 513 | buf[0] = port->x_char; |
475 | port->x_char = 0; | 514 | port->x_char = 0; |
476 | ret = 1; | 515 | ret = 1; |
@@ -490,7 +529,7 @@ static int dma_push_rx(struct eg20t_port *priv, int size) | |||
490 | port = &priv->port; | 529 | port = &priv->port; |
491 | tty = tty_port_tty_get(&port->state->port); | 530 | tty = tty_port_tty_get(&port->state->port); |
492 | if (!tty) { | 531 | if (!tty) { |
493 | pr_debug("%s:tty is busy now", __func__); | 532 | dev_dbg(priv->port.dev, "%s:tty is busy now", __func__); |
494 | return 0; | 533 | return 0; |
495 | } | 534 | } |
496 | 535 | ||
@@ -560,11 +599,13 @@ static void pch_request_dma(struct uart_port *port) | |||
560 | /* Set Tx DMA */ | 599 | /* Set Tx DMA */ |
561 | param = &priv->param_tx; | 600 | param = &priv->param_tx; |
562 | param->dma_dev = &dma_dev->dev; | 601 | param->dma_dev = &dma_dev->dev; |
563 | param->chan_id = priv->port.line; | 602 | param->chan_id = priv->port.line * 2; /* Tx = 0, 2, 4, ... */ |
603 | |||
564 | param->tx_reg = port->mapbase + UART_TX; | 604 | param->tx_reg = port->mapbase + UART_TX; |
565 | chan = dma_request_channel(mask, filter, param); | 605 | chan = dma_request_channel(mask, filter, param); |
566 | if (!chan) { | 606 | if (!chan) { |
567 | pr_err("%s:dma_request_channel FAILS(Tx)\n", __func__); | 607 | dev_err(priv->port.dev, "%s:dma_request_channel FAILS(Tx)\n", |
608 | __func__); | ||
568 | return; | 609 | return; |
569 | } | 610 | } |
570 | priv->chan_tx = chan; | 611 | priv->chan_tx = chan; |
@@ -572,11 +613,13 @@ static void pch_request_dma(struct uart_port *port) | |||
572 | /* Set Rx DMA */ | 613 | /* Set Rx DMA */ |
573 | param = &priv->param_rx; | 614 | param = &priv->param_rx; |
574 | param->dma_dev = &dma_dev->dev; | 615 | param->dma_dev = &dma_dev->dev; |
575 | param->chan_id = priv->port.line + 1; /* Rx = Tx + 1 */ | 616 | param->chan_id = priv->port.line * 2 + 1; /* Rx = Tx + 1 */ |
617 | |||
576 | param->rx_reg = port->mapbase + UART_RX; | 618 | param->rx_reg = port->mapbase + UART_RX; |
577 | chan = dma_request_channel(mask, filter, param); | 619 | chan = dma_request_channel(mask, filter, param); |
578 | if (!chan) { | 620 | if (!chan) { |
579 | pr_err("%s:dma_request_channel FAILS(Rx)\n", __func__); | 621 | dev_err(priv->port.dev, "%s:dma_request_channel FAILS(Rx)\n", |
622 | __func__); | ||
580 | dma_release_channel(priv->chan_tx); | 623 | dma_release_channel(priv->chan_tx); |
581 | return; | 624 | return; |
582 | } | 625 | } |
@@ -592,16 +635,20 @@ static void pch_dma_rx_complete(void *arg) | |||
592 | struct eg20t_port *priv = arg; | 635 | struct eg20t_port *priv = arg; |
593 | struct uart_port *port = &priv->port; | 636 | struct uart_port *port = &priv->port; |
594 | struct tty_struct *tty = tty_port_tty_get(&port->state->port); | 637 | struct tty_struct *tty = tty_port_tty_get(&port->state->port); |
638 | int count; | ||
595 | 639 | ||
596 | if (!tty) { | 640 | if (!tty) { |
597 | pr_debug("%s:tty is busy now", __func__); | 641 | dev_dbg(priv->port.dev, "%s:tty is busy now", __func__); |
598 | return; | 642 | return; |
599 | } | 643 | } |
600 | 644 | ||
601 | if (dma_push_rx(priv, priv->trigger_level)) | 645 | dma_sync_sg_for_cpu(port->dev, &priv->sg_rx, 1, DMA_FROM_DEVICE); |
646 | count = dma_push_rx(priv, priv->trigger_level); | ||
647 | if (count) | ||
602 | tty_flip_buffer_push(tty); | 648 | tty_flip_buffer_push(tty); |
603 | |||
604 | tty_kref_put(tty); | 649 | tty_kref_put(tty); |
650 | async_tx_ack(priv->desc_rx); | ||
651 | pch_uart_hal_enable_interrupt(priv, PCH_UART_HAL_RX_INT); | ||
605 | } | 652 | } |
606 | 653 | ||
607 | static void pch_dma_tx_complete(void *arg) | 654 | static void pch_dma_tx_complete(void *arg) |
@@ -609,16 +656,23 @@ static void pch_dma_tx_complete(void *arg) | |||
609 | struct eg20t_port *priv = arg; | 656 | struct eg20t_port *priv = arg; |
610 | struct uart_port *port = &priv->port; | 657 | struct uart_port *port = &priv->port; |
611 | struct circ_buf *xmit = &port->state->xmit; | 658 | struct circ_buf *xmit = &port->state->xmit; |
659 | struct scatterlist *sg = priv->sg_tx_p; | ||
660 | int i; | ||
612 | 661 | ||
613 | xmit->tail += sg_dma_len(&priv->sg_tx); | 662 | for (i = 0; i < priv->nent; i++, sg++) { |
663 | xmit->tail += sg_dma_len(sg); | ||
664 | port->icount.tx += sg_dma_len(sg); | ||
665 | } | ||
614 | xmit->tail &= UART_XMIT_SIZE - 1; | 666 | xmit->tail &= UART_XMIT_SIZE - 1; |
615 | port->icount.tx += sg_dma_len(&priv->sg_tx); | ||
616 | |||
617 | async_tx_ack(priv->desc_tx); | 667 | async_tx_ack(priv->desc_tx); |
668 | dma_unmap_sg(port->dev, sg, priv->nent, DMA_TO_DEVICE); | ||
618 | priv->tx_dma_use = 0; | 669 | priv->tx_dma_use = 0; |
670 | priv->nent = 0; | ||
671 | kfree(priv->sg_tx_p); | ||
672 | pch_uart_hal_enable_interrupt(priv, PCH_UART_HAL_TX_INT); | ||
619 | } | 673 | } |
620 | 674 | ||
621 | static int pop_tx(struct eg20t_port *priv, unsigned char *buf, int size) | 675 | static int pop_tx(struct eg20t_port *priv, int size) |
622 | { | 676 | { |
623 | int count = 0; | 677 | int count = 0; |
624 | struct uart_port *port = &priv->port; | 678 | struct uart_port *port = &priv->port; |
@@ -631,13 +685,13 @@ static int pop_tx(struct eg20t_port *priv, unsigned char *buf, int size) | |||
631 | int cnt_to_end = | 685 | int cnt_to_end = |
632 | CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); | 686 | CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); |
633 | int sz = min(size - count, cnt_to_end); | 687 | int sz = min(size - count, cnt_to_end); |
634 | memcpy(&buf[count], &xmit->buf[xmit->tail], sz); | 688 | pch_uart_hal_write(priv, &xmit->buf[xmit->tail], sz); |
635 | xmit->tail = (xmit->tail + sz) & (UART_XMIT_SIZE - 1); | 689 | xmit->tail = (xmit->tail + sz) & (UART_XMIT_SIZE - 1); |
636 | count += sz; | 690 | count += sz; |
637 | } while (!uart_circ_empty(xmit) && count < size); | 691 | } while (!uart_circ_empty(xmit) && count < size); |
638 | 692 | ||
639 | pop_tx_end: | 693 | pop_tx_end: |
640 | pr_debug("%d characters. Remained %d characters. (%lu)\n", | 694 | dev_dbg(priv->port.dev, "%d characters. Remained %d characters.(%lu)\n", |
641 | count, size - count, jiffies); | 695 | count, size - count, jiffies); |
642 | 696 | ||
643 | return count; | 697 | return count; |
@@ -679,7 +733,7 @@ static int dma_handle_rx(struct eg20t_port *priv) | |||
679 | 733 | ||
680 | sg_init_table(&priv->sg_rx, 1); /* Initialize SG table */ | 734 | sg_init_table(&priv->sg_rx, 1); /* Initialize SG table */ |
681 | 735 | ||
682 | sg_dma_len(sg) = priv->fifo_size; | 736 | sg_dma_len(sg) = priv->trigger_level; |
683 | 737 | ||
684 | sg_set_page(&priv->sg_rx, virt_to_page(priv->rx_buf_virt), | 738 | sg_set_page(&priv->sg_rx, virt_to_page(priv->rx_buf_virt), |
685 | sg_dma_len(sg), (unsigned long)priv->rx_buf_virt & | 739 | sg_dma_len(sg), (unsigned long)priv->rx_buf_virt & |
@@ -689,7 +743,8 @@ static int dma_handle_rx(struct eg20t_port *priv) | |||
689 | 743 | ||
690 | desc = priv->chan_rx->device->device_prep_slave_sg(priv->chan_rx, | 744 | desc = priv->chan_rx->device->device_prep_slave_sg(priv->chan_rx, |
691 | sg, 1, DMA_FROM_DEVICE, | 745 | sg, 1, DMA_FROM_DEVICE, |
692 | DMA_PREP_INTERRUPT); | 746 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
747 | |||
693 | if (!desc) | 748 | if (!desc) |
694 | return 0; | 749 | return 0; |
695 | 750 | ||
@@ -706,14 +761,14 @@ static unsigned int handle_tx(struct eg20t_port *priv) | |||
706 | { | 761 | { |
707 | struct uart_port *port = &priv->port; | 762 | struct uart_port *port = &priv->port; |
708 | struct circ_buf *xmit = &port->state->xmit; | 763 | struct circ_buf *xmit = &port->state->xmit; |
709 | int ret; | ||
710 | int fifo_size; | 764 | int fifo_size; |
711 | int tx_size; | 765 | int tx_size; |
712 | int size; | 766 | int size; |
713 | int tx_empty; | 767 | int tx_empty; |
714 | 768 | ||
715 | if (!priv->start_tx) { | 769 | if (!priv->start_tx) { |
716 | pr_info("%s:Tx isn't started. (%lu)\n", __func__, jiffies); | 770 | dev_info(priv->port.dev, "%s:Tx isn't started. (%lu)\n", |
771 | __func__, jiffies); | ||
717 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT); | 772 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT); |
718 | priv->tx_empty = 1; | 773 | priv->tx_empty = 1; |
719 | return 0; | 774 | return 0; |
@@ -728,17 +783,21 @@ static unsigned int handle_tx(struct eg20t_port *priv) | |||
728 | fifo_size--; | 783 | fifo_size--; |
729 | } | 784 | } |
730 | size = min(xmit->head - xmit->tail, fifo_size); | 785 | size = min(xmit->head - xmit->tail, fifo_size); |
731 | tx_size = pop_tx(priv, xmit->buf, size); | 786 | if (size < 0) |
787 | size = fifo_size; | ||
788 | |||
789 | tx_size = pop_tx(priv, size); | ||
732 | if (tx_size > 0) { | 790 | if (tx_size > 0) { |
733 | ret = pch_uart_hal_write(priv, xmit->buf, tx_size); | 791 | port->icount.tx += tx_size; |
734 | port->icount.tx += ret; | ||
735 | tx_empty = 0; | 792 | tx_empty = 0; |
736 | } | 793 | } |
737 | 794 | ||
738 | priv->tx_empty = tx_empty; | 795 | priv->tx_empty = tx_empty; |
739 | 796 | ||
740 | if (tx_empty) | 797 | if (tx_empty) { |
741 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT); | 798 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT); |
799 | uart_write_wakeup(port); | ||
800 | } | ||
742 | 801 | ||
743 | return PCH_UART_HANDLED_TX_INT; | 802 | return PCH_UART_HANDLED_TX_INT; |
744 | } | 803 | } |
@@ -747,14 +806,28 @@ static unsigned int dma_handle_tx(struct eg20t_port *priv) | |||
747 | { | 806 | { |
748 | struct uart_port *port = &priv->port; | 807 | struct uart_port *port = &priv->port; |
749 | struct circ_buf *xmit = &port->state->xmit; | 808 | struct circ_buf *xmit = &port->state->xmit; |
750 | struct scatterlist *sg = &priv->sg_tx; | 809 | struct scatterlist *sg; |
751 | int nent; | 810 | int nent; |
752 | int fifo_size; | 811 | int fifo_size; |
753 | int tx_empty; | 812 | int tx_empty; |
754 | struct dma_async_tx_descriptor *desc; | 813 | struct dma_async_tx_descriptor *desc; |
814 | int num; | ||
815 | int i; | ||
816 | int bytes; | ||
817 | int size; | ||
818 | int rem; | ||
755 | 819 | ||
756 | if (!priv->start_tx) { | 820 | if (!priv->start_tx) { |
757 | pr_info("%s:Tx isn't started. (%lu)\n", __func__, jiffies); | 821 | dev_info(priv->port.dev, "%s:Tx isn't started. (%lu)\n", |
822 | __func__, jiffies); | ||
823 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT); | ||
824 | priv->tx_empty = 1; | ||
825 | return 0; | ||
826 | } | ||
827 | |||
828 | if (priv->tx_dma_use) { | ||
829 | dev_dbg(priv->port.dev, "%s:Tx is not completed. (%lu)\n", | ||
830 | __func__, jiffies); | ||
758 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT); | 831 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT); |
759 | priv->tx_empty = 1; | 832 | priv->tx_empty = 1; |
760 | return 0; | 833 | return 0; |
@@ -769,37 +842,73 @@ static unsigned int dma_handle_tx(struct eg20t_port *priv) | |||
769 | fifo_size--; | 842 | fifo_size--; |
770 | } | 843 | } |
771 | 844 | ||
772 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT); | 845 | bytes = min((int)CIRC_CNT(xmit->head, xmit->tail, |
846 | UART_XMIT_SIZE), CIRC_CNT_TO_END(xmit->head, | ||
847 | xmit->tail, UART_XMIT_SIZE)); | ||
848 | if (!bytes) { | ||
849 | dev_dbg(priv->port.dev, "%s 0 bytes return\n", __func__); | ||
850 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_TX_INT); | ||
851 | uart_write_wakeup(port); | ||
852 | return 0; | ||
853 | } | ||
854 | |||
855 | if (bytes > fifo_size) { | ||
856 | num = bytes / fifo_size + 1; | ||
857 | size = fifo_size; | ||
858 | rem = bytes % fifo_size; | ||
859 | } else { | ||
860 | num = 1; | ||
861 | size = bytes; | ||
862 | rem = bytes; | ||
863 | } | ||
864 | |||
865 | dev_dbg(priv->port.dev, "%s num=%d size=%d rem=%d\n", | ||
866 | __func__, num, size, rem); | ||
773 | 867 | ||
774 | priv->tx_dma_use = 1; | 868 | priv->tx_dma_use = 1; |
775 | 869 | ||
776 | sg_init_table(&priv->sg_tx, 1); /* Initialize SG table */ | 870 | priv->sg_tx_p = kzalloc(sizeof(struct scatterlist)*num, GFP_ATOMIC); |
777 | 871 | ||
778 | sg_set_page(&priv->sg_tx, virt_to_page(xmit->buf), | 872 | sg_init_table(priv->sg_tx_p, num); /* Initialize SG table */ |
779 | UART_XMIT_SIZE, (int)xmit->buf & ~PAGE_MASK); | 873 | sg = priv->sg_tx_p; |
780 | 874 | ||
781 | nent = dma_map_sg(port->dev, &priv->sg_tx, 1, DMA_TO_DEVICE); | 875 | for (i = 0; i < num; i++, sg++) { |
876 | if (i == (num - 1)) | ||
877 | sg_set_page(sg, virt_to_page(xmit->buf), | ||
878 | rem, fifo_size * i); | ||
879 | else | ||
880 | sg_set_page(sg, virt_to_page(xmit->buf), | ||
881 | size, fifo_size * i); | ||
882 | } | ||
883 | |||
884 | sg = priv->sg_tx_p; | ||
885 | nent = dma_map_sg(port->dev, sg, num, DMA_TO_DEVICE); | ||
782 | if (!nent) { | 886 | if (!nent) { |
783 | pr_err("%s:dma_map_sg Failed\n", __func__); | 887 | dev_err(priv->port.dev, "%s:dma_map_sg Failed\n", __func__); |
784 | return 0; | 888 | return 0; |
785 | } | 889 | } |
786 | 890 | priv->nent = nent; | |
787 | sg->offset = xmit->tail & (UART_XMIT_SIZE - 1); | 891 | |
788 | sg_dma_address(sg) = (sg_dma_address(sg) & ~(UART_XMIT_SIZE - 1)) + | 892 | for (i = 0; i < nent; i++, sg++) { |
789 | sg->offset; | 893 | sg->offset = (xmit->tail & (UART_XMIT_SIZE - 1)) + |
790 | sg_dma_len(sg) = min((int)CIRC_CNT(xmit->head, xmit->tail, | 894 | fifo_size * i; |
791 | UART_XMIT_SIZE), CIRC_CNT_TO_END(xmit->head, | 895 | sg_dma_address(sg) = (sg_dma_address(sg) & |
792 | xmit->tail, UART_XMIT_SIZE)); | 896 | ~(UART_XMIT_SIZE - 1)) + sg->offset; |
897 | if (i == (nent - 1)) | ||
898 | sg_dma_len(sg) = rem; | ||
899 | else | ||
900 | sg_dma_len(sg) = size; | ||
901 | } | ||
793 | 902 | ||
794 | desc = priv->chan_tx->device->device_prep_slave_sg(priv->chan_tx, | 903 | desc = priv->chan_tx->device->device_prep_slave_sg(priv->chan_tx, |
795 | sg, nent, DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | 904 | priv->sg_tx_p, nent, DMA_TO_DEVICE, |
905 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | ||
796 | if (!desc) { | 906 | if (!desc) { |
797 | pr_err("%s:device_prep_slave_sg Failed\n", __func__); | 907 | dev_err(priv->port.dev, "%s:device_prep_slave_sg Failed\n", |
908 | __func__); | ||
798 | return 0; | 909 | return 0; |
799 | } | 910 | } |
800 | 911 | dma_sync_sg_for_device(port->dev, priv->sg_tx_p, nent, DMA_TO_DEVICE); | |
801 | dma_sync_sg_for_device(port->dev, sg, 1, DMA_TO_DEVICE); | ||
802 | |||
803 | priv->desc_tx = desc; | 912 | priv->desc_tx = desc; |
804 | desc->callback = pch_dma_tx_complete; | 913 | desc->callback = pch_dma_tx_complete; |
805 | desc->callback_param = priv; | 914 | desc->callback_param = priv; |
@@ -854,10 +963,16 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id) | |||
854 | } | 963 | } |
855 | break; | 964 | break; |
856 | case PCH_UART_IID_RDR: /* Received Data Ready */ | 965 | case PCH_UART_IID_RDR: /* Received Data Ready */ |
857 | if (priv->use_dma) | 966 | if (priv->use_dma) { |
967 | pch_uart_hal_disable_interrupt(priv, | ||
968 | PCH_UART_HAL_RX_INT); | ||
858 | ret = dma_handle_rx(priv); | 969 | ret = dma_handle_rx(priv); |
859 | else | 970 | if (!ret) |
971 | pch_uart_hal_enable_interrupt(priv, | ||
972 | PCH_UART_HAL_RX_INT); | ||
973 | } else { | ||
860 | ret = handle_rx(priv); | 974 | ret = handle_rx(priv); |
975 | } | ||
861 | break; | 976 | break; |
862 | case PCH_UART_IID_RDR_TO: /* Received Data Ready | 977 | case PCH_UART_IID_RDR_TO: /* Received Data Ready |
863 | (FIFO Timeout) */ | 978 | (FIFO Timeout) */ |
@@ -874,7 +989,8 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id) | |||
874 | ret = PCH_UART_HANDLED_MS_INT; | 989 | ret = PCH_UART_HANDLED_MS_INT; |
875 | break; | 990 | break; |
876 | default: /* Never junp to this label */ | 991 | default: /* Never junp to this label */ |
877 | pr_err("%s:iid=%d (%lu)\n", __func__, iid, jiffies); | 992 | dev_err(priv->port.dev, "%s:iid=%d (%lu)\n", __func__, |
993 | iid, jiffies); | ||
878 | ret = -1; | 994 | ret = -1; |
879 | break; | 995 | break; |
880 | } | 996 | } |
@@ -932,7 +1048,6 @@ static unsigned int pch_uart_get_mctrl(struct uart_port *port) | |||
932 | static void pch_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) | 1048 | static void pch_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) |
933 | { | 1049 | { |
934 | u32 mcr = 0; | 1050 | u32 mcr = 0; |
935 | unsigned int dat; | ||
936 | struct eg20t_port *priv = container_of(port, struct eg20t_port, port); | 1051 | struct eg20t_port *priv = container_of(port, struct eg20t_port, port); |
937 | 1052 | ||
938 | if (mctrl & TIOCM_DTR) | 1053 | if (mctrl & TIOCM_DTR) |
@@ -942,11 +1057,11 @@ static void pch_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) | |||
942 | if (mctrl & TIOCM_LOOP) | 1057 | if (mctrl & TIOCM_LOOP) |
943 | mcr |= UART_MCR_LOOP; | 1058 | mcr |= UART_MCR_LOOP; |
944 | 1059 | ||
945 | if (mctrl) { | 1060 | if (priv->mcr & UART_MCR_AFE) |
946 | dat = pch_uart_get_mctrl(port); | 1061 | mcr |= UART_MCR_AFE; |
947 | dat |= mcr; | 1062 | |
948 | iowrite8(dat, priv->membase + UART_MCR); | 1063 | if (mctrl) |
949 | } | 1064 | iowrite8(mcr, priv->membase + UART_MCR); |
950 | } | 1065 | } |
951 | 1066 | ||
952 | static void pch_uart_stop_tx(struct uart_port *port) | 1067 | static void pch_uart_stop_tx(struct uart_port *port) |
@@ -963,9 +1078,13 @@ static void pch_uart_start_tx(struct uart_port *port) | |||
963 | 1078 | ||
964 | priv = container_of(port, struct eg20t_port, port); | 1079 | priv = container_of(port, struct eg20t_port, port); |
965 | 1080 | ||
966 | if (priv->use_dma) | 1081 | if (priv->use_dma) { |
967 | if (priv->tx_dma_use) | 1082 | if (priv->tx_dma_use) { |
1083 | dev_dbg(priv->port.dev, "%s : Tx DMA is NOT empty.\n", | ||
1084 | __func__); | ||
968 | return; | 1085 | return; |
1086 | } | ||
1087 | } | ||
969 | 1088 | ||
970 | priv->start_tx = 1; | 1089 | priv->start_tx = 1; |
971 | pch_uart_hal_enable_interrupt(priv, PCH_UART_HAL_TX_INT); | 1090 | pch_uart_hal_enable_interrupt(priv, PCH_UART_HAL_TX_INT); |
@@ -1010,7 +1129,12 @@ static int pch_uart_startup(struct uart_port *port) | |||
1010 | 1129 | ||
1011 | priv = container_of(port, struct eg20t_port, port); | 1130 | priv = container_of(port, struct eg20t_port, port); |
1012 | priv->tx_empty = 1; | 1131 | priv->tx_empty = 1; |
1013 | port->uartclk = priv->base_baud; | 1132 | |
1133 | if (port->uartclk) | ||
1134 | priv->base_baud = port->uartclk; | ||
1135 | else | ||
1136 | port->uartclk = priv->base_baud; | ||
1137 | |||
1014 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_ALL_INT); | 1138 | pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_ALL_INT); |
1015 | ret = pch_uart_hal_set_line(priv, default_baud, | 1139 | ret = pch_uart_hal_set_line(priv, default_baud, |
1016 | PCH_UART_HAL_PARITY_NONE, PCH_UART_HAL_8BIT, | 1140 | PCH_UART_HAL_PARITY_NONE, PCH_UART_HAL_8BIT, |
@@ -1081,7 +1205,8 @@ static void pch_uart_shutdown(struct uart_port *port) | |||
1081 | ret = pch_uart_hal_set_fifo(priv, PCH_UART_HAL_DMA_MODE0, | 1205 | ret = pch_uart_hal_set_fifo(priv, PCH_UART_HAL_DMA_MODE0, |
1082 | PCH_UART_HAL_FIFO_DIS, PCH_UART_HAL_TRIGGER1); | 1206 | PCH_UART_HAL_FIFO_DIS, PCH_UART_HAL_TRIGGER1); |
1083 | if (ret) | 1207 | if (ret) |
1084 | pr_err("pch_uart_hal_set_fifo Failed(ret=%d)\n", ret); | 1208 | dev_err(priv->port.dev, |
1209 | "pch_uart_hal_set_fifo Failed(ret=%d)\n", ret); | ||
1085 | 1210 | ||
1086 | if (priv->use_dma_flag) | 1211 | if (priv->use_dma_flag) |
1087 | pch_free_dma(port); | 1212 | pch_free_dma(port); |
@@ -1130,6 +1255,13 @@ static void pch_uart_set_termios(struct uart_port *port, | |||
1130 | } else { | 1255 | } else { |
1131 | parity = PCH_UART_HAL_PARITY_NONE; | 1256 | parity = PCH_UART_HAL_PARITY_NONE; |
1132 | } | 1257 | } |
1258 | |||
1259 | /* Only UART0 has auto hardware flow function */ | ||
1260 | if ((termios->c_cflag & CRTSCTS) && (priv->fifo_size == 256)) | ||
1261 | priv->mcr |= UART_MCR_AFE; | ||
1262 | else | ||
1263 | priv->mcr &= ~UART_MCR_AFE; | ||
1264 | |||
1133 | termios->c_cflag &= ~CMSPAR; /* Mark/Space parity is not supported */ | 1265 | termios->c_cflag &= ~CMSPAR; /* Mark/Space parity is not supported */ |
1134 | 1266 | ||
1135 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); | 1267 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); |
@@ -1202,17 +1334,19 @@ static int pch_uart_verify_port(struct uart_port *port, | |||
1202 | 1334 | ||
1203 | priv = container_of(port, struct eg20t_port, port); | 1335 | priv = container_of(port, struct eg20t_port, port); |
1204 | if (serinfo->flags & UPF_LOW_LATENCY) { | 1336 | if (serinfo->flags & UPF_LOW_LATENCY) { |
1205 | pr_info("PCH UART : Use PIO Mode (without DMA)\n"); | 1337 | dev_info(priv->port.dev, |
1338 | "PCH UART : Use PIO Mode (without DMA)\n"); | ||
1206 | priv->use_dma = 0; | 1339 | priv->use_dma = 0; |
1207 | serinfo->flags &= ~UPF_LOW_LATENCY; | 1340 | serinfo->flags &= ~UPF_LOW_LATENCY; |
1208 | } else { | 1341 | } else { |
1209 | #ifndef CONFIG_PCH_DMA | 1342 | #ifndef CONFIG_PCH_DMA |
1210 | pr_err("%s : PCH DMA is not Loaded.\n", __func__); | 1343 | dev_err(priv->port.dev, "%s : PCH DMA is not Loaded.\n", |
1344 | __func__); | ||
1211 | return -EOPNOTSUPP; | 1345 | return -EOPNOTSUPP; |
1212 | #endif | 1346 | #endif |
1213 | priv->use_dma = 1; | 1347 | priv->use_dma = 1; |
1214 | priv->use_dma_flag = 1; | 1348 | priv->use_dma_flag = 1; |
1215 | pr_info("PCH UART : Use DMA Mode\n"); | 1349 | dev_info(priv->port.dev, "PCH UART : Use DMA Mode\n"); |
1216 | } | 1350 | } |
1217 | 1351 | ||
1218 | return 0; | 1352 | return 0; |
@@ -1249,7 +1383,7 @@ static struct uart_driver pch_uart_driver = { | |||
1249 | }; | 1383 | }; |
1250 | 1384 | ||
1251 | static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, | 1385 | static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, |
1252 | int port_type) | 1386 | const struct pci_device_id *id) |
1253 | { | 1387 | { |
1254 | struct eg20t_port *priv; | 1388 | struct eg20t_port *priv; |
1255 | int ret; | 1389 | int ret; |
@@ -1257,7 +1391,11 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, | |||
1257 | unsigned int mapbase; | 1391 | unsigned int mapbase; |
1258 | unsigned char *rxbuf; | 1392 | unsigned char *rxbuf; |
1259 | int fifosize, base_baud; | 1393 | int fifosize, base_baud; |
1260 | static int num; | 1394 | int port_type; |
1395 | struct pch_uart_driver_data *board; | ||
1396 | |||
1397 | board = &drv_dat[id->driver_data]; | ||
1398 | port_type = board->port_type; | ||
1261 | 1399 | ||
1262 | priv = kzalloc(sizeof(struct eg20t_port), GFP_KERNEL); | 1400 | priv = kzalloc(sizeof(struct eg20t_port), GFP_KERNEL); |
1263 | if (priv == NULL) | 1401 | if (priv == NULL) |
@@ -1267,14 +1405,18 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, | |||
1267 | if (!rxbuf) | 1405 | if (!rxbuf) |
1268 | goto init_port_free_txbuf; | 1406 | goto init_port_free_txbuf; |
1269 | 1407 | ||
1408 | base_baud = 1843200; /* 1.8432MHz */ | ||
1409 | |||
1410 | /* quirk for CM-iTC board */ | ||
1411 | if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC")) | ||
1412 | base_baud = 192000000; /* 192.0MHz */ | ||
1413 | |||
1270 | switch (port_type) { | 1414 | switch (port_type) { |
1271 | case PORT_UNKNOWN: | 1415 | case PORT_UNKNOWN: |
1272 | fifosize = 256; /* UART0 */ | 1416 | fifosize = 256; /* EG20T/ML7213: UART0 */ |
1273 | base_baud = 1843200; /* 1.8432MHz */ | ||
1274 | break; | 1417 | break; |
1275 | case PORT_8250: | 1418 | case PORT_8250: |
1276 | fifosize = 64; /* UART1~3 */ | 1419 | fifosize = 64; /* EG20T:UART1~3 ML7213: UART1~2*/ |
1277 | base_baud = 1843200; /* 1.8432MHz */ | ||
1278 | break; | 1420 | break; |
1279 | default: | 1421 | default: |
1280 | dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type); | 1422 | dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type); |
@@ -1302,11 +1444,14 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, | |||
1302 | priv->port.ops = &pch_uart_ops; | 1444 | priv->port.ops = &pch_uart_ops; |
1303 | priv->port.flags = UPF_BOOT_AUTOCONF; | 1445 | priv->port.flags = UPF_BOOT_AUTOCONF; |
1304 | priv->port.fifosize = fifosize; | 1446 | priv->port.fifosize = fifosize; |
1305 | priv->port.line = num++; | 1447 | priv->port.line = board->line_no; |
1306 | priv->trigger = PCH_UART_HAL_TRIGGER_M; | 1448 | priv->trigger = PCH_UART_HAL_TRIGGER_M; |
1307 | 1449 | ||
1450 | spin_lock_init(&priv->port.lock); | ||
1451 | |||
1308 | pci_set_drvdata(pdev, priv); | 1452 | pci_set_drvdata(pdev, priv); |
1309 | pch_uart_hal_request(pdev, fifosize, base_baud); | 1453 | pch_uart_hal_request(pdev, fifosize, base_baud); |
1454 | |||
1310 | ret = uart_add_one_port(&pch_uart_driver, &priv->port); | 1455 | ret = uart_add_one_port(&pch_uart_driver, &priv->port); |
1311 | if (ret < 0) | 1456 | if (ret < 0) |
1312 | goto init_port_hal_free; | 1457 | goto init_port_hal_free; |
@@ -1377,13 +1522,19 @@ static int pch_uart_pci_resume(struct pci_dev *pdev) | |||
1377 | 1522 | ||
1378 | static DEFINE_PCI_DEVICE_TABLE(pch_uart_pci_id) = { | 1523 | static DEFINE_PCI_DEVICE_TABLE(pch_uart_pci_id) = { |
1379 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8811), | 1524 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8811), |
1380 | .driver_data = PCH_UART_8LINE}, | 1525 | .driver_data = pch_et20t_uart0}, |
1381 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8812), | 1526 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8812), |
1382 | .driver_data = PCH_UART_2LINE}, | 1527 | .driver_data = pch_et20t_uart1}, |
1383 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8813), | 1528 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8813), |
1384 | .driver_data = PCH_UART_2LINE}, | 1529 | .driver_data = pch_et20t_uart2}, |
1385 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8814), | 1530 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8814), |
1386 | .driver_data = PCH_UART_2LINE}, | 1531 | .driver_data = pch_et20t_uart3}, |
1532 | {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8027), | ||
1533 | .driver_data = pch_ml7213_uart0}, | ||
1534 | {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8028), | ||
1535 | .driver_data = pch_ml7213_uart1}, | ||
1536 | {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8029), | ||
1537 | .driver_data = pch_ml7213_uart2}, | ||
1387 | {0,}, | 1538 | {0,}, |
1388 | }; | 1539 | }; |
1389 | 1540 | ||
@@ -1397,7 +1548,7 @@ static int __devinit pch_uart_pci_probe(struct pci_dev *pdev, | |||
1397 | if (ret < 0) | 1548 | if (ret < 0) |
1398 | goto probe_error; | 1549 | goto probe_error; |
1399 | 1550 | ||
1400 | priv = pch_uart_init_port(pdev, id->driver_data); | 1551 | priv = pch_uart_init_port(pdev, id); |
1401 | if (!priv) { | 1552 | if (!priv) { |
1402 | ret = -EBUSY; | 1553 | ret = -EBUSY; |
1403 | goto probe_disable_device; | 1554 | goto probe_disable_device; |