aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/tty/serial/omap-serial.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/tty/serial/omap-serial.c')
-rw-r--r--drivers/tty/serial/omap-serial.c885
1 files changed, 375 insertions, 510 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index d3cda0cb2df0..ccc2f35adff1 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -32,16 +32,16 @@
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/tty.h> 33#include <linux/tty.h>
34#include <linux/tty_flip.h> 34#include <linux/tty_flip.h>
35#include <linux/platform_device.h>
35#include <linux/io.h> 36#include <linux/io.h>
36#include <linux/dma-mapping.h>
37#include <linux/clk.h> 37#include <linux/clk.h>
38#include <linux/serial_core.h> 38#include <linux/serial_core.h>
39#include <linux/irq.h> 39#include <linux/irq.h>
40#include <linux/pm_runtime.h> 40#include <linux/pm_runtime.h>
41#include <linux/of.h> 41#include <linux/of.h>
42#include <linux/gpio.h>
43#include <linux/pinctrl/consumer.h>
42 44
43#include <plat/dma.h>
44#include <plat/dmtimer.h>
45#include <plat/omap-serial.h> 45#include <plat/omap-serial.h>
46 46
47#define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 47#define UART_BUILD_REVISION(x, y) (((x) << 8) | (y))
@@ -57,8 +57,8 @@
57#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 57#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
58 58
59/* FCR register bitmasks */ 59/* FCR register bitmasks */
60#define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6
61#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 60#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6)
61#define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4)
62 62
63/* MVR register bitmasks */ 63/* MVR register bitmasks */
64#define OMAP_UART_MVR_SCHEME_SHIFT 30 64#define OMAP_UART_MVR_SCHEME_SHIFT 30
@@ -71,12 +71,52 @@
71#define OMAP_UART_MVR_MAJ_SHIFT 8 71#define OMAP_UART_MVR_MAJ_SHIFT 8
72#define OMAP_UART_MVR_MIN_MASK 0x3f 72#define OMAP_UART_MVR_MIN_MASK 0x3f
73 73
74struct uart_omap_port {
75 struct uart_port port;
76 struct uart_omap_dma uart_dma;
77 struct device *dev;
78
79 unsigned char ier;
80 unsigned char lcr;
81 unsigned char mcr;
82 unsigned char fcr;
83 unsigned char efr;
84 unsigned char dll;
85 unsigned char dlh;
86 unsigned char mdr1;
87 unsigned char scr;
88
89 int use_dma;
90 /*
91 * Some bits in registers are cleared on a read, so they must
92 * be saved whenever the register is read but the bits will not
93 * be immediately processed.
94 */
95 unsigned int lsr_break_flag;
96 unsigned char msr_saved_flags;
97 char name[20];
98 unsigned long port_activity;
99 u32 context_loss_cnt;
100 u32 errata;
101 u8 wakeups_enabled;
102 unsigned int irq_pending:1;
103
104 int DTR_gpio;
105 int DTR_inverted;
106 int DTR_active;
107
108 struct pm_qos_request pm_qos_request;
109 u32 latency;
110 u32 calc_latency;
111 struct work_struct qos_work;
112 struct pinctrl *pins;
113};
114
115#define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port)))
116
74static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 117static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
75 118
76/* Forward declaration of functions */ 119/* Forward declaration of functions */
77static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
78static void serial_omap_rxdma_poll(unsigned long uart_no);
79static int serial_omap_start_rxdma(struct uart_omap_port *up);
80static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 120static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
81 121
82static struct workqueue_struct *serial_omap_uart_wq; 122static struct workqueue_struct *serial_omap_uart_wq;
@@ -101,6 +141,46 @@ static inline void serial_omap_clear_fifos(struct uart_omap_port *up)
101 serial_out(up, UART_FCR, 0); 141 serial_out(up, UART_FCR, 0);
102} 142}
103 143
144static int serial_omap_get_context_loss_count(struct uart_omap_port *up)
145{
146 struct omap_uart_port_info *pdata = up->dev->platform_data;
147
148 if (!pdata || !pdata->get_context_loss_count)
149 return 0;
150
151 return pdata->get_context_loss_count(up->dev);
152}
153
154static void serial_omap_set_forceidle(struct uart_omap_port *up)
155{
156 struct omap_uart_port_info *pdata = up->dev->platform_data;
157
158 if (!pdata || !pdata->set_forceidle)
159 return;
160
161 pdata->set_forceidle(up->dev);
162}
163
164static void serial_omap_set_noidle(struct uart_omap_port *up)
165{
166 struct omap_uart_port_info *pdata = up->dev->platform_data;
167
168 if (!pdata || !pdata->set_noidle)
169 return;
170
171 pdata->set_noidle(up->dev);
172}
173
174static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable)
175{
176 struct omap_uart_port_info *pdata = up->dev->platform_data;
177
178 if (!pdata || !pdata->enable_wakeup)
179 return;
180
181 pdata->enable_wakeup(up->dev, enable);
182}
183
104/* 184/*
105 * serial_omap_get_divisor - calculate divisor value 185 * serial_omap_get_divisor - calculate divisor value
106 * @port: uart port info 186 * @port: uart port info
@@ -126,151 +206,55 @@ serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
126 return port->uartclk/(baud * divisor); 206 return port->uartclk/(baud * divisor);
127} 207}
128 208
129static void serial_omap_stop_rxdma(struct uart_omap_port *up)
130{
131 if (up->uart_dma.rx_dma_used) {
132 del_timer(&up->uart_dma.rx_timer);
133 omap_stop_dma(up->uart_dma.rx_dma_channel);
134 omap_free_dma(up->uart_dma.rx_dma_channel);
135 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
136 up->uart_dma.rx_dma_used = false;
137 pm_runtime_mark_last_busy(&up->pdev->dev);
138 pm_runtime_put_autosuspend(&up->pdev->dev);
139 }
140}
141
142static void serial_omap_enable_ms(struct uart_port *port) 209static void serial_omap_enable_ms(struct uart_port *port)
143{ 210{
144 struct uart_omap_port *up = (struct uart_omap_port *)port; 211 struct uart_omap_port *up = to_uart_omap_port(port);
145 212
146 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 213 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line);
147 214
148 pm_runtime_get_sync(&up->pdev->dev); 215 pm_runtime_get_sync(up->dev);
149 up->ier |= UART_IER_MSI; 216 up->ier |= UART_IER_MSI;
150 serial_out(up, UART_IER, up->ier); 217 serial_out(up, UART_IER, up->ier);
151 pm_runtime_put(&up->pdev->dev); 218 pm_runtime_mark_last_busy(up->dev);
219 pm_runtime_put_autosuspend(up->dev);
152} 220}
153 221
154static void serial_omap_stop_tx(struct uart_port *port) 222static void serial_omap_stop_tx(struct uart_port *port)
155{ 223{
156 struct uart_omap_port *up = (struct uart_omap_port *)port; 224 struct uart_omap_port *up = to_uart_omap_port(port);
157 struct omap_uart_port_info *pdata = up->pdev->dev.platform_data;
158
159 if (up->use_dma &&
160 up->uart_dma.tx_dma_channel != OMAP_UART_DMA_CH_FREE) {
161 /*
162 * Check if dma is still active. If yes do nothing,
163 * return. Else stop dma
164 */
165 if (omap_get_dma_active_status(up->uart_dma.tx_dma_channel))
166 return;
167 omap_stop_dma(up->uart_dma.tx_dma_channel);
168 omap_free_dma(up->uart_dma.tx_dma_channel);
169 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
170 pm_runtime_mark_last_busy(&up->pdev->dev);
171 pm_runtime_put_autosuspend(&up->pdev->dev);
172 }
173 225
174 pm_runtime_get_sync(&up->pdev->dev); 226 pm_runtime_get_sync(up->dev);
175 if (up->ier & UART_IER_THRI) { 227 if (up->ier & UART_IER_THRI) {
176 up->ier &= ~UART_IER_THRI; 228 up->ier &= ~UART_IER_THRI;
177 serial_out(up, UART_IER, up->ier); 229 serial_out(up, UART_IER, up->ier);
178 } 230 }
179 231
180 if (!up->use_dma && pdata && pdata->set_forceidle) 232 serial_omap_set_forceidle(up);
181 pdata->set_forceidle(up->pdev);
182 233
183 pm_runtime_mark_last_busy(&up->pdev->dev); 234 pm_runtime_mark_last_busy(up->dev);
184 pm_runtime_put_autosuspend(&up->pdev->dev); 235 pm_runtime_put_autosuspend(up->dev);
185} 236}
186 237
187static void serial_omap_stop_rx(struct uart_port *port) 238static void serial_omap_stop_rx(struct uart_port *port)
188{ 239{
189 struct uart_omap_port *up = (struct uart_omap_port *)port; 240 struct uart_omap_port *up = to_uart_omap_port(port);
190 241
191 pm_runtime_get_sync(&up->pdev->dev); 242 pm_runtime_get_sync(up->dev);
192 if (up->use_dma)
193 serial_omap_stop_rxdma(up);
194 up->ier &= ~UART_IER_RLSI; 243 up->ier &= ~UART_IER_RLSI;
195 up->port.read_status_mask &= ~UART_LSR_DR; 244 up->port.read_status_mask &= ~UART_LSR_DR;
196 serial_out(up, UART_IER, up->ier); 245 serial_out(up, UART_IER, up->ier);
197 pm_runtime_mark_last_busy(&up->pdev->dev); 246 pm_runtime_mark_last_busy(up->dev);
198 pm_runtime_put_autosuspend(&up->pdev->dev); 247 pm_runtime_put_autosuspend(up->dev);
199}
200
201static inline void receive_chars(struct uart_omap_port *up,
202 unsigned int *status)
203{
204 struct tty_struct *tty = up->port.state->port.tty;
205 unsigned int flag, lsr = *status;
206 unsigned char ch = 0;
207 int max_count = 256;
208
209 do {
210 if (likely(lsr & UART_LSR_DR))
211 ch = serial_in(up, UART_RX);
212 flag = TTY_NORMAL;
213 up->port.icount.rx++;
214
215 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
216 /*
217 * For statistics only
218 */
219 if (lsr & UART_LSR_BI) {
220 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
221 up->port.icount.brk++;
222 /*
223 * We do the SysRQ and SAK checking
224 * here because otherwise the break
225 * may get masked by ignore_status_mask
226 * or read_status_mask.
227 */
228 if (uart_handle_break(&up->port))
229 goto ignore_char;
230 } else if (lsr & UART_LSR_PE) {
231 up->port.icount.parity++;
232 } else if (lsr & UART_LSR_FE) {
233 up->port.icount.frame++;
234 }
235
236 if (lsr & UART_LSR_OE)
237 up->port.icount.overrun++;
238
239 /*
240 * Mask off conditions which should be ignored.
241 */
242 lsr &= up->port.read_status_mask;
243
244#ifdef CONFIG_SERIAL_OMAP_CONSOLE
245 if (up->port.line == up->port.cons->index) {
246 /* Recover the break flag from console xmit */
247 lsr |= up->lsr_break_flag;
248 }
249#endif
250 if (lsr & UART_LSR_BI)
251 flag = TTY_BREAK;
252 else if (lsr & UART_LSR_PE)
253 flag = TTY_PARITY;
254 else if (lsr & UART_LSR_FE)
255 flag = TTY_FRAME;
256 }
257
258 if (uart_handle_sysrq_char(&up->port, ch))
259 goto ignore_char;
260 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
261ignore_char:
262 lsr = serial_in(up, UART_LSR);
263 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
264 spin_unlock(&up->port.lock);
265 tty_flip_buffer_push(tty);
266 spin_lock(&up->port.lock);
267} 248}
268 249
269static void transmit_chars(struct uart_omap_port *up) 250static void transmit_chars(struct uart_omap_port *up, unsigned int lsr)
270{ 251{
271 struct circ_buf *xmit = &up->port.state->xmit; 252 struct circ_buf *xmit = &up->port.state->xmit;
272 int count; 253 int count;
273 254
255 if (!(lsr & UART_LSR_THRE))
256 return;
257
274 if (up->port.x_char) { 258 if (up->port.x_char) {
275 serial_out(up, UART_TX, up->port.x_char); 259 serial_out(up, UART_TX, up->port.x_char);
276 up->port.icount.tx++; 260 up->port.icount.tx++;
@@ -290,8 +274,11 @@ static void transmit_chars(struct uart_omap_port *up)
290 break; 274 break;
291 } while (--count > 0); 275 } while (--count > 0);
292 276
293 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 277 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) {
278 spin_unlock(&up->port.lock);
294 uart_write_wakeup(&up->port); 279 uart_write_wakeup(&up->port);
280 spin_lock(&up->port.lock);
281 }
295 282
296 if (uart_circ_empty(xmit)) 283 if (uart_circ_empty(xmit))
297 serial_omap_stop_tx(&up->port); 284 serial_omap_stop_tx(&up->port);
@@ -307,70 +294,13 @@ static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
307 294
308static void serial_omap_start_tx(struct uart_port *port) 295static void serial_omap_start_tx(struct uart_port *port)
309{ 296{
310 struct uart_omap_port *up = (struct uart_omap_port *)port; 297 struct uart_omap_port *up = to_uart_omap_port(port);
311 struct omap_uart_port_info *pdata = up->pdev->dev.platform_data;
312 struct circ_buf *xmit;
313 unsigned int start;
314 int ret = 0;
315
316 if (!up->use_dma) {
317 pm_runtime_get_sync(&up->pdev->dev);
318 serial_omap_enable_ier_thri(up);
319 if (pdata && pdata->set_noidle)
320 pdata->set_noidle(up->pdev);
321 pm_runtime_mark_last_busy(&up->pdev->dev);
322 pm_runtime_put_autosuspend(&up->pdev->dev);
323 return;
324 }
325
326 if (up->uart_dma.tx_dma_used)
327 return;
328
329 xmit = &up->port.state->xmit;
330
331 if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
332 pm_runtime_get_sync(&up->pdev->dev);
333 ret = omap_request_dma(up->uart_dma.uart_dma_tx,
334 "UART Tx DMA",
335 (void *)uart_tx_dma_callback, up,
336 &(up->uart_dma.tx_dma_channel));
337
338 if (ret < 0) {
339 serial_omap_enable_ier_thri(up);
340 return;
341 }
342 }
343 spin_lock(&(up->uart_dma.tx_lock));
344 up->uart_dma.tx_dma_used = true;
345 spin_unlock(&(up->uart_dma.tx_lock));
346 298
347 start = up->uart_dma.tx_buf_dma_phys + 299 pm_runtime_get_sync(up->dev);
348 (xmit->tail & (UART_XMIT_SIZE - 1)); 300 serial_omap_enable_ier_thri(up);
349 301 serial_omap_set_noidle(up);
350 up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit); 302 pm_runtime_mark_last_busy(up->dev);
351 /* 303 pm_runtime_put_autosuspend(up->dev);
352 * It is a circular buffer. See if the buffer has wounded back.
353 * If yes it will have to be transferred in two separate dma
354 * transfers
355 */
356 if (start + up->uart_dma.tx_buf_size >=
357 up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
358 up->uart_dma.tx_buf_size =
359 (up->uart_dma.tx_buf_dma_phys +
360 UART_XMIT_SIZE) - start;
361
362 omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
363 OMAP_DMA_AMODE_CONSTANT,
364 up->uart_dma.uart_base, 0, 0);
365 omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
366 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
367 omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
368 OMAP_DMA_DATA_TYPE_S8,
369 up->uart_dma.tx_buf_size, 1,
370 OMAP_DMA_SYNC_ELEMENT,
371 up->uart_dma.uart_dma_tx, 0);
372 /* FIXME: Cache maintenance needed here? */
373 omap_start_dma(up->uart_dma.tx_dma_channel);
374} 304}
375 305
376static unsigned int check_modem_status(struct uart_omap_port *up) 306static unsigned int check_modem_status(struct uart_omap_port *up)
@@ -401,76 +331,162 @@ static unsigned int check_modem_status(struct uart_omap_port *up)
401 return status; 331 return status;
402} 332}
403 333
334static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr)
335{
336 unsigned int flag;
337 unsigned char ch = 0;
338
339 if (likely(lsr & UART_LSR_DR))
340 ch = serial_in(up, UART_RX);
341
342 up->port.icount.rx++;
343 flag = TTY_NORMAL;
344
345 if (lsr & UART_LSR_BI) {
346 flag = TTY_BREAK;
347 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
348 up->port.icount.brk++;
349 /*
350 * We do the SysRQ and SAK checking
351 * here because otherwise the break
352 * may get masked by ignore_status_mask
353 * or read_status_mask.
354 */
355 if (uart_handle_break(&up->port))
356 return;
357
358 }
359
360 if (lsr & UART_LSR_PE) {
361 flag = TTY_PARITY;
362 up->port.icount.parity++;
363 }
364
365 if (lsr & UART_LSR_FE) {
366 flag = TTY_FRAME;
367 up->port.icount.frame++;
368 }
369
370 if (lsr & UART_LSR_OE)
371 up->port.icount.overrun++;
372
373#ifdef CONFIG_SERIAL_OMAP_CONSOLE
374 if (up->port.line == up->port.cons->index) {
375 /* Recover the break flag from console xmit */
376 lsr |= up->lsr_break_flag;
377 }
378#endif
379 uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag);
380}
381
382static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr)
383{
384 unsigned char ch = 0;
385 unsigned int flag;
386
387 if (!(lsr & UART_LSR_DR))
388 return;
389
390 ch = serial_in(up, UART_RX);
391 flag = TTY_NORMAL;
392 up->port.icount.rx++;
393
394 if (uart_handle_sysrq_char(&up->port, ch))
395 return;
396
397 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
398}
399
404/** 400/**
405 * serial_omap_irq() - This handles the interrupt from one port 401 * serial_omap_irq() - This handles the interrupt from one port
406 * @irq: uart port irq number 402 * @irq: uart port irq number
407 * @dev_id: uart port info 403 * @dev_id: uart port info
408 */ 404 */
409static inline irqreturn_t serial_omap_irq(int irq, void *dev_id) 405static irqreturn_t serial_omap_irq(int irq, void *dev_id)
410{ 406{
411 struct uart_omap_port *up = dev_id; 407 struct uart_omap_port *up = dev_id;
408 struct tty_struct *tty = up->port.state->port.tty;
412 unsigned int iir, lsr; 409 unsigned int iir, lsr;
413 unsigned long flags; 410 unsigned int type;
411 irqreturn_t ret = IRQ_NONE;
412 int max_count = 256;
414 413
415 pm_runtime_get_sync(&up->pdev->dev); 414 spin_lock(&up->port.lock);
416 iir = serial_in(up, UART_IIR); 415 pm_runtime_get_sync(up->dev);
417 if (iir & UART_IIR_NO_INT) {
418 pm_runtime_mark_last_busy(&up->pdev->dev);
419 pm_runtime_put_autosuspend(&up->pdev->dev);
420 return IRQ_NONE;
421 }
422 416
423 spin_lock_irqsave(&up->port.lock, flags); 417 do {
424 lsr = serial_in(up, UART_LSR); 418 iir = serial_in(up, UART_IIR);
425 if (iir & UART_IIR_RLSI) { 419 if (iir & UART_IIR_NO_INT)
426 if (!up->use_dma) { 420 break;
427 if (lsr & UART_LSR_DR) 421
428 receive_chars(up, &lsr); 422 ret = IRQ_HANDLED;
429 } else { 423 lsr = serial_in(up, UART_LSR);
430 up->ier &= ~(UART_IER_RDI | UART_IER_RLSI); 424
431 serial_out(up, UART_IER, up->ier); 425 /* extract IRQ type from IIR register */
432 if ((serial_omap_start_rxdma(up) != 0) && 426 type = iir & 0x3e;
433 (lsr & UART_LSR_DR)) 427
434 receive_chars(up, &lsr); 428 switch (type) {
429 case UART_IIR_MSI:
430 check_modem_status(up);
431 break;
432 case UART_IIR_THRI:
433 transmit_chars(up, lsr);
434 break;
435 case UART_IIR_RX_TIMEOUT:
436 /* FALLTHROUGH */
437 case UART_IIR_RDI:
438 serial_omap_rdi(up, lsr);
439 break;
440 case UART_IIR_RLSI:
441 serial_omap_rlsi(up, lsr);
442 break;
443 case UART_IIR_CTS_RTS_DSR:
444 /* simply try again */
445 break;
446 case UART_IIR_XOFF:
447 /* FALLTHROUGH */
448 default:
449 break;
435 } 450 }
436 } 451 } while (!(iir & UART_IIR_NO_INT) && max_count--);
437 452
438 check_modem_status(up); 453 spin_unlock(&up->port.lock);
439 if ((lsr & UART_LSR_THRE) && (iir & UART_IIR_THRI))
440 transmit_chars(up);
441 454
442 spin_unlock_irqrestore(&up->port.lock, flags); 455 tty_flip_buffer_push(tty);
443 pm_runtime_mark_last_busy(&up->pdev->dev);
444 pm_runtime_put_autosuspend(&up->pdev->dev);
445 456
457 pm_runtime_mark_last_busy(up->dev);
458 pm_runtime_put_autosuspend(up->dev);
446 up->port_activity = jiffies; 459 up->port_activity = jiffies;
447 return IRQ_HANDLED; 460
461 return ret;
448} 462}
449 463
450static unsigned int serial_omap_tx_empty(struct uart_port *port) 464static unsigned int serial_omap_tx_empty(struct uart_port *port)
451{ 465{
452 struct uart_omap_port *up = (struct uart_omap_port *)port; 466 struct uart_omap_port *up = to_uart_omap_port(port);
453 unsigned long flags = 0; 467 unsigned long flags = 0;
454 unsigned int ret = 0; 468 unsigned int ret = 0;
455 469
456 pm_runtime_get_sync(&up->pdev->dev); 470 pm_runtime_get_sync(up->dev);
457 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 471 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line);
458 spin_lock_irqsave(&up->port.lock, flags); 472 spin_lock_irqsave(&up->port.lock, flags);
459 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 473 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
460 spin_unlock_irqrestore(&up->port.lock, flags); 474 spin_unlock_irqrestore(&up->port.lock, flags);
461 pm_runtime_put(&up->pdev->dev); 475 pm_runtime_mark_last_busy(up->dev);
476 pm_runtime_put_autosuspend(up->dev);
462 return ret; 477 return ret;
463} 478}
464 479
465static unsigned int serial_omap_get_mctrl(struct uart_port *port) 480static unsigned int serial_omap_get_mctrl(struct uart_port *port)
466{ 481{
467 struct uart_omap_port *up = (struct uart_omap_port *)port; 482 struct uart_omap_port *up = to_uart_omap_port(port);
468 unsigned int status; 483 unsigned int status;
469 unsigned int ret = 0; 484 unsigned int ret = 0;
470 485
471 pm_runtime_get_sync(&up->pdev->dev); 486 pm_runtime_get_sync(up->dev);
472 status = check_modem_status(up); 487 status = check_modem_status(up);
473 pm_runtime_put(&up->pdev->dev); 488 pm_runtime_mark_last_busy(up->dev);
489 pm_runtime_put_autosuspend(up->dev);
474 490
475 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 491 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line);
476 492
@@ -487,7 +503,7 @@ static unsigned int serial_omap_get_mctrl(struct uart_port *port)
487 503
488static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 504static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
489{ 505{
490 struct uart_omap_port *up = (struct uart_omap_port *)port; 506 struct uart_omap_port *up = to_uart_omap_port(port);
491 unsigned char mcr = 0; 507 unsigned char mcr = 0;
492 508
493 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 509 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line);
@@ -502,20 +518,31 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
502 if (mctrl & TIOCM_LOOP) 518 if (mctrl & TIOCM_LOOP)
503 mcr |= UART_MCR_LOOP; 519 mcr |= UART_MCR_LOOP;
504 520
505 pm_runtime_get_sync(&up->pdev->dev); 521 pm_runtime_get_sync(up->dev);
506 up->mcr = serial_in(up, UART_MCR); 522 up->mcr = serial_in(up, UART_MCR);
507 up->mcr |= mcr; 523 up->mcr |= mcr;
508 serial_out(up, UART_MCR, up->mcr); 524 serial_out(up, UART_MCR, up->mcr);
509 pm_runtime_put(&up->pdev->dev); 525 pm_runtime_mark_last_busy(up->dev);
526 pm_runtime_put_autosuspend(up->dev);
527
528 if (gpio_is_valid(up->DTR_gpio) &&
529 !!(mctrl & TIOCM_DTR) != up->DTR_active) {
530 up->DTR_active = !up->DTR_active;
531 if (gpio_cansleep(up->DTR_gpio))
532 schedule_work(&up->qos_work);
533 else
534 gpio_set_value(up->DTR_gpio,
535 up->DTR_active != up->DTR_inverted);
536 }
510} 537}
511 538
512static void serial_omap_break_ctl(struct uart_port *port, int break_state) 539static void serial_omap_break_ctl(struct uart_port *port, int break_state)
513{ 540{
514 struct uart_omap_port *up = (struct uart_omap_port *)port; 541 struct uart_omap_port *up = to_uart_omap_port(port);
515 unsigned long flags = 0; 542 unsigned long flags = 0;
516 543
517 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 544 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line);
518 pm_runtime_get_sync(&up->pdev->dev); 545 pm_runtime_get_sync(up->dev);
519 spin_lock_irqsave(&up->port.lock, flags); 546 spin_lock_irqsave(&up->port.lock, flags);
520 if (break_state == -1) 547 if (break_state == -1)
521 up->lcr |= UART_LCR_SBC; 548 up->lcr |= UART_LCR_SBC;
@@ -523,12 +550,13 @@ static void serial_omap_break_ctl(struct uart_port *port, int break_state)
523 up->lcr &= ~UART_LCR_SBC; 550 up->lcr &= ~UART_LCR_SBC;
524 serial_out(up, UART_LCR, up->lcr); 551 serial_out(up, UART_LCR, up->lcr);
525 spin_unlock_irqrestore(&up->port.lock, flags); 552 spin_unlock_irqrestore(&up->port.lock, flags);
526 pm_runtime_put(&up->pdev->dev); 553 pm_runtime_mark_last_busy(up->dev);
554 pm_runtime_put_autosuspend(up->dev);
527} 555}
528 556
529static int serial_omap_startup(struct uart_port *port) 557static int serial_omap_startup(struct uart_port *port)
530{ 558{
531 struct uart_omap_port *up = (struct uart_omap_port *)port; 559 struct uart_omap_port *up = to_uart_omap_port(port);
532 unsigned long flags = 0; 560 unsigned long flags = 0;
533 int retval; 561 int retval;
534 562
@@ -542,7 +570,7 @@ static int serial_omap_startup(struct uart_port *port)
542 570
543 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 571 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line);
544 572
545 pm_runtime_get_sync(&up->pdev->dev); 573 pm_runtime_get_sync(up->dev);
546 /* 574 /*
547 * Clear the FIFO buffers and disable them. 575 * Clear the FIFO buffers and disable them.
548 * (they will be reenabled in set_termios()) 576 * (they will be reenabled in set_termios())
@@ -573,20 +601,6 @@ static int serial_omap_startup(struct uart_port *port)
573 spin_unlock_irqrestore(&up->port.lock, flags); 601 spin_unlock_irqrestore(&up->port.lock, flags);
574 602
575 up->msr_saved_flags = 0; 603 up->msr_saved_flags = 0;
576 if (up->use_dma) {
577 free_page((unsigned long)up->port.state->xmit.buf);
578 up->port.state->xmit.buf = dma_alloc_coherent(NULL,
579 UART_XMIT_SIZE,
580 (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
581 0);
582 init_timer(&(up->uart_dma.rx_timer));
583 up->uart_dma.rx_timer.function = serial_omap_rxdma_poll;
584 up->uart_dma.rx_timer.data = up->port.line;
585 /* Currently the buffer size is 4KB. Can increase it */
586 up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
587 up->uart_dma.rx_buf_size,
588 (dma_addr_t *)&(up->uart_dma.rx_buf_dma_phys), 0);
589 }
590 /* 604 /*
591 * Finally, enable interrupts. Note: Modem status interrupts 605 * Finally, enable interrupts. Note: Modem status interrupts
592 * are set via set_termios(), which will be occurring imminently 606 * are set via set_termios(), which will be occurring imminently
@@ -598,20 +612,20 @@ static int serial_omap_startup(struct uart_port *port)
598 /* Enable module level wake up */ 612 /* Enable module level wake up */
599 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP); 613 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
600 614
601 pm_runtime_mark_last_busy(&up->pdev->dev); 615 pm_runtime_mark_last_busy(up->dev);
602 pm_runtime_put_autosuspend(&up->pdev->dev); 616 pm_runtime_put_autosuspend(up->dev);
603 up->port_activity = jiffies; 617 up->port_activity = jiffies;
604 return 0; 618 return 0;
605} 619}
606 620
607static void serial_omap_shutdown(struct uart_port *port) 621static void serial_omap_shutdown(struct uart_port *port)
608{ 622{
609 struct uart_omap_port *up = (struct uart_omap_port *)port; 623 struct uart_omap_port *up = to_uart_omap_port(port);
610 unsigned long flags = 0; 624 unsigned long flags = 0;
611 625
612 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 626 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line);
613 627
614 pm_runtime_get_sync(&up->pdev->dev); 628 pm_runtime_get_sync(up->dev);
615 /* 629 /*
616 * Disable interrupts from this port 630 * Disable interrupts from this port
617 */ 631 */
@@ -634,19 +648,9 @@ static void serial_omap_shutdown(struct uart_port *port)
634 */ 648 */
635 if (serial_in(up, UART_LSR) & UART_LSR_DR) 649 if (serial_in(up, UART_LSR) & UART_LSR_DR)
636 (void) serial_in(up, UART_RX); 650 (void) serial_in(up, UART_RX);
637 if (up->use_dma) {
638 dma_free_coherent(up->port.dev,
639 UART_XMIT_SIZE, up->port.state->xmit.buf,
640 up->uart_dma.tx_buf_dma_phys);
641 up->port.state->xmit.buf = NULL;
642 serial_omap_stop_rx(port);
643 dma_free_coherent(up->port.dev,
644 up->uart_dma.rx_buf_size, up->uart_dma.rx_buf,
645 up->uart_dma.rx_buf_dma_phys);
646 up->uart_dma.rx_buf = NULL;
647 }
648 651
649 pm_runtime_put(&up->pdev->dev); 652 pm_runtime_mark_last_busy(up->dev);
653 pm_runtime_put_autosuspend(up->dev);
650 free_irq(up->port.irq, up); 654 free_irq(up->port.irq, up);
651} 655}
652 656
@@ -667,19 +671,19 @@ serial_omap_configure_xonxoff
667 671
668 /* 672 /*
669 * IXON Flag: 673 * IXON Flag:
670 * Enable XON/XOFF flow control on output. 674 * Flow control for OMAP.TX
671 * Transmit XON1, XOFF1 675 * OMAP.RX should listen for XON/XOFF
672 */ 676 */
673 if (termios->c_iflag & IXON) 677 if (termios->c_iflag & IXON)
674 up->efr |= OMAP_UART_SW_TX; 678 up->efr |= OMAP_UART_SW_RX;
675 679
676 /* 680 /*
677 * IXOFF Flag: 681 * IXOFF Flag:
678 * Enable XON/XOFF flow control on input. 682 * Flow control for OMAP.RX
679 * Receiver compares XON1, XOFF1. 683 * OMAP.TX should send XON/XOFF
680 */ 684 */
681 if (termios->c_iflag & IXOFF) 685 if (termios->c_iflag & IXOFF)
682 up->efr |= OMAP_UART_SW_RX; 686 up->efr |= OMAP_UART_SW_TX;
683 687
684 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 688 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
685 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 689 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
@@ -715,13 +719,16 @@ static void serial_omap_uart_qos_work(struct work_struct *work)
715 qos_work); 719 qos_work);
716 720
717 pm_qos_update_request(&up->pm_qos_request, up->latency); 721 pm_qos_update_request(&up->pm_qos_request, up->latency);
722 if (gpio_is_valid(up->DTR_gpio))
723 gpio_set_value_cansleep(up->DTR_gpio,
724 up->DTR_active != up->DTR_inverted);
718} 725}
719 726
720static void 727static void
721serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 728serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
722 struct ktermios *old) 729 struct ktermios *old)
723{ 730{
724 struct uart_omap_port *up = (struct uart_omap_port *)port; 731 struct uart_omap_port *up = to_uart_omap_port(port);
725 unsigned char cval = 0; 732 unsigned char cval = 0;
726 unsigned char efr = 0; 733 unsigned char efr = 0;
727 unsigned long flags = 0; 734 unsigned long flags = 0;
@@ -768,14 +775,12 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
768 775
769 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 776 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
770 UART_FCR_ENABLE_FIFO; 777 UART_FCR_ENABLE_FIFO;
771 if (up->use_dma)
772 up->fcr |= UART_FCR_DMA_SELECT;
773 778
774 /* 779 /*
775 * Ok, we're now changing the port state. Do it with 780 * Ok, we're now changing the port state. Do it with
776 * interrupts disabled. 781 * interrupts disabled.
777 */ 782 */
778 pm_runtime_get_sync(&up->pdev->dev); 783 pm_runtime_get_sync(up->dev);
779 spin_lock_irqsave(&up->port.lock, flags); 784 spin_lock_irqsave(&up->port.lock, flags);
780 785
781 /* 786 /*
@@ -845,14 +850,13 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
845 850
846 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 851 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
847 852
848 if (up->use_dma) { 853 /* Set receive FIFO threshold to 16 characters and
849 serial_out(up, UART_TI752_TLR, 0); 854 * transmit FIFO threshold to 16 spaces
850 up->scr |= UART_FCR_TRIGGER_4; 855 */
851 } else { 856 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
852 /* Set receive FIFO threshold to 1 byte */ 857 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK;
853 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 858 up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 |
854 up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT); 859 UART_FCR_ENABLE_FIFO;
855 }
856 860
857 serial_out(up, UART_FCR, up->fcr); 861 serial_out(up, UART_FCR, up->fcr);
858 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 862 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
@@ -924,20 +928,30 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
924 serial_omap_configure_xonxoff(up, termios); 928 serial_omap_configure_xonxoff(up, termios);
925 929
926 spin_unlock_irqrestore(&up->port.lock, flags); 930 spin_unlock_irqrestore(&up->port.lock, flags);
927 pm_runtime_put(&up->pdev->dev); 931 pm_runtime_mark_last_busy(up->dev);
932 pm_runtime_put_autosuspend(up->dev);
928 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 933 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
929} 934}
930 935
936static int serial_omap_set_wake(struct uart_port *port, unsigned int state)
937{
938 struct uart_omap_port *up = to_uart_omap_port(port);
939
940 serial_omap_enable_wakeup(up, state);
941
942 return 0;
943}
944
931static void 945static void
932serial_omap_pm(struct uart_port *port, unsigned int state, 946serial_omap_pm(struct uart_port *port, unsigned int state,
933 unsigned int oldstate) 947 unsigned int oldstate)
934{ 948{
935 struct uart_omap_port *up = (struct uart_omap_port *)port; 949 struct uart_omap_port *up = to_uart_omap_port(port);
936 unsigned char efr; 950 unsigned char efr;
937 951
938 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 952 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line);
939 953
940 pm_runtime_get_sync(&up->pdev->dev); 954 pm_runtime_get_sync(up->dev);
941 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 955 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
942 efr = serial_in(up, UART_EFR); 956 efr = serial_in(up, UART_EFR);
943 serial_out(up, UART_EFR, efr | UART_EFR_ECB); 957 serial_out(up, UART_EFR, efr | UART_EFR_ECB);
@@ -948,14 +962,15 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
948 serial_out(up, UART_EFR, efr); 962 serial_out(up, UART_EFR, efr);
949 serial_out(up, UART_LCR, 0); 963 serial_out(up, UART_LCR, 0);
950 964
951 if (!device_may_wakeup(&up->pdev->dev)) { 965 if (!device_may_wakeup(up->dev)) {
952 if (!state) 966 if (!state)
953 pm_runtime_forbid(&up->pdev->dev); 967 pm_runtime_forbid(up->dev);
954 else 968 else
955 pm_runtime_allow(&up->pdev->dev); 969 pm_runtime_allow(up->dev);
956 } 970 }
957 971
958 pm_runtime_put(&up->pdev->dev); 972 pm_runtime_mark_last_busy(up->dev);
973 pm_runtime_put_autosuspend(up->dev);
959} 974}
960 975
961static void serial_omap_release_port(struct uart_port *port) 976static void serial_omap_release_port(struct uart_port *port)
@@ -971,7 +986,7 @@ static int serial_omap_request_port(struct uart_port *port)
971 986
972static void serial_omap_config_port(struct uart_port *port, int flags) 987static void serial_omap_config_port(struct uart_port *port, int flags)
973{ 988{
974 struct uart_omap_port *up = (struct uart_omap_port *)port; 989 struct uart_omap_port *up = to_uart_omap_port(port);
975 990
976 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 991 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
977 up->port.line); 992 up->port.line);
@@ -989,7 +1004,7 @@ serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
989static const char * 1004static const char *
990serial_omap_type(struct uart_port *port) 1005serial_omap_type(struct uart_port *port)
991{ 1006{
992 struct uart_omap_port *up = (struct uart_omap_port *)port; 1007 struct uart_omap_port *up = to_uart_omap_port(port);
993 1008
994 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 1009 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line);
995 return up->name; 1010 return up->name;
@@ -1032,26 +1047,33 @@ static inline void wait_for_xmitr(struct uart_omap_port *up)
1032 1047
1033static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 1048static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
1034{ 1049{
1035 struct uart_omap_port *up = (struct uart_omap_port *)port; 1050 struct uart_omap_port *up = to_uart_omap_port(port);
1036 1051
1037 pm_runtime_get_sync(&up->pdev->dev); 1052 pm_runtime_get_sync(up->dev);
1038 wait_for_xmitr(up); 1053 wait_for_xmitr(up);
1039 serial_out(up, UART_TX, ch); 1054 serial_out(up, UART_TX, ch);
1040 pm_runtime_put(&up->pdev->dev); 1055 pm_runtime_mark_last_busy(up->dev);
1056 pm_runtime_put_autosuspend(up->dev);
1041} 1057}
1042 1058
1043static int serial_omap_poll_get_char(struct uart_port *port) 1059static int serial_omap_poll_get_char(struct uart_port *port)
1044{ 1060{
1045 struct uart_omap_port *up = (struct uart_omap_port *)port; 1061 struct uart_omap_port *up = to_uart_omap_port(port);
1046 unsigned int status; 1062 unsigned int status;
1047 1063
1048 pm_runtime_get_sync(&up->pdev->dev); 1064 pm_runtime_get_sync(up->dev);
1049 status = serial_in(up, UART_LSR); 1065 status = serial_in(up, UART_LSR);
1050 if (!(status & UART_LSR_DR)) 1066 if (!(status & UART_LSR_DR)) {
1051 return NO_POLL_CHAR; 1067 status = NO_POLL_CHAR;
1068 goto out;
1069 }
1052 1070
1053 status = serial_in(up, UART_RX); 1071 status = serial_in(up, UART_RX);
1054 pm_runtime_put(&up->pdev->dev); 1072
1073out:
1074 pm_runtime_mark_last_busy(up->dev);
1075 pm_runtime_put_autosuspend(up->dev);
1076
1055 return status; 1077 return status;
1056} 1078}
1057 1079
@@ -1065,7 +1087,7 @@ static struct uart_driver serial_omap_reg;
1065 1087
1066static void serial_omap_console_putchar(struct uart_port *port, int ch) 1088static void serial_omap_console_putchar(struct uart_port *port, int ch)
1067{ 1089{
1068 struct uart_omap_port *up = (struct uart_omap_port *)port; 1090 struct uart_omap_port *up = to_uart_omap_port(port);
1069 1091
1070 wait_for_xmitr(up); 1092 wait_for_xmitr(up);
1071 serial_out(up, UART_TX, ch); 1093 serial_out(up, UART_TX, ch);
@@ -1080,7 +1102,7 @@ serial_omap_console_write(struct console *co, const char *s,
1080 unsigned int ier; 1102 unsigned int ier;
1081 int locked = 1; 1103 int locked = 1;
1082 1104
1083 pm_runtime_get_sync(&up->pdev->dev); 1105 pm_runtime_get_sync(up->dev);
1084 1106
1085 local_irq_save(flags); 1107 local_irq_save(flags);
1086 if (up->port.sysrq) 1108 if (up->port.sysrq)
@@ -1114,8 +1136,8 @@ serial_omap_console_write(struct console *co, const char *s,
1114 if (up->msr_saved_flags) 1136 if (up->msr_saved_flags)
1115 check_modem_status(up); 1137 check_modem_status(up);
1116 1138
1117 pm_runtime_mark_last_busy(&up->pdev->dev); 1139 pm_runtime_mark_last_busy(up->dev);
1118 pm_runtime_put_autosuspend(&up->pdev->dev); 1140 pm_runtime_put_autosuspend(up->dev);
1119 if (locked) 1141 if (locked)
1120 spin_unlock(&up->port.lock); 1142 spin_unlock(&up->port.lock);
1121 local_irq_restore(flags); 1143 local_irq_restore(flags);
@@ -1179,6 +1201,7 @@ static struct uart_ops serial_omap_pops = {
1179 .shutdown = serial_omap_shutdown, 1201 .shutdown = serial_omap_shutdown,
1180 .set_termios = serial_omap_set_termios, 1202 .set_termios = serial_omap_set_termios,
1181 .pm = serial_omap_pm, 1203 .pm = serial_omap_pm,
1204 .set_wake = serial_omap_set_wake,
1182 .type = serial_omap_type, 1205 .type = serial_omap_type,
1183 .release_port = serial_omap_release_port, 1206 .release_port = serial_omap_release_port,
1184 .request_port = serial_omap_request_port, 1207 .request_port = serial_omap_request_port,
@@ -1203,10 +1226,8 @@ static int serial_omap_suspend(struct device *dev)
1203{ 1226{
1204 struct uart_omap_port *up = dev_get_drvdata(dev); 1227 struct uart_omap_port *up = dev_get_drvdata(dev);
1205 1228
1206 if (up) { 1229 uart_suspend_port(&serial_omap_reg, &up->port);
1207 uart_suspend_port(&serial_omap_reg, &up->port); 1230 flush_work_sync(&up->qos_work);
1208 flush_work_sync(&up->qos_work);
1209 }
1210 1231
1211 return 0; 1232 return 0;
1212} 1233}
@@ -1215,156 +1236,13 @@ static int serial_omap_resume(struct device *dev)
1215{ 1236{
1216 struct uart_omap_port *up = dev_get_drvdata(dev); 1237 struct uart_omap_port *up = dev_get_drvdata(dev);
1217 1238
1218 if (up) 1239 uart_resume_port(&serial_omap_reg, &up->port);
1219 uart_resume_port(&serial_omap_reg, &up->port); 1240
1220 return 0; 1241 return 0;
1221} 1242}
1222#endif 1243#endif
1223 1244
1224static void serial_omap_rxdma_poll(unsigned long uart_no) 1245static void __devinit omap_serial_fill_features_erratas(struct uart_omap_port *up)
1225{
1226 struct uart_omap_port *up = ui[uart_no];
1227 unsigned int curr_dma_pos, curr_transmitted_size;
1228 int ret = 0;
1229
1230 curr_dma_pos = omap_get_dma_dst_pos(up->uart_dma.rx_dma_channel);
1231 if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
1232 (curr_dma_pos == 0)) {
1233 if (jiffies_to_msecs(jiffies - up->port_activity) <
1234 up->uart_dma.rx_timeout) {
1235 mod_timer(&up->uart_dma.rx_timer, jiffies +
1236 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1237 } else {
1238 serial_omap_stop_rxdma(up);
1239 up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1240 serial_out(up, UART_IER, up->ier);
1241 }
1242 return;
1243 }
1244
1245 curr_transmitted_size = curr_dma_pos -
1246 up->uart_dma.prev_rx_dma_pos;
1247 up->port.icount.rx += curr_transmitted_size;
1248 tty_insert_flip_string(up->port.state->port.tty,
1249 up->uart_dma.rx_buf +
1250 (up->uart_dma.prev_rx_dma_pos -
1251 up->uart_dma.rx_buf_dma_phys),
1252 curr_transmitted_size);
1253 tty_flip_buffer_push(up->port.state->port.tty);
1254 up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
1255 if (up->uart_dma.rx_buf_size +
1256 up->uart_dma.rx_buf_dma_phys == curr_dma_pos) {
1257 ret = serial_omap_start_rxdma(up);
1258 if (ret < 0) {
1259 serial_omap_stop_rxdma(up);
1260 up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1261 serial_out(up, UART_IER, up->ier);
1262 }
1263 } else {
1264 mod_timer(&up->uart_dma.rx_timer, jiffies +
1265 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1266 }
1267 up->port_activity = jiffies;
1268}
1269
1270static void uart_rx_dma_callback(int lch, u16 ch_status, void *data)
1271{
1272 return;
1273}
1274
1275static int serial_omap_start_rxdma(struct uart_omap_port *up)
1276{
1277 int ret = 0;
1278
1279 if (up->uart_dma.rx_dma_channel == -1) {
1280 pm_runtime_get_sync(&up->pdev->dev);
1281 ret = omap_request_dma(up->uart_dma.uart_dma_rx,
1282 "UART Rx DMA",
1283 (void *)uart_rx_dma_callback, up,
1284 &(up->uart_dma.rx_dma_channel));
1285 if (ret < 0)
1286 return ret;
1287
1288 omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
1289 OMAP_DMA_AMODE_CONSTANT,
1290 up->uart_dma.uart_base, 0, 0);
1291 omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
1292 OMAP_DMA_AMODE_POST_INC,
1293 up->uart_dma.rx_buf_dma_phys, 0, 0);
1294 omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
1295 OMAP_DMA_DATA_TYPE_S8,
1296 up->uart_dma.rx_buf_size, 1,
1297 OMAP_DMA_SYNC_ELEMENT,
1298 up->uart_dma.uart_dma_rx, 0);
1299 }
1300 up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
1301 /* FIXME: Cache maintenance needed here? */
1302 omap_start_dma(up->uart_dma.rx_dma_channel);
1303 mod_timer(&up->uart_dma.rx_timer, jiffies +
1304 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1305 up->uart_dma.rx_dma_used = true;
1306 return ret;
1307}
1308
1309static void serial_omap_continue_tx(struct uart_omap_port *up)
1310{
1311 struct circ_buf *xmit = &up->port.state->xmit;
1312 unsigned int start = up->uart_dma.tx_buf_dma_phys
1313 + (xmit->tail & (UART_XMIT_SIZE - 1));
1314
1315 if (uart_circ_empty(xmit))
1316 return;
1317
1318 up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
1319 /*
1320 * It is a circular buffer. See if the buffer has wounded back.
1321 * If yes it will have to be transferred in two separate dma
1322 * transfers
1323 */
1324 if (start + up->uart_dma.tx_buf_size >=
1325 up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
1326 up->uart_dma.tx_buf_size =
1327 (up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE) - start;
1328 omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
1329 OMAP_DMA_AMODE_CONSTANT,
1330 up->uart_dma.uart_base, 0, 0);
1331 omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
1332 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
1333 omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
1334 OMAP_DMA_DATA_TYPE_S8,
1335 up->uart_dma.tx_buf_size, 1,
1336 OMAP_DMA_SYNC_ELEMENT,
1337 up->uart_dma.uart_dma_tx, 0);
1338 /* FIXME: Cache maintenance needed here? */
1339 omap_start_dma(up->uart_dma.tx_dma_channel);
1340}
1341
1342static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1343{
1344 struct uart_omap_port *up = (struct uart_omap_port *)data;
1345 struct circ_buf *xmit = &up->port.state->xmit;
1346
1347 xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
1348 (UART_XMIT_SIZE - 1);
1349 up->port.icount.tx += up->uart_dma.tx_buf_size;
1350
1351 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1352 uart_write_wakeup(&up->port);
1353
1354 if (uart_circ_empty(xmit)) {
1355 spin_lock(&(up->uart_dma.tx_lock));
1356 serial_omap_stop_tx(&up->port);
1357 up->uart_dma.tx_dma_used = false;
1358 spin_unlock(&(up->uart_dma.tx_lock));
1359 } else {
1360 omap_stop_dma(up->uart_dma.tx_dma_channel);
1361 serial_omap_continue_tx(up);
1362 }
1363 up->port_activity = jiffies;
1364 return;
1365}
1366
1367static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
1368{ 1246{
1369 u32 mvr, scheme; 1247 u32 mvr, scheme;
1370 u16 revision, major, minor; 1248 u16 revision, major, minor;
@@ -1389,7 +1267,7 @@ static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
1389 minor = (mvr & OMAP_UART_MVR_MIN_MASK); 1267 minor = (mvr & OMAP_UART_MVR_MIN_MASK);
1390 break; 1268 break;
1391 default: 1269 default:
1392 dev_warn(&up->pdev->dev, 1270 dev_warn(up->dev,
1393 "Unknown %s revision, defaulting to highest\n", 1271 "Unknown %s revision, defaulting to highest\n",
1394 up->name); 1272 up->name);
1395 /* highest possible revision */ 1273 /* highest possible revision */
@@ -1417,7 +1295,7 @@ static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
1417 } 1295 }
1418} 1296}
1419 1297
1420static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1298static __devinit struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
1421{ 1299{
1422 struct omap_uart_port_info *omap_up_info; 1300 struct omap_uart_port_info *omap_up_info;
1423 1301
@@ -1430,12 +1308,12 @@ static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
1430 return omap_up_info; 1308 return omap_up_info;
1431} 1309}
1432 1310
1433static int serial_omap_probe(struct platform_device *pdev) 1311static int __devinit serial_omap_probe(struct platform_device *pdev)
1434{ 1312{
1435 struct uart_omap_port *up; 1313 struct uart_omap_port *up;
1436 struct resource *mem, *irq, *dma_tx, *dma_rx; 1314 struct resource *mem, *irq;
1437 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data; 1315 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
1438 int ret = -ENOSPC; 1316 int ret;
1439 1317
1440 if (pdev->dev.of_node) 1318 if (pdev->dev.of_node)
1441 omap_up_info = of_get_uart_port_info(&pdev->dev); 1319 omap_up_info = of_get_uart_port_info(&pdev->dev);
@@ -1458,19 +1336,30 @@ static int serial_omap_probe(struct platform_device *pdev)
1458 return -EBUSY; 1336 return -EBUSY;
1459 } 1337 }
1460 1338
1461 dma_rx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); 1339 if (gpio_is_valid(omap_up_info->DTR_gpio) &&
1462 if (!dma_rx) 1340 omap_up_info->DTR_present) {
1463 return -ENXIO; 1341 ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial");
1464 1342 if (ret < 0)
1465 dma_tx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); 1343 return ret;
1466 if (!dma_tx) 1344 ret = gpio_direction_output(omap_up_info->DTR_gpio,
1467 return -ENXIO; 1345 omap_up_info->DTR_inverted);
1346 if (ret < 0)
1347 return ret;
1348 }
1468 1349
1469 up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1350 up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL);
1470 if (!up) 1351 if (!up)
1471 return -ENOMEM; 1352 return -ENOMEM;
1472 1353
1473 up->pdev = pdev; 1354 if (gpio_is_valid(omap_up_info->DTR_gpio) &&
1355 omap_up_info->DTR_present) {
1356 up->DTR_gpio = omap_up_info->DTR_gpio;
1357 up->DTR_inverted = omap_up_info->DTR_inverted;
1358 } else
1359 up->DTR_gpio = -EINVAL;
1360 up->DTR_active = 0;
1361
1362 up->dev = &pdev->dev;
1474 up->port.dev = &pdev->dev; 1363 up->port.dev = &pdev->dev;
1475 up->port.type = PORT_OMAP; 1364 up->port.type = PORT_OMAP;
1476 up->port.iotype = UPIO_MEM; 1365 up->port.iotype = UPIO_MEM;
@@ -1492,6 +1381,13 @@ static int serial_omap_probe(struct platform_device *pdev)
1492 goto err_port_line; 1381 goto err_port_line;
1493 } 1382 }
1494 1383
1384 up->pins = devm_pinctrl_get_select_default(&pdev->dev);
1385 if (IS_ERR(up->pins)) {
1386 dev_warn(&pdev->dev, "did not get pins for uart%i error: %li\n",
1387 up->port.line, PTR_ERR(up->pins));
1388 up->pins = NULL;
1389 }
1390
1495 sprintf(up->name, "OMAP UART%d", up->port.line); 1391 sprintf(up->name, "OMAP UART%d", up->port.line);
1496 up->port.mapbase = mem->start; 1392 up->port.mapbase = mem->start;
1497 up->port.membase = devm_ioremap(&pdev->dev, mem->start, 1393 up->port.membase = devm_ioremap(&pdev->dev, mem->start,
@@ -1509,20 +1405,6 @@ static int serial_omap_probe(struct platform_device *pdev)
1509 dev_warn(&pdev->dev, "No clock speed specified: using default:" 1405 dev_warn(&pdev->dev, "No clock speed specified: using default:"
1510 "%d\n", DEFAULT_CLK_SPEED); 1406 "%d\n", DEFAULT_CLK_SPEED);
1511 } 1407 }
1512 up->uart_dma.uart_base = mem->start;
1513
1514 if (omap_up_info->dma_enabled) {
1515 up->uart_dma.uart_dma_tx = dma_tx->start;
1516 up->uart_dma.uart_dma_rx = dma_rx->start;
1517 up->use_dma = 1;
1518 up->uart_dma.rx_buf_size = omap_up_info->dma_rx_buf_size;
1519 up->uart_dma.rx_timeout = omap_up_info->dma_rx_timeout;
1520 up->uart_dma.rx_poll_rate = omap_up_info->dma_rx_poll_rate;
1521 spin_lock_init(&(up->uart_dma.tx_lock));
1522 spin_lock_init(&(up->uart_dma.rx_lock));
1523 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
1524 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
1525 }
1526 1408
1527 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1409 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1528 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1410 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
@@ -1531,12 +1413,13 @@ static int serial_omap_probe(struct platform_device *pdev)
1531 serial_omap_uart_wq = create_singlethread_workqueue(up->name); 1413 serial_omap_uart_wq = create_singlethread_workqueue(up->name);
1532 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 1414 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work);
1533 1415
1416 platform_set_drvdata(pdev, up);
1417 pm_runtime_enable(&pdev->dev);
1534 pm_runtime_use_autosuspend(&pdev->dev); 1418 pm_runtime_use_autosuspend(&pdev->dev);
1535 pm_runtime_set_autosuspend_delay(&pdev->dev, 1419 pm_runtime_set_autosuspend_delay(&pdev->dev,
1536 omap_up_info->autosuspend_timeout); 1420 omap_up_info->autosuspend_timeout);
1537 1421
1538 pm_runtime_irq_safe(&pdev->dev); 1422 pm_runtime_irq_safe(&pdev->dev);
1539 pm_runtime_enable(&pdev->dev);
1540 pm_runtime_get_sync(&pdev->dev); 1423 pm_runtime_get_sync(&pdev->dev);
1541 1424
1542 omap_serial_fill_features_erratas(up); 1425 omap_serial_fill_features_erratas(up);
@@ -1548,8 +1431,8 @@ static int serial_omap_probe(struct platform_device *pdev)
1548 if (ret != 0) 1431 if (ret != 0)
1549 goto err_add_port; 1432 goto err_add_port;
1550 1433
1551 pm_runtime_put(&pdev->dev); 1434 pm_runtime_mark_last_busy(up->dev);
1552 platform_set_drvdata(pdev, up); 1435 pm_runtime_put_autosuspend(up->dev);
1553 return 0; 1436 return 0;
1554 1437
1555err_add_port: 1438err_add_port:
@@ -1562,17 +1445,15 @@ err_port_line:
1562 return ret; 1445 return ret;
1563} 1446}
1564 1447
1565static int serial_omap_remove(struct platform_device *dev) 1448static int __devexit serial_omap_remove(struct platform_device *dev)
1566{ 1449{
1567 struct uart_omap_port *up = platform_get_drvdata(dev); 1450 struct uart_omap_port *up = platform_get_drvdata(dev);
1568 1451
1569 if (up) { 1452 pm_runtime_put_sync(up->dev);
1570 pm_runtime_disable(&up->pdev->dev); 1453 pm_runtime_disable(up->dev);
1571 uart_remove_one_port(&serial_omap_reg, &up->port); 1454 uart_remove_one_port(&serial_omap_reg, &up->port);
1572 pm_qos_remove_request(&up->pm_qos_request); 1455 pm_qos_remove_request(&up->pm_qos_request);
1573 }
1574 1456
1575 platform_set_drvdata(dev, NULL);
1576 return 0; 1457 return 0;
1577} 1458}
1578 1459
@@ -1602,7 +1483,7 @@ static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
1602 timeout--; 1483 timeout--;
1603 if (!timeout) { 1484 if (!timeout) {
1604 /* Should *never* happen. we warn and carry on */ 1485 /* Should *never* happen. we warn and carry on */
1605 dev_crit(&up->pdev->dev, "Errata i202: timedout %x\n", 1486 dev_crit(up->dev, "Errata i202: timedout %x\n",
1606 serial_in(up, UART_LSR)); 1487 serial_in(up, UART_LSR));
1607 break; 1488 break;
1608 } 1489 }
@@ -1648,29 +1529,23 @@ static int serial_omap_runtime_suspend(struct device *dev)
1648 if (!up) 1529 if (!up)
1649 return -EINVAL; 1530 return -EINVAL;
1650 1531
1651 if (!pdata || !pdata->enable_wakeup) 1532 if (!pdata)
1652 return 0; 1533 return 0;
1653 1534
1654 if (pdata->get_context_loss_count) 1535 up->context_loss_cnt = serial_omap_get_context_loss_count(up);
1655 up->context_loss_cnt = pdata->get_context_loss_count(dev);
1656 1536
1657 if (device_may_wakeup(dev)) { 1537 if (device_may_wakeup(dev)) {
1658 if (!up->wakeups_enabled) { 1538 if (!up->wakeups_enabled) {
1659 pdata->enable_wakeup(up->pdev, true); 1539 serial_omap_enable_wakeup(up, true);
1660 up->wakeups_enabled = true; 1540 up->wakeups_enabled = true;
1661 } 1541 }
1662 } else { 1542 } else {
1663 if (up->wakeups_enabled) { 1543 if (up->wakeups_enabled) {
1664 pdata->enable_wakeup(up->pdev, false); 1544 serial_omap_enable_wakeup(up, false);
1665 up->wakeups_enabled = false; 1545 up->wakeups_enabled = false;
1666 } 1546 }
1667 } 1547 }
1668 1548
1669 /* Errata i291 */
1670 if (up->use_dma && pdata->set_forceidle &&
1671 (up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
1672 pdata->set_forceidle(up->pdev);
1673
1674 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1549 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1675 schedule_work(&up->qos_work); 1550 schedule_work(&up->qos_work);
1676 1551
@@ -1680,24 +1555,14 @@ static int serial_omap_runtime_suspend(struct device *dev)
1680static int serial_omap_runtime_resume(struct device *dev) 1555static int serial_omap_runtime_resume(struct device *dev)
1681{ 1556{
1682 struct uart_omap_port *up = dev_get_drvdata(dev); 1557 struct uart_omap_port *up = dev_get_drvdata(dev);
1683 struct omap_uart_port_info *pdata = dev->platform_data;
1684
1685 if (up && pdata) {
1686 if (pdata->get_context_loss_count) {
1687 u32 loss_cnt = pdata->get_context_loss_count(dev);
1688 1558
1689 if (up->context_loss_cnt != loss_cnt) 1559 u32 loss_cnt = serial_omap_get_context_loss_count(up);
1690 serial_omap_restore_context(up);
1691 }
1692 1560
1693 /* Errata i291 */ 1561 if (up->context_loss_cnt != loss_cnt)
1694 if (up->use_dma && pdata->set_noidle && 1562 serial_omap_restore_context(up);
1695 (up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
1696 pdata->set_noidle(up->pdev);
1697 1563
1698 up->latency = up->calc_latency; 1564 up->latency = up->calc_latency;
1699 schedule_work(&up->qos_work); 1565 schedule_work(&up->qos_work);
1700 }
1701 1566
1702 return 0; 1567 return 0;
1703} 1568}
@@ -1721,7 +1586,7 @@ MODULE_DEVICE_TABLE(of, omap_serial_of_match);
1721 1586
1722static struct platform_driver serial_omap_driver = { 1587static struct platform_driver serial_omap_driver = {
1723 .probe = serial_omap_probe, 1588 .probe = serial_omap_probe,
1724 .remove = serial_omap_remove, 1589 .remove = __devexit_p(serial_omap_remove),
1725 .driver = { 1590 .driver = {
1726 .name = DRIVER_NAME, 1591 .name = DRIVER_NAME,
1727 .pm = &serial_omap_dev_pm_ops, 1592 .pm = &serial_omap_dev_pm_ops,
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 02:17:51 -0500