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path: root/drivers/tty/serial/8250/8250.h
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Diffstat (limited to 'drivers/tty/serial/8250/8250.h')
-rw-r--r--drivers/tty/serial/8250/8250.h34
1 files changed, 1 insertions, 33 deletions
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
index f9719d167c8d..0c5e908df0b5 100644
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
@@ -13,36 +13,6 @@
13 13
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15 15
16struct uart_8250_port {
17 struct uart_port port;
18 struct timer_list timer; /* "no irq" timer */
19 struct list_head list; /* ports on this IRQ */
20 unsigned short capabilities; /* port capabilities */
21 unsigned short bugs; /* port bugs */
22 unsigned int tx_loadsz; /* transmit fifo load size */
23 unsigned char acr;
24 unsigned char ier;
25 unsigned char lcr;
26 unsigned char mcr;
27 unsigned char mcr_mask; /* mask of user bits */
28 unsigned char mcr_force; /* mask of forced bits */
29 unsigned char cur_iotype; /* Running I/O type */
30
31 /*
32 * Some bits in registers are cleared on a read, so they must
33 * be saved whenever the register is read but the bits will not
34 * be immediately processed.
35 */
36#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
37 unsigned char lsr_saved_flags;
38#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
39 unsigned char msr_saved_flags;
40
41 /* 8250 specific callbacks */
42 int (*dl_read)(struct uart_8250_port *);
43 void (*dl_write)(struct uart_8250_port *, int);
44};
45
46struct old_serial_port { 16struct old_serial_port {
47 unsigned int uart; 17 unsigned int uart;
48 unsigned int baud_base; 18 unsigned int baud_base;
@@ -56,9 +26,6 @@ struct old_serial_port {
56 unsigned long irqflags; 26 unsigned long irqflags;
57}; 27};
58 28
59/*
60 * This replaces serial_uart_config in include/linux/serial.h
61 */
62struct serial8250_config { 29struct serial8250_config {
63 const char *name; 30 const char *name;
64 unsigned short fifo_size; 31 unsigned short fifo_size;
@@ -78,6 +45,7 @@ struct serial8250_config {
78#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */ 45#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
79#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */ 46#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
80#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */ 47#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
48#define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
81 49
82#define PROBE_RSA (1 << 0) 50#define PROBE_RSA (1 << 0)
83#define PROBE_ANY (~0) 51#define PROBE_ANY (~0)