diff options
Diffstat (limited to 'drivers/thermal/samsung/exynos_tmu_data.c')
-rw-r--r-- | drivers/thermal/samsung/exynos_tmu_data.c | 30 |
1 files changed, 24 insertions, 6 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c index 9002499c1f69..073c292baa53 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.c +++ b/drivers/thermal/samsung/exynos_tmu_data.c | |||
@@ -90,14 +90,15 @@ struct exynos_tmu_init_data const exynos4210_default_tmu_data = { | |||
90 | }; | 90 | }; |
91 | #endif | 91 | #endif |
92 | 92 | ||
93 | #if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412) | 93 | #if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250) |
94 | static const struct exynos_tmu_registers exynos5250_tmu_registers = { | 94 | static const struct exynos_tmu_registers exynos4412_tmu_registers = { |
95 | .triminfo_data = EXYNOS_TMU_REG_TRIMINFO, | 95 | .triminfo_data = EXYNOS_TMU_REG_TRIMINFO, |
96 | .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT, | 96 | .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT, |
97 | .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT, | 97 | .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT, |
98 | .triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON, | 98 | .triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON, |
99 | .triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT, | 99 | .triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT, |
100 | .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, | 100 | .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, |
101 | .test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT, | ||
101 | .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT, | 102 | .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT, |
102 | .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK, | 103 | .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK, |
103 | .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT, | 104 | .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT, |
@@ -128,7 +129,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = { | |||
128 | .emul_time_mask = EXYNOS_EMUL_TIME_MASK, | 129 | .emul_time_mask = EXYNOS_EMUL_TIME_MASK, |
129 | }; | 130 | }; |
130 | 131 | ||
131 | #define EXYNOS5250_TMU_DATA \ | 132 | #define EXYNOS4412_TMU_DATA \ |
132 | .threshold_falling = 10, \ | 133 | .threshold_falling = 10, \ |
133 | .trigger_levels[0] = 85, \ | 134 | .trigger_levels[0] = 85, \ |
134 | .trigger_levels[1] = 103, \ | 135 | .trigger_levels[1] = 103, \ |
@@ -162,15 +163,32 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = { | |||
162 | .temp_level = 103, \ | 163 | .temp_level = 103, \ |
163 | }, \ | 164 | }, \ |
164 | .freq_tab_count = 2, \ | 165 | .freq_tab_count = 2, \ |
165 | .type = SOC_ARCH_EXYNOS, \ | 166 | .registers = &exynos4412_tmu_registers, \ |
166 | .registers = &exynos5250_tmu_registers, \ | ||
167 | .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \ | 167 | .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \ |
168 | TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \ | 168 | TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \ |
169 | TMU_SUPPORT_EMUL_TIME) | 169 | TMU_SUPPORT_EMUL_TIME) |
170 | #endif | ||
170 | 171 | ||
172 | #if defined(CONFIG_SOC_EXYNOS4412) | ||
173 | struct exynos_tmu_init_data const exynos4412_default_tmu_data = { | ||
174 | .tmu_data = { | ||
175 | { | ||
176 | EXYNOS4412_TMU_DATA, | ||
177 | .type = SOC_ARCH_EXYNOS4412, | ||
178 | .test_mux = EXYNOS4412_MUX_ADDR_VALUE, | ||
179 | }, | ||
180 | }, | ||
181 | .tmu_count = 1, | ||
182 | }; | ||
183 | #endif | ||
184 | |||
185 | #if defined(CONFIG_SOC_EXYNOS5250) | ||
171 | struct exynos_tmu_init_data const exynos5250_default_tmu_data = { | 186 | struct exynos_tmu_init_data const exynos5250_default_tmu_data = { |
172 | .tmu_data = { | 187 | .tmu_data = { |
173 | { EXYNOS5250_TMU_DATA }, | 188 | { |
189 | EXYNOS4412_TMU_DATA, | ||
190 | .type = SOC_ARCH_EXYNOS5250, | ||
191 | }, | ||
174 | }, | 192 | }, |
175 | .tmu_count = 1, | 193 | .tmu_count = 1, |
176 | }; | 194 | }; |