diff options
Diffstat (limited to 'drivers/thermal/samsung/exynos_tmu.h')
| -rw-r--r-- | drivers/thermal/samsung/exynos_tmu.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h index b364c9eee701..3fb65547e64c 100644 --- a/drivers/thermal/samsung/exynos_tmu.h +++ b/drivers/thermal/samsung/exynos_tmu.h | |||
| @@ -41,7 +41,8 @@ enum calibration_mode { | |||
| 41 | 41 | ||
| 42 | enum soc_type { | 42 | enum soc_type { |
| 43 | SOC_ARCH_EXYNOS4210 = 1, | 43 | SOC_ARCH_EXYNOS4210 = 1, |
| 44 | SOC_ARCH_EXYNOS, | 44 | SOC_ARCH_EXYNOS4412, |
| 45 | SOC_ARCH_EXYNOS5250, | ||
| 45 | SOC_ARCH_EXYNOS5440, | 46 | SOC_ARCH_EXYNOS5440, |
| 46 | }; | 47 | }; |
| 47 | 48 | ||
| @@ -84,6 +85,7 @@ enum soc_type { | |||
| 84 | * @triminfo_reload_shift: shift of triminfo reload enable bit in triminfo_ctrl | 85 | * @triminfo_reload_shift: shift of triminfo reload enable bit in triminfo_ctrl |
| 85 | reg. | 86 | reg. |
| 86 | * @tmu_ctrl: TMU main controller register. | 87 | * @tmu_ctrl: TMU main controller register. |
| 88 | * @test_mux_addr_shift: shift bits of test mux address. | ||
| 87 | * @buf_vref_sel_shift: shift bits of reference voltage in tmu_ctrl register. | 89 | * @buf_vref_sel_shift: shift bits of reference voltage in tmu_ctrl register. |
| 88 | * @buf_vref_sel_mask: mask bits of reference voltage in tmu_ctrl register. | 90 | * @buf_vref_sel_mask: mask bits of reference voltage in tmu_ctrl register. |
| 89 | * @therm_trip_mode_shift: shift bits of tripping mode in tmu_ctrl register. | 91 | * @therm_trip_mode_shift: shift bits of tripping mode in tmu_ctrl register. |
| @@ -150,6 +152,7 @@ struct exynos_tmu_registers { | |||
| 150 | u32 triminfo_reload_shift; | 152 | u32 triminfo_reload_shift; |
| 151 | 153 | ||
| 152 | u32 tmu_ctrl; | 154 | u32 tmu_ctrl; |
| 155 | u32 test_mux_addr_shift; | ||
| 153 | u32 buf_vref_sel_shift; | 156 | u32 buf_vref_sel_shift; |
| 154 | u32 buf_vref_sel_mask; | 157 | u32 buf_vref_sel_mask; |
| 155 | u32 therm_trip_mode_shift; | 158 | u32 therm_trip_mode_shift; |
| @@ -257,6 +260,7 @@ struct exynos_tmu_registers { | |||
| 257 | * @first_point_trim: temp value of the first point trimming | 260 | * @first_point_trim: temp value of the first point trimming |
| 258 | * @second_point_trim: temp value of the second point trimming | 261 | * @second_point_trim: temp value of the second point trimming |
| 259 | * @default_temp_offset: default temperature offset in case of no trimming | 262 | * @default_temp_offset: default temperature offset in case of no trimming |
| 263 | * @test_mux; information if SoC supports test MUX | ||
| 260 | * @cal_type: calibration type for temperature | 264 | * @cal_type: calibration type for temperature |
| 261 | * @cal_mode: calibration mode for temperature | 265 | * @cal_mode: calibration mode for temperature |
| 262 | * @freq_clip_table: Table representing frequency reduction percentage. | 266 | * @freq_clip_table: Table representing frequency reduction percentage. |
| @@ -286,6 +290,7 @@ struct exynos_tmu_platform_data { | |||
| 286 | u8 first_point_trim; | 290 | u8 first_point_trim; |
| 287 | u8 second_point_trim; | 291 | u8 second_point_trim; |
| 288 | u8 default_temp_offset; | 292 | u8 default_temp_offset; |
| 293 | u8 test_mux; | ||
| 289 | 294 | ||
| 290 | enum calibration_type cal_type; | 295 | enum calibration_type cal_type; |
| 291 | enum calibration_mode cal_mode; | 296 | enum calibration_mode cal_mode; |
