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path: root/drivers/telephony/ixj.c
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Diffstat (limited to 'drivers/telephony/ixj.c')
-rw-r--r--drivers/telephony/ixj.c39
1 files changed, 20 insertions, 19 deletions
diff --git a/drivers/telephony/ixj.c b/drivers/telephony/ixj.c
index df4cc1fb5f68..58deaac5b373 100644
--- a/drivers/telephony/ixj.c
+++ b/drivers/telephony/ixj.c
@@ -648,9 +648,9 @@ static inline BYTE SLIC_GetState(IXJ *j)
648 return j->pld_slicr.bits.state; 648 return j->pld_slicr.bits.state;
649} 649}
650 650
651static BOOL SLIC_SetState(BYTE byState, IXJ *j) 651static bool SLIC_SetState(BYTE byState, IXJ *j)
652{ 652{
653 BOOL fRetVal = FALSE; 653 bool fRetVal = false;
654 654
655 if (j->cardtype == QTI_PHONECARD) { 655 if (j->cardtype == QTI_PHONECARD) {
656 if (j->flags.pcmciasct) { 656 if (j->flags.pcmciasct) {
@@ -659,14 +659,14 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
659 case PLD_SLIC_STATE_OC: 659 case PLD_SLIC_STATE_OC:
660 j->pslic.bits.powerdown = 1; 660 j->pslic.bits.powerdown = 1;
661 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0; 661 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
662 fRetVal = TRUE; 662 fRetVal = true;
663 break; 663 break;
664 case PLD_SLIC_STATE_RINGING: 664 case PLD_SLIC_STATE_RINGING:
665 if (j->readers || j->writers) { 665 if (j->readers || j->writers) {
666 j->pslic.bits.powerdown = 0; 666 j->pslic.bits.powerdown = 0;
667 j->pslic.bits.ring0 = 1; 667 j->pslic.bits.ring0 = 1;
668 j->pslic.bits.ring1 = 0; 668 j->pslic.bits.ring1 = 0;
669 fRetVal = TRUE; 669 fRetVal = true;
670 } 670 }
671 break; 671 break;
672 case PLD_SLIC_STATE_OHT: /* On-hook transmit */ 672 case PLD_SLIC_STATE_OHT: /* On-hook transmit */
@@ -679,14 +679,14 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
679 j->pslic.bits.powerdown = 1; 679 j->pslic.bits.powerdown = 1;
680 } 680 }
681 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0; 681 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
682 fRetVal = TRUE; 682 fRetVal = true;
683 break; 683 break;
684 case PLD_SLIC_STATE_APR: /* Active polarity reversal */ 684 case PLD_SLIC_STATE_APR: /* Active polarity reversal */
685 685
686 case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */ 686 case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
687 687
688 default: 688 default:
689 fRetVal = FALSE; 689 fRetVal = false;
690 break; 690 break;
691 } 691 }
692 j->psccr.bits.dev = 3; 692 j->psccr.bits.dev = 3;
@@ -703,7 +703,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
703 j->pld_slicw.bits.c3 = 0; 703 j->pld_slicw.bits.c3 = 0;
704 j->pld_slicw.bits.b2en = 0; 704 j->pld_slicw.bits.b2en = 0;
705 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); 705 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
706 fRetVal = TRUE; 706 fRetVal = true;
707 break; 707 break;
708 case PLD_SLIC_STATE_RINGING: 708 case PLD_SLIC_STATE_RINGING:
709 j->pld_slicw.bits.c1 = 1; 709 j->pld_slicw.bits.c1 = 1;
@@ -711,7 +711,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
711 j->pld_slicw.bits.c3 = 0; 711 j->pld_slicw.bits.c3 = 0;
712 j->pld_slicw.bits.b2en = 1; 712 j->pld_slicw.bits.b2en = 1;
713 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); 713 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
714 fRetVal = TRUE; 714 fRetVal = true;
715 break; 715 break;
716 case PLD_SLIC_STATE_ACTIVE: 716 case PLD_SLIC_STATE_ACTIVE:
717 j->pld_slicw.bits.c1 = 0; 717 j->pld_slicw.bits.c1 = 0;
@@ -719,7 +719,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
719 j->pld_slicw.bits.c3 = 0; 719 j->pld_slicw.bits.c3 = 0;
720 j->pld_slicw.bits.b2en = 0; 720 j->pld_slicw.bits.b2en = 0;
721 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); 721 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
722 fRetVal = TRUE; 722 fRetVal = true;
723 break; 723 break;
724 case PLD_SLIC_STATE_OHT: /* On-hook transmit */ 724 case PLD_SLIC_STATE_OHT: /* On-hook transmit */
725 725
@@ -728,7 +728,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
728 j->pld_slicw.bits.c3 = 0; 728 j->pld_slicw.bits.c3 = 0;
729 j->pld_slicw.bits.b2en = 0; 729 j->pld_slicw.bits.b2en = 0;
730 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); 730 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
731 fRetVal = TRUE; 731 fRetVal = true;
732 break; 732 break;
733 case PLD_SLIC_STATE_TIPOPEN: 733 case PLD_SLIC_STATE_TIPOPEN:
734 j->pld_slicw.bits.c1 = 0; 734 j->pld_slicw.bits.c1 = 0;
@@ -736,7 +736,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
736 j->pld_slicw.bits.c3 = 1; 736 j->pld_slicw.bits.c3 = 1;
737 j->pld_slicw.bits.b2en = 0; 737 j->pld_slicw.bits.b2en = 0;
738 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); 738 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
739 fRetVal = TRUE; 739 fRetVal = true;
740 break; 740 break;
741 case PLD_SLIC_STATE_STANDBY: 741 case PLD_SLIC_STATE_STANDBY:
742 j->pld_slicw.bits.c1 = 1; 742 j->pld_slicw.bits.c1 = 1;
@@ -744,7 +744,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
744 j->pld_slicw.bits.c3 = 1; 744 j->pld_slicw.bits.c3 = 1;
745 j->pld_slicw.bits.b2en = 1; 745 j->pld_slicw.bits.b2en = 1;
746 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); 746 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
747 fRetVal = TRUE; 747 fRetVal = true;
748 break; 748 break;
749 case PLD_SLIC_STATE_APR: /* Active polarity reversal */ 749 case PLD_SLIC_STATE_APR: /* Active polarity reversal */
750 750
@@ -753,7 +753,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
753 j->pld_slicw.bits.c3 = 1; 753 j->pld_slicw.bits.c3 = 1;
754 j->pld_slicw.bits.b2en = 0; 754 j->pld_slicw.bits.b2en = 0;
755 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); 755 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
756 fRetVal = TRUE; 756 fRetVal = true;
757 break; 757 break;
758 case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */ 758 case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
759 759
@@ -762,10 +762,10 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j)
762 j->pld_slicw.bits.c3 = 1; 762 j->pld_slicw.bits.c3 = 1;
763 j->pld_slicw.bits.b2en = 0; 763 j->pld_slicw.bits.b2en = 0;
764 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); 764 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
765 fRetVal = TRUE; 765 fRetVal = true;
766 break; 766 break;
767 default: 767 default:
768 fRetVal = FALSE; 768 fRetVal = false;
769 break; 769 break;
770 } 770 }
771 } 771 }
@@ -4969,7 +4969,8 @@ static int ixj_daa_cid_read(IXJ *j)
4969{ 4969{
4970 int i; 4970 int i;
4971 BYTES bytes; 4971 BYTES bytes;
4972 char CID[ALISDAA_CALLERID_SIZE], mContinue; 4972 char CID[ALISDAA_CALLERID_SIZE];
4973 bool mContinue;
4973 char *pIn, *pOut; 4974 char *pIn, *pOut;
4974 4975
4975 if (!SCI_Prepare(j)) 4976 if (!SCI_Prepare(j))
@@ -5013,7 +5014,7 @@ static int ixj_daa_cid_read(IXJ *j)
5013 5014
5014 pIn = CID; 5015 pIn = CID;
5015 pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID; 5016 pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID;
5016 mContinue = 1; 5017 mContinue = true;
5017 while (mContinue) { 5018 while (mContinue) {
5018 if ((pIn[1] & 0x03) == 0x01) { 5019 if ((pIn[1] & 0x03) == 0x01) {
5019 pOut[0] = pIn[0]; 5020 pOut[0] = pIn[0];
@@ -5027,7 +5028,7 @@ static int ixj_daa_cid_read(IXJ *j)
5027 if ((pIn[4] & 0xc0) == 0x40) { 5028 if ((pIn[4] & 0xc0) == 0x40) {
5028 pOut[3] = ((pIn[4] & 0x3f) << 2) | ((pIn[3] & 0xc0) >> 6); 5029 pOut[3] = ((pIn[4] & 0x3f) << 2) | ((pIn[3] & 0xc0) >> 6);
5029 } else { 5030 } else {
5030 mContinue = FALSE; 5031 mContinue = false;
5031 } 5032 }
5032 pIn += 5, pOut += 4; 5033 pIn += 5, pOut += 4;
5033 } 5034 }
@@ -7498,7 +7499,7 @@ static BYTE PCIEE_ReadBit(WORD wEEPROMAddress, BYTE lastLCC)
7498 return ((inb(wEEPROMAddress) >> 3) & 1); 7499 return ((inb(wEEPROMAddress) >> 3) & 1);
7499} 7500}
7500 7501
7501static BOOL PCIEE_ReadWord(WORD wAddress, WORD wLoc, WORD * pwResult) 7502static bool PCIEE_ReadWord(WORD wAddress, WORD wLoc, WORD * pwResult)
7502{ 7503{
7503 BYTE lastLCC; 7504 BYTE lastLCC;
7504 WORD wEEPROMAddress = wAddress + 3; 7505 WORD wEEPROMAddress = wAddress + 3;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-17 21:28:46 -0500