aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/tc
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/tc')
-rw-r--r--drivers/tc/Makefile1
-rw-r--r--drivers/tc/zs.c2203
-rw-r--r--drivers/tc/zs.h404
3 files changed, 0 insertions, 2608 deletions
diff --git a/drivers/tc/Makefile b/drivers/tc/Makefile
index 967342692211..c899246bd362 100644
--- a/drivers/tc/Makefile
+++ b/drivers/tc/Makefile
@@ -5,7 +5,6 @@
5# Object file lists. 5# Object file lists.
6 6
7obj-$(CONFIG_TC) += tc.o tc-driver.o 7obj-$(CONFIG_TC) += tc.o tc-driver.o
8obj-$(CONFIG_ZS) += zs.o
9obj-$(CONFIG_VT) += lk201.o lk201-map.o lk201-remap.o 8obj-$(CONFIG_VT) += lk201.o lk201-map.o lk201-remap.o
10 9
11$(obj)/lk201-map.o: $(obj)/lk201-map.c 10$(obj)/lk201-map.o: $(obj)/lk201-map.c
diff --git a/drivers/tc/zs.c b/drivers/tc/zs.c
deleted file mode 100644
index ed979f13908a..000000000000
--- a/drivers/tc/zs.c
+++ /dev/null
@@ -1,2203 +0,0 @@
1/*
2 * decserial.c: Serial port driver for IOASIC DECstations.
3 *
4 * Derived from drivers/sbus/char/sunserial.c by Paul Mackerras.
5 * Derived from drivers/macintosh/macserial.c by Harald Koerfgen.
6 *
7 * DECstation changes
8 * Copyright (C) 1998-2000 Harald Koerfgen
9 * Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005 Maciej W. Rozycki
10 *
11 * For the rest of the code the original Copyright applies:
12 * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
13 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
14 *
15 *
16 * Note: for IOASIC systems the wiring is as follows:
17 *
18 * mouse/keyboard:
19 * DIN-7 MJ-4 signal SCC
20 * 2 1 TxD <- A.TxD
21 * 3 4 RxD -> A.RxD
22 *
23 * EIA-232/EIA-423:
24 * DB-25 MMJ-6 signal SCC
25 * 2 2 TxD <- B.TxD
26 * 3 5 RxD -> B.RxD
27 * 4 RTS <- ~A.RTS
28 * 5 CTS -> ~B.CTS
29 * 6 6 DSR -> ~A.SYNC
30 * 8 CD -> ~B.DCD
31 * 12 DSRS(DCE) -> ~A.CTS (*)
32 * 15 TxC -> B.TxC
33 * 17 RxC -> B.RxC
34 * 20 1 DTR <- ~A.DTR
35 * 22 RI -> ~A.DCD
36 * 23 DSRS(DTE) <- ~B.RTS
37 *
38 * (*) EIA-232 defines the signal at this pin to be SCD, while DSRS(DCE)
39 * is shared with DSRS(DTE) at pin 23.
40 */
41
42#include <linux/errno.h>
43#include <linux/signal.h>
44#include <linux/sched.h>
45#include <linux/timer.h>
46#include <linux/interrupt.h>
47#include <linux/tty.h>
48#include <linux/tty_flip.h>
49#include <linux/major.h>
50#include <linux/string.h>
51#include <linux/fcntl.h>
52#include <linux/mm.h>
53#include <linux/kernel.h>
54#include <linux/delay.h>
55#include <linux/init.h>
56#include <linux/ioport.h>
57#include <linux/spinlock.h>
58#ifdef CONFIG_SERIAL_DEC_CONSOLE
59#include <linux/console.h>
60#endif
61
62#include <asm/io.h>
63#include <asm/pgtable.h>
64#include <asm/irq.h>
65#include <asm/system.h>
66#include <asm/bootinfo.h>
67
68#include <asm/dec/interrupts.h>
69#include <asm/dec/ioasic_addrs.h>
70#include <asm/dec/machtype.h>
71#include <asm/dec/serial.h>
72#include <asm/dec/system.h>
73
74#ifdef CONFIG_KGDB
75#include <asm/kgdb.h>
76#endif
77#ifdef CONFIG_MAGIC_SYSRQ
78#include <linux/sysrq.h>
79#endif
80
81#include "zs.h"
82
83/*
84 * It would be nice to dynamically allocate everything that
85 * depends on NUM_SERIAL, so we could support any number of
86 * Z8530s, but for now...
87 */
88#define NUM_SERIAL 2 /* Max number of ZS chips supported */
89#define NUM_CHANNELS (NUM_SERIAL * 2) /* 2 channels per chip */
90#define CHANNEL_A_NR (zs_parms->channel_a_offset > zs_parms->channel_b_offset)
91 /* Number of channel A in the chip */
92#define ZS_CHAN_IO_SIZE 8
93#define ZS_CLOCK 7372800 /* Z8530 RTxC input clock rate */
94
95#define RECOVERY_DELAY udelay(2)
96
97struct zs_parms {
98 unsigned long scc0;
99 unsigned long scc1;
100 int channel_a_offset;
101 int channel_b_offset;
102 int irq0;
103 int irq1;
104 int clock;
105};
106
107static struct zs_parms *zs_parms;
108
109#ifdef CONFIG_MACH_DECSTATION
110static struct zs_parms ds_parms = {
111 scc0 : IOASIC_SCC0,
112 scc1 : IOASIC_SCC1,
113 channel_a_offset : 1,
114 channel_b_offset : 9,
115 irq0 : -1,
116 irq1 : -1,
117 clock : ZS_CLOCK
118};
119#endif
120
121#ifdef CONFIG_MACH_DECSTATION
122#define DS_BUS_PRESENT (IOASIC)
123#else
124#define DS_BUS_PRESENT 0
125#endif
126
127#define BUS_PRESENT (DS_BUS_PRESENT)
128
129DEFINE_SPINLOCK(zs_lock);
130
131struct dec_zschannel zs_channels[NUM_CHANNELS];
132struct dec_serial zs_soft[NUM_CHANNELS];
133int zs_channels_found;
134struct dec_serial *zs_chain; /* list of all channels */
135
136struct tty_struct zs_ttys[NUM_CHANNELS];
137
138#ifdef CONFIG_SERIAL_DEC_CONSOLE
139static struct console zs_console;
140#endif
141#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
142 !defined(MODULE)
143static unsigned long break_pressed; /* break, really ... */
144#endif
145
146static unsigned char zs_init_regs[16] __initdata = {
147 0, /* write 0 */
148 0, /* write 1 */
149 0, /* write 2 */
150 0, /* write 3 */
151 (X16CLK), /* write 4 */
152 0, /* write 5 */
153 0, 0, 0, /* write 6, 7, 8 */
154 (MIE | DLC | NV), /* write 9 */
155 (NRZ), /* write 10 */
156 (TCBR | RCBR), /* write 11 */
157 0, 0, /* BRG time constant, write 12 + 13 */
158 (BRSRC | BRENABL), /* write 14 */
159 0 /* write 15 */
160};
161
162static struct tty_driver *serial_driver;
163
164/* serial subtype definitions */
165#define SERIAL_TYPE_NORMAL 1
166
167/* number of characters left in xmit buffer before we ask for more */
168#define WAKEUP_CHARS 256
169
170/*
171 * Debugging.
172 */
173#undef SERIAL_DEBUG_OPEN
174#undef SERIAL_DEBUG_FLOW
175#undef SERIAL_DEBUG_THROTTLE
176#undef SERIAL_PARANOIA_CHECK
177
178#undef ZS_DEBUG_REGS
179
180#ifdef SERIAL_DEBUG_THROTTLE
181#define _tty_name(tty,buf) tty_name(tty,buf)
182#endif
183
184#define RS_STROBE_TIME 10
185#define RS_ISR_PASS_LIMIT 256
186
187static void probe_sccs(void);
188static void change_speed(struct dec_serial *info);
189static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
190
191static inline int serial_paranoia_check(struct dec_serial *info,
192 char *name, const char *routine)
193{
194#ifdef SERIAL_PARANOIA_CHECK
195 static const char *badmagic =
196 "Warning: bad magic number for serial struct %s in %s\n";
197 static const char *badinfo =
198 "Warning: null mac_serial for %s in %s\n";
199
200 if (!info) {
201 printk(badinfo, name, routine);
202 return 1;
203 }
204 if (info->magic != SERIAL_MAGIC) {
205 printk(badmagic, name, routine);
206 return 1;
207 }
208#endif
209 return 0;
210}
211
212/*
213 * This is used to figure out the divisor speeds and the timeouts
214 */
215static int baud_table[] = {
216 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
217 9600, 19200, 38400, 57600, 115200, 0 };
218
219/*
220 * Reading and writing Z8530 registers.
221 */
222static inline unsigned char read_zsreg(struct dec_zschannel *channel,
223 unsigned char reg)
224{
225 unsigned char retval;
226
227 if (reg != 0) {
228 *channel->control = reg & 0xf;
229 fast_iob(); RECOVERY_DELAY;
230 }
231 retval = *channel->control;
232 RECOVERY_DELAY;
233 return retval;
234}
235
236static inline void write_zsreg(struct dec_zschannel *channel,
237 unsigned char reg, unsigned char value)
238{
239 if (reg != 0) {
240 *channel->control = reg & 0xf;
241 fast_iob(); RECOVERY_DELAY;
242 }
243 *channel->control = value;
244 fast_iob(); RECOVERY_DELAY;
245 return;
246}
247
248static inline unsigned char read_zsdata(struct dec_zschannel *channel)
249{
250 unsigned char retval;
251
252 retval = *channel->data;
253 RECOVERY_DELAY;
254 return retval;
255}
256
257static inline void write_zsdata(struct dec_zschannel *channel,
258 unsigned char value)
259{
260 *channel->data = value;
261 fast_iob(); RECOVERY_DELAY;
262 return;
263}
264
265static inline void load_zsregs(struct dec_zschannel *channel,
266 unsigned char *regs)
267{
268/* ZS_CLEARERR(channel);
269 ZS_CLEARFIFO(channel); */
270 /* Load 'em up */
271 write_zsreg(channel, R3, regs[R3] & ~RxENABLE);
272 write_zsreg(channel, R5, regs[R5] & ~TxENAB);
273 write_zsreg(channel, R4, regs[R4]);
274 write_zsreg(channel, R9, regs[R9]);
275 write_zsreg(channel, R1, regs[R1]);
276 write_zsreg(channel, R2, regs[R2]);
277 write_zsreg(channel, R10, regs[R10]);
278 write_zsreg(channel, R11, regs[R11]);
279 write_zsreg(channel, R12, regs[R12]);
280 write_zsreg(channel, R13, regs[R13]);
281 write_zsreg(channel, R14, regs[R14]);
282 write_zsreg(channel, R15, regs[R15]);
283 write_zsreg(channel, R3, regs[R3]);
284 write_zsreg(channel, R5, regs[R5]);
285 return;
286}
287
288/* Sets or clears DTR/RTS on the requested line */
289static inline void zs_rtsdtr(struct dec_serial *info, int which, int set)
290{
291 unsigned long flags;
292
293 spin_lock_irqsave(&zs_lock, flags);
294 if (info->zs_channel != info->zs_chan_a) {
295 if (set) {
296 info->zs_chan_a->curregs[5] |= (which & (RTS | DTR));
297 } else {
298 info->zs_chan_a->curregs[5] &= ~(which & (RTS | DTR));
299 }
300 write_zsreg(info->zs_chan_a, 5, info->zs_chan_a->curregs[5]);
301 }
302 spin_unlock_irqrestore(&zs_lock, flags);
303}
304
305/* Utility routines for the Zilog */
306static inline int get_zsbaud(struct dec_serial *ss)
307{
308 struct dec_zschannel *channel = ss->zs_channel;
309 int brg;
310
311 /* The baud rate is split up between two 8-bit registers in
312 * what is termed 'BRG time constant' format in my docs for
313 * the chip, it is a function of the clk rate the chip is
314 * receiving which happens to be constant.
315 */
316 brg = (read_zsreg(channel, 13) << 8);
317 brg |= read_zsreg(channel, 12);
318 return BRG_TO_BPS(brg, (zs_parms->clock/(ss->clk_divisor)));
319}
320
321/* On receive, this clears errors and the receiver interrupts */
322static inline void rs_recv_clear(struct dec_zschannel *zsc)
323{
324 write_zsreg(zsc, 0, ERR_RES);
325 write_zsreg(zsc, 0, RES_H_IUS); /* XXX this is unnecessary */
326}
327
328/*
329 * ----------------------------------------------------------------------
330 *
331 * Here starts the interrupt handling routines. All of the following
332 * subroutines are declared as inline and are folded into
333 * rs_interrupt(). They were separated out for readability's sake.
334 *
335 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
336 * -----------------------------------------------------------------------
337 */
338
339/*
340 * This routine is used by the interrupt handler to schedule
341 * processing in the software interrupt portion of the driver.
342 */
343static void rs_sched_event(struct dec_serial *info, int event)
344{
345 info->event |= 1 << event;
346 tasklet_schedule(&info->tlet);
347}
348
349static void receive_chars(struct dec_serial *info)
350{
351 struct tty_struct *tty = info->tty;
352 unsigned char ch, stat, flag;
353
354 while ((read_zsreg(info->zs_channel, R0) & Rx_CH_AV) != 0) {
355
356 stat = read_zsreg(info->zs_channel, R1);
357 ch = read_zsdata(info->zs_channel);
358
359 if (!tty && (!info->hook || !info->hook->rx_char))
360 continue;
361
362 flag = TTY_NORMAL;
363 if (info->tty_break) {
364 info->tty_break = 0;
365 flag = TTY_BREAK;
366 if (info->flags & ZILOG_SAK)
367 do_SAK(tty);
368 /* Ignore the null char got when BREAK is removed. */
369 if (ch == 0)
370 continue;
371 } else {
372 if (stat & Rx_OVR) {
373 flag = TTY_OVERRUN;
374 } else if (stat & FRM_ERR) {
375 flag = TTY_FRAME;
376 } else if (stat & PAR_ERR) {
377 flag = TTY_PARITY;
378 }
379 if (flag != TTY_NORMAL)
380 /* reset the error indication */
381 write_zsreg(info->zs_channel, R0, ERR_RES);
382 }
383
384#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
385 !defined(MODULE)
386 if (break_pressed && info->line == zs_console.index) {
387 /* Ignore the null char got when BREAK is removed. */
388 if (ch == 0)
389 continue;
390 if (time_before(jiffies, break_pressed + HZ * 5)) {
391 handle_sysrq(ch, NULL);
392 break_pressed = 0;
393 continue;
394 }
395 break_pressed = 0;
396 }
397#endif
398
399 if (info->hook && info->hook->rx_char) {
400 (*info->hook->rx_char)(ch, flag);
401 return;
402 }
403
404 tty_insert_flip_char(tty, ch, flag);
405 }
406 if (tty)
407 tty_flip_buffer_push(tty);
408}
409
410static void transmit_chars(struct dec_serial *info)
411{
412 if ((read_zsreg(info->zs_channel, R0) & Tx_BUF_EMP) == 0)
413 return;
414 info->tx_active = 0;
415
416 if (info->x_char) {
417 /* Send next char */
418 write_zsdata(info->zs_channel, info->x_char);
419 info->x_char = 0;
420 info->tx_active = 1;
421 return;
422 }
423
424 if ((info->xmit_cnt <= 0) || (info->tty && info->tty->stopped)
425 || info->tx_stopped) {
426 write_zsreg(info->zs_channel, R0, RES_Tx_P);
427 return;
428 }
429 /* Send char */
430 write_zsdata(info->zs_channel, info->xmit_buf[info->xmit_tail++]);
431 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1);
432 info->xmit_cnt--;
433 info->tx_active = 1;
434
435 if (info->xmit_cnt < WAKEUP_CHARS)
436 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
437}
438
439static void status_handle(struct dec_serial *info)
440{
441 unsigned char stat;
442
443 /* Get status from Read Register 0 */
444 stat = read_zsreg(info->zs_channel, R0);
445
446 if ((stat & BRK_ABRT) && !(info->read_reg_zero & BRK_ABRT)) {
447#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
448 !defined(MODULE)
449 if (info->line == zs_console.index) {
450 if (!break_pressed)
451 break_pressed = jiffies;
452 } else
453#endif
454 info->tty_break = 1;
455 }
456
457 if (info->zs_channel != info->zs_chan_a) {
458
459 /* Check for DCD transitions */
460 if (info->tty && !C_CLOCAL(info->tty) &&
461 ((stat ^ info->read_reg_zero) & DCD) != 0 ) {
462 if (stat & DCD) {
463 wake_up_interruptible(&info->open_wait);
464 } else {
465 tty_hangup(info->tty);
466 }
467 }
468
469 /* Check for CTS transitions */
470 if (info->tty && C_CRTSCTS(info->tty)) {
471 if ((stat & CTS) != 0) {
472 if (info->tx_stopped) {
473 info->tx_stopped = 0;
474 if (!info->tx_active)
475 transmit_chars(info);
476 }
477 } else {
478 info->tx_stopped = 1;
479 }
480 }
481
482 }
483
484 /* Clear status condition... */
485 write_zsreg(info->zs_channel, R0, RES_EXT_INT);
486 info->read_reg_zero = stat;
487}
488
489/*
490 * This is the serial driver's generic interrupt routine
491 */
492static irqreturn_t rs_interrupt(int irq, void *dev_id)
493{
494 struct dec_serial *info = (struct dec_serial *) dev_id;
495 irqreturn_t status = IRQ_NONE;
496 unsigned char zs_intreg;
497 int shift;
498
499 /* NOTE: The read register 3, which holds the irq status,
500 * does so for both channels on each chip. Although
501 * the status value itself must be read from the A
502 * channel and is only valid when read from channel A.
503 * Yes... broken hardware...
504 */
505#define CHAN_IRQMASK (CHBRxIP | CHBTxIP | CHBEXT)
506
507 if (info->zs_chan_a == info->zs_channel)
508 shift = 3; /* Channel A */
509 else
510 shift = 0; /* Channel B */
511
512 for (;;) {
513 zs_intreg = read_zsreg(info->zs_chan_a, R3) >> shift;
514 if ((zs_intreg & CHAN_IRQMASK) == 0)
515 break;
516
517 status = IRQ_HANDLED;
518
519 if (zs_intreg & CHBRxIP) {
520 receive_chars(info);
521 }
522 if (zs_intreg & CHBTxIP) {
523 transmit_chars(info);
524 }
525 if (zs_intreg & CHBEXT) {
526 status_handle(info);
527 }
528 }
529
530 /* Why do we need this ? */
531 write_zsreg(info->zs_channel, 0, RES_H_IUS);
532
533 return status;
534}
535
536#ifdef ZS_DEBUG_REGS
537void zs_dump (void) {
538 int i, j;
539 for (i = 0; i < zs_channels_found; i++) {
540 struct dec_zschannel *ch = &zs_channels[i];
541 if ((long)ch->control == UNI_IO_BASE+UNI_SCC1A_CTRL) {
542 for (j = 0; j < 15; j++) {
543 printk("W%d = 0x%x\t",
544 j, (int)ch->curregs[j]);
545 }
546 for (j = 0; j < 15; j++) {
547 printk("R%d = 0x%x\t",
548 j, (int)read_zsreg(ch,j));
549 }
550 printk("\n\n");
551 }
552 }
553}
554#endif
555
556/*
557 * -------------------------------------------------------------------
558 * Here ends the serial interrupt routines.
559 * -------------------------------------------------------------------
560 */
561
562/*
563 * ------------------------------------------------------------
564 * rs_stop() and rs_start()
565 *
566 * This routines are called before setting or resetting tty->stopped.
567 * ------------------------------------------------------------
568 */
569static void rs_stop(struct tty_struct *tty)
570{
571 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
572 unsigned long flags;
573
574 if (serial_paranoia_check(info, tty->name, "rs_stop"))
575 return;
576
577#if 1
578 spin_lock_irqsave(&zs_lock, flags);
579 if (info->zs_channel->curregs[5] & TxENAB) {
580 info->zs_channel->curregs[5] &= ~TxENAB;
581 write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
582 }
583 spin_unlock_irqrestore(&zs_lock, flags);
584#endif
585}
586
587static void rs_start(struct tty_struct *tty)
588{
589 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
590 unsigned long flags;
591
592 if (serial_paranoia_check(info, tty->name, "rs_start"))
593 return;
594
595 spin_lock_irqsave(&zs_lock, flags);
596#if 1
597 if (info->xmit_cnt && info->xmit_buf && !(info->zs_channel->curregs[5] & TxENAB)) {
598 info->zs_channel->curregs[5] |= TxENAB;
599 write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
600 }
601#else
602 if (info->xmit_cnt && info->xmit_buf && !info->tx_active) {
603 transmit_chars(info);
604 }
605#endif
606 spin_unlock_irqrestore(&zs_lock, flags);
607}
608
609/*
610 * This routine is used to handle the "bottom half" processing for the
611 * serial driver, known also the "software interrupt" processing.
612 * This processing is done at the kernel interrupt level, after the
613 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
614 * is where time-consuming activities which can not be done in the
615 * interrupt driver proper are done; the interrupt driver schedules
616 * them using rs_sched_event(), and they get done here.
617 */
618
619static void do_softint(unsigned long private_)
620{
621 struct dec_serial *info = (struct dec_serial *) private_;
622 struct tty_struct *tty;
623
624 tty = info->tty;
625 if (!tty)
626 return;
627
628 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
629 tty_wakeup(tty);
630}
631
632static int zs_startup(struct dec_serial * info)
633{
634 unsigned long flags;
635
636 if (info->flags & ZILOG_INITIALIZED)
637 return 0;
638
639 if (!info->xmit_buf) {
640 info->xmit_buf = (unsigned char *) get_zeroed_page(GFP_KERNEL);
641 if (!info->xmit_buf)
642 return -ENOMEM;
643 }
644
645 spin_lock_irqsave(&zs_lock, flags);
646
647#ifdef SERIAL_DEBUG_OPEN
648 printk("starting up ttyS%d (irq %d)...", info->line, info->irq);
649#endif
650
651 /*
652 * Clear the receive FIFO.
653 */
654 ZS_CLEARFIFO(info->zs_channel);
655 info->xmit_fifo_size = 1;
656
657 /*
658 * Clear the interrupt registers.
659 */
660 write_zsreg(info->zs_channel, R0, ERR_RES);
661 write_zsreg(info->zs_channel, R0, RES_H_IUS);
662
663 /*
664 * Set the speed of the serial port
665 */
666 change_speed(info);
667
668 /*
669 * Turn on RTS and DTR.
670 */
671 zs_rtsdtr(info, RTS | DTR, 1);
672
673 /*
674 * Finally, enable sequencing and interrupts
675 */
676 info->zs_channel->curregs[R1] &= ~RxINT_MASK;
677 info->zs_channel->curregs[R1] |= (RxINT_ALL | TxINT_ENAB |
678 EXT_INT_ENAB);
679 info->zs_channel->curregs[R3] |= RxENABLE;
680 info->zs_channel->curregs[R5] |= TxENAB;
681 info->zs_channel->curregs[R15] |= (DCDIE | CTSIE | TxUIE | BRKIE);
682 write_zsreg(info->zs_channel, R1, info->zs_channel->curregs[R1]);
683 write_zsreg(info->zs_channel, R3, info->zs_channel->curregs[R3]);
684 write_zsreg(info->zs_channel, R5, info->zs_channel->curregs[R5]);
685 write_zsreg(info->zs_channel, R15, info->zs_channel->curregs[R15]);
686
687 /*
688 * And clear the interrupt registers again for luck.
689 */
690 write_zsreg(info->zs_channel, R0, ERR_RES);
691 write_zsreg(info->zs_channel, R0, RES_H_IUS);
692
693 /* Save the current value of RR0 */
694 info->read_reg_zero = read_zsreg(info->zs_channel, R0);
695
696 if (info->tty)
697 clear_bit(TTY_IO_ERROR, &info->tty->flags);
698 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
699
700 info->flags |= ZILOG_INITIALIZED;
701 spin_unlock_irqrestore(&zs_lock, flags);
702 return 0;
703}
704
705/*
706 * This routine will shutdown a serial port; interrupts are disabled, and
707 * DTR is dropped if the hangup on close termio flag is on.
708 */
709static void shutdown(struct dec_serial * info)
710{
711 unsigned long flags;
712
713 if (!(info->flags & ZILOG_INITIALIZED))
714 return;
715
716#ifdef SERIAL_DEBUG_OPEN
717 printk("Shutting down serial port %d (irq %d)....", info->line,
718 info->irq);
719#endif
720
721 spin_lock_irqsave(&zs_lock, flags);
722
723 if (info->xmit_buf) {
724 free_page((unsigned long) info->xmit_buf);
725 info->xmit_buf = 0;
726 }
727
728 info->zs_channel->curregs[1] = 0;
729 write_zsreg(info->zs_channel, 1, info->zs_channel->curregs[1]); /* no interrupts */
730
731 info->zs_channel->curregs[3] &= ~RxENABLE;
732 write_zsreg(info->zs_channel, 3, info->zs_channel->curregs[3]);
733
734 info->zs_channel->curregs[5] &= ~TxENAB;
735 write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
736 if (!info->tty || C_HUPCL(info->tty)) {
737 zs_rtsdtr(info, RTS | DTR, 0);
738 }
739
740 if (info->tty)
741 set_bit(TTY_IO_ERROR, &info->tty->flags);
742
743 info->flags &= ~ZILOG_INITIALIZED;
744 spin_unlock_irqrestore(&zs_lock, flags);
745}
746
747/*
748 * This routine is called to set the UART divisor registers to match
749 * the specified baud rate for a serial port.
750 */
751static void change_speed(struct dec_serial *info)
752{
753 unsigned cflag;
754 int i;
755 int brg, bits;
756 unsigned long flags;
757
758 if (!info->hook) {
759 if (!info->tty || !info->tty->termios)
760 return;
761 cflag = info->tty->termios->c_cflag;
762 if (!info->port)
763 return;
764 } else {
765 cflag = info->hook->cflags;
766 }
767
768 i = cflag & CBAUD;
769 if (i & CBAUDEX) {
770 i &= ~CBAUDEX;
771 if (i < 1 || i > 2) {
772 if (!info->hook)
773 info->tty->termios->c_cflag &= ~CBAUDEX;
774 else
775 info->hook->cflags &= ~CBAUDEX;
776 } else
777 i += 15;
778 }
779
780 spin_lock_irqsave(&zs_lock, flags);
781 info->zs_baud = baud_table[i];
782 if (info->zs_baud) {
783 brg = BPS_TO_BRG(info->zs_baud, zs_parms->clock/info->clk_divisor);
784 info->zs_channel->curregs[12] = (brg & 255);
785 info->zs_channel->curregs[13] = ((brg >> 8) & 255);
786 zs_rtsdtr(info, DTR, 1);
787 } else {
788 zs_rtsdtr(info, RTS | DTR, 0);
789 return;
790 }
791
792 /* byte size and parity */
793 info->zs_channel->curregs[3] &= ~RxNBITS_MASK;
794 info->zs_channel->curregs[5] &= ~TxNBITS_MASK;
795 switch (cflag & CSIZE) {
796 case CS5:
797 bits = 7;
798 info->zs_channel->curregs[3] |= Rx5;
799 info->zs_channel->curregs[5] |= Tx5;
800 break;
801 case CS6:
802 bits = 8;
803 info->zs_channel->curregs[3] |= Rx6;
804 info->zs_channel->curregs[5] |= Tx6;
805 break;
806 case CS7:
807 bits = 9;
808 info->zs_channel->curregs[3] |= Rx7;
809 info->zs_channel->curregs[5] |= Tx7;
810 break;
811 case CS8:
812 default: /* defaults to 8 bits */
813 bits = 10;
814 info->zs_channel->curregs[3] |= Rx8;
815 info->zs_channel->curregs[5] |= Tx8;
816 break;
817 }
818
819 info->timeout = ((info->xmit_fifo_size*HZ*bits) / info->zs_baud);
820 info->timeout += HZ/50; /* Add .02 seconds of slop */
821
822 info->zs_channel->curregs[4] &= ~(SB_MASK | PAR_ENA | PAR_EVEN);
823 if (cflag & CSTOPB) {
824 info->zs_channel->curregs[4] |= SB2;
825 } else {
826 info->zs_channel->curregs[4] |= SB1;
827 }
828 if (cflag & PARENB) {
829 info->zs_channel->curregs[4] |= PAR_ENA;
830 }
831 if (!(cflag & PARODD)) {
832 info->zs_channel->curregs[4] |= PAR_EVEN;
833 }
834
835 if (!(cflag & CLOCAL)) {
836 if (!(info->zs_channel->curregs[15] & DCDIE))
837 info->read_reg_zero = read_zsreg(info->zs_channel, 0);
838 info->zs_channel->curregs[15] |= DCDIE;
839 } else
840 info->zs_channel->curregs[15] &= ~DCDIE;
841 if (cflag & CRTSCTS) {
842 info->zs_channel->curregs[15] |= CTSIE;
843 if ((read_zsreg(info->zs_channel, 0) & CTS) == 0)
844 info->tx_stopped = 1;
845 } else {
846 info->zs_channel->curregs[15] &= ~CTSIE;
847 info->tx_stopped = 0;
848 }
849
850 /* Load up the new values */
851 load_zsregs(info->zs_channel, info->zs_channel->curregs);
852
853 spin_unlock_irqrestore(&zs_lock, flags);
854}
855
856static void rs_flush_chars(struct tty_struct *tty)
857{
858 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
859 unsigned long flags;
860
861 if (serial_paranoia_check(info, tty->name, "rs_flush_chars"))
862 return;
863
864 if (info->xmit_cnt <= 0 || tty->stopped || info->tx_stopped ||
865 !info->xmit_buf)
866 return;
867
868 /* Enable transmitter */
869 spin_lock_irqsave(&zs_lock, flags);
870 transmit_chars(info);
871 spin_unlock_irqrestore(&zs_lock, flags);
872}
873
874static int rs_write(struct tty_struct * tty,
875 const unsigned char *buf, int count)
876{
877 int c, total = 0;
878 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
879 unsigned long flags;
880
881 if (serial_paranoia_check(info, tty->name, "rs_write"))
882 return 0;
883
884 if (!tty || !info->xmit_buf)
885 return 0;
886
887 while (1) {
888 spin_lock_irqsave(&zs_lock, flags);
889 c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
890 SERIAL_XMIT_SIZE - info->xmit_head));
891 if (c <= 0)
892 break;
893
894 memcpy(info->xmit_buf + info->xmit_head, buf, c);
895 info->xmit_head = (info->xmit_head + c) & (SERIAL_XMIT_SIZE-1);
896 info->xmit_cnt += c;
897 spin_unlock_irqrestore(&zs_lock, flags);
898 buf += c;
899 count -= c;
900 total += c;
901 }
902
903 if (info->xmit_cnt && !tty->stopped && !info->tx_stopped
904 && !info->tx_active)
905 transmit_chars(info);
906 spin_unlock_irqrestore(&zs_lock, flags);
907 return total;
908}
909
910static int rs_write_room(struct tty_struct *tty)
911{
912 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
913 int ret;
914
915 if (serial_paranoia_check(info, tty->name, "rs_write_room"))
916 return 0;
917 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
918 if (ret < 0)
919 ret = 0;
920 return ret;
921}
922
923static int rs_chars_in_buffer(struct tty_struct *tty)
924{
925 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
926
927 if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
928 return 0;
929 return info->xmit_cnt;
930}
931
932static void rs_flush_buffer(struct tty_struct *tty)
933{
934 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
935
936 if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
937 return;
938 spin_lock_irq(&zs_lock);
939 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
940 spin_unlock_irq(&zs_lock);
941 tty_wakeup(tty);
942}
943
944/*
945 * ------------------------------------------------------------
946 * rs_throttle()
947 *
948 * This routine is called by the upper-layer tty layer to signal that
949 * incoming characters should be throttled.
950 * ------------------------------------------------------------
951 */
952static void rs_throttle(struct tty_struct * tty)
953{
954 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
955 unsigned long flags;
956
957#ifdef SERIAL_DEBUG_THROTTLE
958 char buf[64];
959
960 printk("throttle %s: %d....\n", _tty_name(tty, buf),
961 tty->ldisc.chars_in_buffer(tty));
962#endif
963
964 if (serial_paranoia_check(info, tty->name, "rs_throttle"))
965 return;
966
967 if (I_IXOFF(tty)) {
968 spin_lock_irqsave(&zs_lock, flags);
969 info->x_char = STOP_CHAR(tty);
970 if (!info->tx_active)
971 transmit_chars(info);
972 spin_unlock_irqrestore(&zs_lock, flags);
973 }
974
975 if (C_CRTSCTS(tty)) {
976 zs_rtsdtr(info, RTS, 0);
977 }
978}
979
980static void rs_unthrottle(struct tty_struct * tty)
981{
982 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
983 unsigned long flags;
984
985#ifdef SERIAL_DEBUG_THROTTLE
986 char buf[64];
987
988 printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
989 tty->ldisc.chars_in_buffer(tty));
990#endif
991
992 if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
993 return;
994
995 if (I_IXOFF(tty)) {
996 spin_lock_irqsave(&zs_lock, flags);
997 if (info->x_char)
998 info->x_char = 0;
999 else {
1000 info->x_char = START_CHAR(tty);
1001 if (!info->tx_active)
1002 transmit_chars(info);
1003 }
1004 spin_unlock_irqrestore(&zs_lock, flags);
1005 }
1006
1007 if (C_CRTSCTS(tty)) {
1008 zs_rtsdtr(info, RTS, 1);
1009 }
1010}
1011
1012/*
1013 * ------------------------------------------------------------
1014 * rs_ioctl() and friends
1015 * ------------------------------------------------------------
1016 */
1017
1018static int get_serial_info(struct dec_serial * info,
1019 struct serial_struct * retinfo)
1020{
1021 struct serial_struct tmp;
1022
1023 if (!retinfo)
1024 return -EFAULT;
1025 memset(&tmp, 0, sizeof(tmp));
1026 tmp.type = info->type;
1027 tmp.line = info->line;
1028 tmp.port = info->port;
1029 tmp.irq = info->irq;
1030 tmp.flags = info->flags;
1031 tmp.baud_base = info->baud_base;
1032 tmp.close_delay = info->close_delay;
1033 tmp.closing_wait = info->closing_wait;
1034 tmp.custom_divisor = info->custom_divisor;
1035 return copy_to_user(retinfo,&tmp,sizeof(*retinfo)) ? -EFAULT : 0;
1036}
1037
1038static int set_serial_info(struct dec_serial * info,
1039 struct serial_struct * new_info)
1040{
1041 struct serial_struct new_serial;
1042 struct dec_serial old_info;
1043 int retval = 0;
1044
1045 if (!new_info)
1046 return -EFAULT;
1047 copy_from_user(&new_serial,new_info,sizeof(new_serial));
1048 old_info = *info;
1049
1050 if (!capable(CAP_SYS_ADMIN)) {
1051 if ((new_serial.baud_base != info->baud_base) ||
1052 (new_serial.type != info->type) ||
1053 (new_serial.close_delay != info->close_delay) ||
1054 ((new_serial.flags & ~ZILOG_USR_MASK) !=
1055 (info->flags & ~ZILOG_USR_MASK)))
1056 return -EPERM;
1057 info->flags = ((info->flags & ~ZILOG_USR_MASK) |
1058 (new_serial.flags & ZILOG_USR_MASK));
1059 info->custom_divisor = new_serial.custom_divisor;
1060 goto check_and_exit;
1061 }
1062
1063 if (info->count > 1)
1064 return -EBUSY;
1065
1066 /*
1067 * OK, past this point, all the error checking has been done.
1068 * At this point, we start making changes.....
1069 */
1070
1071 info->baud_base = new_serial.baud_base;
1072 info->flags = ((info->flags & ~ZILOG_FLAGS) |
1073 (new_serial.flags & ZILOG_FLAGS));
1074 info->type = new_serial.type;
1075 info->close_delay = new_serial.close_delay;
1076 info->closing_wait = new_serial.closing_wait;
1077
1078check_and_exit:
1079 retval = zs_startup(info);
1080 return retval;
1081}
1082
1083/*
1084 * get_lsr_info - get line status register info
1085 *
1086 * Purpose: Let user call ioctl() to get info when the UART physically
1087 * is emptied. On bus types like RS485, the transmitter must
1088 * release the bus after transmitting. This must be done when
1089 * the transmit shift register is empty, not be done when the
1090 * transmit holding register is empty. This functionality
1091 * allows an RS485 driver to be written in user space.
1092 */
1093static int get_lsr_info(struct dec_serial * info, unsigned int *value)
1094{
1095 unsigned char status;
1096
1097 spin_lock(&zs_lock);
1098 status = read_zsreg(info->zs_channel, 0);
1099 spin_unlock_irq(&zs_lock);
1100 put_user(status,value);
1101 return 0;
1102}
1103
1104static int rs_tiocmget(struct tty_struct *tty, struct file *file)
1105{
1106 struct dec_serial * info = (struct dec_serial *)tty->driver_data;
1107 unsigned char control, status_a, status_b;
1108 unsigned int result;
1109
1110 if (info->hook)
1111 return -ENODEV;
1112
1113 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1114 return -ENODEV;
1115
1116 if (tty->flags & (1 << TTY_IO_ERROR))
1117 return -EIO;
1118
1119 if (info->zs_channel == info->zs_chan_a)
1120 result = 0;
1121 else {
1122 spin_lock(&zs_lock);
1123 control = info->zs_chan_a->curregs[5];
1124 status_a = read_zsreg(info->zs_chan_a, 0);
1125 status_b = read_zsreg(info->zs_channel, 0);
1126 spin_unlock_irq(&zs_lock);
1127 result = ((control & RTS) ? TIOCM_RTS: 0)
1128 | ((control & DTR) ? TIOCM_DTR: 0)
1129 | ((status_b & DCD) ? TIOCM_CAR: 0)
1130 | ((status_a & DCD) ? TIOCM_RNG: 0)
1131 | ((status_a & SYNC_HUNT) ? TIOCM_DSR: 0)
1132 | ((status_b & CTS) ? TIOCM_CTS: 0);
1133 }
1134 return result;
1135}
1136
1137static int rs_tiocmset(struct tty_struct *tty, struct file *file,
1138 unsigned int set, unsigned int clear)
1139{
1140 struct dec_serial * info = (struct dec_serial *)tty->driver_data;
1141
1142 if (info->hook)
1143 return -ENODEV;
1144
1145 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1146 return -ENODEV;
1147
1148 if (tty->flags & (1 << TTY_IO_ERROR))
1149 return -EIO;
1150
1151 if (info->zs_channel == info->zs_chan_a)
1152 return 0;
1153
1154 spin_lock(&zs_lock);
1155 if (set & TIOCM_RTS)
1156 info->zs_chan_a->curregs[5] |= RTS;
1157 if (set & TIOCM_DTR)
1158 info->zs_chan_a->curregs[5] |= DTR;
1159 if (clear & TIOCM_RTS)
1160 info->zs_chan_a->curregs[5] &= ~RTS;
1161 if (clear & TIOCM_DTR)
1162 info->zs_chan_a->curregs[5] &= ~DTR;
1163 write_zsreg(info->zs_chan_a, 5, info->zs_chan_a->curregs[5]);
1164 spin_unlock_irq(&zs_lock);
1165 return 0;
1166}
1167
1168/*
1169 * rs_break - turn transmit break condition on/off
1170 */
1171static void rs_break(struct tty_struct *tty, int break_state)
1172{
1173 struct dec_serial *info = (struct dec_serial *) tty->driver_data;
1174 unsigned long flags;
1175
1176 if (serial_paranoia_check(info, tty->name, "rs_break"))
1177 return;
1178 if (!info->port)
1179 return;
1180
1181 spin_lock_irqsave(&zs_lock, flags);
1182 if (break_state == -1)
1183 info->zs_channel->curregs[5] |= SND_BRK;
1184 else
1185 info->zs_channel->curregs[5] &= ~SND_BRK;
1186 write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
1187 spin_unlock_irqrestore(&zs_lock, flags);
1188}
1189
1190static int rs_ioctl(struct tty_struct *tty, struct file * file,
1191 unsigned int cmd, unsigned long arg)
1192{
1193 struct dec_serial * info = (struct dec_serial *)tty->driver_data;
1194
1195 if (info->hook)
1196 return -ENODEV;
1197
1198 if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1199 return -ENODEV;
1200
1201 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
1202 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
1203 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
1204 if (tty->flags & (1 << TTY_IO_ERROR))
1205 return -EIO;
1206 }
1207
1208 switch (cmd) {
1209 case TIOCGSERIAL:
1210 if (!access_ok(VERIFY_WRITE, (void *)arg,
1211 sizeof(struct serial_struct)))
1212 return -EFAULT;
1213 return get_serial_info(info, (struct serial_struct *)arg);
1214
1215 case TIOCSSERIAL:
1216 return set_serial_info(info, (struct serial_struct *)arg);
1217
1218 case TIOCSERGETLSR: /* Get line status register */
1219 if (!access_ok(VERIFY_WRITE, (void *)arg,
1220 sizeof(unsigned int)))
1221 return -EFAULT;
1222 return get_lsr_info(info, (unsigned int *)arg);
1223
1224 case TIOCSERGSTRUCT:
1225 if (!access_ok(VERIFY_WRITE, (void *)arg,
1226 sizeof(struct dec_serial)))
1227 return -EFAULT;
1228 copy_from_user((struct dec_serial *)arg, info,
1229 sizeof(struct dec_serial));
1230 return 0;
1231
1232 default:
1233 return -ENOIOCTLCMD;
1234 }
1235 return 0;
1236}
1237
1238static void rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1239{
1240 struct dec_serial *info = (struct dec_serial *)tty->driver_data;
1241 int was_stopped;
1242
1243 if (tty->termios->c_cflag == old_termios->c_cflag)
1244 return;
1245 was_stopped = info->tx_stopped;
1246
1247 change_speed(info);
1248
1249 if (was_stopped && !info->tx_stopped)
1250 rs_start(tty);
1251}
1252
1253/*
1254 * ------------------------------------------------------------
1255 * rs_close()
1256 *
1257 * This routine is called when the serial port gets closed.
1258 * Wait for the last remaining data to be sent.
1259 * ------------------------------------------------------------
1260 */
1261static void rs_close(struct tty_struct *tty, struct file * filp)
1262{
1263 struct dec_serial * info = (struct dec_serial *)tty->driver_data;
1264 unsigned long flags;
1265
1266 if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1267 return;
1268
1269 spin_lock_irqsave(&zs_lock, flags);
1270
1271 if (tty_hung_up_p(filp)) {
1272 spin_unlock_irqrestore(&zs_lock, flags);
1273 return;
1274 }
1275
1276#ifdef SERIAL_DEBUG_OPEN
1277 printk("rs_close ttyS%d, count = %d\n", info->line, info->count);
1278#endif
1279 if ((tty->count == 1) && (info->count != 1)) {
1280 /*
1281 * Uh, oh. tty->count is 1, which means that the tty
1282 * structure will be freed. Info->count should always
1283 * be one in these conditions. If it's greater than
1284 * one, we've got real problems, since it means the
1285 * serial port won't be shutdown.
1286 */
1287 printk("rs_close: bad serial port count; tty->count is 1, "
1288 "info->count is %d\n", info->count);
1289 info->count = 1;
1290 }
1291 if (--info->count < 0) {
1292 printk("rs_close: bad serial port count for ttyS%d: %d\n",
1293 info->line, info->count);
1294 info->count = 0;
1295 }
1296 if (info->count) {
1297 spin_unlock_irqrestore(&zs_lock, flags);
1298 return;
1299 }
1300 info->flags |= ZILOG_CLOSING;
1301 /*
1302 * Now we wait for the transmit buffer to clear; and we notify
1303 * the line discipline to only process XON/XOFF characters.
1304 */
1305 tty->closing = 1;
1306 if (info->closing_wait != ZILOG_CLOSING_WAIT_NONE)
1307 tty_wait_until_sent(tty, info->closing_wait);
1308 /*
1309 * At this point we stop accepting input. To do this, we
1310 * disable the receiver and receive interrupts.
1311 */
1312 info->zs_channel->curregs[3] &= ~RxENABLE;
1313 write_zsreg(info->zs_channel, 3, info->zs_channel->curregs[3]);
1314 info->zs_channel->curregs[1] = 0; /* disable any rx ints */
1315 write_zsreg(info->zs_channel, 1, info->zs_channel->curregs[1]);
1316 ZS_CLEARFIFO(info->zs_channel);
1317 if (info->flags & ZILOG_INITIALIZED) {
1318 /*
1319 * Before we drop DTR, make sure the SCC transmitter
1320 * has completely drained.
1321 */
1322 rs_wait_until_sent(tty, info->timeout);
1323 }
1324
1325 shutdown(info);
1326 if (tty->driver->flush_buffer)
1327 tty->driver->flush_buffer(tty);
1328 tty_ldisc_flush(tty);
1329 tty->closing = 0;
1330 info->event = 0;
1331 info->tty = 0;
1332 if (info->blocked_open) {
1333 if (info->close_delay) {
1334 msleep_interruptible(jiffies_to_msecs(info->close_delay));
1335 }
1336 wake_up_interruptible(&info->open_wait);
1337 }
1338 info->flags &= ~(ZILOG_NORMAL_ACTIVE|ZILOG_CLOSING);
1339 wake_up_interruptible(&info->close_wait);
1340 spin_unlock_irqrestore(&zs_lock, flags);
1341}
1342
1343/*
1344 * rs_wait_until_sent() --- wait until the transmitter is empty
1345 */
1346static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
1347{
1348 struct dec_serial *info = (struct dec_serial *) tty->driver_data;
1349 unsigned long orig_jiffies;
1350 int char_time;
1351
1352 if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1353 return;
1354
1355 orig_jiffies = jiffies;
1356 /*
1357 * Set the check interval to be 1/5 of the estimated time to
1358 * send a single character, and make it at least 1. The check
1359 * interval should also be less than the timeout.
1360 */
1361 char_time = (info->timeout - HZ/50) / info->xmit_fifo_size;
1362 char_time = char_time / 5;
1363 if (char_time == 0)
1364 char_time = 1;
1365 if (timeout)
1366 char_time = min(char_time, timeout);
1367 while ((read_zsreg(info->zs_channel, 1) & Tx_BUF_EMP) == 0) {
1368 msleep_interruptible(jiffies_to_msecs(char_time));
1369 if (signal_pending(current))
1370 break;
1371 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1372 break;
1373 }
1374 current->state = TASK_RUNNING;
1375}
1376
1377/*
1378 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1379 */
1380static void rs_hangup(struct tty_struct *tty)
1381{
1382 struct dec_serial * info = (struct dec_serial *)tty->driver_data;
1383
1384 if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1385 return;
1386
1387 rs_flush_buffer(tty);
1388 shutdown(info);
1389 info->event = 0;
1390 info->count = 0;
1391 info->flags &= ~ZILOG_NORMAL_ACTIVE;
1392 info->tty = 0;
1393 wake_up_interruptible(&info->open_wait);
1394}
1395
1396/*
1397 * ------------------------------------------------------------
1398 * rs_open() and friends
1399 * ------------------------------------------------------------
1400 */
1401static int block_til_ready(struct tty_struct *tty, struct file * filp,
1402 struct dec_serial *info)
1403{
1404 DECLARE_WAITQUEUE(wait, current);
1405 int retval;
1406 int do_clocal = 0;
1407
1408 /*
1409 * If the device is in the middle of being closed, then block
1410 * until it's done, and then try again.
1411 */
1412 if (info->flags & ZILOG_CLOSING) {
1413 interruptible_sleep_on(&info->close_wait);
1414#ifdef SERIAL_DO_RESTART
1415 return ((info->flags & ZILOG_HUP_NOTIFY) ?
1416 -EAGAIN : -ERESTARTSYS);
1417#else
1418 return -EAGAIN;
1419#endif
1420 }
1421
1422 /*
1423 * If non-blocking mode is set, or the port is not enabled,
1424 * then make the check up front and then exit.
1425 */
1426 if ((filp->f_flags & O_NONBLOCK) ||
1427 (tty->flags & (1 << TTY_IO_ERROR))) {
1428 info->flags |= ZILOG_NORMAL_ACTIVE;
1429 return 0;
1430 }
1431
1432 if (tty->termios->c_cflag & CLOCAL)
1433 do_clocal = 1;
1434
1435 /*
1436 * Block waiting for the carrier detect and the line to become
1437 * free (i.e., not in use by the callout). While we are in
1438 * this loop, info->count is dropped by one, so that
1439 * rs_close() knows when to free things. We restore it upon
1440 * exit, either normal or abnormal.
1441 */
1442 retval = 0;
1443 add_wait_queue(&info->open_wait, &wait);
1444#ifdef SERIAL_DEBUG_OPEN
1445 printk("block_til_ready before block: ttyS%d, count = %d\n",
1446 info->line, info->count);
1447#endif
1448 spin_lock(&zs_lock);
1449 if (!tty_hung_up_p(filp))
1450 info->count--;
1451 spin_unlock_irq(&zs_lock);
1452 info->blocked_open++;
1453 while (1) {
1454 spin_lock(&zs_lock);
1455 if (tty->termios->c_cflag & CBAUD)
1456 zs_rtsdtr(info, RTS | DTR, 1);
1457 spin_unlock_irq(&zs_lock);
1458 set_current_state(TASK_INTERRUPTIBLE);
1459 if (tty_hung_up_p(filp) ||
1460 !(info->flags & ZILOG_INITIALIZED)) {
1461#ifdef SERIAL_DO_RESTART
1462 if (info->flags & ZILOG_HUP_NOTIFY)
1463 retval = -EAGAIN;
1464 else
1465 retval = -ERESTARTSYS;
1466#else
1467 retval = -EAGAIN;
1468#endif
1469 break;
1470 }
1471 if (!(info->flags & ZILOG_CLOSING) &&
1472 (do_clocal || (read_zsreg(info->zs_channel, 0) & DCD)))
1473 break;
1474 if (signal_pending(current)) {
1475 retval = -ERESTARTSYS;
1476 break;
1477 }
1478#ifdef SERIAL_DEBUG_OPEN
1479 printk("block_til_ready blocking: ttyS%d, count = %d\n",
1480 info->line, info->count);
1481#endif
1482 schedule();
1483 }
1484 current->state = TASK_RUNNING;
1485 remove_wait_queue(&info->open_wait, &wait);
1486 if (!tty_hung_up_p(filp))
1487 info->count++;
1488 info->blocked_open--;
1489#ifdef SERIAL_DEBUG_OPEN
1490 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
1491 info->line, info->count);
1492#endif
1493 if (retval)
1494 return retval;
1495 info->flags |= ZILOG_NORMAL_ACTIVE;
1496 return 0;
1497}
1498
1499/*
1500 * This routine is called whenever a serial port is opened. It
1501 * enables interrupts for a serial port, linking in its ZILOG structure into
1502 * the IRQ chain. It also performs the serial-specific
1503 * initialization for the tty structure.
1504 */
1505static int rs_open(struct tty_struct *tty, struct file * filp)
1506{
1507 struct dec_serial *info;
1508 int retval, line;
1509
1510 line = tty->index;
1511 if ((line < 0) || (line >= zs_channels_found))
1512 return -ENODEV;
1513 info = zs_soft + line;
1514
1515 if (info->hook)
1516 return -ENODEV;
1517
1518 if (serial_paranoia_check(info, tty->name, "rs_open"))
1519 return -ENODEV;
1520#ifdef SERIAL_DEBUG_OPEN
1521 printk("rs_open %s, count = %d\n", tty->name, info->count);
1522#endif
1523
1524 info->count++;
1525 tty->driver_data = info;
1526 info->tty = tty;
1527
1528 /*
1529 * If the port is the middle of closing, bail out now
1530 */
1531 if (tty_hung_up_p(filp) ||
1532 (info->flags & ZILOG_CLOSING)) {
1533 if (info->flags & ZILOG_CLOSING)
1534 interruptible_sleep_on(&info->close_wait);
1535#ifdef SERIAL_DO_RESTART
1536 return ((info->flags & ZILOG_HUP_NOTIFY) ?
1537 -EAGAIN : -ERESTARTSYS);
1538#else
1539 return -EAGAIN;
1540#endif
1541 }
1542
1543 /*
1544 * Start up serial port
1545 */
1546 retval = zs_startup(info);
1547 if (retval)
1548 return retval;
1549
1550 retval = block_til_ready(tty, filp, info);
1551 if (retval) {
1552#ifdef SERIAL_DEBUG_OPEN
1553 printk("rs_open returning after block_til_ready with %d\n",
1554 retval);
1555#endif
1556 return retval;
1557 }
1558
1559#ifdef CONFIG_SERIAL_DEC_CONSOLE
1560 if (zs_console.cflag && zs_console.index == line) {
1561 tty->termios->c_cflag = zs_console.cflag;
1562 zs_console.cflag = 0;
1563 change_speed(info);
1564 }
1565#endif
1566
1567#ifdef SERIAL_DEBUG_OPEN
1568 printk("rs_open %s successful...", tty->name);
1569#endif
1570/* tty->low_latency = 1; */
1571 return 0;
1572}
1573
1574/* Finally, routines used to initialize the serial driver. */
1575
1576static void __init show_serial_version(void)
1577{
1578 printk("DECstation Z8530 serial driver version 0.09\n");
1579}
1580
1581/* Initialize Z8530s zs_channels
1582 */
1583
1584static void __init probe_sccs(void)
1585{
1586 struct dec_serial **pp;
1587 int i, n, n_chips = 0, n_channels, chip, channel;
1588 unsigned long flags;
1589
1590 /*
1591 * did we get here by accident?
1592 */
1593 if(!BUS_PRESENT) {
1594 printk("Not on JUNKIO machine, skipping probe_sccs\n");
1595 return;
1596 }
1597
1598 switch(mips_machtype) {
1599#ifdef CONFIG_MACH_DECSTATION
1600 case MACH_DS5000_2X0:
1601 case MACH_DS5900:
1602 n_chips = 2;
1603 zs_parms = &ds_parms;
1604 zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
1605 zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1];
1606 break;
1607 case MACH_DS5000_1XX:
1608 n_chips = 2;
1609 zs_parms = &ds_parms;
1610 zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
1611 zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1];
1612 break;
1613 case MACH_DS5000_XX:
1614 n_chips = 1;
1615 zs_parms = &ds_parms;
1616 zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
1617 break;
1618#endif
1619 default:
1620 panic("zs: unsupported bus");
1621 }
1622 if (!zs_parms)
1623 panic("zs: uninitialized parms");
1624
1625 pp = &zs_chain;
1626
1627 n_channels = 0;
1628
1629 for (chip = 0; chip < n_chips; chip++) {
1630 for (channel = 0; channel <= 1; channel++) {
1631 /*
1632 * The sccs reside on the high byte of the 16 bit IOBUS
1633 */
1634 zs_channels[n_channels].control =
1635 (volatile void *)CKSEG1ADDR(dec_kn_slot_base +
1636 (0 == chip ? zs_parms->scc0 : zs_parms->scc1) +
1637 (0 == channel ? zs_parms->channel_a_offset :
1638 zs_parms->channel_b_offset));
1639 zs_channels[n_channels].data =
1640 zs_channels[n_channels].control + 4;
1641
1642#ifndef CONFIG_SERIAL_DEC_CONSOLE
1643 /*
1644 * We're called early and memory managment isn't up, yet.
1645 * Thus request_region would fail.
1646 */
1647 if (!request_region((unsigned long)
1648 zs_channels[n_channels].control,
1649 ZS_CHAN_IO_SIZE, "SCC"))
1650 panic("SCC I/O region is not free");
1651#endif
1652 zs_soft[n_channels].zs_channel = &zs_channels[n_channels];
1653 /* HACK alert! */
1654 if (!(chip & 1))
1655 zs_soft[n_channels].irq = zs_parms->irq0;
1656 else
1657 zs_soft[n_channels].irq = zs_parms->irq1;
1658
1659 /*
1660 * Identification of channel A. Location of channel A
1661 * inside chip depends on mapping of internal address
1662 * the chip decodes channels by.
1663 * CHANNEL_A_NR returns either 0 (in case of
1664 * DECstations) or 1 (in case of Baget).
1665 */
1666 if (CHANNEL_A_NR == channel)
1667 zs_soft[n_channels].zs_chan_a =
1668 &zs_channels[n_channels+1-2*CHANNEL_A_NR];
1669 else
1670 zs_soft[n_channels].zs_chan_a =
1671 &zs_channels[n_channels];
1672
1673 *pp = &zs_soft[n_channels];
1674 pp = &zs_soft[n_channels].zs_next;
1675 n_channels++;
1676 }
1677 }
1678
1679 *pp = 0;
1680 zs_channels_found = n_channels;
1681
1682 for (n = 0; n < zs_channels_found; n++) {
1683 for (i = 0; i < 16; i++) {
1684 zs_soft[n].zs_channel->curregs[i] = zs_init_regs[i];
1685 }
1686 }
1687
1688 spin_lock_irqsave(&zs_lock, flags);
1689 for (n = 0; n < zs_channels_found; n++) {
1690 if (n % 2 == 0) {
1691 write_zsreg(zs_soft[n].zs_chan_a, R9, FHWRES);
1692 udelay(10);
1693 write_zsreg(zs_soft[n].zs_chan_a, R9, 0);
1694 }
1695 load_zsregs(zs_soft[n].zs_channel,
1696 zs_soft[n].zs_channel->curregs);
1697 }
1698 spin_unlock_irqrestore(&zs_lock, flags);
1699}
1700
1701static const struct tty_operations serial_ops = {
1702 .open = rs_open,
1703 .close = rs_close,
1704 .write = rs_write,
1705 .flush_chars = rs_flush_chars,
1706 .write_room = rs_write_room,
1707 .chars_in_buffer = rs_chars_in_buffer,
1708 .flush_buffer = rs_flush_buffer,
1709 .ioctl = rs_ioctl,
1710 .throttle = rs_throttle,
1711 .unthrottle = rs_unthrottle,
1712 .set_termios = rs_set_termios,
1713 .stop = rs_stop,
1714 .start = rs_start,
1715 .hangup = rs_hangup,
1716 .break_ctl = rs_break,
1717 .wait_until_sent = rs_wait_until_sent,
1718 .tiocmget = rs_tiocmget,
1719 .tiocmset = rs_tiocmset,
1720};
1721
1722/* zs_init inits the driver */
1723int __init zs_init(void)
1724{
1725 int channel, i;
1726 struct dec_serial *info;
1727
1728 if(!BUS_PRESENT)
1729 return -ENODEV;
1730
1731 /* Find out how many Z8530 SCCs we have */
1732 if (zs_chain == 0)
1733 probe_sccs();
1734 serial_driver = alloc_tty_driver(zs_channels_found);
1735 if (!serial_driver)
1736 return -ENOMEM;
1737
1738 show_serial_version();
1739
1740 /* Initialize the tty_driver structure */
1741 /* Not all of this is exactly right for us. */
1742
1743 serial_driver->owner = THIS_MODULE;
1744 serial_driver->name = "ttyS";
1745 serial_driver->major = TTY_MAJOR;
1746 serial_driver->minor_start = 64;
1747 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
1748 serial_driver->subtype = SERIAL_TYPE_NORMAL;
1749 serial_driver->init_termios = tty_std_termios;
1750 serial_driver->init_termios.c_cflag =
1751 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
1752 serial_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
1753 tty_set_operations(serial_driver, &serial_ops);
1754
1755 if (tty_register_driver(serial_driver))
1756 panic("Couldn't register serial driver");
1757
1758 for (info = zs_chain, i = 0; info; info = info->zs_next, i++) {
1759
1760 /* Needed before interrupts are enabled. */
1761 info->tty = 0;
1762 info->x_char = 0;
1763
1764 if (info->hook && info->hook->init_info) {
1765 (*info->hook->init_info)(info);
1766 continue;
1767 }
1768
1769 info->magic = SERIAL_MAGIC;
1770 info->port = (int) info->zs_channel->control;
1771 info->line = i;
1772 info->custom_divisor = 16;
1773 info->close_delay = 50;
1774 info->closing_wait = 3000;
1775 info->event = 0;
1776 info->count = 0;
1777 info->blocked_open = 0;
1778 tasklet_init(&info->tlet, do_softint, (unsigned long)info);
1779 init_waitqueue_head(&info->open_wait);
1780 init_waitqueue_head(&info->close_wait);
1781 printk("ttyS%02d at 0x%08x (irq = %d) is a Z85C30 SCC\n",
1782 info->line, info->port, info->irq);
1783 tty_register_device(serial_driver, info->line, NULL);
1784
1785 }
1786
1787 for (channel = 0; channel < zs_channels_found; ++channel) {
1788 zs_soft[channel].clk_divisor = 16;
1789 zs_soft[channel].zs_baud = get_zsbaud(&zs_soft[channel]);
1790
1791 if (request_irq(zs_soft[channel].irq, rs_interrupt, IRQF_SHARED,
1792 "scc", &zs_soft[channel]))
1793 printk(KERN_ERR "decserial: can't get irq %d\n",
1794 zs_soft[channel].irq);
1795
1796 if (zs_soft[channel].hook) {
1797 zs_startup(&zs_soft[channel]);
1798 if (zs_soft[channel].hook->init_channel)
1799 (*zs_soft[channel].hook->init_channel)
1800 (&zs_soft[channel]);
1801 }
1802 }
1803
1804 return 0;
1805}
1806
1807/*
1808 * polling I/O routines
1809 */
1810static int zs_poll_tx_char(void *handle, unsigned char ch)
1811{
1812 struct dec_serial *info = handle;
1813 struct dec_zschannel *chan = info->zs_channel;
1814 int ret;
1815
1816 if(chan) {
1817 int loops = 10000;
1818
1819 while (loops && !(read_zsreg(chan, 0) & Tx_BUF_EMP))
1820 loops--;
1821
1822 if (loops) {
1823 write_zsdata(chan, ch);
1824 ret = 0;
1825 } else
1826 ret = -EAGAIN;
1827
1828 return ret;
1829 } else
1830 return -ENODEV;
1831}
1832
1833static int zs_poll_rx_char(void *handle)
1834{
1835 struct dec_serial *info = handle;
1836 struct dec_zschannel *chan = info->zs_channel;
1837 int ret;
1838
1839 if(chan) {
1840 int loops = 10000;
1841
1842 while (loops && !(read_zsreg(chan, 0) & Rx_CH_AV))
1843 loops--;
1844
1845 if (loops)
1846 ret = read_zsdata(chan);
1847 else
1848 ret = -EAGAIN;
1849
1850 return ret;
1851 } else
1852 return -ENODEV;
1853}
1854
1855int register_zs_hook(unsigned int channel, struct dec_serial_hook *hook)
1856{
1857 struct dec_serial *info = &zs_soft[channel];
1858
1859 if (info->hook) {
1860 printk("%s: line %d has already a hook registered\n",
1861 __FUNCTION__, channel);
1862
1863 return 0;
1864 } else {
1865 hook->poll_rx_char = zs_poll_rx_char;
1866 hook->poll_tx_char = zs_poll_tx_char;
1867 info->hook = hook;
1868
1869 return 1;
1870 }
1871}
1872
1873int unregister_zs_hook(unsigned int channel)
1874{
1875 struct dec_serial *info = &zs_soft[channel];
1876
1877 if (info->hook) {
1878 info->hook = NULL;
1879 return 1;
1880 } else {
1881 printk("%s: trying to unregister hook on line %d,"
1882 " but none is registered\n", __FUNCTION__, channel);
1883 return 0;
1884 }
1885}
1886
1887/*
1888 * ------------------------------------------------------------
1889 * Serial console driver
1890 * ------------------------------------------------------------
1891 */
1892#ifdef CONFIG_SERIAL_DEC_CONSOLE
1893
1894
1895/*
1896 * Print a string to the serial port trying not to disturb
1897 * any possible real use of the port...
1898 */
1899static void serial_console_write(struct console *co, const char *s,
1900 unsigned count)
1901{
1902 struct dec_serial *info;
1903 int i;
1904
1905 info = zs_soft + co->index;
1906
1907 for (i = 0; i < count; i++, s++) {
1908 if(*s == '\n')
1909 zs_poll_tx_char(info, '\r');
1910 zs_poll_tx_char(info, *s);
1911 }
1912}
1913
1914static struct tty_driver *serial_console_device(struct console *c, int *index)
1915{
1916 *index = c->index;
1917 return serial_driver;
1918}
1919
1920/*
1921 * Setup initial baud/bits/parity. We do two things here:
1922 * - construct a cflag setting for the first rs_open()
1923 * - initialize the serial port
1924 * Return non-zero if we didn't find a serial port.
1925 */
1926static int __init serial_console_setup(struct console *co, char *options)
1927{
1928 struct dec_serial *info;
1929 int baud = 9600;
1930 int bits = 8;
1931 int parity = 'n';
1932 int cflag = CREAD | HUPCL | CLOCAL;
1933 int clk_divisor = 16;
1934 int brg;
1935 char *s;
1936 unsigned long flags;
1937
1938 if(!BUS_PRESENT)
1939 return -ENODEV;
1940
1941 info = zs_soft + co->index;
1942
1943 if (zs_chain == 0)
1944 probe_sccs();
1945
1946 info->is_cons = 1;
1947
1948 if (options) {
1949 baud = simple_strtoul(options, NULL, 10);
1950 s = options;
1951 while(*s >= '0' && *s <= '9')
1952 s++;
1953 if (*s)
1954 parity = *s++;
1955 if (*s)
1956 bits = *s - '0';
1957 }
1958
1959 /*
1960 * Now construct a cflag setting.
1961 */
1962 switch(baud) {
1963 case 1200:
1964 cflag |= B1200;
1965 break;
1966 case 2400:
1967 cflag |= B2400;
1968 break;
1969 case 4800:
1970 cflag |= B4800;
1971 break;
1972 case 19200:
1973 cflag |= B19200;
1974 break;
1975 case 38400:
1976 cflag |= B38400;
1977 break;
1978 case 57600:
1979 cflag |= B57600;
1980 break;
1981 case 115200:
1982 cflag |= B115200;
1983 break;
1984 case 9600:
1985 default:
1986 cflag |= B9600;
1987 /*
1988 * Set this to a sane value to prevent a divide error.
1989 */
1990 baud = 9600;
1991 break;
1992 }
1993 switch(bits) {
1994 case 7:
1995 cflag |= CS7;
1996 break;
1997 default:
1998 case 8:
1999 cflag |= CS8;
2000 break;
2001 }
2002 switch(parity) {
2003 case 'o': case 'O':
2004 cflag |= PARODD;
2005 break;
2006 case 'e': case 'E':
2007 cflag |= PARENB;
2008 break;
2009 }
2010 co->cflag = cflag;
2011
2012 spin_lock_irqsave(&zs_lock, flags);
2013
2014 /*
2015 * Set up the baud rate generator.
2016 */
2017 brg = BPS_TO_BRG(baud, zs_parms->clock / clk_divisor);
2018 info->zs_channel->curregs[R12] = (brg & 255);
2019 info->zs_channel->curregs[R13] = ((brg >> 8) & 255);
2020
2021 /*
2022 * Set byte size and parity.
2023 */
2024 if (bits == 7) {
2025 info->zs_channel->curregs[R3] |= Rx7;
2026 info->zs_channel->curregs[R5] |= Tx7;
2027 } else {
2028 info->zs_channel->curregs[R3] |= Rx8;
2029 info->zs_channel->curregs[R5] |= Tx8;
2030 }
2031 if (cflag & PARENB) {
2032 info->zs_channel->curregs[R4] |= PAR_ENA;
2033 }
2034 if (!(cflag & PARODD)) {
2035 info->zs_channel->curregs[R4] |= PAR_EVEN;
2036 }
2037 info->zs_channel->curregs[R4] |= SB1;
2038
2039 /*
2040 * Turn on RTS and DTR.
2041 */
2042 zs_rtsdtr(info, RTS | DTR, 1);
2043
2044 /*
2045 * Finally, enable sequencing.
2046 */
2047 info->zs_channel->curregs[R3] |= RxENABLE;
2048 info->zs_channel->curregs[R5] |= TxENAB;
2049
2050 /*
2051 * Clear the interrupt registers.
2052 */
2053 write_zsreg(info->zs_channel, R0, ERR_RES);
2054 write_zsreg(info->zs_channel, R0, RES_H_IUS);
2055
2056 /*
2057 * Load up the new values.
2058 */
2059 load_zsregs(info->zs_channel, info->zs_channel->curregs);
2060
2061 /* Save the current value of RR0 */
2062 info->read_reg_zero = read_zsreg(info->zs_channel, R0);
2063
2064 zs_soft[co->index].clk_divisor = clk_divisor;
2065 zs_soft[co->index].zs_baud = get_zsbaud(&zs_soft[co->index]);
2066
2067 spin_unlock_irqrestore(&zs_lock, flags);
2068
2069 return 0;
2070}
2071
2072static struct console zs_console = {
2073 .name = "ttyS",
2074 .write = serial_console_write,
2075 .device = serial_console_device,
2076 .setup = serial_console_setup,
2077 .flags = CON_PRINTBUFFER,
2078 .index = -1,
2079};
2080
2081/*
2082 * Register console.
2083 */
2084void __init zs_serial_console_init(void)
2085{
2086 register_console(&zs_console);
2087}
2088#endif /* ifdef CONFIG_SERIAL_DEC_CONSOLE */
2089
2090#ifdef CONFIG_KGDB
2091struct dec_zschannel *zs_kgdbchan;
2092static unsigned char scc_inittab[] = {
2093 9, 0x80, /* reset A side (CHRA) */
2094 13, 0, /* set baud rate divisor */
2095 12, 1,
2096 14, 1, /* baud rate gen enable, src=rtxc (BRENABL) */
2097 11, 0x50, /* clocks = br gen (RCBR | TCBR) */
2098 5, 0x6a, /* tx 8 bits, assert RTS (Tx8 | TxENAB | RTS) */
2099 4, 0x44, /* x16 clock, 1 stop (SB1 | X16CLK)*/
2100 3, 0xc1, /* rx enable, 8 bits (RxENABLE | Rx8)*/
2101};
2102
2103/* These are for receiving and sending characters under the kgdb
2104 * source level kernel debugger.
2105 */
2106void putDebugChar(char kgdb_char)
2107{
2108 struct dec_zschannel *chan = zs_kgdbchan;
2109 while ((read_zsreg(chan, 0) & Tx_BUF_EMP) == 0)
2110 RECOVERY_DELAY;
2111 write_zsdata(chan, kgdb_char);
2112}
2113char getDebugChar(void)
2114{
2115 struct dec_zschannel *chan = zs_kgdbchan;
2116 while((read_zsreg(chan, 0) & Rx_CH_AV) == 0)
2117 eieio(); /*barrier();*/
2118 return read_zsdata(chan);
2119}
2120void kgdb_interruptible(int yes)
2121{
2122 struct dec_zschannel *chan = zs_kgdbchan;
2123 int one, nine;
2124 nine = read_zsreg(chan, 9);
2125 if (yes == 1) {
2126 one = EXT_INT_ENAB|RxINT_ALL;
2127 nine |= MIE;
2128 printk("turning serial ints on\n");
2129 } else {
2130 one = RxINT_DISAB;
2131 nine &= ~MIE;
2132 printk("turning serial ints off\n");
2133 }
2134 write_zsreg(chan, 1, one);
2135 write_zsreg(chan, 9, nine);
2136}
2137
2138static int kgdbhook_init_channel(void *handle)
2139{
2140 return 0;
2141}
2142
2143static void kgdbhook_init_info(void *handle)
2144{
2145}
2146
2147static void kgdbhook_rx_char(void *handle, unsigned char ch, unsigned char fl)
2148{
2149 struct dec_serial *info = handle;
2150
2151 if (fl != TTY_NORMAL)
2152 return;
2153 if (ch == 0x03 || ch == '$')
2154 breakpoint();
2155}
2156
2157/* This sets up the serial port we're using, and turns on
2158 * interrupts for that channel, so kgdb is usable once we're done.
2159 */
2160static inline void kgdb_chaninit(struct dec_zschannel *ms, int intson, int bps)
2161{
2162 int brg;
2163 int i, x;
2164 volatile char *sccc = ms->control;
2165 brg = BPS_TO_BRG(bps, zs_parms->clock/16);
2166 printk("setting bps on kgdb line to %d [brg=%x]\n", bps, brg);
2167 for (i = 20000; i != 0; --i) {
2168 x = *sccc; eieio();
2169 }
2170 for (i = 0; i < sizeof(scc_inittab); ++i) {
2171 write_zsreg(ms, scc_inittab[i], scc_inittab[i+1]);
2172 i++;
2173 }
2174}
2175/* This is called at boot time to prime the kgdb serial debugging
2176 * serial line. The 'tty_num' argument is 0 for /dev/ttya and 1
2177 * for /dev/ttyb which is determined in setup_arch() from the
2178 * boot command line flags.
2179 */
2180struct dec_serial_hook zs_kgdbhook = {
2181 .init_channel = kgdbhook_init_channel,
2182 .init_info = kgdbhook_init_info,
2183 .rx_char = kgdbhook_rx_char,
2184 .cflags = B38400 | CS8 | CLOCAL,
2185};
2186
2187void __init zs_kgdb_hook(int tty_num)
2188{
2189 /* Find out how many Z8530 SCCs we have */
2190 if (zs_chain == 0)
2191 probe_sccs();
2192 zs_soft[tty_num].zs_channel = &zs_channels[tty_num];
2193 zs_kgdbchan = zs_soft[tty_num].zs_channel;
2194 zs_soft[tty_num].change_needed = 0;
2195 zs_soft[tty_num].clk_divisor = 16;
2196 zs_soft[tty_num].zs_baud = 38400;
2197 zs_soft[tty_num].hook = &zs_kgdbhook; /* This runs kgdb */
2198 /* Turn on transmitter/receiver at 8-bits/char */
2199 kgdb_chaninit(zs_soft[tty_num].zs_channel, 1, 38400);
2200 printk("KGDB: on channel %d initialized\n", tty_num);
2201 set_debug_traps(); /* init stub */
2202}
2203#endif /* ifdef CONFIG_KGDB */
diff --git a/drivers/tc/zs.h b/drivers/tc/zs.h
deleted file mode 100644
index 13512200ceba..000000000000
--- a/drivers/tc/zs.h
+++ /dev/null
@@ -1,404 +0,0 @@
1/*
2 * drivers/tc/zs.h: Definitions for the DECstation Z85C30 serial driver.
3 *
4 * Adapted from drivers/sbus/char/sunserial.h by Paul Mackerras.
5 * Adapted from drivers/macintosh/macserial.h by Harald Koerfgen.
6 *
7 * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
8 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
9 * Copyright (C) 2004, 2005 Maciej W. Rozycki
10 */
11#ifndef _DECSERIAL_H
12#define _DECSERIAL_H
13
14#include <asm/dec/serial.h>
15
16#define NUM_ZSREGS 16
17
18struct serial_struct {
19 int type;
20 int line;
21 int port;
22 int irq;
23 int flags;
24 int xmit_fifo_size;
25 int custom_divisor;
26 int baud_base;
27 unsigned short close_delay;
28 char reserved_char[2];
29 int hub6;
30 unsigned short closing_wait; /* time to wait before closing */
31 unsigned short closing_wait2; /* no longer used... */
32 int reserved[4];
33};
34
35/*
36 * For the close wait times, 0 means wait forever for serial port to
37 * flush its output. 65535 means don't wait at all.
38 */
39#define ZILOG_CLOSING_WAIT_INF 0
40#define ZILOG_CLOSING_WAIT_NONE 65535
41
42/*
43 * Definitions for ZILOG_struct (and serial_struct) flags field
44 */
45#define ZILOG_HUP_NOTIFY 0x0001 /* Notify getty on hangups and closes
46 on the callout port */
47#define ZILOG_FOURPORT 0x0002 /* Set OU1, OUT2 per AST Fourport settings */
48#define ZILOG_SAK 0x0004 /* Secure Attention Key (Orange book) */
49#define ZILOG_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
50
51#define ZILOG_SPD_MASK 0x0030
52#define ZILOG_SPD_HI 0x0010 /* Use 56000 instead of 38400 bps */
53
54#define ZILOG_SPD_VHI 0x0020 /* Use 115200 instead of 38400 bps */
55#define ZILOG_SPD_CUST 0x0030 /* Use user-specified divisor */
56
57#define ZILOG_SKIP_TEST 0x0040 /* Skip UART test during autoconfiguration */
58#define ZILOG_AUTO_IRQ 0x0080 /* Do automatic IRQ during autoconfiguration */
59#define ZILOG_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
60#define ZILOG_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
61#define ZILOG_CALLOUT_NOHUP 0x0400 /* Don't do hangups for cua device */
62
63#define ZILOG_FLAGS 0x0FFF /* Possible legal ZILOG flags */
64#define ZILOG_USR_MASK 0x0430 /* Legal flags that non-privileged
65 * users can set or reset */
66
67/* Internal flags used only by kernel/chr_drv/serial.c */
68#define ZILOG_INITIALIZED 0x80000000 /* Serial port was initialized */
69#define ZILOG_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
70#define ZILOG_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
71#define ZILOG_BOOT_AUTOCONF 0x10000000 /* Autoconfigure port on bootup */
72#define ZILOG_CLOSING 0x08000000 /* Serial port is closing */
73#define ZILOG_CTS_FLOW 0x04000000 /* Do CTS flow control */
74#define ZILOG_CHECK_CD 0x02000000 /* i.e., CLOCAL */
75
76/* Software state per channel */
77
78#ifdef __KERNEL__
79/*
80 * This is our internal structure for each serial port's state.
81 *
82 * Many fields are paralleled by the structure used by the serial_struct
83 * structure.
84 *
85 * For definitions of the flags field, see tty.h
86 */
87
88struct dec_zschannel {
89 volatile unsigned char *control;
90 volatile unsigned char *data;
91
92 /* Current write register values */
93 unsigned char curregs[NUM_ZSREGS];
94};
95
96struct dec_serial {
97 struct dec_serial *zs_next; /* For IRQ servicing chain. */
98 struct dec_zschannel *zs_channel; /* Channel registers. */
99 struct dec_zschannel *zs_chan_a; /* A side registers. */
100 unsigned char read_reg_zero;
101
102 struct dec_serial_hook *hook; /* Hook on this channel. */
103 int tty_break; /* Set on BREAK condition. */
104 int is_cons; /* Is this our console. */
105 int tx_active; /* Char is being xmitted. */
106 int tx_stopped; /* Output is suspended. */
107
108 /*
109 * We need to know the current clock divisor
110 * to read the bps rate the chip has currently loaded.
111 */
112 int clk_divisor; /* May be 1, 16, 32, or 64. */
113 int zs_baud;
114
115 char change_needed;
116
117 int magic;
118 int baud_base;
119 int port;
120 int irq;
121 int flags; /* Defined in tty.h. */
122 int type; /* UART type. */
123 struct tty_struct *tty;
124 int read_status_mask;
125 int ignore_status_mask;
126 int timeout;
127 int xmit_fifo_size;
128 int custom_divisor;
129 int x_char; /* XON/XOFF character. */
130 int close_delay;
131 unsigned short closing_wait;
132 unsigned short closing_wait2;
133 unsigned long event;
134 unsigned long last_active;
135 int line;
136 int count; /* # of fds on device. */
137 int blocked_open; /* # of blocked opens. */
138 unsigned char *xmit_buf;
139 int xmit_head;
140 int xmit_tail;
141 int xmit_cnt;
142 struct tasklet_struct tlet;
143 wait_queue_head_t open_wait;
144 wait_queue_head_t close_wait;
145};
146
147
148#define SERIAL_MAGIC 0x5301
149
150/*
151 * The size of the serial xmit buffer is 1 page, or 4096 bytes
152 */
153#define SERIAL_XMIT_SIZE 4096
154
155/*
156 * Events are used to schedule things to happen at timer-interrupt
157 * time, instead of at rs interrupt time.
158 */
159#define RS_EVENT_WRITE_WAKEUP 0
160
161#endif /* __KERNEL__ */
162
163/* Conversion routines to/from brg time constants from/to bits
164 * per second.
165 */
166#define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2))
167#define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
168
169/* The Zilog register set */
170
171#define FLAG 0x7e
172
173/* Write Register 0 */
174#define R0 0 /* Register selects */
175#define R1 1
176#define R2 2
177#define R3 3
178#define R4 4
179#define R5 5
180#define R6 6
181#define R7 7
182#define R8 8
183#define R9 9
184#define R10 10
185#define R11 11
186#define R12 12
187#define R13 13
188#define R14 14
189#define R15 15
190
191#define NULLCODE 0 /* Null Code */
192#define POINT_HIGH 0x8 /* Select upper half of registers */
193#define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
194#define SEND_ABORT 0x18 /* HDLC Abort */
195#define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
196#define RES_Tx_P 0x28 /* Reset TxINT Pending */
197#define ERR_RES 0x30 /* Error Reset */
198#define RES_H_IUS 0x38 /* Reset highest IUS */
199
200#define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
201#define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
202#define RES_EOM_L 0xC0 /* Reset EOM latch */
203
204/* Write Register 1 */
205
206#define EXT_INT_ENAB 0x1 /* Ext Int Enable */
207#define TxINT_ENAB 0x2 /* Tx Int Enable */
208#define PAR_SPEC 0x4 /* Parity is special condition */
209
210#define RxINT_DISAB 0 /* Rx Int Disable */
211#define RxINT_FCERR 0x8 /* Rx Int on First Character Only or Error */
212#define RxINT_ALL 0x10 /* Int on all Rx Characters or error */
213#define RxINT_ERR 0x18 /* Int on error only */
214#define RxINT_MASK 0x18
215
216#define WT_RDY_RT 0x20 /* Wait/Ready on R/T */
217#define WT_FN_RDYFN 0x40 /* Wait/FN/Ready FN */
218#define WT_RDY_ENAB 0x80 /* Wait/Ready Enable */
219
220/* Write Register #2 (Interrupt Vector) */
221
222/* Write Register 3 */
223
224#define RxENABLE 0x1 /* Rx Enable */
225#define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
226#define ADD_SM 0x4 /* Address Search Mode (SDLC) */
227#define RxCRC_ENAB 0x8 /* Rx CRC Enable */
228#define ENT_HM 0x10 /* Enter Hunt Mode */
229#define AUTO_ENAB 0x20 /* Auto Enables */
230#define Rx5 0x0 /* Rx 5 Bits/Character */
231#define Rx7 0x40 /* Rx 7 Bits/Character */
232#define Rx6 0x80 /* Rx 6 Bits/Character */
233#define Rx8 0xc0 /* Rx 8 Bits/Character */
234#define RxNBITS_MASK 0xc0
235
236/* Write Register 4 */
237
238#define PAR_ENA 0x1 /* Parity Enable */
239#define PAR_EVEN 0x2 /* Parity Even/Odd* */
240
241#define SYNC_ENAB 0 /* Sync Modes Enable */
242#define SB1 0x4 /* 1 stop bit/char */
243#define SB15 0x8 /* 1.5 stop bits/char */
244#define SB2 0xc /* 2 stop bits/char */
245#define SB_MASK 0xc
246
247#define MONSYNC 0 /* 8 Bit Sync character */
248#define BISYNC 0x10 /* 16 bit sync character */
249#define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
250#define EXTSYNC 0x30 /* External Sync Mode */
251
252#define X1CLK 0x0 /* x1 clock mode */
253#define X16CLK 0x40 /* x16 clock mode */
254#define X32CLK 0x80 /* x32 clock mode */
255#define X64CLK 0xC0 /* x64 clock mode */
256#define XCLK_MASK 0xC0
257
258/* Write Register 5 */
259
260#define TxCRC_ENAB 0x1 /* Tx CRC Enable */
261#define RTS 0x2 /* RTS */
262#define SDLC_CRC 0x4 /* SDLC/CRC-16 */
263#define TxENAB 0x8 /* Tx Enable */
264#define SND_BRK 0x10 /* Send Break */
265#define Tx5 0x0 /* Tx 5 bits (or less)/character */
266#define Tx7 0x20 /* Tx 7 bits/character */
267#define Tx6 0x40 /* Tx 6 bits/character */
268#define Tx8 0x60 /* Tx 8 bits/character */
269#define TxNBITS_MASK 0x60
270#define DTR 0x80 /* DTR */
271
272/* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
273
274/* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
275
276/* Write Register 8 (transmit buffer) */
277
278/* Write Register 9 (Master interrupt control) */
279#define VIS 1 /* Vector Includes Status */
280#define NV 2 /* No Vector */
281#define DLC 4 /* Disable Lower Chain */
282#define MIE 8 /* Master Interrupt Enable */
283#define STATHI 0x10 /* Status high */
284#define SOFTACK 0x20 /* Software Interrupt Acknowledge */
285#define NORESET 0 /* No reset on write to R9 */
286#define CHRB 0x40 /* Reset channel B */
287#define CHRA 0x80 /* Reset channel A */
288#define FHWRES 0xc0 /* Force hardware reset */
289
290/* Write Register 10 (misc control bits) */
291#define BIT6 1 /* 6 bit/8bit sync */
292#define LOOPMODE 2 /* SDLC Loop mode */
293#define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */
294#define MARKIDLE 8 /* Mark/flag on idle */
295#define GAOP 0x10 /* Go active on poll */
296#define NRZ 0 /* NRZ mode */
297#define NRZI 0x20 /* NRZI mode */
298#define FM1 0x40 /* FM1 (transition = 1) */
299#define FM0 0x60 /* FM0 (transition = 0) */
300#define CRCPS 0x80 /* CRC Preset I/O */
301
302/* Write Register 11 (Clock Mode control) */
303#define TRxCXT 0 /* TRxC = Xtal output */
304#define TRxCTC 1 /* TRxC = Transmit clock */
305#define TRxCBR 2 /* TRxC = BR Generator Output */
306#define TRxCDP 3 /* TRxC = DPLL output */
307#define TRxCOI 4 /* TRxC O/I */
308#define TCRTxCP 0 /* Transmit clock = RTxC pin */
309#define TCTRxCP 8 /* Transmit clock = TRxC pin */
310#define TCBR 0x10 /* Transmit clock = BR Generator output */
311#define TCDPLL 0x18 /* Transmit clock = DPLL output */
312#define RCRTxCP 0 /* Receive clock = RTxC pin */
313#define RCTRxCP 0x20 /* Receive clock = TRxC pin */
314#define RCBR 0x40 /* Receive clock = BR Generator output */
315#define RCDPLL 0x60 /* Receive clock = DPLL output */
316#define RTxCX 0x80 /* RTxC Xtal/No Xtal */
317
318/* Write Register 12 (lower byte of baud rate generator time constant) */
319
320/* Write Register 13 (upper byte of baud rate generator time constant) */
321
322/* Write Register 14 (Misc control bits) */
323#define BRENABL 1 /* Baud rate generator enable */
324#define BRSRC 2 /* Baud rate generator source */
325#define DTRREQ 4 /* DTR/Request function */
326#define AUTOECHO 8 /* Auto Echo */
327#define LOOPBAK 0x10 /* Local loopback */
328#define SEARCH 0x20 /* Enter search mode */
329#define RMC 0x40 /* Reset missing clock */
330#define DISDPLL 0x60 /* Disable DPLL */
331#define SSBR 0x80 /* Set DPLL source = BR generator */
332#define SSRTxC 0xa0 /* Set DPLL source = RTxC */
333#define SFMM 0xc0 /* Set FM mode */
334#define SNRZI 0xe0 /* Set NRZI mode */
335
336/* Write Register 15 (external/status interrupt control) */
337#define ZCIE 2 /* Zero count IE */
338#define DCDIE 8 /* DCD IE */
339#define SYNCIE 0x10 /* Sync/hunt IE */
340#define CTSIE 0x20 /* CTS IE */
341#define TxUIE 0x40 /* Tx Underrun/EOM IE */
342#define BRKIE 0x80 /* Break/Abort IE */
343
344
345/* Read Register 0 */
346#define Rx_CH_AV 0x1 /* Rx Character Available */
347#define ZCOUNT 0x2 /* Zero count */
348#define Tx_BUF_EMP 0x4 /* Tx Buffer empty */
349#define DCD 0x8 /* DCD */
350#define SYNC_HUNT 0x10 /* Sync/hunt */
351#define CTS 0x20 /* CTS */
352#define TxEOM 0x40 /* Tx underrun */
353#define BRK_ABRT 0x80 /* Break/Abort */
354
355/* Read Register 1 */
356#define ALL_SNT 0x1 /* All sent */
357/* Residue Data for 8 Rx bits/char programmed */
358#define RES3 0x8 /* 0/3 */
359#define RES4 0x4 /* 0/4 */
360#define RES5 0xc /* 0/5 */
361#define RES6 0x2 /* 0/6 */
362#define RES7 0xa /* 0/7 */
363#define RES8 0x6 /* 0/8 */
364#define RES18 0xe /* 1/8 */
365#define RES28 0x0 /* 2/8 */
366/* Special Rx Condition Interrupts */
367#define PAR_ERR 0x10 /* Parity error */
368#define Rx_OVR 0x20 /* Rx Overrun Error */
369#define FRM_ERR 0x40 /* CRC/Framing Error */
370#define END_FR 0x80 /* End of Frame (SDLC) */
371
372/* Read Register 2 (channel b only) - Interrupt vector */
373
374/* Read Register 3 (interrupt pending register) ch a only */
375#define CHBEXT 0x1 /* Channel B Ext/Stat IP */
376#define CHBTxIP 0x2 /* Channel B Tx IP */
377#define CHBRxIP 0x4 /* Channel B Rx IP */
378#define CHAEXT 0x8 /* Channel A Ext/Stat IP */
379#define CHATxIP 0x10 /* Channel A Tx IP */
380#define CHARxIP 0x20 /* Channel A Rx IP */
381
382/* Read Register 8 (receive data register) */
383
384/* Read Register 10 (misc status bits) */
385#define ONLOOP 2 /* On loop */
386#define LOOPSEND 0x10 /* Loop sending */
387#define CLK2MIS 0x40 /* Two clocks missing */
388#define CLK1MIS 0x80 /* One clock missing */
389
390/* Read Register 12 (lower byte of baud rate generator constant) */
391
392/* Read Register 13 (upper byte of baud rate generator constant) */
393
394/* Read Register 15 (value of WR 15) */
395
396/* Misc macros */
397#define ZS_CLEARERR(channel) (write_zsreg(channel, 0, ERR_RES))
398#define ZS_CLEARFIFO(channel) do { volatile unsigned char garbage; \
399 garbage = read_zsdata(channel); \
400 garbage = read_zsdata(channel); \
401 garbage = read_zsdata(channel); \
402 } while(0)
403
404#endif /* !(_DECSERIAL_H) */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-30 21:02:33 -0500