diff options
Diffstat (limited to 'drivers/ssb')
-rw-r--r-- | drivers/ssb/driver_chipcommon.c | 35 | ||||
-rw-r--r-- | drivers/ssb/driver_extif.c | 24 |
2 files changed, 49 insertions, 10 deletions
diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c index 7cc03f2dd5a6..7ea0c0faa9ab 100644 --- a/drivers/ssb/driver_chipcommon.c +++ b/drivers/ssb/driver_chipcommon.c | |||
@@ -39,12 +39,14 @@ static inline void chipco_write32(struct ssb_chipcommon *cc, | |||
39 | ssb_write32(cc->dev, offset, value); | 39 | ssb_write32(cc->dev, offset, value); |
40 | } | 40 | } |
41 | 41 | ||
42 | static inline void chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset, | 42 | static inline u32 chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset, |
43 | u32 mask, u32 value) | 43 | u32 mask, u32 value) |
44 | { | 44 | { |
45 | value &= mask; | 45 | value &= mask; |
46 | value |= chipco_read32(cc, offset) & ~mask; | 46 | value |= chipco_read32(cc, offset) & ~mask; |
47 | chipco_write32(cc, offset, value); | 47 | chipco_write32(cc, offset, value); |
48 | |||
49 | return value; | ||
48 | } | 50 | } |
49 | 51 | ||
50 | void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc, | 52 | void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc, |
@@ -355,16 +357,37 @@ u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask) | |||
355 | { | 357 | { |
356 | return chipco_read32(cc, SSB_CHIPCO_GPIOIN) & mask; | 358 | return chipco_read32(cc, SSB_CHIPCO_GPIOIN) & mask; |
357 | } | 359 | } |
360 | EXPORT_SYMBOL(ssb_chipco_gpio_in); | ||
361 | |||
362 | u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value) | ||
363 | { | ||
364 | return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value); | ||
365 | } | ||
366 | EXPORT_SYMBOL(ssb_chipco_gpio_out); | ||
367 | |||
368 | u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value) | ||
369 | { | ||
370 | return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value); | ||
371 | } | ||
372 | EXPORT_SYMBOL(ssb_chipco_gpio_outen); | ||
373 | |||
374 | u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value) | ||
375 | { | ||
376 | return chipco_write32_masked(cc, SSB_CHIPCO_GPIOCTL, mask, value); | ||
377 | } | ||
378 | EXPORT_SYMBOL(ssb_chipco_gpio_control); | ||
358 | 379 | ||
359 | void ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value) | 380 | u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value) |
360 | { | 381 | { |
361 | chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value); | 382 | return chipco_write32_masked(cc, SSB_CHIPCO_GPIOIRQ, mask, value); |
362 | } | 383 | } |
384 | EXPORT_SYMBOL(ssb_chipco_gpio_intmask); | ||
363 | 385 | ||
364 | void ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value) | 386 | u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value) |
365 | { | 387 | { |
366 | chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value); | 388 | return chipco_write32_masked(cc, SSB_CHIPCO_GPIOPOL, mask, value); |
367 | } | 389 | } |
390 | EXPORT_SYMBOL(ssb_chipco_gpio_polarity); | ||
368 | 391 | ||
369 | #ifdef CONFIG_SSB_SERIAL | 392 | #ifdef CONFIG_SSB_SERIAL |
370 | int ssb_chipco_serial_init(struct ssb_chipcommon *cc, | 393 | int ssb_chipco_serial_init(struct ssb_chipcommon *cc, |
diff --git a/drivers/ssb/driver_extif.c b/drivers/ssb/driver_extif.c index b1899f422a54..10c6b287f8bb 100644 --- a/drivers/ssb/driver_extif.c +++ b/drivers/ssb/driver_extif.c | |||
@@ -27,12 +27,14 @@ static inline void extif_write32(struct ssb_extif *extif, u16 offset, u32 value) | |||
27 | ssb_write32(extif->dev, offset, value); | 27 | ssb_write32(extif->dev, offset, value); |
28 | } | 28 | } |
29 | 29 | ||
30 | static inline void extif_write32_masked(struct ssb_extif *extif, u16 offset, | 30 | static inline u32 extif_write32_masked(struct ssb_extif *extif, u16 offset, |
31 | u32 mask, u32 value) | 31 | u32 mask, u32 value) |
32 | { | 32 | { |
33 | value &= mask; | 33 | value &= mask; |
34 | value |= extif_read32(extif, offset) & ~mask; | 34 | value |= extif_read32(extif, offset) & ~mask; |
35 | extif_write32(extif, offset, value); | 35 | extif_write32(extif, offset, value); |
36 | |||
37 | return value; | ||
36 | } | 38 | } |
37 | 39 | ||
38 | #ifdef CONFIG_SSB_SERIAL | 40 | #ifdef CONFIG_SSB_SERIAL |
@@ -120,16 +122,30 @@ u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask) | |||
120 | { | 122 | { |
121 | return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask; | 123 | return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask; |
122 | } | 124 | } |
125 | EXPORT_SYMBOL(ssb_extif_gpio_in); | ||
123 | 126 | ||
124 | void ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value) | 127 | u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value) |
125 | { | 128 | { |
126 | return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0), | 129 | return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0), |
127 | mask, value); | 130 | mask, value); |
128 | } | 131 | } |
132 | EXPORT_SYMBOL(ssb_extif_gpio_out); | ||
129 | 133 | ||
130 | void ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value) | 134 | u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value) |
131 | { | 135 | { |
132 | return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0), | 136 | return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0), |
133 | mask, value); | 137 | mask, value); |
134 | } | 138 | } |
139 | EXPORT_SYMBOL(ssb_extif_gpio_outen); | ||
140 | |||
141 | u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value) | ||
142 | { | ||
143 | return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value); | ||
144 | } | ||
145 | EXPORT_SYMBOL(ssb_extif_gpio_polarity); | ||
135 | 146 | ||
147 | u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value) | ||
148 | { | ||
149 | return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value); | ||
150 | } | ||
151 | EXPORT_SYMBOL(ssb_extif_gpio_intmask); | ||