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path: root/drivers/ssb/main.c
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-rw-r--r--drivers/ssb/main.c54
1 files changed, 42 insertions, 12 deletions
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index e05ba6eefc7e..f8a13f863217 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1117,23 +1117,22 @@ static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1117{ 1117{
1118 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV; 1118 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1119 1119
1120 /* The REJECT bit changed position in TMSLOW between 1120 /* The REJECT bit seems to be different for Backplane rev 2.3 */
1121 * Backplane revisions. */
1122 switch (rev) { 1121 switch (rev) {
1123 case SSB_IDLOW_SSBREV_22: 1122 case SSB_IDLOW_SSBREV_22:
1124 return SSB_TMSLOW_REJECT_22; 1123 case SSB_IDLOW_SSBREV_24:
1124 case SSB_IDLOW_SSBREV_26:
1125 return SSB_TMSLOW_REJECT;
1125 case SSB_IDLOW_SSBREV_23: 1126 case SSB_IDLOW_SSBREV_23:
1126 return SSB_TMSLOW_REJECT_23; 1127 return SSB_TMSLOW_REJECT_23;
1127 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */ 1128 case SSB_IDLOW_SSBREV_25: /* TODO - find the proper REJECT bit */
1128 case SSB_IDLOW_SSBREV_25: /* same here */
1129 case SSB_IDLOW_SSBREV_26: /* same here */
1130 case SSB_IDLOW_SSBREV_27: /* same here */ 1129 case SSB_IDLOW_SSBREV_27: /* same here */
1131 return SSB_TMSLOW_REJECT_23; /* this is a guess */ 1130 return SSB_TMSLOW_REJECT; /* this is a guess */
1132 default: 1131 default:
1133 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev); 1132 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1134 WARN_ON(1); 1133 WARN_ON(1);
1135 } 1134 }
1136 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23); 1135 return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
1137} 1136}
1138 1137
1139int ssb_device_is_enabled(struct ssb_device *dev) 1138int ssb_device_is_enabled(struct ssb_device *dev)
@@ -1309,20 +1308,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown);
1309 1308
1310int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl) 1309int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1311{ 1310{
1312 struct ssb_chipcommon *cc;
1313 int err; 1311 int err;
1314 enum ssb_clkmode mode; 1312 enum ssb_clkmode mode;
1315 1313
1316 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); 1314 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1317 if (err) 1315 if (err)
1318 goto error; 1316 goto error;
1319 cc = &bus->chipco;
1320 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1321 ssb_chipco_set_clockmode(cc, mode);
1322 1317
1323#ifdef CONFIG_SSB_DEBUG 1318#ifdef CONFIG_SSB_DEBUG
1324 bus->powered_up = 1; 1319 bus->powered_up = 1;
1325#endif 1320#endif
1321
1322 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1323 ssb_chipco_set_clockmode(&bus->chipco, mode);
1324
1326 return 0; 1325 return 0;
1327error: 1326error:
1328 ssb_printk(KERN_ERR PFX "Bus powerup failed\n"); 1327 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
@@ -1330,6 +1329,37 @@ error:
1330} 1329}
1331EXPORT_SYMBOL(ssb_bus_powerup); 1330EXPORT_SYMBOL(ssb_bus_powerup);
1332 1331
1332static void ssb_broadcast_value(struct ssb_device *dev,
1333 u32 address, u32 data)
1334{
1335#ifdef CONFIG_SSB_DRIVER_PCICORE
1336 /* This is used for both, PCI and ChipCommon core, so be careful. */
1337 BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
1338 BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
1339#endif
1340
1341 ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
1342 ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
1343 ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
1344 ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
1345}
1346
1347void ssb_commit_settings(struct ssb_bus *bus)
1348{
1349 struct ssb_device *dev;
1350
1351#ifdef CONFIG_SSB_DRIVER_PCICORE
1352 dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
1353#else
1354 dev = bus->chipco.dev;
1355#endif
1356 if (WARN_ON(!dev))
1357 return;
1358 /* This forces an update of the cached registers. */
1359 ssb_broadcast_value(dev, 0xFD8, 0);
1360}
1361EXPORT_SYMBOL(ssb_commit_settings);
1362
1333u32 ssb_admatch_base(u32 adm) 1363u32 ssb_admatch_base(u32 adm)
1334{ 1364{
1335 u32 base = 0; 1365 u32 base = 0;