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path: root/drivers/ssb/main.c
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Diffstat (limited to 'drivers/ssb/main.c')
-rw-r--r--drivers/ssb/main.c44
1 files changed, 31 insertions, 13 deletions
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 3918d2cc5856..e05ba6eefc7e 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1192,10 +1192,10 @@ void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1192} 1192}
1193EXPORT_SYMBOL(ssb_device_enable); 1193EXPORT_SYMBOL(ssb_device_enable);
1194 1194
1195/* Wait for a bit in a register to get set or unset. 1195/* Wait for bitmask in a register to get set or cleared.
1196 * timeout is in units of ten-microseconds */ 1196 * timeout is in units of ten-microseconds */
1197static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask, 1197static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
1198 int timeout, int set) 1198 int timeout, int set)
1199{ 1199{
1200 int i; 1200 int i;
1201 u32 val; 1201 u32 val;
@@ -1203,7 +1203,7 @@ static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
1203 for (i = 0; i < timeout; i++) { 1203 for (i = 0; i < timeout; i++) {
1204 val = ssb_read32(dev, reg); 1204 val = ssb_read32(dev, reg);
1205 if (set) { 1205 if (set) {
1206 if (val & bitmask) 1206 if ((val & bitmask) == bitmask)
1207 return 0; 1207 return 0;
1208 } else { 1208 } else {
1209 if (!(val & bitmask)) 1209 if (!(val & bitmask))
@@ -1220,20 +1220,38 @@ static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
1220 1220
1221void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags) 1221void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1222{ 1222{
1223 u32 reject; 1223 u32 reject, val;
1224 1224
1225 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET) 1225 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1226 return; 1226 return;
1227 1227
1228 reject = ssb_tmslow_reject_bitmask(dev); 1228 reject = ssb_tmslow_reject_bitmask(dev);
1229 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); 1229
1230 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1); 1230 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
1231 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); 1231 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1232 ssb_write32(dev, SSB_TMSLOW, 1232 ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
1233 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | 1233 ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1234 reject | SSB_TMSLOW_RESET | 1234
1235 core_specific_flags); 1235 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1236 ssb_flush_tmslow(dev); 1236 val = ssb_read32(dev, SSB_IMSTATE);
1237 val |= SSB_IMSTATE_REJECT;
1238 ssb_write32(dev, SSB_IMSTATE, val);
1239 ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
1240 0);
1241 }
1242
1243 ssb_write32(dev, SSB_TMSLOW,
1244 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1245 reject | SSB_TMSLOW_RESET |
1246 core_specific_flags);
1247 ssb_flush_tmslow(dev);
1248
1249 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1250 val = ssb_read32(dev, SSB_IMSTATE);
1251 val &= ~SSB_IMSTATE_REJECT;
1252 ssb_write32(dev, SSB_IMSTATE, val);
1253 }
1254 }
1237 1255
1238 ssb_write32(dev, SSB_TMSLOW, 1256 ssb_write32(dev, SSB_TMSLOW,
1239 reject | SSB_TMSLOW_RESET | 1257 reject | SSB_TMSLOW_RESET |