6 files changed, 488 insertions, 166 deletions

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index cdeb01f45bc2..fc14b8dea0d7 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -167,13 +167,13 @@ config SPI_IMX_VER_0_0
         def_bool y if SOC_IMX21 || SOC_IMX27
 
 config SPI_IMX_VER_0_4
-        def_bool y if ARCH_MX31
+        def_bool y if SOC_IMX31
 
 config SPI_IMX_VER_0_7
-        def_bool y if ARCH_MX25 || ARCH_MX35 || ARCH_MX51 || ARCH_MX53
+        def_bool y if ARCH_MX25 || SOC_IMX35 || SOC_IMX51 || SOC_IMX53
 
 config SPI_IMX_VER_2_3
-        def_bool y if ARCH_MX51 || ARCH_MX53
+        def_bool y if SOC_IMX51 || SOC_IMX53
 
 config SPI_IMX
         tristate "Freescale i.MX SPI controllers"
@@ -369,6 +369,16 @@ config SPI_TEGRA
         help
           SPI driver for NVidia Tegra SoCs
 
+config SPI_TI_SSP
+        tristate "TI Sequencer Serial Port - SPI Support"
+        depends on MFD_TI_SSP
+        help
+          This selects an SPI master implementation using a TI sequencer
+          serial port.
+
+          To compile this driver as a module, choose M here: the
+          module will be called ti-ssp-spi.
+
 config SPI_TOPCLIFF_PCH
         tristate "Topcliff PCH SPI Controller"
         depends on PCI
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 8b5a315045a6..fd2fc5f6505f 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_SPI_S3C24XX_GPIO)		+= spi_s3c24xx_gpio.o
 obj-$(CONFIG_SPI_S3C24XX)               += spi_s3c24xx_hw.o
 obj-$(CONFIG_SPI_S3C64XX)               += spi_s3c64xx.o
 obj-$(CONFIG_SPI_TEGRA)                 += spi_tegra.o
+obj-$(CONFIG_SPI_TI_SSP)                += ti-ssp-spi.o
 obj-$(CONFIG_SPI_TOPCLIFF_PCH)          += spi_topcliff_pch.o
 obj-$(CONFIG_SPI_TXX9)                  += spi_txx9.o
 obj-$(CONFIG_SPI_XILINX)                += xilinx_spi.o
diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c
index 14a451b2ad63..5c2b092a915e 100644
--- a/drivers/spi/amba-pl022.c
+++ b/drivers/spi/amba-pl022.c
@@ -2020,7 +2020,7 @@ static void pl022_cleanup(struct spi_device *spi)
 
 
 static int __devinit
-pl022_probe(struct amba_device *adev, struct amba_id *id)
+pl022_probe(struct amba_device *adev, const struct amba_id *id)
 {
         struct device *dev = &adev->dev;
         struct pl022_ssp_controller *platform_info = adev->dev.platform_data;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index e90c2d6a84b3..1f0ed8005c91 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -807,7 +807,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
         struct resource *r, *mem;
         resource_size_t dma_rx_chan = SPI_NO_RESOURCE;
         resource_size_t dma_tx_chan = SPI_NO_RESOURCE;
-        resource_size_t dma_eventq = SPI_NO_RESOURCE;
         int i = 0, ret = 0;
         u32 spipc0;
 
@@ -895,17 +894,13 @@ static int davinci_spi_probe(struct platform_device *pdev)
         r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
         if (r)
                 dma_tx_chan = r->start;
-        r = platform_get_resource(pdev, IORESOURCE_DMA, 2);
-        if (r)
-                dma_eventq = r->start;
 
         dspi->bitbang.txrx_bufs = davinci_spi_bufs;
         if (dma_rx_chan != SPI_NO_RESOURCE &&
-            dma_tx_chan != SPI_NO_RESOURCE &&
-            dma_eventq != SPI_NO_RESOURCE) {
+            dma_tx_chan != SPI_NO_RESOURCE) {
                 dspi->dma.rx_channel = dma_rx_chan;
                 dspi->dma.tx_channel = dma_tx_chan;
-                dspi->dma.eventq = dma_eventq;
+                dspi->dma.eventq = pdata->dma_event_q;
 
                 ret = davinci_spi_request_dma(dspi);
                 if (ret)
@@ -914,7 +909,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
                 dev_info(&pdev->dev, "DMA: supported\n");
                 dev_info(&pdev->dev, "DMA: RX channel: %d, TX channel: %d, "
                                 "event queue: %d\n", dma_rx_chan, dma_tx_chan,
-                                dma_eventq);
+                                pdata->dma_event_q);
         }
 
         dspi->get_rx = davinci_spi_rx_buf_u8;
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index 6a982a25b7c3..3a5ed06d3d2f 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2005, 2006 Nokia Corporation
  * Author:      Samuel Ortiz <samuel.ortiz@nokia.com> and
- *              Juha Yrjölä <juha.yrjola@nokia.com>
+ *              Juha Yrj�l� <juha.yrjola@nokia.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -33,6 +33,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/slab.h>
+#include <linux/pm_runtime.h>
 
 #include <linux/spi/spi.h>
 
@@ -46,7 +47,6 @@
 #define OMAP2_MCSPI_MAX_CTRL            4
 
 #define OMAP2_MCSPI_REVISION            0x00
-#define OMAP2_MCSPI_SYSCONFIG           0x10
 #define OMAP2_MCSPI_SYSSTATUS           0x14
 #define OMAP2_MCSPI_IRQSTATUS           0x18
 #define OMAP2_MCSPI_IRQENABLE           0x1c
@@ -63,13 +63,6 @@
 
 /* per-register bitmasks: */
 
-#define OMAP2_MCSPI_SYSCONFIG_SMARTIDLE BIT(4)
-#define OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2)
-#define OMAP2_MCSPI_SYSCONFIG_AUTOIDLE  BIT(0)
-#define OMAP2_MCSPI_SYSCONFIG_SOFTRESET BIT(1)
-
-#define OMAP2_MCSPI_SYSSTATUS_RESETDONE BIT(0)
-
 #define OMAP2_MCSPI_MODULCTRL_SINGLE    BIT(0)
 #define OMAP2_MCSPI_MODULCTRL_MS        BIT(2)
 #define OMAP2_MCSPI_MODULCTRL_STEST     BIT(3)
@@ -122,13 +115,12 @@ struct omap2_mcspi {
         spinlock_t              lock;
         struct list_head        msg_queue;
         struct spi_master       *master;
-        struct clk              *ick;
-        struct clk              *fck;
         /* Virtual base address of the controller */
         void __iomem            *base;
         unsigned long           phys;
         /* SPI1 has 4 channels, while SPI2 has 2 */
         struct omap2_mcspi_dma  *dma_channels;
+        struct  device          *dev;
 };
 
 struct omap2_mcspi_cs {
@@ -144,7 +136,6 @@ struct omap2_mcspi_cs {
  * corresponding registers are modified.
  */
 struct omap2_mcspi_regs {
-        u32 sysconfig;
         u32 modulctrl;
         u32 wakeupenable;
         struct list_head cs;
@@ -268,9 +259,6 @@ static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
         mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL,
                         omap2_mcspi_ctx[spi_cntrl->bus_num - 1].modulctrl);
 
-        mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_SYSCONFIG,
-                        omap2_mcspi_ctx[spi_cntrl->bus_num - 1].sysconfig);
-
         mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
                         omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
 
@@ -280,20 +268,12 @@ static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
 }
 static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
 {
-        clk_disable(mcspi->ick);
-        clk_disable(mcspi->fck);
+        pm_runtime_put_sync(mcspi->dev);
 }
 
 static int omap2_mcspi_enable_clocks(struct omap2_mcspi *mcspi)
 {
-        if (clk_enable(mcspi->ick))
-                return -ENODEV;
-        if (clk_enable(mcspi->fck))
-                return -ENODEV;
-
-        omap2_mcspi_restore_ctx(mcspi);
-
-        return 0;
+        return pm_runtime_get_sync(mcspi->dev);
 }
 
 static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit)
@@ -829,8 +809,9 @@ static int omap2_mcspi_setup(struct spi_device *spi)
                         return ret;
         }
 
-        if (omap2_mcspi_enable_clocks(mcspi))
-                return -ENODEV;
+        ret = omap2_mcspi_enable_clocks(mcspi);
+        if (ret < 0)
+                return ret;
 
         ret = omap2_mcspi_setup_transfer(spi, NULL);
         omap2_mcspi_disable_clocks(mcspi);
@@ -873,10 +854,11 @@ static void omap2_mcspi_work(struct work_struct *work)
         struct omap2_mcspi      *mcspi;
 
         mcspi = container_of(work, struct omap2_mcspi, work);
-        spin_lock_irq(&mcspi->lock);
 
-        if (omap2_mcspi_enable_clocks(mcspi))
-                goto out;
+        if (omap2_mcspi_enable_clocks(mcspi) < 0)
+                return;
+
+        spin_lock_irq(&mcspi->lock);
 
         /* We only enable one channel at a time -- the one whose message is
          * at the head of the queue -- although this controller would gladly
@@ -989,10 +971,9 @@ static void omap2_mcspi_work(struct work_struct *work)
                 spin_lock_irq(&mcspi->lock);
         }
 
-        omap2_mcspi_disable_clocks(mcspi);
-
-out:
         spin_unlock_irq(&mcspi->lock);
+
+        omap2_mcspi_disable_clocks(mcspi);
 }
 
 static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
@@ -1068,25 +1049,15 @@ static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
         return 0;
 }
 
-static int __init omap2_mcspi_reset(struct omap2_mcspi *mcspi)
+static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
 {
         struct spi_master       *master = mcspi->master;
         u32                     tmp;
+        int ret = 0;
 
-        if (omap2_mcspi_enable_clocks(mcspi))
-                return -1;
-
-        mcspi_write_reg(master, OMAP2_MCSPI_SYSCONFIG,
-                        OMAP2_MCSPI_SYSCONFIG_SOFTRESET);
-        do {
-                tmp = mcspi_read_reg(master, OMAP2_MCSPI_SYSSTATUS);
-        } while (!(tmp & OMAP2_MCSPI_SYSSTATUS_RESETDONE));
-
-        tmp = OMAP2_MCSPI_SYSCONFIG_AUTOIDLE |
-                OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP |
-                OMAP2_MCSPI_SYSCONFIG_SMARTIDLE;
-        mcspi_write_reg(master, OMAP2_MCSPI_SYSCONFIG, tmp);
-        omap2_mcspi_ctx[master->bus_num - 1].sysconfig = tmp;
+        ret = omap2_mcspi_enable_clocks(mcspi);
+        if (ret < 0)
+                return ret;
 
         tmp = OMAP2_MCSPI_WAKEUPENABLE_WKEN;
         mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE, tmp);
@@ -1097,91 +1068,26 @@ static int __init omap2_mcspi_reset(struct omap2_mcspi *mcspi)
         return 0;
 }
 
-static u8 __initdata spi1_rxdma_id [] = {
-        OMAP24XX_DMA_SPI1_RX0,
-        OMAP24XX_DMA_SPI1_RX1,
-        OMAP24XX_DMA_SPI1_RX2,
-        OMAP24XX_DMA_SPI1_RX3,
-};
-
-static u8 __initdata spi1_txdma_id [] = {
-        OMAP24XX_DMA_SPI1_TX0,
-        OMAP24XX_DMA_SPI1_TX1,
-        OMAP24XX_DMA_SPI1_TX2,
-        OMAP24XX_DMA_SPI1_TX3,
-};
-
-static u8 __initdata spi2_rxdma_id[] = {
-        OMAP24XX_DMA_SPI2_RX0,
-        OMAP24XX_DMA_SPI2_RX1,
-};
-
-static u8 __initdata spi2_txdma_id[] = {
-        OMAP24XX_DMA_SPI2_TX0,
-        OMAP24XX_DMA_SPI2_TX1,
-};
-
-#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \
-        || defined(CONFIG_ARCH_OMAP4)
-static u8 __initdata spi3_rxdma_id[] = {
-        OMAP24XX_DMA_SPI3_RX0,
-        OMAP24XX_DMA_SPI3_RX1,
-};
+static int omap_mcspi_runtime_resume(struct device *dev)
+{
+        struct omap2_mcspi      *mcspi;
+        struct spi_master       *master;
 
-static u8 __initdata spi3_txdma_id[] = {
-        OMAP24XX_DMA_SPI3_TX0,
-        OMAP24XX_DMA_SPI3_TX1,
-};
-#endif
+        master = dev_get_drvdata(dev);
+        mcspi = spi_master_get_devdata(master);
+        omap2_mcspi_restore_ctx(mcspi);
 
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
-static u8 __initdata spi4_rxdma_id[] = {
-        OMAP34XX_DMA_SPI4_RX0,
-};
+        return 0;
+}
 
-static u8 __initdata spi4_txdma_id[] = {
-        OMAP34XX_DMA_SPI4_TX0,
-};
-#endif
 
 static int __init omap2_mcspi_probe(struct platform_device *pdev)
 {
         struct spi_master       *master;
+        struct omap2_mcspi_platform_config *pdata = pdev->dev.platform_data;
         struct omap2_mcspi      *mcspi;
         struct resource         *r;
         int                     status = 0, i;
-        const u8                *rxdma_id, *txdma_id;
-        unsigned                num_chipselect;
-
-        switch (pdev->id) {
-        case 1:
-                rxdma_id = spi1_rxdma_id;
-                txdma_id = spi1_txdma_id;
-                num_chipselect = 4;
-                break;
-        case 2:
-                rxdma_id = spi2_rxdma_id;
-                txdma_id = spi2_txdma_id;
-                num_chipselect = 2;
-                break;
-#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \
-        || defined(CONFIG_ARCH_OMAP4)
-        case 3:
-                rxdma_id = spi3_rxdma_id;
-                txdma_id = spi3_txdma_id;
-                num_chipselect = 2;
-                break;
-#endif
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
-        case 4:
-                rxdma_id = spi4_rxdma_id;
-                txdma_id = spi4_txdma_id;
-                num_chipselect = 1;
-                break;
-#endif
-        default:
-                return -EINVAL;
-        }
 
         master = spi_alloc_master(&pdev->dev, sizeof *mcspi);
         if (master == NULL) {
@@ -1198,7 +1104,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
         master->setup = omap2_mcspi_setup;
         master->transfer = omap2_mcspi_transfer;
         master->cleanup = omap2_mcspi_cleanup;
-        master->num_chipselect = num_chipselect;
+        master->num_chipselect = pdata->num_cs;
 
         dev_set_drvdata(&pdev->dev, master);
 
@@ -1216,49 +1122,62 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
                 goto err1;
         }
 
+        r->start += pdata->regs_offset;
+        r->end += pdata->regs_offset;
         mcspi->phys = r->start;
         mcspi->base = ioremap(r->start, r->end - r->start + 1);
         if (!mcspi->base) {
                 dev_dbg(&pdev->dev, "can't ioremap MCSPI\n");
                 status = -ENOMEM;
-                goto err1aa;
+                goto err2;
         }
 
+        mcspi->dev = &pdev->dev;
         INIT_WORK(&mcspi->work, omap2_mcspi_work);
 
         spin_lock_init(&mcspi->lock);
         INIT_LIST_HEAD(&mcspi->msg_queue);
         INIT_LIST_HEAD(&omap2_mcspi_ctx[master->bus_num - 1].cs);
 
-        mcspi->ick = clk_get(&pdev->dev, "ick");
-        if (IS_ERR(mcspi->ick)) {
-                dev_dbg(&pdev->dev, "can't get mcspi_ick\n");
-                status = PTR_ERR(mcspi->ick);
-                goto err1a;
-        }
-        mcspi->fck = clk_get(&pdev->dev, "fck");
-        if (IS_ERR(mcspi->fck)) {
-                dev_dbg(&pdev->dev, "can't get mcspi_fck\n");
-                status = PTR_ERR(mcspi->fck);
-                goto err2;
-        }
-
         mcspi->dma_channels = kcalloc(master->num_chipselect,
                         sizeof(struct omap2_mcspi_dma),
                         GFP_KERNEL);
 
         if (mcspi->dma_channels == NULL)
-                goto err3;
+                goto err2;
+
+        for (i = 0; i < master->num_chipselect; i++) {
+                char dma_ch_name[14];
+                struct resource *dma_res;
+
+                sprintf(dma_ch_name, "rx%d", i);
+                dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
+                                                        dma_ch_name);
+                if (!dma_res) {
+                        dev_dbg(&pdev->dev, "cannot get DMA RX channel\n");
+                        status = -ENODEV;
+                        break;
+                }
 
-        for (i = 0; i < num_chipselect; i++) {
                 mcspi->dma_channels[i].dma_rx_channel = -1;
-                mcspi->dma_channels[i].dma_rx_sync_dev = rxdma_id[i];
+                mcspi->dma_channels[i].dma_rx_sync_dev = dma_res->start;
+                sprintf(dma_ch_name, "tx%d", i);
+                dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
+                                                        dma_ch_name);
+                if (!dma_res) {
+                        dev_dbg(&pdev->dev, "cannot get DMA TX channel\n");
+                        status = -ENODEV;
+                        break;
+                }
+
                 mcspi->dma_channels[i].dma_tx_channel = -1;
-                mcspi->dma_channels[i].dma_tx_sync_dev = txdma_id[i];
+                mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
         }
 
-        if (omap2_mcspi_reset(mcspi) < 0)
-                goto err4;
+        pm_runtime_enable(&pdev->dev);
+
+        if (status || omap2_mcspi_master_setup(mcspi) < 0)
+                goto err3;
 
         status = spi_register_master(master);
         if (status < 0)
@@ -1267,17 +1186,13 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
         return status;
 
 err4:
-        kfree(mcspi->dma_channels);
+        spi_master_put(master);
 err3:
-        clk_put(mcspi->fck);
+        kfree(mcspi->dma_channels);
 err2:
-        clk_put(mcspi->ick);
-err1a:
-        iounmap(mcspi->base);
-err1aa:
         release_mem_region(r->start, (r->end - r->start) + 1);
+        iounmap(mcspi->base);
 err1:
-        spi_master_put(master);
         return status;
 }
 
@@ -1293,9 +1208,7 @@ static int __exit omap2_mcspi_remove(struct platform_device *pdev)
         mcspi = spi_master_get_devdata(master);
         dma_channels = mcspi->dma_channels;
 
-        clk_put(mcspi->fck);
-        clk_put(mcspi->ick);
-
+        omap2_mcspi_disable_clocks(mcspi);
         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         release_mem_region(r->start, (r->end - r->start) + 1);
 
@@ -1346,6 +1259,7 @@ static int omap2_mcspi_resume(struct device *dev)
 
 static const struct dev_pm_ops omap2_mcspi_pm_ops = {
         .resume = omap2_mcspi_resume,
+        .runtime_resume = omap_mcspi_runtime_resume,
 };
 
 static struct platform_driver omap2_mcspi_driver = {
diff --git a/drivers/spi/ti-ssp-spi.c b/drivers/spi/ti-ssp-spi.c
new file mode 100644
index 000000000000..ee22795c7973
--- /dev/null
+++ b/drivers/spi/ti-ssp-spi.c
@@ -0,0 +1,402 @@
+/*
+ * Sequencer Serial Port (SSP) based SPI master driver
+ *
+ * Copyright (C) 2010 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/completion.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/mfd/ti_ssp.h>
+
+#define MODE_BITS       (SPI_CPHA | SPI_CPOL | SPI_CS_HIGH)
+
+struct ti_ssp_spi {
+        struct spi_master               *master;
+        struct device                   *dev;
+        spinlock_t                      lock;
+        struct list_head                msg_queue;
+        struct completion               complete;
+        bool                            shutdown;
+        struct workqueue_struct         *workqueue;
+        struct work_struct              work;
+        u8                              mode, bpw;
+        int                             cs_active;
+        u32                             pc_en, pc_dis, pc_wr, pc_rd;
+        void                            (*select)(int cs);
+};
+
+static u32 ti_ssp_spi_rx(struct ti_ssp_spi *hw)
+{
+        u32 ret;
+
+        ti_ssp_run(hw->dev, hw->pc_rd, 0, &ret);
+        return ret;
+}
+
+static void ti_ssp_spi_tx(struct ti_ssp_spi *hw, u32 data)
+{
+        ti_ssp_run(hw->dev, hw->pc_wr, data << (32 - hw->bpw), NULL);
+}
+
+static int ti_ssp_spi_txrx(struct ti_ssp_spi *hw, struct spi_message *msg,
+                       struct spi_transfer *t)
+{
+        int count;
+
+        if (hw->bpw <= 8) {
+                u8              *rx = t->rx_buf;
+                const u8        *tx = t->tx_buf;
+
+                for (count = 0; count < t->len; count += 1) {
+                        if (t->tx_buf)
+                                ti_ssp_spi_tx(hw, *tx++);
+                        if (t->rx_buf)
+                                *rx++ = ti_ssp_spi_rx(hw);
+                }
+        } else if (hw->bpw <= 16) {
+                u16             *rx = t->rx_buf;
+                const u16       *tx = t->tx_buf;
+
+                for (count = 0; count < t->len; count += 2) {
+                        if (t->tx_buf)
+                                ti_ssp_spi_tx(hw, *tx++);
+                        if (t->rx_buf)
+                                *rx++ = ti_ssp_spi_rx(hw);
+                }
+        } else {
+                u32             *rx = t->rx_buf;
+                const u32       *tx = t->tx_buf;
+
+                for (count = 0; count < t->len; count += 4) {
+                        if (t->tx_buf)
+                                ti_ssp_spi_tx(hw, *tx++);
+                        if (t->rx_buf)
+                                *rx++ = ti_ssp_spi_rx(hw);
+                }
+        }
+
+        msg->actual_length += count; /* bytes transferred */
+
+        dev_dbg(&msg->spi->dev, "xfer %s%s, %d bytes, %d bpw, count %d%s\n",
+                t->tx_buf ? "tx" : "", t->rx_buf ? "rx" : "", t->len,
+                hw->bpw, count, (count < t->len) ? " (under)" : "");
+
+        return (count < t->len) ? -EIO : 0; /* left over data */
+}
+
+static void ti_ssp_spi_chip_select(struct ti_ssp_spi *hw, int cs_active)
+{
+        cs_active = !!cs_active;
+        if (cs_active == hw->cs_active)
+                return;
+        ti_ssp_run(hw->dev, cs_active ? hw->pc_en : hw->pc_dis, 0, NULL);
+        hw->cs_active = cs_active;
+}
+
+#define __SHIFT_OUT(bits)       (SSP_OPCODE_SHIFT | SSP_OUT_MODE | \
+                                 cs_en | clk | SSP_COUNT((bits) * 2 - 1))
+#define __SHIFT_IN(bits)        (SSP_OPCODE_SHIFT | SSP_IN_MODE  | \
+                                 cs_en | clk | SSP_COUNT((bits) * 2 - 1))
+
+static int ti_ssp_spi_setup_transfer(struct ti_ssp_spi *hw, u8 bpw, u8 mode)
+{
+        int error, idx = 0;
+        u32 seqram[16];
+        u32 cs_en, cs_dis, clk;
+        u32 topbits, botbits;
+
+        mode &= MODE_BITS;
+        if (mode == hw->mode && bpw == hw->bpw)
+                return 0;
+
+        cs_en  = (mode & SPI_CS_HIGH) ? SSP_CS_HIGH : SSP_CS_LOW;
+        cs_dis = (mode & SPI_CS_HIGH) ? SSP_CS_LOW  : SSP_CS_HIGH;
+        clk    = (mode & SPI_CPOL)    ? SSP_CLK_HIGH : SSP_CLK_LOW;
+
+        /* Construct instructions */
+
+        /* Disable Chip Select */
+        hw->pc_dis = idx;
+        seqram[idx++] = SSP_OPCODE_DIRECT | SSP_OUT_MODE | cs_dis | clk;
+        seqram[idx++] = SSP_OPCODE_STOP   | SSP_OUT_MODE | cs_dis | clk;
+
+        /* Enable Chip Select */
+        hw->pc_en = idx;
+        seqram[idx++] = SSP_OPCODE_DIRECT | SSP_OUT_MODE | cs_en | clk;
+        seqram[idx++] = SSP_OPCODE_STOP   | SSP_OUT_MODE | cs_en | clk;
+
+        /* Reads and writes need to be split for bpw > 16 */
+        topbits = (bpw > 16) ? 16 : bpw;
+        botbits = bpw - topbits;
+
+        /* Write */
+        hw->pc_wr = idx;
+        seqram[idx++] = __SHIFT_OUT(topbits) | SSP_ADDR_REG;
+        if (botbits)
+                seqram[idx++] = __SHIFT_OUT(botbits)  | SSP_DATA_REG;
+        seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_en | clk;
+
+        /* Read */
+        hw->pc_rd = idx;
+        if (botbits)
+                seqram[idx++] = __SHIFT_IN(botbits) | SSP_ADDR_REG;
+        seqram[idx++] = __SHIFT_IN(topbits) | SSP_DATA_REG;
+        seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_en | clk;
+
+        error = ti_ssp_load(hw->dev, 0, seqram, idx);
+        if (error < 0)
+                return error;
+
+        error = ti_ssp_set_mode(hw->dev, ((mode & SPI_CPHA) ?
+                                          0 : SSP_EARLY_DIN));
+        if (error < 0)
+                return error;
+
+        hw->bpw = bpw;
+        hw->mode = mode;
+
+        return error;
+}
+
+static void ti_ssp_spi_work(struct work_struct *work)
+{
+        struct ti_ssp_spi *hw = container_of(work, struct ti_ssp_spi, work);
+
+        spin_lock(&hw->lock);
+
+         while (!list_empty(&hw->msg_queue)) {
+                struct spi_message      *m;
+                struct spi_device       *spi;
+                struct spi_transfer     *t = NULL;
+                int                     status = 0;
+
+                m = container_of(hw->msg_queue.next, struct spi_message,
+                                 queue);
+
+                list_del_init(&m->queue);
+
+                spin_unlock(&hw->lock);
+
+                spi = m->spi;
+
+                if (hw->select)
+                        hw->select(spi->chip_select);
+
+                list_for_each_entry(t, &m->transfers, transfer_list) {
+                        int bpw = spi->bits_per_word;
+                        int xfer_status;
+
+                        if (t->bits_per_word)
+                                bpw = t->bits_per_word;
+
+                        if (ti_ssp_spi_setup_transfer(hw, bpw, spi->mode) < 0)
+                                break;
+
+                        ti_ssp_spi_chip_select(hw, 1);
+
+                        xfer_status = ti_ssp_spi_txrx(hw, m, t);
+                        if (xfer_status < 0)
+                                status = xfer_status;
+
+                        if (t->delay_usecs)
+                                udelay(t->delay_usecs);
+
+                        if (t->cs_change)
+                                ti_ssp_spi_chip_select(hw, 0);
+                }
+
+                ti_ssp_spi_chip_select(hw, 0);
+                m->status = status;
+                m->complete(m->context);
+
+                spin_lock(&hw->lock);
+        }
+
+        if (hw->shutdown)
+                complete(&hw->complete);
+
+        spin_unlock(&hw->lock);
+}
+
+static int ti_ssp_spi_setup(struct spi_device *spi)
+{
+        if (spi->bits_per_word > 32)
+                return -EINVAL;
+
+        return 0;
+}
+
+static int ti_ssp_spi_transfer(struct spi_device *spi, struct spi_message *m)
+{
+        struct ti_ssp_spi       *hw;
+        struct spi_transfer     *t;
+        int                     error = 0;
+
+        m->actual_length = 0;
+        m->status = -EINPROGRESS;
+
+        hw = spi_master_get_devdata(spi->master);
+
+        if (list_empty(&m->transfers) || !m->complete)
+                return -EINVAL;
+
+        list_for_each_entry(t, &m->transfers, transfer_list) {
+                if (t->len && !(t->rx_buf || t->tx_buf)) {
+                        dev_err(&spi->dev, "invalid xfer, no buffer\n");
+                        return -EINVAL;
+                }
+
+                if (t->len && t->rx_buf && t->tx_buf) {
+                        dev_err(&spi->dev, "invalid xfer, full duplex\n");
+                        return -EINVAL;
+                }
+
+                if (t->bits_per_word > 32) {
+                        dev_err(&spi->dev, "invalid xfer width %d\n",
+                                t->bits_per_word);
+                        return -EINVAL;
+                }
+        }
+
+        spin_lock(&hw->lock);
+        if (hw->shutdown) {
+                error = -ESHUTDOWN;
+                goto error_unlock;
+        }
+        list_add_tail(&m->queue, &hw->msg_queue);
+        queue_work(hw->workqueue, &hw->work);
+error_unlock:
+        spin_unlock(&hw->lock);
+        return error;
+}
+
+static int __devinit ti_ssp_spi_probe(struct platform_device *pdev)
+{
+        const struct ti_ssp_spi_data *pdata;
+        struct ti_ssp_spi *hw;
+        struct spi_master *master;
+        struct device *dev = &pdev->dev;
+        int error = 0;
+
+        pdata = dev->platform_data;
+        if (!pdata) {
+                dev_err(dev, "platform data not found\n");
+                return -EINVAL;
+        }
+
+        master = spi_alloc_master(dev, sizeof(struct ti_ssp_spi));
+        if (!master) {
+                dev_err(dev, "cannot allocate SPI master\n");
+                return -ENOMEM;
+        }
+
+        hw = spi_master_get_devdata(master);
+        platform_set_drvdata(pdev, hw);
+
+        hw->master = master;
+        hw->dev = dev;
+        hw->select = pdata->select;
+
+        spin_lock_init(&hw->lock);
+        init_completion(&hw->complete);
+        INIT_LIST_HEAD(&hw->msg_queue);
+        INIT_WORK(&hw->work, ti_ssp_spi_work);
+
+        hw->workqueue = create_singlethread_workqueue(dev_name(dev));
+        if (!hw->workqueue) {
+                error = -ENOMEM;
+                dev_err(dev, "work queue creation failed\n");
+                goto error_wq;
+        }
+
+        error = ti_ssp_set_iosel(hw->dev, pdata->iosel);
+        if (error < 0) {
+                dev_err(dev, "io setup failed\n");
+                goto error_iosel;
+        }
+
+        master->bus_num         = pdev->id;
+        master->num_chipselect  = pdata->num_cs;
+        master->mode_bits       = MODE_BITS;
+        master->flags           = SPI_MASTER_HALF_DUPLEX;
+        master->setup           = ti_ssp_spi_setup;
+        master->transfer        = ti_ssp_spi_transfer;
+
+        error = spi_register_master(master);
+        if (error) {
+                dev_err(dev, "master registration failed\n");
+                goto error_reg;
+        }
+
+        return 0;
+
+error_reg:
+error_iosel:
+        destroy_workqueue(hw->workqueue);
+error_wq:
+        spi_master_put(master);
+        return error;
+}
+
+static int __devexit ti_ssp_spi_remove(struct platform_device *pdev)
+{
+        struct ti_ssp_spi *hw = platform_get_drvdata(pdev);
+        int error;
+
+        hw->shutdown = 1;
+        while (!list_empty(&hw->msg_queue)) {
+                error = wait_for_completion_interruptible(&hw->complete);
+                if (error < 0) {
+                        hw->shutdown = 0;
+                        return error;
+                }
+        }
+        destroy_workqueue(hw->workqueue);
+        spi_unregister_master(hw->master);
+
+        return 0;
+}
+
+static struct platform_driver ti_ssp_spi_driver = {
+        .probe          = ti_ssp_spi_probe,
+        .remove         = __devexit_p(ti_ssp_spi_remove),
+        .driver         = {
+                .name   = "ti-ssp-spi",
+                .owner  = THIS_MODULE,
+        },
+};
+
+static int __init ti_ssp_spi_init(void)
+{
+        return platform_driver_register(&ti_ssp_spi_driver);
+}
+module_init(ti_ssp_spi_init);
+
+static void __exit ti_ssp_spi_exit(void)
+{
+        platform_driver_unregister(&ti_ssp_spi_driver);
+}
+module_exit(ti_ssp_spi_exit);
+
+MODULE_DESCRIPTION("SSP SPI Master");
+MODULE_AUTHOR("Cyril Chemparathy");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:ti-ssp-spi");