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-rw-r--r--drivers/spi/Kconfig3
-rw-r--r--drivers/spi/spi-altera.c2
-rw-r--r--drivers/spi/spi-ath79.c14
-rw-r--r--drivers/spi/spi-atmel.c778
-rw-r--r--drivers/spi/spi-bcm2835.c12
-rw-r--r--drivers/spi/spi-bcm63xx.c50
-rw-r--r--drivers/spi/spi-bitbang-txrx.h2
-rw-r--r--drivers/spi/spi-clps711x.c23
-rw-r--r--drivers/spi/spi-coldfire-qspi.c53
-rw-r--r--drivers/spi/spi-davinci.c49
-rw-r--r--drivers/spi/spi-dw-mmio.c74
-rw-r--r--drivers/spi/spi-dw-pci.c45
-rw-r--r--drivers/spi/spi-dw.c26
-rw-r--r--drivers/spi/spi-dw.h5
-rw-r--r--drivers/spi/spi-falcon.c12
-rw-r--r--drivers/spi/spi-fsl-dspi.c5
-rw-r--r--drivers/spi/spi-imx.c27
-rw-r--r--drivers/spi/spi-mpc512x-psc.c2
-rw-r--r--drivers/spi/spi-mxs.c11
-rw-r--r--drivers/spi/spi-pxa2xx.c7
-rw-r--r--drivers/spi/spi-rspi.c359
-rw-r--r--drivers/spi/spi-sc18is602.c16
-rw-r--r--drivers/spi/spi-sh-hspi.c2
-rw-r--r--drivers/spi/spi-sh-msiof.c2
-rw-r--r--drivers/spi/spi-sh.c3
-rw-r--r--drivers/spi/spi-sirf.c7
-rw-r--r--drivers/spi/spi-ti-qspi.c21
-rw-r--r--drivers/spi/spi-topcliff-pch.c6
-rw-r--r--drivers/spi/spi-txx9.c2
-rw-r--r--drivers/spi/spi.c76
30 files changed, 671 insertions, 1023 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 62ce2a9ec612..94964af1428d 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -166,7 +166,6 @@ config SPI_DAVINCI
166 tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" 166 tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
167 depends on ARCH_DAVINCI || ARCH_KEYSTONE 167 depends on ARCH_DAVINCI || ARCH_KEYSTONE
168 select SPI_BITBANG 168 select SPI_BITBANG
169 select TI_EDMA
170 help 169 help
171 SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. 170 SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
172 171
@@ -377,7 +376,7 @@ config SPI_PXA2XX_PCI
377 376
378config SPI_RSPI 377config SPI_RSPI
379 tristate "Renesas RSPI controller" 378 tristate "Renesas RSPI controller"
380 depends on (SUPERH || ARCH_SHMOBILE) && SH_DMAE_BASE 379 depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE
381 help 380 help
382 SPI driver for Renesas RSPI blocks. 381 SPI driver for Renesas RSPI blocks.
383 382
diff --git a/drivers/spi/spi-altera.c b/drivers/spi/spi-altera.c
index 595b62cb545d..5d7deaf62867 100644
--- a/drivers/spi/spi-altera.c
+++ b/drivers/spi/spi-altera.c
@@ -220,8 +220,6 @@ static int altera_spi_probe(struct platform_device *pdev)
220 220
221 /* setup the state for the bitbang driver */ 221 /* setup the state for the bitbang driver */
222 hw->bitbang.master = master; 222 hw->bitbang.master = master;
223 if (!hw->bitbang.master)
224 return err;
225 hw->bitbang.chipselect = altera_spi_chipsel; 223 hw->bitbang.chipselect = altera_spi_chipsel;
226 hw->bitbang.txrx_bufs = altera_spi_txrx; 224 hw->bitbang.txrx_bufs = altera_spi_txrx;
227 225
diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c
index 821bf7ac218d..31534b51715a 100644
--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -243,21 +243,21 @@ static int ath79_spi_probe(struct platform_device *pdev)
243 goto err_put_master; 243 goto err_put_master;
244 } 244 }
245 245
246 sp->base = ioremap(r->start, resource_size(r)); 246 sp->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
247 if (!sp->base) { 247 if (!sp->base) {
248 ret = -ENXIO; 248 ret = -ENXIO;
249 goto err_put_master; 249 goto err_put_master;
250 } 250 }
251 251
252 sp->clk = clk_get(&pdev->dev, "ahb"); 252 sp->clk = devm_clk_get(&pdev->dev, "ahb");
253 if (IS_ERR(sp->clk)) { 253 if (IS_ERR(sp->clk)) {
254 ret = PTR_ERR(sp->clk); 254 ret = PTR_ERR(sp->clk);
255 goto err_unmap; 255 goto err_put_master;
256 } 256 }
257 257
258 ret = clk_enable(sp->clk); 258 ret = clk_enable(sp->clk);
259 if (ret) 259 if (ret)
260 goto err_clk_put; 260 goto err_put_master;
261 261
262 rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ); 262 rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ);
263 if (!rate) { 263 if (!rate) {
@@ -280,10 +280,6 @@ err_disable:
280 ath79_spi_disable(sp); 280 ath79_spi_disable(sp);
281err_clk_disable: 281err_clk_disable:
282 clk_disable(sp->clk); 282 clk_disable(sp->clk);
283err_clk_put:
284 clk_put(sp->clk);
285err_unmap:
286 iounmap(sp->base);
287err_put_master: 283err_put_master:
288 spi_master_put(sp->bitbang.master); 284 spi_master_put(sp->bitbang.master);
289 285
@@ -297,8 +293,6 @@ static int ath79_spi_remove(struct platform_device *pdev)
297 spi_bitbang_stop(&sp->bitbang); 293 spi_bitbang_stop(&sp->bitbang);
298 ath79_spi_disable(sp); 294 ath79_spi_disable(sp);
299 clk_disable(sp->clk); 295 clk_disable(sp->clk);
300 clk_put(sp->clk);
301 iounmap(sp->base);
302 spi_master_put(sp->bitbang.master); 296 spi_master_put(sp->bitbang.master);
303 297
304 return 0; 298 return 0;
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 273db0beb2b8..b0842f751016 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -189,6 +189,8 @@
189 */ 189 */
190#define DMA_MIN_BYTES 16 190#define DMA_MIN_BYTES 16
191 191
192#define SPI_DMA_TIMEOUT (msecs_to_jiffies(1000))
193
192struct atmel_spi_dma { 194struct atmel_spi_dma {
193 struct dma_chan *chan_rx; 195 struct dma_chan *chan_rx;
194 struct dma_chan *chan_tx; 196 struct dma_chan *chan_tx;
@@ -220,17 +222,13 @@ struct atmel_spi {
220 int irq; 222 int irq;
221 struct clk *clk; 223 struct clk *clk;
222 struct platform_device *pdev; 224 struct platform_device *pdev;
223 struct spi_device *stay;
224 225
225 u8 stopping;
226 struct list_head queue;
227 struct tasklet_struct tasklet;
228 struct spi_transfer *current_transfer; 226 struct spi_transfer *current_transfer;
229 unsigned long current_remaining_bytes; 227 unsigned long current_remaining_bytes;
230 struct spi_transfer *next_transfer;
231 unsigned long next_remaining_bytes;
232 int done_status; 228 int done_status;
233 229
230 struct completion xfer_completion;
231
234 /* scratch buffer */ 232 /* scratch buffer */
235 void *buffer; 233 void *buffer;
236 dma_addr_t buffer_dma; 234 dma_addr_t buffer_dma;
@@ -241,6 +239,9 @@ struct atmel_spi {
241 bool use_pdc; 239 bool use_pdc;
242 /* dmaengine data */ 240 /* dmaengine data */
243 struct atmel_spi_dma dma; 241 struct atmel_spi_dma dma;
242
243 bool keep_cs;
244 bool cs_active;
244}; 245};
245 246
246/* Controller-specific per-slave state */ 247/* Controller-specific per-slave state */
@@ -376,17 +377,6 @@ static inline bool atmel_spi_use_dma(struct atmel_spi *as,
376 return as->use_dma && xfer->len >= DMA_MIN_BYTES; 377 return as->use_dma && xfer->len >= DMA_MIN_BYTES;
377} 378}
378 379
379static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
380 struct spi_transfer *xfer)
381{
382 return msg->transfers.prev == &xfer->transfer_list;
383}
384
385static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
386{
387 return xfer->delay_usecs == 0 && !xfer->cs_change;
388}
389
390static int atmel_spi_dma_slave_config(struct atmel_spi *as, 380static int atmel_spi_dma_slave_config(struct atmel_spi *as,
391 struct dma_slave_config *slave_config, 381 struct dma_slave_config *slave_config,
392 u8 bits_per_word) 382 u8 bits_per_word)
@@ -513,23 +503,20 @@ static void dma_callback(void *data)
513 struct spi_master *master = data; 503 struct spi_master *master = data;
514 struct atmel_spi *as = spi_master_get_devdata(master); 504 struct atmel_spi *as = spi_master_get_devdata(master);
515 505
516 /* trigger SPI tasklet */ 506 complete(&as->xfer_completion);
517 tasklet_schedule(&as->tasklet);
518} 507}
519 508
520/* 509/*
521 * Next transfer using PIO. 510 * Next transfer using PIO.
522 * lock is held, spi tasklet is blocked
523 */ 511 */
524static void atmel_spi_next_xfer_pio(struct spi_master *master, 512static void atmel_spi_next_xfer_pio(struct spi_master *master,
525 struct spi_transfer *xfer) 513 struct spi_transfer *xfer)
526{ 514{
527 struct atmel_spi *as = spi_master_get_devdata(master); 515 struct atmel_spi *as = spi_master_get_devdata(master);
516 unsigned long xfer_pos = xfer->len - as->current_remaining_bytes;
528 517
529 dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_pio\n"); 518 dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_pio\n");
530 519
531 as->current_remaining_bytes = xfer->len;
532
533 /* Make sure data is not remaining in RDR */ 520 /* Make sure data is not remaining in RDR */
534 spi_readl(as, RDR); 521 spi_readl(as, RDR);
535 while (spi_readl(as, SR) & SPI_BIT(RDRF)) { 522 while (spi_readl(as, SR) & SPI_BIT(RDRF)) {
@@ -537,13 +524,14 @@ static void atmel_spi_next_xfer_pio(struct spi_master *master,
537 cpu_relax(); 524 cpu_relax();
538 } 525 }
539 526
540 if (xfer->tx_buf) 527 if (xfer->tx_buf) {
541 if (xfer->bits_per_word > 8) 528 if (xfer->bits_per_word > 8)
542 spi_writel(as, TDR, *(u16 *)(xfer->tx_buf)); 529 spi_writel(as, TDR, *(u16 *)(xfer->tx_buf + xfer_pos));
543 else 530 else
544 spi_writel(as, TDR, *(u8 *)(xfer->tx_buf)); 531 spi_writel(as, TDR, *(u8 *)(xfer->tx_buf + xfer_pos));
545 else 532 } else {
546 spi_writel(as, TDR, 0); 533 spi_writel(as, TDR, 0);
534 }
547 535
548 dev_dbg(master->dev.parent, 536 dev_dbg(master->dev.parent,
549 " start pio xfer %p: len %u tx %p rx %p bitpw %d\n", 537 " start pio xfer %p: len %u tx %p rx %p bitpw %d\n",
@@ -556,7 +544,6 @@ static void atmel_spi_next_xfer_pio(struct spi_master *master,
556 544
557/* 545/*
558 * Submit next transfer for DMA. 546 * Submit next transfer for DMA.
559 * lock is held, spi tasklet is blocked
560 */ 547 */
561static int atmel_spi_next_xfer_dma_submit(struct spi_master *master, 548static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
562 struct spi_transfer *xfer, 549 struct spi_transfer *xfer,
@@ -694,74 +681,90 @@ static void atmel_spi_next_xfer_data(struct spi_master *master,
694 *plen = len; 681 *plen = len;
695} 682}
696 683
684static int atmel_spi_set_xfer_speed(struct atmel_spi *as,
685 struct spi_device *spi,
686 struct spi_transfer *xfer)
687{
688 u32 scbr, csr;
689 unsigned long bus_hz;
690
691 /* v1 chips start out at half the peripheral bus speed. */
692 bus_hz = clk_get_rate(as->clk);
693 if (!atmel_spi_is_v2(as))
694 bus_hz /= 2;
695
696 /*
697 * Calculate the lowest divider that satisfies the
698 * constraint, assuming div32/fdiv/mbz == 0.
699 */
700 if (xfer->speed_hz)
701 scbr = DIV_ROUND_UP(bus_hz, xfer->speed_hz);
702 else
703 /*
704 * This can happend if max_speed is null.
705 * In this case, we set the lowest possible speed
706 */
707 scbr = 0xff;
708
709 /*
710 * If the resulting divider doesn't fit into the
711 * register bitfield, we can't satisfy the constraint.
712 */
713 if (scbr >= (1 << SPI_SCBR_SIZE)) {
714 dev_err(&spi->dev,
715 "setup: %d Hz too slow, scbr %u; min %ld Hz\n",
716 xfer->speed_hz, scbr, bus_hz/255);
717 return -EINVAL;
718 }
719 if (scbr == 0) {
720 dev_err(&spi->dev,
721 "setup: %d Hz too high, scbr %u; max %ld Hz\n",
722 xfer->speed_hz, scbr, bus_hz);
723 return -EINVAL;
724 }
725 csr = spi_readl(as, CSR0 + 4 * spi->chip_select);
726 csr = SPI_BFINS(SCBR, scbr, csr);
727 spi_writel(as, CSR0 + 4 * spi->chip_select, csr);
728
729 return 0;
730}
731
697/* 732/*
698 * Submit next transfer for PDC. 733 * Submit next transfer for PDC.
699 * lock is held, spi irq is blocked 734 * lock is held, spi irq is blocked
700 */ 735 */
701static void atmel_spi_pdc_next_xfer(struct spi_master *master, 736static void atmel_spi_pdc_next_xfer(struct spi_master *master,
702 struct spi_message *msg) 737 struct spi_message *msg,
738 struct spi_transfer *xfer)
703{ 739{
704 struct atmel_spi *as = spi_master_get_devdata(master); 740 struct atmel_spi *as = spi_master_get_devdata(master);
705 struct spi_transfer *xfer; 741 u32 len;
706 u32 len, remaining;
707 u32 ieval;
708 dma_addr_t tx_dma, rx_dma; 742 dma_addr_t tx_dma, rx_dma;
709 743
710 if (!as->current_transfer) 744 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
711 xfer = list_entry(msg->transfers.next,
712 struct spi_transfer, transfer_list);
713 else if (!as->next_transfer)
714 xfer = list_entry(as->current_transfer->transfer_list.next,
715 struct spi_transfer, transfer_list);
716 else
717 xfer = NULL;
718
719 if (xfer) {
720 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
721
722 len = xfer->len;
723 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
724 remaining = xfer->len - len;
725
726 spi_writel(as, RPR, rx_dma);
727 spi_writel(as, TPR, tx_dma);
728
729 if (msg->spi->bits_per_word > 8)
730 len >>= 1;
731 spi_writel(as, RCR, len);
732 spi_writel(as, TCR, len);
733
734 dev_dbg(&msg->spi->dev,
735 " start xfer %p: len %u tx %p/%08llx rx %p/%08llx\n",
736 xfer, xfer->len, xfer->tx_buf,
737 (unsigned long long)xfer->tx_dma, xfer->rx_buf,
738 (unsigned long long)xfer->rx_dma);
739 } else {
740 xfer = as->next_transfer;
741 remaining = as->next_remaining_bytes;
742 }
743 745
744 as->current_transfer = xfer; 746 len = as->current_remaining_bytes;
745 as->current_remaining_bytes = remaining; 747 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
748 as->current_remaining_bytes -= len;
746 749
747 if (remaining > 0) 750 spi_writel(as, RPR, rx_dma);
748 len = remaining; 751 spi_writel(as, TPR, tx_dma);
749 else if (!atmel_spi_xfer_is_last(msg, xfer)
750 && atmel_spi_xfer_can_be_chained(xfer)) {
751 xfer = list_entry(xfer->transfer_list.next,
752 struct spi_transfer, transfer_list);
753 len = xfer->len;
754 } else
755 xfer = NULL;
756 752
757 as->next_transfer = xfer; 753 if (msg->spi->bits_per_word > 8)
754 len >>= 1;
755 spi_writel(as, RCR, len);
756 spi_writel(as, TCR, len);
758 757
759 if (xfer) { 758 dev_dbg(&msg->spi->dev,
760 u32 total; 759 " start xfer %p: len %u tx %p/%08llx rx %p/%08llx\n",
760 xfer, xfer->len, xfer->tx_buf,
761 (unsigned long long)xfer->tx_dma, xfer->rx_buf,
762 (unsigned long long)xfer->rx_dma);
761 763
762 total = len; 764 if (as->current_remaining_bytes) {
765 len = as->current_remaining_bytes;
763 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); 766 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
764 as->next_remaining_bytes = total - len; 767 as->current_remaining_bytes -= len;
765 768
766 spi_writel(as, RNPR, rx_dma); 769 spi_writel(as, RNPR, rx_dma);
767 spi_writel(as, TNPR, tx_dma); 770 spi_writel(as, TNPR, tx_dma);
@@ -776,11 +779,6 @@ static void atmel_spi_pdc_next_xfer(struct spi_master *master,
776 xfer, xfer->len, xfer->tx_buf, 779 xfer, xfer->len, xfer->tx_buf,
777 (unsigned long long)xfer->tx_dma, xfer->rx_buf, 780 (unsigned long long)xfer->tx_dma, xfer->rx_buf,
778 (unsigned long long)xfer->rx_dma); 781 (unsigned long long)xfer->rx_dma);
779 ieval = SPI_BIT(ENDRX) | SPI_BIT(OVRES);
780 } else {
781 spi_writel(as, RNCR, 0);
782 spi_writel(as, TNCR, 0);
783 ieval = SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) | SPI_BIT(OVRES);
784 } 782 }
785 783
786 /* REVISIT: We're waiting for ENDRX before we start the next 784 /* REVISIT: We're waiting for ENDRX before we start the next
@@ -793,83 +791,11 @@ static void atmel_spi_pdc_next_xfer(struct spi_master *master,
793 * 791 *
794 * It should be doable, though. Just not now... 792 * It should be doable, though. Just not now...
795 */ 793 */
796 spi_writel(as, IER, ieval); 794 spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
797 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); 795 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
798} 796}
799 797
800/* 798/*
801 * Choose way to submit next transfer and start it.
802 * lock is held, spi tasklet is blocked
803 */
804static void atmel_spi_dma_next_xfer(struct spi_master *master,
805 struct spi_message *msg)
806{
807 struct atmel_spi *as = spi_master_get_devdata(master);
808 struct spi_transfer *xfer;
809 u32 remaining, len;
810
811 remaining = as->current_remaining_bytes;
812 if (remaining) {
813 xfer = as->current_transfer;
814 len = remaining;
815 } else {
816 if (!as->current_transfer)
817 xfer = list_entry(msg->transfers.next,
818 struct spi_transfer, transfer_list);
819 else
820 xfer = list_entry(
821 as->current_transfer->transfer_list.next,
822 struct spi_transfer, transfer_list);
823
824 as->current_transfer = xfer;
825 len = xfer->len;
826 }
827
828 if (atmel_spi_use_dma(as, xfer)) {
829 u32 total = len;
830 if (!atmel_spi_next_xfer_dma_submit(master, xfer, &len)) {
831 as->current_remaining_bytes = total - len;
832 return;
833 } else {
834 dev_err(&msg->spi->dev, "unable to use DMA, fallback to PIO\n");
835 }
836 }
837
838 /* use PIO if error appened using DMA */
839 atmel_spi_next_xfer_pio(master, xfer);
840}
841
842static void atmel_spi_next_message(struct spi_master *master)
843{
844 struct atmel_spi *as = spi_master_get_devdata(master);
845 struct spi_message *msg;
846 struct spi_device *spi;
847
848 BUG_ON(as->current_transfer);
849
850 msg = list_entry(as->queue.next, struct spi_message, queue);
851 spi = msg->spi;
852
853 dev_dbg(master->dev.parent, "start message %p for %s\n",
854 msg, dev_name(&spi->dev));
855
856 /* select chip if it's not still active */
857 if (as->stay) {
858 if (as->stay != spi) {
859 cs_deactivate(as, as->stay);
860 cs_activate(as, spi);
861 }
862 as->stay = NULL;
863 } else
864 cs_activate(as, spi);
865
866 if (as->use_pdc)
867 atmel_spi_pdc_next_xfer(master, msg);
868 else
869 atmel_spi_dma_next_xfer(master, msg);
870}
871
872/*
873 * For DMA, tx_buf/tx_dma have the same relationship as rx_buf/rx_dma: 799 * For DMA, tx_buf/tx_dma have the same relationship as rx_buf/rx_dma:
874 * - The buffer is either valid for CPU access, else NULL 800 * - The buffer is either valid for CPU access, else NULL
875 * - If the buffer is valid, so is its DMA address 801 * - If the buffer is valid, so is its DMA address
@@ -924,41 +850,7 @@ static void atmel_spi_disable_pdc_transfer(struct atmel_spi *as)
924 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS)); 850 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
925} 851}
926 852
927static void
928atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
929 struct spi_message *msg, int stay)
930{
931 if (!stay || as->done_status < 0)
932 cs_deactivate(as, msg->spi);
933 else
934 as->stay = msg->spi;
935
936 list_del(&msg->queue);
937 msg->status = as->done_status;
938
939 dev_dbg(master->dev.parent,
940 "xfer complete: %u bytes transferred\n",
941 msg->actual_length);
942
943 atmel_spi_unlock(as);
944 msg->complete(msg->context);
945 atmel_spi_lock(as);
946
947 as->current_transfer = NULL;
948 as->next_transfer = NULL;
949 as->done_status = 0;
950
951 /* continue if needed */
952 if (list_empty(&as->queue) || as->stopping) {
953 if (as->use_pdc)
954 atmel_spi_disable_pdc_transfer(as);
955 } else {
956 atmel_spi_next_message(master);
957 }
958}
959
960/* Called from IRQ 853/* Called from IRQ
961 * lock is held
962 * 854 *
963 * Must update "current_remaining_bytes" to keep track of data 855 * Must update "current_remaining_bytes" to keep track of data
964 * to transfer. 856 * to transfer.
@@ -966,9 +858,7 @@ atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
966static void 858static void
967atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer) 859atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer)
968{ 860{
969 u8 *txp;
970 u8 *rxp; 861 u8 *rxp;
971 u16 *txp16;
972 u16 *rxp16; 862 u16 *rxp16;
973 unsigned long xfer_pos = xfer->len - as->current_remaining_bytes; 863 unsigned long xfer_pos = xfer->len - as->current_remaining_bytes;
974 864
@@ -990,96 +880,12 @@ atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer)
990 } else { 880 } else {
991 as->current_remaining_bytes--; 881 as->current_remaining_bytes--;
992 } 882 }
993
994 if (as->current_remaining_bytes) {
995 if (xfer->tx_buf) {
996 if (xfer->bits_per_word > 8) {
997 txp16 = (u16 *)(((u8 *)xfer->tx_buf)
998 + xfer_pos + 2);
999 spi_writel(as, TDR, *txp16);
1000 } else {
1001 txp = ((u8 *)xfer->tx_buf) + xfer_pos + 1;
1002 spi_writel(as, TDR, *txp);
1003 }
1004 } else {
1005 spi_writel(as, TDR, 0);
1006 }
1007 }
1008}
1009
1010/* Tasklet
1011 * Called from DMA callback + pio transfer and overrun IRQ.
1012 */
1013static void atmel_spi_tasklet_func(unsigned long data)
1014{
1015 struct spi_master *master = (struct spi_master *)data;
1016 struct atmel_spi *as = spi_master_get_devdata(master);
1017 struct spi_message *msg;
1018 struct spi_transfer *xfer;
1019
1020 dev_vdbg(master->dev.parent, "atmel_spi_tasklet_func\n");
1021
1022 atmel_spi_lock(as);
1023
1024 xfer = as->current_transfer;
1025
1026 if (xfer == NULL)
1027 /* already been there */
1028 goto tasklet_out;
1029
1030 msg = list_entry(as->queue.next, struct spi_message, queue);
1031
1032 if (as->current_remaining_bytes == 0) {
1033 if (as->done_status < 0) {
1034 /* error happened (overrun) */
1035 if (atmel_spi_use_dma(as, xfer))
1036 atmel_spi_stop_dma(as);
1037 } else {
1038 /* only update length if no error */
1039 msg->actual_length += xfer->len;
1040 }
1041
1042 if (atmel_spi_use_dma(as, xfer))
1043 if (!msg->is_dma_mapped)
1044 atmel_spi_dma_unmap_xfer(master, xfer);
1045
1046 if (xfer->delay_usecs)
1047 udelay(xfer->delay_usecs);
1048
1049 if (atmel_spi_xfer_is_last(msg, xfer) || as->done_status < 0) {
1050 /* report completed (or erroneous) message */
1051 atmel_spi_msg_done(master, as, msg, xfer->cs_change);
1052 } else {
1053 if (xfer->cs_change) {
1054 cs_deactivate(as, msg->spi);
1055 udelay(1);
1056 cs_activate(as, msg->spi);
1057 }
1058
1059 /*
1060 * Not done yet. Submit the next transfer.
1061 *
1062 * FIXME handle protocol options for xfer
1063 */
1064 atmel_spi_dma_next_xfer(master, msg);
1065 }
1066 } else {
1067 /*
1068 * Keep going, we still have data to send in
1069 * the current transfer.
1070 */
1071 atmel_spi_dma_next_xfer(master, msg);
1072 }
1073
1074tasklet_out:
1075 atmel_spi_unlock(as);
1076} 883}
1077 884
1078/* Interrupt 885/* Interrupt
1079 * 886 *
1080 * No need for locking in this Interrupt handler: done_status is the 887 * No need for locking in this Interrupt handler: done_status is the
1081 * only information modified. What we need is the update of this field 888 * only information modified.
1082 * before tasklet runs. This is ensured by using barrier.
1083 */ 889 */
1084static irqreturn_t 890static irqreturn_t
1085atmel_spi_pio_interrupt(int irq, void *dev_id) 891atmel_spi_pio_interrupt(int irq, void *dev_id)
@@ -1107,8 +913,6 @@ atmel_spi_pio_interrupt(int irq, void *dev_id)
1107 * 913 *
1108 * We will also not process any remaning transfers in 914 * We will also not process any remaning transfers in
1109 * the message. 915 * the message.
1110 *
1111 * All actions are done in tasklet with done_status indication
1112 */ 916 */
1113 as->done_status = -EIO; 917 as->done_status = -EIO;
1114 smp_wmb(); 918 smp_wmb();
@@ -1116,7 +920,7 @@ atmel_spi_pio_interrupt(int irq, void *dev_id)
1116 /* Clear any overrun happening while cleaning up */ 920 /* Clear any overrun happening while cleaning up */
1117 spi_readl(as, SR); 921 spi_readl(as, SR);
1118 922
1119 tasklet_schedule(&as->tasklet); 923 complete(&as->xfer_completion);
1120 924
1121 } else if (pending & SPI_BIT(RDRF)) { 925 } else if (pending & SPI_BIT(RDRF)) {
1122 atmel_spi_lock(as); 926 atmel_spi_lock(as);
@@ -1125,11 +929,10 @@ atmel_spi_pio_interrupt(int irq, void *dev_id)
1125 ret = IRQ_HANDLED; 929 ret = IRQ_HANDLED;
1126 xfer = as->current_transfer; 930 xfer = as->current_transfer;
1127 atmel_spi_pump_pio_data(as, xfer); 931 atmel_spi_pump_pio_data(as, xfer);
1128 if (!as->current_remaining_bytes) { 932 if (!as->current_remaining_bytes)
1129 /* no more data to xfer, kick tasklet */
1130 spi_writel(as, IDR, pending); 933 spi_writel(as, IDR, pending);
1131 tasklet_schedule(&as->tasklet); 934
1132 } 935 complete(&as->xfer_completion);
1133 } 936 }
1134 937
1135 atmel_spi_unlock(as); 938 atmel_spi_unlock(as);
@@ -1147,116 +950,35 @@ atmel_spi_pdc_interrupt(int irq, void *dev_id)
1147{ 950{
1148 struct spi_master *master = dev_id; 951 struct spi_master *master = dev_id;
1149 struct atmel_spi *as = spi_master_get_devdata(master); 952 struct atmel_spi *as = spi_master_get_devdata(master);
1150 struct spi_message *msg;
1151 struct spi_transfer *xfer;
1152 u32 status, pending, imr; 953 u32 status, pending, imr;
1153 int ret = IRQ_NONE; 954 int ret = IRQ_NONE;
1154 955
1155 atmel_spi_lock(as);
1156
1157 xfer = as->current_transfer;
1158 msg = list_entry(as->queue.next, struct spi_message, queue);
1159
1160 imr = spi_readl(as, IMR); 956 imr = spi_readl(as, IMR);
1161 status = spi_readl(as, SR); 957 status = spi_readl(as, SR);
1162 pending = status & imr; 958 pending = status & imr;
1163 959
1164 if (pending & SPI_BIT(OVRES)) { 960 if (pending & SPI_BIT(OVRES)) {
1165 int timeout;
1166 961
1167 ret = IRQ_HANDLED; 962 ret = IRQ_HANDLED;
1168 963
1169 spi_writel(as, IDR, (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) 964 spi_writel(as, IDR, (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX)
1170 | SPI_BIT(OVRES))); 965 | SPI_BIT(OVRES)));
1171 966
1172 /*
1173 * When we get an overrun, we disregard the current
1174 * transfer. Data will not be copied back from any
1175 * bounce buffer and msg->actual_len will not be
1176 * updated with the last xfer.
1177 *
1178 * We will also not process any remaning transfers in
1179 * the message.
1180 *
1181 * First, stop the transfer and unmap the DMA buffers.
1182 */
1183 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
1184 if (!msg->is_dma_mapped)
1185 atmel_spi_dma_unmap_xfer(master, xfer);
1186
1187 /* REVISIT: udelay in irq is unfriendly */
1188 if (xfer->delay_usecs)
1189 udelay(xfer->delay_usecs);
1190
1191 dev_warn(master->dev.parent, "overrun (%u/%u remaining)\n",
1192 spi_readl(as, TCR), spi_readl(as, RCR));
1193
1194 /*
1195 * Clean up DMA registers and make sure the data
1196 * registers are empty.
1197 */
1198 spi_writel(as, RNCR, 0);
1199 spi_writel(as, TNCR, 0);
1200 spi_writel(as, RCR, 0);
1201 spi_writel(as, TCR, 0);
1202 for (timeout = 1000; timeout; timeout--)
1203 if (spi_readl(as, SR) & SPI_BIT(TXEMPTY))
1204 break;
1205 if (!timeout)
1206 dev_warn(master->dev.parent,
1207 "timeout waiting for TXEMPTY");
1208 while (spi_readl(as, SR) & SPI_BIT(RDRF))
1209 spi_readl(as, RDR);
1210
1211 /* Clear any overrun happening while cleaning up */ 967 /* Clear any overrun happening while cleaning up */
1212 spi_readl(as, SR); 968 spi_readl(as, SR);
1213 969
1214 as->done_status = -EIO; 970 as->done_status = -EIO;
1215 atmel_spi_msg_done(master, as, msg, 0); 971
972 complete(&as->xfer_completion);
973
1216 } else if (pending & (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX))) { 974 } else if (pending & (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX))) {
1217 ret = IRQ_HANDLED; 975 ret = IRQ_HANDLED;
1218 976
1219 spi_writel(as, IDR, pending); 977 spi_writel(as, IDR, pending);
1220 978
1221 if (as->current_remaining_bytes == 0) { 979 complete(&as->xfer_completion);
1222 msg->actual_length += xfer->len;
1223
1224 if (!msg->is_dma_mapped)
1225 atmel_spi_dma_unmap_xfer(master, xfer);
1226
1227 /* REVISIT: udelay in irq is unfriendly */
1228 if (xfer->delay_usecs)
1229 udelay(xfer->delay_usecs);
1230
1231 if (atmel_spi_xfer_is_last(msg, xfer)) {
1232 /* report completed message */
1233 atmel_spi_msg_done(master, as, msg,
1234 xfer->cs_change);
1235 } else {
1236 if (xfer->cs_change) {
1237 cs_deactivate(as, msg->spi);
1238 udelay(1);
1239 cs_activate(as, msg->spi);
1240 }
1241
1242 /*
1243 * Not done yet. Submit the next transfer.
1244 *
1245 * FIXME handle protocol options for xfer
1246 */
1247 atmel_spi_pdc_next_xfer(master, msg);
1248 }
1249 } else {
1250 /*
1251 * Keep going, we still have data to send in
1252 * the current transfer.
1253 */
1254 atmel_spi_pdc_next_xfer(master, msg);
1255 }
1256 } 980 }
1257 981
1258 atmel_spi_unlock(as);
1259
1260 return ret; 982 return ret;
1261} 983}
1262 984
@@ -1264,17 +986,13 @@ static int atmel_spi_setup(struct spi_device *spi)
1264{ 986{
1265 struct atmel_spi *as; 987 struct atmel_spi *as;
1266 struct atmel_spi_device *asd; 988 struct atmel_spi_device *asd;
1267 u32 scbr, csr; 989 u32 csr;
1268 unsigned int bits = spi->bits_per_word; 990 unsigned int bits = spi->bits_per_word;
1269 unsigned long bus_hz;
1270 unsigned int npcs_pin; 991 unsigned int npcs_pin;
1271 int ret; 992 int ret;
1272 993
1273 as = spi_master_get_devdata(spi->master); 994 as = spi_master_get_devdata(spi->master);
1274 995
1275 if (as->stopping)
1276 return -ESHUTDOWN;
1277
1278 if (spi->chip_select > spi->master->num_chipselect) { 996 if (spi->chip_select > spi->master->num_chipselect) {
1279 dev_dbg(&spi->dev, 997 dev_dbg(&spi->dev,
1280 "setup: invalid chipselect %u (%u defined)\n", 998 "setup: invalid chipselect %u (%u defined)\n",
@@ -1290,33 +1008,7 @@ static int atmel_spi_setup(struct spi_device *spi)
1290 return -EINVAL; 1008 return -EINVAL;
1291 } 1009 }
1292 1010
1293 /* v1 chips start out at half the peripheral bus speed. */ 1011 csr = SPI_BF(BITS, bits - 8);
1294 bus_hz = clk_get_rate(as->clk);
1295 if (!atmel_spi_is_v2(as))
1296 bus_hz /= 2;
1297
1298 if (spi->max_speed_hz) {
1299 /*
1300 * Calculate the lowest divider that satisfies the
1301 * constraint, assuming div32/fdiv/mbz == 0.
1302 */
1303 scbr = DIV_ROUND_UP(bus_hz, spi->max_speed_hz);
1304
1305 /*
1306 * If the resulting divider doesn't fit into the
1307 * register bitfield, we can't satisfy the constraint.
1308 */
1309 if (scbr >= (1 << SPI_SCBR_SIZE)) {
1310 dev_dbg(&spi->dev,
1311 "setup: %d Hz too slow, scbr %u; min %ld Hz\n",
1312 spi->max_speed_hz, scbr, bus_hz/255);
1313 return -EINVAL;
1314 }
1315 } else
1316 /* speed zero means "as slow as possible" */
1317 scbr = 0xff;
1318
1319 csr = SPI_BF(SCBR, scbr) | SPI_BF(BITS, bits - 8);
1320 if (spi->mode & SPI_CPOL) 1012 if (spi->mode & SPI_CPOL)
1321 csr |= SPI_BIT(CPOL); 1013 csr |= SPI_BIT(CPOL);
1322 if (!(spi->mode & SPI_CPHA)) 1014 if (!(spi->mode & SPI_CPHA))
@@ -1352,19 +1044,13 @@ static int atmel_spi_setup(struct spi_device *spi)
1352 asd->npcs_pin = npcs_pin; 1044 asd->npcs_pin = npcs_pin;
1353 spi->controller_state = asd; 1045 spi->controller_state = asd;
1354 gpio_direction_output(npcs_pin, !(spi->mode & SPI_CS_HIGH)); 1046 gpio_direction_output(npcs_pin, !(spi->mode & SPI_CS_HIGH));
1355 } else {
1356 atmel_spi_lock(as);
1357 if (as->stay == spi)
1358 as->stay = NULL;
1359 cs_deactivate(as, spi);
1360 atmel_spi_unlock(as);
1361 } 1047 }
1362 1048
1363 asd->csr = csr; 1049 asd->csr = csr;
1364 1050
1365 dev_dbg(&spi->dev, 1051 dev_dbg(&spi->dev,
1366 "setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n", 1052 "setup: bpw %u mode 0x%x -> csr%d %08x\n",
1367 bus_hz / scbr, bits, spi->mode, spi->chip_select, csr); 1053 bits, spi->mode, spi->chip_select, csr);
1368 1054
1369 if (!atmel_spi_is_v2(as)) 1055 if (!atmel_spi_is_v2(as))
1370 spi_writel(as, CSR0 + 4 * spi->chip_select, csr); 1056 spi_writel(as, CSR0 + 4 * spi->chip_select, csr);
@@ -1372,103 +1058,218 @@ static int atmel_spi_setup(struct spi_device *spi)
1372 return 0; 1058 return 0;
1373} 1059}
1374 1060
1375static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg) 1061static int atmel_spi_one_transfer(struct spi_master *master,
1062 struct spi_message *msg,
1063 struct spi_transfer *xfer)
1376{ 1064{
1377 struct atmel_spi *as; 1065 struct atmel_spi *as;
1378 struct spi_transfer *xfer; 1066 struct spi_device *spi = msg->spi;
1379 struct device *controller = spi->master->dev.parent;
1380 u8 bits; 1067 u8 bits;
1068 u32 len;
1381 struct atmel_spi_device *asd; 1069 struct atmel_spi_device *asd;
1070 int timeout;
1071 int ret;
1382 1072
1383 as = spi_master_get_devdata(spi->master); 1073 as = spi_master_get_devdata(master);
1384
1385 dev_dbg(controller, "new message %p submitted for %s\n",
1386 msg, dev_name(&spi->dev));
1387 1074
1388 if (unlikely(list_empty(&msg->transfers))) 1075 if (!(xfer->tx_buf || xfer->rx_buf) && xfer->len) {
1076 dev_dbg(&spi->dev, "missing rx or tx buf\n");
1389 return -EINVAL; 1077 return -EINVAL;
1078 }
1390 1079
1391 if (as->stopping) 1080 if (xfer->bits_per_word) {
1392 return -ESHUTDOWN; 1081 asd = spi->controller_state;
1082 bits = (asd->csr >> 4) & 0xf;
1083 if (bits != xfer->bits_per_word - 8) {
1084 dev_dbg(&spi->dev,
1085 "you can't yet change bits_per_word in transfers\n");
1086 return -ENOPROTOOPT;
1087 }
1088 }
1393 1089
1394 list_for_each_entry(xfer, &msg->transfers, transfer_list) { 1090 if (xfer->bits_per_word > 8) {
1395 if (!(xfer->tx_buf || xfer->rx_buf) && xfer->len) { 1091 if (xfer->len % 2) {
1396 dev_dbg(&spi->dev, "missing rx or tx buf\n"); 1092 dev_dbg(&spi->dev,
1093 "buffer len should be 16 bits aligned\n");
1397 return -EINVAL; 1094 return -EINVAL;
1398 } 1095 }
1096 }
1399 1097
1400 if (xfer->bits_per_word) { 1098 /*
1401 asd = spi->controller_state; 1099 * DMA map early, for performance (empties dcache ASAP) and
1402 bits = (asd->csr >> 4) & 0xf; 1100 * better fault reporting.
1403 if (bits != xfer->bits_per_word - 8) { 1101 */
1404 dev_dbg(&spi->dev, 1102 if ((!msg->is_dma_mapped)
1405 "you can't yet change bits_per_word in transfers\n"); 1103 && (atmel_spi_use_dma(as, xfer) || as->use_pdc)) {
1406 return -ENOPROTOOPT; 1104 if (atmel_spi_dma_map_xfer(as, xfer) < 0)
1105 return -ENOMEM;
1106 }
1107
1108 atmel_spi_set_xfer_speed(as, msg->spi, xfer);
1109
1110 as->done_status = 0;
1111 as->current_transfer = xfer;
1112 as->current_remaining_bytes = xfer->len;
1113 while (as->current_remaining_bytes) {
1114 reinit_completion(&as->xfer_completion);
1115
1116 if (as->use_pdc) {
1117 atmel_spi_pdc_next_xfer(master, msg, xfer);
1118 } else if (atmel_spi_use_dma(as, xfer)) {
1119 len = as->current_remaining_bytes;
1120 ret = atmel_spi_next_xfer_dma_submit(master,
1121 xfer, &len);
1122 if (ret) {
1123 dev_err(&spi->dev,
1124 "unable to use DMA, fallback to PIO\n");
1125 atmel_spi_next_xfer_pio(master, xfer);
1126 } else {
1127 as->current_remaining_bytes -= len;
1407 } 1128 }
1129 } else {
1130 atmel_spi_next_xfer_pio(master, xfer);
1408 } 1131 }
1409 1132
1410 if (xfer->bits_per_word > 8) { 1133 ret = wait_for_completion_timeout(&as->xfer_completion,
1411 if (xfer->len % 2) { 1134 SPI_DMA_TIMEOUT);
1412 dev_dbg(&spi->dev, "buffer len should be 16 bits aligned\n"); 1135 if (WARN_ON(ret == 0)) {
1413 return -EINVAL; 1136 dev_err(&spi->dev,
1414 } 1137 "spi trasfer timeout, err %d\n", ret);
1138 as->done_status = -EIO;
1139 } else {
1140 ret = 0;
1415 } 1141 }
1416 1142
1417 /* FIXME implement these protocol options!! */ 1143 if (as->done_status)
1418 if (xfer->speed_hz < spi->max_speed_hz) { 1144 break;
1419 dev_dbg(&spi->dev, "can't change speed in transfer\n"); 1145 }
1420 return -ENOPROTOOPT; 1146
1147 if (as->done_status) {
1148 if (as->use_pdc) {
1149 dev_warn(master->dev.parent,
1150 "overrun (%u/%u remaining)\n",
1151 spi_readl(as, TCR), spi_readl(as, RCR));
1152
1153 /*
1154 * Clean up DMA registers and make sure the data
1155 * registers are empty.
1156 */
1157 spi_writel(as, RNCR, 0);
1158 spi_writel(as, TNCR, 0);
1159 spi_writel(as, RCR, 0);
1160 spi_writel(as, TCR, 0);
1161 for (timeout = 1000; timeout; timeout--)
1162 if (spi_readl(as, SR) & SPI_BIT(TXEMPTY))
1163 break;
1164 if (!timeout)
1165 dev_warn(master->dev.parent,
1166 "timeout waiting for TXEMPTY");
1167 while (spi_readl(as, SR) & SPI_BIT(RDRF))
1168 spi_readl(as, RDR);
1169
1170 /* Clear any overrun happening while cleaning up */
1171 spi_readl(as, SR);
1172
1173 } else if (atmel_spi_use_dma(as, xfer)) {
1174 atmel_spi_stop_dma(as);
1421 } 1175 }
1422 1176
1423 /* 1177 if (!msg->is_dma_mapped
1424 * DMA map early, for performance (empties dcache ASAP) and 1178 && (atmel_spi_use_dma(as, xfer) || as->use_pdc))
1425 * better fault reporting. 1179 atmel_spi_dma_unmap_xfer(master, xfer);
1426 */ 1180
1427 if ((!msg->is_dma_mapped) && (atmel_spi_use_dma(as, xfer) 1181 return 0;
1428 || as->use_pdc)) { 1182
1429 if (atmel_spi_dma_map_xfer(as, xfer) < 0) 1183 } else {
1430 return -ENOMEM; 1184 /* only update length if no error */
1185 msg->actual_length += xfer->len;
1186 }
1187
1188 if (!msg->is_dma_mapped
1189 && (atmel_spi_use_dma(as, xfer) || as->use_pdc))
1190 atmel_spi_dma_unmap_xfer(master, xfer);
1191
1192 if (xfer->delay_usecs)
1193 udelay(xfer->delay_usecs);
1194
1195 if (xfer->cs_change) {
1196 if (list_is_last(&xfer->transfer_list,
1197 &msg->transfers)) {
1198 as->keep_cs = true;
1199 } else {
1200 as->cs_active = !as->cs_active;
1201 if (as->cs_active)
1202 cs_activate(as, msg->spi);
1203 else
1204 cs_deactivate(as, msg->spi);
1431 } 1205 }
1432 } 1206 }
1433 1207
1434#ifdef VERBOSE 1208 return 0;
1209}
1210
1211static int atmel_spi_transfer_one_message(struct spi_master *master,
1212 struct spi_message *msg)
1213{
1214 struct atmel_spi *as;
1215 struct spi_transfer *xfer;
1216 struct spi_device *spi = msg->spi;
1217 int ret = 0;
1218
1219 as = spi_master_get_devdata(master);
1220
1221 dev_dbg(&spi->dev, "new message %p submitted for %s\n",
1222 msg, dev_name(&spi->dev));
1223
1224 if (unlikely(list_empty(&msg->transfers)))
1225 return -EINVAL;
1226
1227 atmel_spi_lock(as);
1228 cs_activate(as, spi);
1229
1230 as->cs_active = true;
1231 as->keep_cs = false;
1232
1233 msg->status = 0;
1234 msg->actual_length = 0;
1235
1435 list_for_each_entry(xfer, &msg->transfers, transfer_list) { 1236 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1436 dev_dbg(controller, 1237 ret = atmel_spi_one_transfer(master, msg, xfer);
1238 if (ret)
1239 goto msg_done;
1240 }
1241
1242 if (as->use_pdc)
1243 atmel_spi_disable_pdc_transfer(as);
1244
1245 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1246 dev_dbg(&spi->dev,
1437 " xfer %p: len %u tx %p/%08x rx %p/%08x\n", 1247 " xfer %p: len %u tx %p/%08x rx %p/%08x\n",
1438 xfer, xfer->len, 1248 xfer, xfer->len,
1439 xfer->tx_buf, xfer->tx_dma, 1249 xfer->tx_buf, xfer->tx_dma,
1440 xfer->rx_buf, xfer->rx_dma); 1250 xfer->rx_buf, xfer->rx_dma);
1441 } 1251 }
1442#endif
1443 1252
1444 msg->status = -EINPROGRESS; 1253msg_done:
1445 msg->actual_length = 0; 1254 if (!as->keep_cs)
1255 cs_deactivate(as, msg->spi);
1446 1256
1447 atmel_spi_lock(as);
1448 list_add_tail(&msg->queue, &as->queue);
1449 if (!as->current_transfer)
1450 atmel_spi_next_message(spi->master);
1451 atmel_spi_unlock(as); 1257 atmel_spi_unlock(as);
1452 1258
1453 return 0; 1259 msg->status = as->done_status;
1260 spi_finalize_current_message(spi->master);
1261
1262 return ret;
1454} 1263}
1455 1264
1456static void atmel_spi_cleanup(struct spi_device *spi) 1265static void atmel_spi_cleanup(struct spi_device *spi)
1457{ 1266{
1458 struct atmel_spi *as = spi_master_get_devdata(spi->master);
1459 struct atmel_spi_device *asd = spi->controller_state; 1267 struct atmel_spi_device *asd = spi->controller_state;
1460 unsigned gpio = (unsigned) spi->controller_data; 1268 unsigned gpio = (unsigned) spi->controller_data;
1461 1269
1462 if (!asd) 1270 if (!asd)
1463 return; 1271 return;
1464 1272
1465 atmel_spi_lock(as);
1466 if (as->stay == spi) {
1467 as->stay = NULL;
1468 cs_deactivate(as, spi);
1469 }
1470 atmel_spi_unlock(as);
1471
1472 spi->controller_state = NULL; 1273 spi->controller_state = NULL;
1473 gpio_free(gpio); 1274 gpio_free(gpio);
1474 kfree(asd); 1275 kfree(asd);
@@ -1510,7 +1311,7 @@ static int atmel_spi_probe(struct platform_device *pdev)
1510 if (irq < 0) 1311 if (irq < 0)
1511 return irq; 1312 return irq;
1512 1313
1513 clk = clk_get(&pdev->dev, "spi_clk"); 1314 clk = devm_clk_get(&pdev->dev, "spi_clk");
1514 if (IS_ERR(clk)) 1315 if (IS_ERR(clk))
1515 return PTR_ERR(clk); 1316 return PTR_ERR(clk);
1516 1317
@@ -1527,7 +1328,7 @@ static int atmel_spi_probe(struct platform_device *pdev)
1527 master->bus_num = pdev->id; 1328 master->bus_num = pdev->id;
1528 master->num_chipselect = master->dev.of_node ? 0 : 4; 1329 master->num_chipselect = master->dev.of_node ? 0 : 4;
1529 master->setup = atmel_spi_setup; 1330 master->setup = atmel_spi_setup;
1530 master->transfer = atmel_spi_transfer; 1331 master->transfer_one_message = atmel_spi_transfer_one_message;
1531 master->cleanup = atmel_spi_cleanup; 1332 master->cleanup = atmel_spi_cleanup;
1532 platform_set_drvdata(pdev, master); 1333 platform_set_drvdata(pdev, master);
1533 1334
@@ -1543,7 +1344,6 @@ static int atmel_spi_probe(struct platform_device *pdev)
1543 goto out_free; 1344 goto out_free;
1544 1345
1545 spin_lock_init(&as->lock); 1346 spin_lock_init(&as->lock);
1546 INIT_LIST_HEAD(&as->queue);
1547 1347
1548 as->pdev = pdev; 1348 as->pdev = pdev;
1549 as->regs = devm_ioremap_resource(&pdev->dev, regs); 1349 as->regs = devm_ioremap_resource(&pdev->dev, regs);
@@ -1555,6 +1355,8 @@ static int atmel_spi_probe(struct platform_device *pdev)
1555 as->irq = irq; 1355 as->irq = irq;
1556 as->clk = clk; 1356 as->clk = clk;
1557 1357
1358 init_completion(&as->xfer_completion);
1359
1558 atmel_get_caps(as); 1360 atmel_get_caps(as);
1559 1361
1560 as->use_dma = false; 1362 as->use_dma = false;
@@ -1570,14 +1372,11 @@ static int atmel_spi_probe(struct platform_device *pdev)
1570 dev_info(&pdev->dev, "Atmel SPI Controller using PIO only\n"); 1372 dev_info(&pdev->dev, "Atmel SPI Controller using PIO only\n");
1571 1373
1572 if (as->use_pdc) { 1374 if (as->use_pdc) {
1573 ret = request_irq(irq, atmel_spi_pdc_interrupt, 0, 1375 ret = devm_request_irq(&pdev->dev, irq, atmel_spi_pdc_interrupt,
1574 dev_name(&pdev->dev), master); 1376 0, dev_name(&pdev->dev), master);
1575 } else { 1377 } else {
1576 tasklet_init(&as->tasklet, atmel_spi_tasklet_func, 1378 ret = devm_request_irq(&pdev->dev, irq, atmel_spi_pio_interrupt,
1577 (unsigned long)master); 1379 0, dev_name(&pdev->dev), master);
1578
1579 ret = request_irq(irq, atmel_spi_pio_interrupt, 0,
1580 dev_name(&pdev->dev), master);
1581 } 1380 }
1582 if (ret) 1381 if (ret)
1583 goto out_unmap_regs; 1382 goto out_unmap_regs;
@@ -1603,7 +1402,7 @@ static int atmel_spi_probe(struct platform_device *pdev)
1603 dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n", 1402 dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n",
1604 (unsigned long)regs->start, irq); 1403 (unsigned long)regs->start, irq);
1605 1404
1606 ret = spi_register_master(master); 1405 ret = devm_spi_register_master(&pdev->dev, master);
1607 if (ret) 1406 if (ret)
1608 goto out_free_dma; 1407 goto out_free_dma;
1609 1408
@@ -1617,15 +1416,11 @@ out_free_dma:
1617 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ 1416 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
1618 clk_disable_unprepare(clk); 1417 clk_disable_unprepare(clk);
1619out_free_irq: 1418out_free_irq:
1620 free_irq(irq, master);
1621out_unmap_regs: 1419out_unmap_regs:
1622out_free_buffer: 1420out_free_buffer:
1623 if (!as->use_pdc)
1624 tasklet_kill(&as->tasklet);
1625 dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer, 1421 dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
1626 as->buffer_dma); 1422 as->buffer_dma);
1627out_free: 1423out_free:
1628 clk_put(clk);
1629 spi_master_put(master); 1424 spi_master_put(master);
1630 return ret; 1425 return ret;
1631} 1426}
@@ -1634,12 +1429,9 @@ static int atmel_spi_remove(struct platform_device *pdev)
1634{ 1429{
1635 struct spi_master *master = platform_get_drvdata(pdev); 1430 struct spi_master *master = platform_get_drvdata(pdev);
1636 struct atmel_spi *as = spi_master_get_devdata(master); 1431 struct atmel_spi *as = spi_master_get_devdata(master);
1637 struct spi_message *msg;
1638 struct spi_transfer *xfer;
1639 1432
1640 /* reset the hardware and block queue progress */ 1433 /* reset the hardware and block queue progress */
1641 spin_lock_irq(&as->lock); 1434 spin_lock_irq(&as->lock);
1642 as->stopping = 1;
1643 if (as->use_dma) { 1435 if (as->use_dma) {
1644 atmel_spi_stop_dma(as); 1436 atmel_spi_stop_dma(as);
1645 atmel_spi_release_dma(as); 1437 atmel_spi_release_dma(as);
@@ -1650,28 +1442,10 @@ static int atmel_spi_remove(struct platform_device *pdev)
1650 spi_readl(as, SR); 1442 spi_readl(as, SR);
1651 spin_unlock_irq(&as->lock); 1443 spin_unlock_irq(&as->lock);
1652 1444
1653 /* Terminate remaining queued transfers */
1654 list_for_each_entry(msg, &as->queue, queue) {
1655 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1656 if (!msg->is_dma_mapped
1657 && (atmel_spi_use_dma(as, xfer)
1658 || as->use_pdc))
1659 atmel_spi_dma_unmap_xfer(master, xfer);
1660 }
1661 msg->status = -ESHUTDOWN;
1662 msg->complete(msg->context);
1663 }
1664
1665 if (!as->use_pdc)
1666 tasklet_kill(&as->tasklet);
1667 dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer, 1445 dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
1668 as->buffer_dma); 1446 as->buffer_dma);
1669 1447
1670 clk_disable_unprepare(as->clk); 1448 clk_disable_unprepare(as->clk);
1671 clk_put(as->clk);
1672 free_irq(as->irq, master);
1673
1674 spi_unregister_master(master);
1675 1449
1676 return 0; 1450 return 0;
1677} 1451}
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
index 3ed666fe840a..8a89dd1f2654 100644
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
@@ -347,8 +347,8 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
347 347
348 clk_prepare_enable(bs->clk); 348 clk_prepare_enable(bs->clk);
349 349
350 err = request_irq(bs->irq, bcm2835_spi_interrupt, 0, 350 err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_interrupt, 0,
351 dev_name(&pdev->dev), master); 351 dev_name(&pdev->dev), master);
352 if (err) { 352 if (err) {
353 dev_err(&pdev->dev, "could not request IRQ: %d\n", err); 353 dev_err(&pdev->dev, "could not request IRQ: %d\n", err);
354 goto out_clk_disable; 354 goto out_clk_disable;
@@ -361,13 +361,11 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
361 err = devm_spi_register_master(&pdev->dev, master); 361 err = devm_spi_register_master(&pdev->dev, master);
362 if (err) { 362 if (err) {
363 dev_err(&pdev->dev, "could not register SPI master: %d\n", err); 363 dev_err(&pdev->dev, "could not register SPI master: %d\n", err);
364 goto out_free_irq; 364 goto out_clk_disable;
365 } 365 }
366 366
367 return 0; 367 return 0;
368 368
369out_free_irq:
370 free_irq(bs->irq, master);
371out_clk_disable: 369out_clk_disable:
372 clk_disable_unprepare(bs->clk); 370 clk_disable_unprepare(bs->clk);
373out_master_put: 371out_master_put:
@@ -377,11 +375,9 @@ out_master_put:
377 375
378static int bcm2835_spi_remove(struct platform_device *pdev) 376static int bcm2835_spi_remove(struct platform_device *pdev)
379{ 377{
380 struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); 378 struct spi_master *master = platform_get_drvdata(pdev);
381 struct bcm2835_spi *bs = spi_master_get_devdata(master); 379 struct bcm2835_spi *bs = spi_master_get_devdata(master);
382 380
383 free_irq(bs->irq, master);
384
385 /* Clear FIFOs, and disable the HW block */ 381 /* Clear FIFOs, and disable the HW block */
386 bcm2835_wr(bs, BCM2835_SPI_CS, 382 bcm2835_wr(bs, BCM2835_SPI_CS,
387 BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX); 383 BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c
index 80d56b214eb5..77286aef2adf 100644
--- a/drivers/spi/spi-bcm63xx.c
+++ b/drivers/spi/spi-bcm63xx.c
@@ -169,8 +169,6 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first,
169 transfer_list); 169 transfer_list);
170 } 170 }
171 171
172 len -= prepend_len;
173
174 init_completion(&bs->done); 172 init_completion(&bs->done);
175 173
176 /* Fill in the Message control register */ 174 /* Fill in the Message control register */
@@ -205,13 +203,7 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first,
205 if (!timeout) 203 if (!timeout)
206 return -ETIMEDOUT; 204 return -ETIMEDOUT;
207 205
208 /* read out all data */ 206 if (!do_rx)
209 rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
210
211 if (do_rx && rx_tail != len)
212 return -EIO;
213
214 if (!rx_tail)
215 return 0; 207 return 0;
216 208
217 len = 0; 209 len = 0;
@@ -345,22 +337,19 @@ static int bcm63xx_spi_probe(struct platform_device *pdev)
345 irq = platform_get_irq(pdev, 0); 337 irq = platform_get_irq(pdev, 0);
346 if (irq < 0) { 338 if (irq < 0) {
347 dev_err(dev, "no irq\n"); 339 dev_err(dev, "no irq\n");
348 ret = -ENXIO; 340 return -ENXIO;
349 goto out;
350 } 341 }
351 342
352 clk = clk_get(dev, "spi"); 343 clk = devm_clk_get(dev, "spi");
353 if (IS_ERR(clk)) { 344 if (IS_ERR(clk)) {
354 dev_err(dev, "no clock for device\n"); 345 dev_err(dev, "no clock for device\n");
355 ret = PTR_ERR(clk); 346 return PTR_ERR(clk);
356 goto out;
357 } 347 }
358 348
359 master = spi_alloc_master(dev, sizeof(*bs)); 349 master = spi_alloc_master(dev, sizeof(*bs));
360 if (!master) { 350 if (!master) {
361 dev_err(dev, "out of memory\n"); 351 dev_err(dev, "out of memory\n");
362 ret = -ENOMEM; 352 return -ENOMEM;
363 goto out_clk;
364 } 353 }
365 354
366 bs = spi_master_get_devdata(master); 355 bs = spi_master_get_devdata(master);
@@ -408,7 +397,10 @@ static int bcm63xx_spi_probe(struct platform_device *pdev)
408 } 397 }
409 398
410 /* Initialize hardware */ 399 /* Initialize hardware */
411 clk_prepare_enable(bs->clk); 400 ret = clk_prepare_enable(bs->clk);
401 if (ret)
402 goto out_err;
403
412 bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS); 404 bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
413 405
414 /* register and we are done */ 406 /* register and we are done */
@@ -427,15 +419,12 @@ out_clk_disable:
427 clk_disable_unprepare(clk); 419 clk_disable_unprepare(clk);
428out_err: 420out_err:
429 spi_master_put(master); 421 spi_master_put(master);
430out_clk:
431 clk_put(clk);
432out:
433 return ret; 422 return ret;
434} 423}
435 424
436static int bcm63xx_spi_remove(struct platform_device *pdev) 425static int bcm63xx_spi_remove(struct platform_device *pdev)
437{ 426{
438 struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); 427 struct spi_master *master = platform_get_drvdata(pdev);
439 struct bcm63xx_spi *bs = spi_master_get_devdata(master); 428 struct bcm63xx_spi *bs = spi_master_get_devdata(master);
440 429
441 /* reset spi block */ 430 /* reset spi block */
@@ -443,12 +432,11 @@ static int bcm63xx_spi_remove(struct platform_device *pdev)
443 432
444 /* HW shutdown */ 433 /* HW shutdown */
445 clk_disable_unprepare(bs->clk); 434 clk_disable_unprepare(bs->clk);
446 clk_put(bs->clk);
447 435
448 return 0; 436 return 0;
449} 437}
450 438
451#ifdef CONFIG_PM 439#ifdef CONFIG_PM_SLEEP
452static int bcm63xx_spi_suspend(struct device *dev) 440static int bcm63xx_spi_suspend(struct device *dev)
453{ 441{
454 struct spi_master *master = dev_get_drvdata(dev); 442 struct spi_master *master = dev_get_drvdata(dev);
@@ -465,29 +453,27 @@ static int bcm63xx_spi_resume(struct device *dev)
465{ 453{
466 struct spi_master *master = dev_get_drvdata(dev); 454 struct spi_master *master = dev_get_drvdata(dev);
467 struct bcm63xx_spi *bs = spi_master_get_devdata(master); 455 struct bcm63xx_spi *bs = spi_master_get_devdata(master);
456 int ret;
468 457
469 clk_prepare_enable(bs->clk); 458 ret = clk_prepare_enable(bs->clk);
459 if (ret)
460 return ret;
470 461
471 spi_master_resume(master); 462 spi_master_resume(master);
472 463
473 return 0; 464 return 0;
474} 465}
466#endif
475 467
476static const struct dev_pm_ops bcm63xx_spi_pm_ops = { 468static const struct dev_pm_ops bcm63xx_spi_pm_ops = {
477 .suspend = bcm63xx_spi_suspend, 469 SET_SYSTEM_SLEEP_PM_OPS(bcm63xx_spi_suspend, bcm63xx_spi_resume)
478 .resume = bcm63xx_spi_resume,
479}; 470};
480 471
481#define BCM63XX_SPI_PM_OPS (&bcm63xx_spi_pm_ops)
482#else
483#define BCM63XX_SPI_PM_OPS NULL
484#endif
485
486static struct platform_driver bcm63xx_spi_driver = { 472static struct platform_driver bcm63xx_spi_driver = {
487 .driver = { 473 .driver = {
488 .name = "bcm63xx-spi", 474 .name = "bcm63xx-spi",
489 .owner = THIS_MODULE, 475 .owner = THIS_MODULE,
490 .pm = BCM63XX_SPI_PM_OPS, 476 .pm = &bcm63xx_spi_pm_ops,
491 }, 477 },
492 .probe = bcm63xx_spi_probe, 478 .probe = bcm63xx_spi_probe,
493 .remove = bcm63xx_spi_remove, 479 .remove = bcm63xx_spi_remove,
diff --git a/drivers/spi/spi-bitbang-txrx.h b/drivers/spi/spi-bitbang-txrx.h
index c16bf853c3eb..c616e41521be 100644
--- a/drivers/spi/spi-bitbang-txrx.h
+++ b/drivers/spi/spi-bitbang-txrx.h
@@ -38,7 +38,7 @@
38 * 38 *
39 * Since this is software, the timings may not be exactly what your board's 39 * Since this is software, the timings may not be exactly what your board's
40 * chips need ... there may be several reasons you'd need to tweak timings 40 * chips need ... there may be several reasons you'd need to tweak timings
41 * in these routines, not just make to make it faster or slower to match a 41 * in these routines, not just to make it faster or slower to match a
42 * particular CPU clock rate. 42 * particular CPU clock rate.
43 */ 43 */
44 44
diff --git a/drivers/spi/spi-clps711x.c b/drivers/spi/spi-clps711x.c
index 6f03d7e6435d..374ba4a48a9e 100644
--- a/drivers/spi/spi-clps711x.c
+++ b/drivers/spi/spi-clps711x.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * CLPS711X SPI bus driver 2 * CLPS711X SPI bus driver
3 * 3 *
4 * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru> 4 * Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -198,7 +198,7 @@ static int spi_clps711x_probe(struct platform_device *pdev)
198 ret = -EINVAL; 198 ret = -EINVAL;
199 goto err_out; 199 goto err_out;
200 } 200 }
201 if (gpio_request(hw->chipselect[i], DRIVER_NAME)) { 201 if (devm_gpio_request(&pdev->dev, hw->chipselect[i], NULL)) {
202 dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); 202 dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
203 ret = -EINVAL; 203 ret = -EINVAL;
204 goto err_out; 204 goto err_out;
@@ -240,38 +240,21 @@ static int spi_clps711x_probe(struct platform_device *pdev)
240 dev_err(&pdev->dev, "Failed to register master\n"); 240 dev_err(&pdev->dev, "Failed to register master\n");
241 241
242err_out: 242err_out:
243 while (--i >= 0)
244 if (gpio_is_valid(hw->chipselect[i]))
245 gpio_free(hw->chipselect[i]);
246
247 spi_master_put(master); 243 spi_master_put(master);
248 244
249 return ret; 245 return ret;
250} 246}
251 247
252static int spi_clps711x_remove(struct platform_device *pdev)
253{
254 int i;
255 struct spi_master *master = platform_get_drvdata(pdev);
256 struct spi_clps711x_data *hw = spi_master_get_devdata(master);
257
258 for (i = 0; i < master->num_chipselect; i++)
259 if (gpio_is_valid(hw->chipselect[i]))
260 gpio_free(hw->chipselect[i]);
261
262 return 0;
263}
264
265static struct platform_driver clps711x_spi_driver = { 248static struct platform_driver clps711x_spi_driver = {
266 .driver = { 249 .driver = {
267 .name = DRIVER_NAME, 250 .name = DRIVER_NAME,
268 .owner = THIS_MODULE, 251 .owner = THIS_MODULE,
269 }, 252 },
270 .probe = spi_clps711x_probe, 253 .probe = spi_clps711x_probe,
271 .remove = spi_clps711x_remove,
272}; 254};
273module_platform_driver(clps711x_spi_driver); 255module_platform_driver(clps711x_spi_driver);
274 256
275MODULE_LICENSE("GPL"); 257MODULE_LICENSE("GPL");
276MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>"); 258MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
277MODULE_DESCRIPTION("CLPS711X SPI bus driver"); 259MODULE_DESCRIPTION("CLPS711X SPI bus driver");
260MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c
index cc5b75d10c38..cabed8f9119e 100644
--- a/drivers/spi/spi-coldfire-qspi.c
+++ b/drivers/spi/spi-coldfire-qspi.c
@@ -397,44 +397,31 @@ static int mcfqspi_probe(struct platform_device *pdev)
397 mcfqspi = spi_master_get_devdata(master); 397 mcfqspi = spi_master_get_devdata(master);
398 398
399 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 399 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
400 if (!res) { 400 mcfqspi->iobase = devm_ioremap_resource(&pdev->dev, res);
401 dev_dbg(&pdev->dev, "platform_get_resource failed\n"); 401 if (IS_ERR(mcfqspi->iobase)) {
402 status = -ENXIO; 402 status = PTR_ERR(mcfqspi->iobase);
403 goto fail0; 403 goto fail0;
404 } 404 }
405 405
406 if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
407 dev_dbg(&pdev->dev, "request_mem_region failed\n");
408 status = -EBUSY;
409 goto fail0;
410 }
411
412 mcfqspi->iobase = ioremap(res->start, resource_size(res));
413 if (!mcfqspi->iobase) {
414 dev_dbg(&pdev->dev, "ioremap failed\n");
415 status = -ENOMEM;
416 goto fail1;
417 }
418
419 mcfqspi->irq = platform_get_irq(pdev, 0); 406 mcfqspi->irq = platform_get_irq(pdev, 0);
420 if (mcfqspi->irq < 0) { 407 if (mcfqspi->irq < 0) {
421 dev_dbg(&pdev->dev, "platform_get_irq failed\n"); 408 dev_dbg(&pdev->dev, "platform_get_irq failed\n");
422 status = -ENXIO; 409 status = -ENXIO;
423 goto fail2; 410 goto fail0;
424 } 411 }
425 412
426 status = request_irq(mcfqspi->irq, mcfqspi_irq_handler, 0, 413 status = devm_request_irq(&pdev->dev, mcfqspi->irq, mcfqspi_irq_handler,
427 pdev->name, mcfqspi); 414 0, pdev->name, mcfqspi);
428 if (status) { 415 if (status) {
429 dev_dbg(&pdev->dev, "request_irq failed\n"); 416 dev_dbg(&pdev->dev, "request_irq failed\n");
430 goto fail2; 417 goto fail0;
431 } 418 }
432 419
433 mcfqspi->clk = clk_get(&pdev->dev, "qspi_clk"); 420 mcfqspi->clk = devm_clk_get(&pdev->dev, "qspi_clk");
434 if (IS_ERR(mcfqspi->clk)) { 421 if (IS_ERR(mcfqspi->clk)) {
435 dev_dbg(&pdev->dev, "clk_get failed\n"); 422 dev_dbg(&pdev->dev, "clk_get failed\n");
436 status = PTR_ERR(mcfqspi->clk); 423 status = PTR_ERR(mcfqspi->clk);
437 goto fail3; 424 goto fail0;
438 } 425 }
439 clk_enable(mcfqspi->clk); 426 clk_enable(mcfqspi->clk);
440 427
@@ -445,7 +432,7 @@ static int mcfqspi_probe(struct platform_device *pdev)
445 status = mcfqspi_cs_setup(mcfqspi); 432 status = mcfqspi_cs_setup(mcfqspi);
446 if (status) { 433 if (status) {
447 dev_dbg(&pdev->dev, "error initializing cs_control\n"); 434 dev_dbg(&pdev->dev, "error initializing cs_control\n");
448 goto fail4; 435 goto fail1;
449 } 436 }
450 437
451 init_waitqueue_head(&mcfqspi->waitq); 438 init_waitqueue_head(&mcfqspi->waitq);
@@ -459,10 +446,10 @@ static int mcfqspi_probe(struct platform_device *pdev)
459 446
460 platform_set_drvdata(pdev, master); 447 platform_set_drvdata(pdev, master);
461 448
462 status = spi_register_master(master); 449 status = devm_spi_register_master(&pdev->dev, master);
463 if (status) { 450 if (status) {
464 dev_dbg(&pdev->dev, "spi_register_master failed\n"); 451 dev_dbg(&pdev->dev, "spi_register_master failed\n");
465 goto fail5; 452 goto fail2;
466 } 453 }
467 pm_runtime_enable(mcfqspi->dev); 454 pm_runtime_enable(mcfqspi->dev);
468 455
@@ -470,17 +457,10 @@ static int mcfqspi_probe(struct platform_device *pdev)
470 457
471 return 0; 458 return 0;
472 459
473fail5:
474 mcfqspi_cs_teardown(mcfqspi);
475fail4:
476 clk_disable(mcfqspi->clk);
477 clk_put(mcfqspi->clk);
478fail3:
479 free_irq(mcfqspi->irq, mcfqspi);
480fail2: 460fail2:
481 iounmap(mcfqspi->iobase); 461 mcfqspi_cs_teardown(mcfqspi);
482fail1: 462fail1:
483 release_mem_region(res->start, resource_size(res)); 463 clk_disable(mcfqspi->clk);
484fail0: 464fail0:
485 spi_master_put(master); 465 spi_master_put(master);
486 466
@@ -501,11 +481,6 @@ static int mcfqspi_remove(struct platform_device *pdev)
501 481
502 mcfqspi_cs_teardown(mcfqspi); 482 mcfqspi_cs_teardown(mcfqspi);
503 clk_disable(mcfqspi->clk); 483 clk_disable(mcfqspi->clk);
504 clk_put(mcfqspi->clk);
505 free_irq(mcfqspi->irq, mcfqspi);
506 iounmap(mcfqspi->iobase);
507 release_mem_region(res->start, resource_size(res));
508 spi_unregister_master(master);
509 484
510 return 0; 485 return 0;
511} 486}
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
index 50b2d88c8190..5e7389faa2a0 100644
--- a/drivers/spi/spi-davinci.c
+++ b/drivers/spi/spi-davinci.c
@@ -396,10 +396,6 @@ static int davinci_spi_setup(struct spi_device *spi)
396 dspi = spi_master_get_devdata(spi->master); 396 dspi = spi_master_get_devdata(spi->master);
397 pdata = &dspi->pdata; 397 pdata = &dspi->pdata;
398 398
399 /* if bits per word length is zero then set it default 8 */
400 if (!spi->bits_per_word)
401 spi->bits_per_word = 8;
402
403 if (!(spi->mode & SPI_NO_CS)) { 399 if (!(spi->mode & SPI_NO_CS)) {
404 if ((pdata->chip_sel == NULL) || 400 if ((pdata->chip_sel == NULL) ||
405 (pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS)) 401 (pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS))
@@ -853,7 +849,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
853 struct spi_master *master; 849 struct spi_master *master;
854 struct davinci_spi *dspi; 850 struct davinci_spi *dspi;
855 struct davinci_spi_platform_data *pdata; 851 struct davinci_spi_platform_data *pdata;
856 struct resource *r, *mem; 852 struct resource *r;
857 resource_size_t dma_rx_chan = SPI_NO_RESOURCE; 853 resource_size_t dma_rx_chan = SPI_NO_RESOURCE;
858 resource_size_t dma_tx_chan = SPI_NO_RESOURCE; 854 resource_size_t dma_tx_chan = SPI_NO_RESOURCE;
859 int i = 0, ret = 0; 855 int i = 0, ret = 0;
@@ -894,39 +890,33 @@ static int davinci_spi_probe(struct platform_device *pdev)
894 890
895 dspi->pbase = r->start; 891 dspi->pbase = r->start;
896 892
897 mem = request_mem_region(r->start, resource_size(r), pdev->name); 893 dspi->base = devm_ioremap_resource(&pdev->dev, r);
898 if (mem == NULL) { 894 if (IS_ERR(dspi->base)) {
899 ret = -EBUSY; 895 ret = PTR_ERR(dspi->base);
900 goto free_master; 896 goto free_master;
901 } 897 }
902 898
903 dspi->base = ioremap(r->start, resource_size(r));
904 if (dspi->base == NULL) {
905 ret = -ENOMEM;
906 goto release_region;
907 }
908
909 dspi->irq = platform_get_irq(pdev, 0); 899 dspi->irq = platform_get_irq(pdev, 0);
910 if (dspi->irq <= 0) { 900 if (dspi->irq <= 0) {
911 ret = -EINVAL; 901 ret = -EINVAL;
912 goto unmap_io; 902 goto free_master;
913 } 903 }
914 904
915 ret = request_threaded_irq(dspi->irq, davinci_spi_irq, dummy_thread_fn, 905 ret = devm_request_threaded_irq(&pdev->dev, dspi->irq, davinci_spi_irq,
916 0, dev_name(&pdev->dev), dspi); 906 dummy_thread_fn, 0, dev_name(&pdev->dev), dspi);
917 if (ret) 907 if (ret)
918 goto unmap_io; 908 goto free_master;
919 909
920 dspi->bitbang.master = master; 910 dspi->bitbang.master = master;
921 if (dspi->bitbang.master == NULL) { 911 if (dspi->bitbang.master == NULL) {
922 ret = -ENODEV; 912 ret = -ENODEV;
923 goto irq_free; 913 goto free_master;
924 } 914 }
925 915
926 dspi->clk = clk_get(&pdev->dev, NULL); 916 dspi->clk = devm_clk_get(&pdev->dev, NULL);
927 if (IS_ERR(dspi->clk)) { 917 if (IS_ERR(dspi->clk)) {
928 ret = -ENODEV; 918 ret = -ENODEV;
929 goto irq_free; 919 goto free_master;
930 } 920 }
931 clk_prepare_enable(dspi->clk); 921 clk_prepare_enable(dspi->clk);
932 922
@@ -963,8 +953,8 @@ static int davinci_spi_probe(struct platform_device *pdev)
963 goto free_clk; 953 goto free_clk;
964 954
965 dev_info(&pdev->dev, "DMA: supported\n"); 955 dev_info(&pdev->dev, "DMA: supported\n");
966 dev_info(&pdev->dev, "DMA: RX channel: %d, TX channel: %d, " 956 dev_info(&pdev->dev, "DMA: RX channel: %pa, TX channel: %pa, "
967 "event queue: %d\n", dma_rx_chan, dma_tx_chan, 957 "event queue: %d\n", &dma_rx_chan, &dma_tx_chan,
968 pdata->dma_event_q); 958 pdata->dma_event_q);
969 } 959 }
970 960
@@ -1015,13 +1005,6 @@ free_dma:
1015 dma_release_channel(dspi->dma_tx); 1005 dma_release_channel(dspi->dma_tx);
1016free_clk: 1006free_clk:
1017 clk_disable_unprepare(dspi->clk); 1007 clk_disable_unprepare(dspi->clk);
1018 clk_put(dspi->clk);
1019irq_free:
1020 free_irq(dspi->irq, dspi);
1021unmap_io:
1022 iounmap(dspi->base);
1023release_region:
1024 release_mem_region(dspi->pbase, resource_size(r));
1025free_master: 1008free_master:
1026 spi_master_put(master); 1009 spi_master_put(master);
1027err: 1010err:
@@ -1041,7 +1024,6 @@ static int davinci_spi_remove(struct platform_device *pdev)
1041{ 1024{
1042 struct davinci_spi *dspi; 1025 struct davinci_spi *dspi;
1043 struct spi_master *master; 1026 struct spi_master *master;
1044 struct resource *r;
1045 1027
1046 master = platform_get_drvdata(pdev); 1028 master = platform_get_drvdata(pdev);
1047 dspi = spi_master_get_devdata(master); 1029 dspi = spi_master_get_devdata(master);
@@ -1049,11 +1031,6 @@ static int davinci_spi_remove(struct platform_device *pdev)
1049 spi_bitbang_stop(&dspi->bitbang); 1031 spi_bitbang_stop(&dspi->bitbang);
1050 1032
1051 clk_disable_unprepare(dspi->clk); 1033 clk_disable_unprepare(dspi->clk);
1052 clk_put(dspi->clk);
1053 free_irq(dspi->irq, dspi);
1054 iounmap(dspi->base);
1055 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1056 release_mem_region(dspi->pbase, resource_size(r));
1057 spi_master_put(master); 1034 spi_master_put(master);
1058 1035
1059 return 0; 1036 return 0;
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 168c620947f4..9af56cdf1540 100644
--- a/drivers/spi/spi-dw-mmio.c
+++ b/drivers/spi/spi-dw-mmio.c
@@ -30,14 +30,13 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
30{ 30{
31 struct dw_spi_mmio *dwsmmio; 31 struct dw_spi_mmio *dwsmmio;
32 struct dw_spi *dws; 32 struct dw_spi *dws;
33 struct resource *mem, *ioarea; 33 struct resource *mem;
34 int ret; 34 int ret;
35 35
36 dwsmmio = kzalloc(sizeof(struct dw_spi_mmio), GFP_KERNEL); 36 dwsmmio = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_mmio),
37 if (!dwsmmio) { 37 GFP_KERNEL);
38 ret = -ENOMEM; 38 if (!dwsmmio)
39 goto err_end; 39 return -ENOMEM;
40 }
41 40
42 dws = &dwsmmio->dws; 41 dws = &dwsmmio->dws;
43 42
@@ -45,80 +44,51 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
45 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 44 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
46 if (!mem) { 45 if (!mem) {
47 dev_err(&pdev->dev, "no mem resource?\n"); 46 dev_err(&pdev->dev, "no mem resource?\n");
48 ret = -EINVAL; 47 return -EINVAL;
49 goto err_kfree;
50 } 48 }
51 49
52 ioarea = request_mem_region(mem->start, resource_size(mem), 50 dws->regs = devm_ioremap_resource(&pdev->dev, mem);
53 pdev->name); 51 if (IS_ERR(dws->regs)) {
54 if (!ioarea) { 52 dev_err(&pdev->dev, "SPI region map failed\n");
55 dev_err(&pdev->dev, "SPI region already claimed\n"); 53 return PTR_ERR(dws->regs);
56 ret = -EBUSY;
57 goto err_kfree;
58 }
59
60 dws->regs = ioremap_nocache(mem->start, resource_size(mem));
61 if (!dws->regs) {
62 dev_err(&pdev->dev, "SPI region already mapped\n");
63 ret = -ENOMEM;
64 goto err_release_reg;
65 } 54 }
66 55
67 dws->irq = platform_get_irq(pdev, 0); 56 dws->irq = platform_get_irq(pdev, 0);
68 if (dws->irq < 0) { 57 if (dws->irq < 0) {
69 dev_err(&pdev->dev, "no irq resource?\n"); 58 dev_err(&pdev->dev, "no irq resource?\n");
70 ret = dws->irq; /* -ENXIO */ 59 return dws->irq; /* -ENXIO */
71 goto err_unmap;
72 } 60 }
73 61
74 dwsmmio->clk = clk_get(&pdev->dev, NULL); 62 dwsmmio->clk = devm_clk_get(&pdev->dev, NULL);
75 if (IS_ERR(dwsmmio->clk)) { 63 if (IS_ERR(dwsmmio->clk))
76 ret = PTR_ERR(dwsmmio->clk); 64 return PTR_ERR(dwsmmio->clk);
77 goto err_unmap; 65 ret = clk_prepare_enable(dwsmmio->clk);
78 } 66 if (ret)
79 clk_enable(dwsmmio->clk); 67 return ret;
80 68
81 dws->parent_dev = &pdev->dev;
82 dws->bus_num = 0; 69 dws->bus_num = 0;
83 dws->num_cs = 4; 70 dws->num_cs = 4;
84 dws->max_freq = clk_get_rate(dwsmmio->clk); 71 dws->max_freq = clk_get_rate(dwsmmio->clk);
85 72
86 ret = dw_spi_add_host(dws); 73 ret = dw_spi_add_host(&pdev->dev, dws);
87 if (ret) 74 if (ret)
88 goto err_clk; 75 goto out;
89 76
90 platform_set_drvdata(pdev, dwsmmio); 77 platform_set_drvdata(pdev, dwsmmio);
91 return 0; 78 return 0;
92 79
93err_clk: 80out:
94 clk_disable(dwsmmio->clk); 81 clk_disable_unprepare(dwsmmio->clk);
95 clk_put(dwsmmio->clk);
96 dwsmmio->clk = NULL;
97err_unmap:
98 iounmap(dws->regs);
99err_release_reg:
100 release_mem_region(mem->start, resource_size(mem));
101err_kfree:
102 kfree(dwsmmio);
103err_end:
104 return ret; 82 return ret;
105} 83}
106 84
107static int dw_spi_mmio_remove(struct platform_device *pdev) 85static int dw_spi_mmio_remove(struct platform_device *pdev)
108{ 86{
109 struct dw_spi_mmio *dwsmmio = platform_get_drvdata(pdev); 87 struct dw_spi_mmio *dwsmmio = platform_get_drvdata(pdev);
110 struct resource *mem;
111
112 clk_disable(dwsmmio->clk);
113 clk_put(dwsmmio->clk);
114 dwsmmio->clk = NULL;
115 88
89 clk_disable_unprepare(dwsmmio->clk);
116 dw_spi_remove_host(&dwsmmio->dws); 90 dw_spi_remove_host(&dwsmmio->dws);
117 iounmap(dwsmmio->dws.regs);
118 kfree(dwsmmio);
119 91
120 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
121 release_mem_region(mem->start, resource_size(mem));
122 return 0; 92 return 0;
123} 93}
124 94
diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
index 66fa9955ea14..d4603efbd9bf 100644
--- a/drivers/spi/spi-dw-pci.c
+++ b/drivers/spi/spi-dw-pci.c
@@ -43,35 +43,25 @@ static int spi_pci_probe(struct pci_dev *pdev,
43 dev_info(&pdev->dev, "found PCI SPI controller(ID: %04x:%04x)\n", 43 dev_info(&pdev->dev, "found PCI SPI controller(ID: %04x:%04x)\n",
44 pdev->vendor, pdev->device); 44 pdev->vendor, pdev->device);
45 45
46 ret = pci_enable_device(pdev); 46 ret = pcim_enable_device(pdev);
47 if (ret) 47 if (ret)
48 return ret; 48 return ret;
49 49
50 dwpci = kzalloc(sizeof(struct dw_spi_pci), GFP_KERNEL); 50 dwpci = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_pci),
51 if (!dwpci) { 51 GFP_KERNEL);
52 ret = -ENOMEM; 52 if (!dwpci)
53 goto err_disable; 53 return -ENOMEM;
54 }
55 54
56 dwpci->pdev = pdev; 55 dwpci->pdev = pdev;
57 dws = &dwpci->dws; 56 dws = &dwpci->dws;
58 57
59 /* Get basic io resource and map it */ 58 /* Get basic io resource and map it */
60 dws->paddr = pci_resource_start(pdev, pci_bar); 59 dws->paddr = pci_resource_start(pdev, pci_bar);
61 dws->iolen = pci_resource_len(pdev, pci_bar);
62 60
63 ret = pci_request_region(pdev, pci_bar, dev_name(&pdev->dev)); 61 ret = pcim_iomap_regions(pdev, 1, dev_name(&pdev->dev));
64 if (ret) 62 if (ret)
65 goto err_kfree; 63 return ret;
66
67 dws->regs = ioremap_nocache((unsigned long)dws->paddr,
68 pci_resource_len(pdev, pci_bar));
69 if (!dws->regs) {
70 ret = -ENOMEM;
71 goto err_release_reg;
72 }
73 64
74 dws->parent_dev = &pdev->dev;
75 dws->bus_num = 0; 65 dws->bus_num = 0;
76 dws->num_cs = 4; 66 dws->num_cs = 4;
77 dws->irq = pdev->irq; 67 dws->irq = pdev->irq;
@@ -83,26 +73,17 @@ static int spi_pci_probe(struct pci_dev *pdev,
83 if (pdev->device == 0x0800) { 73 if (pdev->device == 0x0800) {
84 ret = dw_spi_mid_init(dws); 74 ret = dw_spi_mid_init(dws);
85 if (ret) 75 if (ret)
86 goto err_unmap; 76 return ret;
87 } 77 }
88 78
89 ret = dw_spi_add_host(dws); 79 ret = dw_spi_add_host(&pdev->dev, dws);
90 if (ret) 80 if (ret)
91 goto err_unmap; 81 return ret;
92 82
93 /* PCI hook and SPI hook use the same drv data */ 83 /* PCI hook and SPI hook use the same drv data */
94 pci_set_drvdata(pdev, dwpci); 84 pci_set_drvdata(pdev, dwpci);
95 return 0;
96 85
97err_unmap: 86 return 0;
98 iounmap(dws->regs);
99err_release_reg:
100 pci_release_region(pdev, pci_bar);
101err_kfree:
102 kfree(dwpci);
103err_disable:
104 pci_disable_device(pdev);
105 return ret;
106} 87}
107 88
108static void spi_pci_remove(struct pci_dev *pdev) 89static void spi_pci_remove(struct pci_dev *pdev)
@@ -110,10 +91,6 @@ static void spi_pci_remove(struct pci_dev *pdev)
110 struct dw_spi_pci *dwpci = pci_get_drvdata(pdev); 91 struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
111 92
112 dw_spi_remove_host(&dwpci->dws); 93 dw_spi_remove_host(&dwpci->dws);
113 iounmap(dwpci->dws.regs);
114 pci_release_region(pdev, 0);
115 kfree(dwpci);
116 pci_disable_device(pdev);
117} 94}
118 95
119#ifdef CONFIG_PM 96#ifdef CONFIG_PM
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index b897c4adb39d..bf98d63d92b3 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -427,7 +427,6 @@ static void pump_transfers(unsigned long data)
427 dws->tx_end = dws->tx + transfer->len; 427 dws->tx_end = dws->tx + transfer->len;
428 dws->rx = transfer->rx_buf; 428 dws->rx = transfer->rx_buf;
429 dws->rx_end = dws->rx + transfer->len; 429 dws->rx_end = dws->rx + transfer->len;
430 dws->cs_change = transfer->cs_change;
431 dws->len = dws->cur_transfer->len; 430 dws->len = dws->cur_transfer->len;
432 if (chip != dws->prev_chip) 431 if (chip != dws->prev_chip)
433 cs_change = 1; 432 cs_change = 1;
@@ -620,9 +619,11 @@ static int dw_spi_setup(struct spi_device *spi)
620 /* Only alloc on first setup */ 619 /* Only alloc on first setup */
621 chip = spi_get_ctldata(spi); 620 chip = spi_get_ctldata(spi);
622 if (!chip) { 621 if (!chip) {
623 chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL); 622 chip = devm_kzalloc(&spi->dev, sizeof(struct chip_data),
623 GFP_KERNEL);
624 if (!chip) 624 if (!chip)
625 return -ENOMEM; 625 return -ENOMEM;
626 spi_set_ctldata(spi, chip);
626 } 627 }
627 628
628 /* 629 /*
@@ -667,7 +668,6 @@ static int dw_spi_setup(struct spi_device *spi)
667 | (spi->mode << SPI_MODE_OFFSET) 668 | (spi->mode << SPI_MODE_OFFSET)
668 | (chip->tmode << SPI_TMOD_OFFSET); 669 | (chip->tmode << SPI_TMOD_OFFSET);
669 670
670 spi_set_ctldata(spi, chip);
671 return 0; 671 return 0;
672} 672}
673 673
@@ -776,18 +776,16 @@ static void spi_hw_init(struct dw_spi *dws)
776 } 776 }
777} 777}
778 778
779int dw_spi_add_host(struct dw_spi *dws) 779int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
780{ 780{
781 struct spi_master *master; 781 struct spi_master *master;
782 int ret; 782 int ret;
783 783
784 BUG_ON(dws == NULL); 784 BUG_ON(dws == NULL);
785 785
786 master = spi_alloc_master(dws->parent_dev, 0); 786 master = spi_alloc_master(dev, 0);
787 if (!master) { 787 if (!master)
788 ret = -ENOMEM; 788 return -ENOMEM;
789 goto exit;
790 }
791 789
792 dws->master = master; 790 dws->master = master;
793 dws->type = SSI_MOTO_SPI; 791 dws->type = SSI_MOTO_SPI;
@@ -797,7 +795,7 @@ int dw_spi_add_host(struct dw_spi *dws)
797 snprintf(dws->name, sizeof(dws->name), "dw_spi%d", 795 snprintf(dws->name, sizeof(dws->name), "dw_spi%d",
798 dws->bus_num); 796 dws->bus_num);
799 797
800 ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, 798 ret = devm_request_irq(dev, dws->irq, dw_spi_irq, IRQF_SHARED,
801 dws->name, dws); 799 dws->name, dws);
802 if (ret < 0) { 800 if (ret < 0) {
803 dev_err(&master->dev, "can not get IRQ\n"); 801 dev_err(&master->dev, "can not get IRQ\n");
@@ -836,7 +834,7 @@ int dw_spi_add_host(struct dw_spi *dws)
836 } 834 }
837 835
838 spi_master_set_devdata(master, dws); 836 spi_master_set_devdata(master, dws);
839 ret = spi_register_master(master); 837 ret = devm_spi_register_master(dev, master);
840 if (ret) { 838 if (ret) {
841 dev_err(&master->dev, "problem registering spi master\n"); 839 dev_err(&master->dev, "problem registering spi master\n");
842 goto err_queue_alloc; 840 goto err_queue_alloc;
@@ -851,10 +849,8 @@ err_queue_alloc:
851 dws->dma_ops->dma_exit(dws); 849 dws->dma_ops->dma_exit(dws);
852err_diable_hw: 850err_diable_hw:
853 spi_enable_chip(dws, 0); 851 spi_enable_chip(dws, 0);
854 free_irq(dws->irq, dws);
855err_free_master: 852err_free_master:
856 spi_master_put(master); 853 spi_master_put(master);
857exit:
858 return ret; 854 return ret;
859} 855}
860EXPORT_SYMBOL_GPL(dw_spi_add_host); 856EXPORT_SYMBOL_GPL(dw_spi_add_host);
@@ -878,10 +874,6 @@ void dw_spi_remove_host(struct dw_spi *dws)
878 spi_enable_chip(dws, 0); 874 spi_enable_chip(dws, 0);
879 /* Disable clk */ 875 /* Disable clk */
880 spi_set_clk(dws, 0); 876 spi_set_clk(dws, 0);
881 free_irq(dws->irq, dws);
882
883 /* Disconnect from the SPI framework */
884 spi_unregister_master(dws->master);
885} 877}
886EXPORT_SYMBOL_GPL(dw_spi_remove_host); 878EXPORT_SYMBOL_GPL(dw_spi_remove_host);
887 879
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 9c57c078031e..587643dae11e 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -92,13 +92,11 @@ struct dw_spi_dma_ops {
92struct dw_spi { 92struct dw_spi {
93 struct spi_master *master; 93 struct spi_master *master;
94 struct spi_device *cur_dev; 94 struct spi_device *cur_dev;
95 struct device *parent_dev;
96 enum dw_ssi_type type; 95 enum dw_ssi_type type;
97 char name[16]; 96 char name[16];
98 97
99 void __iomem *regs; 98 void __iomem *regs;
100 unsigned long paddr; 99 unsigned long paddr;
101 u32 iolen;
102 int irq; 100 int irq;
103 u32 fifo_len; /* depth of the FIFO buffer */ 101 u32 fifo_len; /* depth of the FIFO buffer */
104 u32 max_freq; /* max bus freq supported */ 102 u32 max_freq; /* max bus freq supported */
@@ -135,7 +133,6 @@ struct dw_spi {
135 u8 n_bytes; /* current is a 1/2 bytes op */ 133 u8 n_bytes; /* current is a 1/2 bytes op */
136 u8 max_bits_per_word; /* maxim is 16b */ 134 u8 max_bits_per_word; /* maxim is 16b */
137 u32 dma_width; 135 u32 dma_width;
138 int cs_change;
139 irqreturn_t (*transfer_handler)(struct dw_spi *dws); 136 irqreturn_t (*transfer_handler)(struct dw_spi *dws);
140 void (*cs_control)(u32 command); 137 void (*cs_control)(u32 command);
141 138
@@ -231,7 +228,7 @@ struct dw_spi_chip {
231 void (*cs_control)(u32 command); 228 void (*cs_control)(u32 command);
232}; 229};
233 230
234extern int dw_spi_add_host(struct dw_spi *dws); 231extern int dw_spi_add_host(struct device *dev, struct dw_spi *dws);
235extern void dw_spi_remove_host(struct dw_spi *dws); 232extern void dw_spi_remove_host(struct dw_spi *dws);
236extern int dw_spi_suspend_host(struct dw_spi *dws); 233extern int dw_spi_suspend_host(struct dw_spi *dws);
237extern int dw_spi_resume_host(struct dw_spi *dws); 234extern int dw_spi_resume_host(struct dw_spi *dws);
diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c
index c7a74f0ef892..dd5bd468e962 100644
--- a/drivers/spi/spi-falcon.c
+++ b/drivers/spi/spi-falcon.c
@@ -433,21 +433,12 @@ static int falcon_sflash_probe(struct platform_device *pdev)
433 433
434 platform_set_drvdata(pdev, priv); 434 platform_set_drvdata(pdev, priv);
435 435
436 ret = spi_register_master(master); 436 ret = devm_spi_register_master(&pdev->dev, master);
437 if (ret) 437 if (ret)
438 spi_master_put(master); 438 spi_master_put(master);
439 return ret; 439 return ret;
440} 440}
441 441
442static int falcon_sflash_remove(struct platform_device *pdev)
443{
444 struct falcon_sflash *priv = platform_get_drvdata(pdev);
445
446 spi_unregister_master(priv->master);
447
448 return 0;
449}
450
451static const struct of_device_id falcon_sflash_match[] = { 442static const struct of_device_id falcon_sflash_match[] = {
452 { .compatible = "lantiq,sflash-falcon" }, 443 { .compatible = "lantiq,sflash-falcon" },
453 {}, 444 {},
@@ -456,7 +447,6 @@ MODULE_DEVICE_TABLE(of, falcon_sflash_match);
456 447
457static struct platform_driver falcon_sflash_driver = { 448static struct platform_driver falcon_sflash_driver = {
458 .probe = falcon_sflash_probe, 449 .probe = falcon_sflash_probe,
459 .remove = falcon_sflash_remove,
460 .driver = { 450 .driver = {
461 .name = DRV_NAME, 451 .name = DRV_NAME,
462 .owner = THIS_MODULE, 452 .owner = THIS_MODULE,
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 8641b03bdd7a..ec79f726672a 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -320,8 +320,10 @@ static void dspi_chipselect(struct spi_device *spi, int value)
320 switch (value) { 320 switch (value) {
321 case BITBANG_CS_ACTIVE: 321 case BITBANG_CS_ACTIVE:
322 pushr |= SPI_PUSHR_CONT; 322 pushr |= SPI_PUSHR_CONT;
323 break;
323 case BITBANG_CS_INACTIVE: 324 case BITBANG_CS_INACTIVE:
324 pushr &= ~SPI_PUSHR_CONT; 325 pushr &= ~SPI_PUSHR_CONT;
326 break;
325 } 327 }
326 328
327 writel(pushr, dspi->base + SPI_PUSHR); 329 writel(pushr, dspi->base + SPI_PUSHR);
@@ -373,9 +375,6 @@ static int dspi_setup(struct spi_device *spi)
373 if (!spi->max_speed_hz) 375 if (!spi->max_speed_hz)
374 return -EINVAL; 376 return -EINVAL;
375 377
376 if (!spi->bits_per_word)
377 spi->bits_per_word = 8;
378
379 return dspi_setup_transfer(spi, NULL); 378 return dspi_setup_transfer(spi, NULL);
380} 379}
381 380
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index b80f2f70fef7..a5474ef9d2a0 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -206,7 +206,8 @@ static unsigned int spi_imx_clkdiv_2(unsigned int fin,
206#define MX51_ECSPI_STAT_RR (1 << 3) 206#define MX51_ECSPI_STAT_RR (1 << 3)
207 207
208/* MX51 eCSPI */ 208/* MX51 eCSPI */
209static unsigned int mx51_ecspi_clkdiv(unsigned int fin, unsigned int fspi) 209static unsigned int mx51_ecspi_clkdiv(unsigned int fin, unsigned int fspi,
210 unsigned int *fres)
210{ 211{
211 /* 212 /*
212 * there are two 4-bit dividers, the pre-divider divides by 213 * there are two 4-bit dividers, the pre-divider divides by
@@ -234,6 +235,10 @@ static unsigned int mx51_ecspi_clkdiv(unsigned int fin, unsigned int fspi)
234 235
235 pr_debug("%s: fin: %u, fspi: %u, post: %u, pre: %u\n", 236 pr_debug("%s: fin: %u, fspi: %u, post: %u, pre: %u\n",
236 __func__, fin, fspi, post, pre); 237 __func__, fin, fspi, post, pre);
238
239 /* Resulting frequency for the SCLK line. */
240 *fres = (fin / (pre + 1)) >> post;
241
237 return (pre << MX51_ECSPI_CTRL_PREDIV_OFFSET) | 242 return (pre << MX51_ECSPI_CTRL_PREDIV_OFFSET) |
238 (post << MX51_ECSPI_CTRL_POSTDIV_OFFSET); 243 (post << MX51_ECSPI_CTRL_POSTDIV_OFFSET);
239} 244}
@@ -264,6 +269,7 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
264 struct spi_imx_config *config) 269 struct spi_imx_config *config)
265{ 270{
266 u32 ctrl = MX51_ECSPI_CTRL_ENABLE, cfg = 0; 271 u32 ctrl = MX51_ECSPI_CTRL_ENABLE, cfg = 0;
272 u32 clk = config->speed_hz, delay;
267 273
268 /* 274 /*
269 * The hardware seems to have a race condition when changing modes. The 275 * The hardware seems to have a race condition when changing modes. The
@@ -275,7 +281,7 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
275 ctrl |= MX51_ECSPI_CTRL_MODE_MASK; 281 ctrl |= MX51_ECSPI_CTRL_MODE_MASK;
276 282
277 /* set clock speed */ 283 /* set clock speed */
278 ctrl |= mx51_ecspi_clkdiv(spi_imx->spi_clk, config->speed_hz); 284 ctrl |= mx51_ecspi_clkdiv(spi_imx->spi_clk, config->speed_hz, &clk);
279 285
280 /* set chip select to use */ 286 /* set chip select to use */
281 ctrl |= MX51_ECSPI_CTRL_CS(config->cs); 287 ctrl |= MX51_ECSPI_CTRL_CS(config->cs);
@@ -297,6 +303,23 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
297 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); 303 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
298 writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG); 304 writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG);
299 305
306 /*
307 * Wait until the changes in the configuration register CONFIGREG
308 * propagate into the hardware. It takes exactly one tick of the
309 * SCLK clock, but we will wait two SCLK clock just to be sure. The
310 * effect of the delay it takes for the hardware to apply changes
311 * is noticable if the SCLK clock run very slow. In such a case, if
312 * the polarity of SCLK should be inverted, the GPIO ChipSelect might
313 * be asserted before the SCLK polarity changes, which would disrupt
314 * the SPI communication as the device on the other end would consider
315 * the change of SCLK polarity as a clock tick already.
316 */
317 delay = (2 * 1000000) / clk;
318 if (likely(delay < 10)) /* SCLK is faster than 100 kHz */
319 udelay(delay);
320 else /* SCLK is _very_ slow */
321 usleep_range(delay, delay + 10);
322
300 return 0; 323 return 0;
301} 324}
302 325
diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c
index 9602bbd8d7ea..87676587d783 100644
--- a/drivers/spi/spi-mpc512x-psc.c
+++ b/drivers/spi/spi-mpc512x-psc.c
@@ -557,7 +557,7 @@ free_master:
557 557
558static int mpc512x_psc_spi_do_remove(struct device *dev) 558static int mpc512x_psc_spi_do_remove(struct device *dev)
559{ 559{
560 struct spi_master *master = spi_master_get(dev_get_drvdata(dev)); 560 struct spi_master *master = dev_get_drvdata(dev);
561 struct mpc512x_psc_spi *mps = spi_master_get_devdata(master); 561 struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
562 562
563 clk_disable_unprepare(mps->clk_mclk); 563 clk_disable_unprepare(mps->clk_mclk);
diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c
index 73afb56c08cc..79e5aa2250c8 100644
--- a/drivers/spi/spi-mxs.c
+++ b/drivers/spi/spi-mxs.c
@@ -111,14 +111,6 @@ static int mxs_spi_setup_transfer(struct spi_device *dev,
111 return 0; 111 return 0;
112} 112}
113 113
114static int mxs_spi_setup(struct spi_device *dev)
115{
116 if (!dev->bits_per_word)
117 dev->bits_per_word = 8;
118
119 return 0;
120}
121
122static u32 mxs_spi_cs_to_reg(unsigned cs) 114static u32 mxs_spi_cs_to_reg(unsigned cs)
123{ 115{
124 u32 select = 0; 116 u32 select = 0;
@@ -502,7 +494,6 @@ static int mxs_spi_probe(struct platform_device *pdev)
502 return -ENOMEM; 494 return -ENOMEM;
503 495
504 master->transfer_one_message = mxs_spi_transfer_one; 496 master->transfer_one_message = mxs_spi_transfer_one;
505 master->setup = mxs_spi_setup;
506 master->bits_per_word_mask = SPI_BPW_MASK(8); 497 master->bits_per_word_mask = SPI_BPW_MASK(8);
507 master->mode_bits = SPI_CPOL | SPI_CPHA; 498 master->mode_bits = SPI_CPOL | SPI_CPHA;
508 master->num_chipselect = 3; 499 master->num_chipselect = 3;
@@ -565,7 +556,7 @@ static int mxs_spi_remove(struct platform_device *pdev)
565 struct mxs_spi *spi; 556 struct mxs_spi *spi;
566 struct mxs_ssp *ssp; 557 struct mxs_ssp *ssp;
567 558
568 master = spi_master_get(platform_get_drvdata(pdev)); 559 master = platform_get_drvdata(pdev);
569 spi = spi_master_get_devdata(master); 560 spi = spi_master_get_devdata(master);
570 ssp = &spi->ssp; 561 ssp = &spi->ssp;
571 562
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index cb0e1f1137ad..cbc68848789d 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -1066,6 +1066,8 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev)
1066 1066
1067 pdata->num_chipselect = 1; 1067 pdata->num_chipselect = 1;
1068 pdata->enable_dma = true; 1068 pdata->enable_dma = true;
1069 pdata->tx_chan_id = -1;
1070 pdata->rx_chan_id = -1;
1069 1071
1070 return pdata; 1072 return pdata;
1071} 1073}
@@ -1073,6 +1075,8 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev)
1073static struct acpi_device_id pxa2xx_spi_acpi_match[] = { 1075static struct acpi_device_id pxa2xx_spi_acpi_match[] = {
1074 { "INT33C0", 0 }, 1076 { "INT33C0", 0 },
1075 { "INT33C1", 0 }, 1077 { "INT33C1", 0 },
1078 { "INT3430", 0 },
1079 { "INT3431", 0 },
1076 { "80860F0E", 0 }, 1080 { "80860F0E", 0 },
1077 { }, 1081 { },
1078}; 1082};
@@ -1291,6 +1295,9 @@ static int pxa2xx_spi_resume(struct device *dev)
1291 /* Enable the SSP clock */ 1295 /* Enable the SSP clock */
1292 clk_prepare_enable(ssp->clk); 1296 clk_prepare_enable(ssp->clk);
1293 1297
1298 /* Restore LPSS private register bits */
1299 lpss_ssp_setup(drv_data);
1300
1294 /* Start the queue running */ 1301 /* Start the queue running */
1295 status = spi_master_resume(drv_data->master); 1302 status = spi_master_resume(drv_data->master);
1296 if (status != 0) { 1303 if (status != 0) {
diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index 58449ad4ad0d..d1e89bb352d8 100644
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -37,117 +37,145 @@
37#include <linux/spi/spi.h> 37#include <linux/spi/spi.h>
38#include <linux/spi/rspi.h> 38#include <linux/spi/rspi.h>
39 39
40#define RSPI_SPCR 0x00 40#define RSPI_SPCR 0x00 /* Control Register */
41#define RSPI_SSLP 0x01 41#define RSPI_SSLP 0x01 /* Slave Select Polarity Register */
42#define RSPI_SPPCR 0x02 42#define RSPI_SPPCR 0x02 /* Pin Control Register */
43#define RSPI_SPSR 0x03 43#define RSPI_SPSR 0x03 /* Status Register */
44#define RSPI_SPDR 0x04 44#define RSPI_SPDR 0x04 /* Data Register */
45#define RSPI_SPSCR 0x08 45#define RSPI_SPSCR 0x08 /* Sequence Control Register */
46#define RSPI_SPSSR 0x09 46#define RSPI_SPSSR 0x09 /* Sequence Status Register */
47#define RSPI_SPBR 0x0a 47#define RSPI_SPBR 0x0a /* Bit Rate Register */
48#define RSPI_SPDCR 0x0b 48#define RSPI_SPDCR 0x0b /* Data Control Register */
49#define RSPI_SPCKD 0x0c 49#define RSPI_SPCKD 0x0c /* Clock Delay Register */
50#define RSPI_SSLND 0x0d 50#define RSPI_SSLND 0x0d /* Slave Select Negation Delay Register */
51#define RSPI_SPND 0x0e 51#define RSPI_SPND 0x0e /* Next-Access Delay Register */
52#define RSPI_SPCR2 0x0f 52#define RSPI_SPCR2 0x0f /* Control Register 2 */
53#define RSPI_SPCMD0 0x10 53#define RSPI_SPCMD0 0x10 /* Command Register 0 */
54#define RSPI_SPCMD1 0x12 54#define RSPI_SPCMD1 0x12 /* Command Register 1 */
55#define RSPI_SPCMD2 0x14 55#define RSPI_SPCMD2 0x14 /* Command Register 2 */
56#define RSPI_SPCMD3 0x16 56#define RSPI_SPCMD3 0x16 /* Command Register 3 */
57#define RSPI_SPCMD4 0x18 57#define RSPI_SPCMD4 0x18 /* Command Register 4 */
58#define RSPI_SPCMD5 0x1a 58#define RSPI_SPCMD5 0x1a /* Command Register 5 */
59#define RSPI_SPCMD6 0x1c 59#define RSPI_SPCMD6 0x1c /* Command Register 6 */
60#define RSPI_SPCMD7 0x1e 60#define RSPI_SPCMD7 0x1e /* Command Register 7 */
61#define RSPI_SPBFCR 0x20 /* Buffer Control Register */
62#define RSPI_SPBFDR 0x22 /* Buffer Data Count Setting Register */
61 63
62/*qspi only */ 64/*qspi only */
63#define QSPI_SPBFCR 0x18 65#define QSPI_SPBFCR 0x18 /* Buffer Control Register */
64#define QSPI_SPBDCR 0x1a 66#define QSPI_SPBDCR 0x1a /* Buffer Data Count Register */
65#define QSPI_SPBMUL0 0x1c 67#define QSPI_SPBMUL0 0x1c /* Transfer Data Length Multiplier Setting Register 0 */
66#define QSPI_SPBMUL1 0x20 68#define QSPI_SPBMUL1 0x20 /* Transfer Data Length Multiplier Setting Register 1 */
67#define QSPI_SPBMUL2 0x24 69#define QSPI_SPBMUL2 0x24 /* Transfer Data Length Multiplier Setting Register 2 */
68#define QSPI_SPBMUL3 0x28 70#define QSPI_SPBMUL3 0x28 /* Transfer Data Length Multiplier Setting Register 3 */
69 71
70/* SPCR */ 72/* SPCR - Control Register */
71#define SPCR_SPRIE 0x80 73#define SPCR_SPRIE 0x80 /* Receive Interrupt Enable */
72#define SPCR_SPE 0x40 74#define SPCR_SPE 0x40 /* Function Enable */
73#define SPCR_SPTIE 0x20 75#define SPCR_SPTIE 0x20 /* Transmit Interrupt Enable */
74#define SPCR_SPEIE 0x10 76#define SPCR_SPEIE 0x10 /* Error Interrupt Enable */
75#define SPCR_MSTR 0x08 77#define SPCR_MSTR 0x08 /* Master/Slave Mode Select */
76#define SPCR_MODFEN 0x04 78#define SPCR_MODFEN 0x04 /* Mode Fault Error Detection Enable */
77#define SPCR_TXMD 0x02 79/* RSPI on SH only */
78#define SPCR_SPMS 0x01 80#define SPCR_TXMD 0x02 /* TX Only Mode (vs. Full Duplex) */
79 81#define SPCR_SPMS 0x01 /* 3-wire Mode (vs. 4-wire) */
80/* SSLP */ 82/* QSPI on R-Car M2 only */
81#define SSLP_SSL1P 0x02 83#define SPCR_WSWAP 0x02 /* Word Swap of read-data for DMAC */
82#define SSLP_SSL0P 0x01 84#define SPCR_BSWAP 0x01 /* Byte Swap of read-data for DMAC */
83 85
84/* SPPCR */ 86/* SSLP - Slave Select Polarity Register */
85#define SPPCR_MOIFE 0x20 87#define SSLP_SSL1P 0x02 /* SSL1 Signal Polarity Setting */
86#define SPPCR_MOIFV 0x10 88#define SSLP_SSL0P 0x01 /* SSL0 Signal Polarity Setting */
89
90/* SPPCR - Pin Control Register */
91#define SPPCR_MOIFE 0x20 /* MOSI Idle Value Fixing Enable */
92#define SPPCR_MOIFV 0x10 /* MOSI Idle Fixed Value */
87#define SPPCR_SPOM 0x04 93#define SPPCR_SPOM 0x04
88#define SPPCR_SPLP2 0x02 94#define SPPCR_SPLP2 0x02 /* Loopback Mode 2 (non-inverting) */
89#define SPPCR_SPLP 0x01 95#define SPPCR_SPLP 0x01 /* Loopback Mode (inverting) */
90 96
91/* SPSR */ 97#define SPPCR_IO3FV 0x04 /* Single-/Dual-SPI Mode IO3 Output Fixed Value */
92#define SPSR_SPRF 0x80 98#define SPPCR_IO2FV 0x04 /* Single-/Dual-SPI Mode IO2 Output Fixed Value */
93#define SPSR_SPTEF 0x20 99
94#define SPSR_PERF 0x08 100/* SPSR - Status Register */
95#define SPSR_MODF 0x04 101#define SPSR_SPRF 0x80 /* Receive Buffer Full Flag */
96#define SPSR_IDLNF 0x02 102#define SPSR_TEND 0x40 /* Transmit End */
97#define SPSR_OVRF 0x01 103#define SPSR_SPTEF 0x20 /* Transmit Buffer Empty Flag */
98 104#define SPSR_PERF 0x08 /* Parity Error Flag */
99/* SPSCR */ 105#define SPSR_MODF 0x04 /* Mode Fault Error Flag */
100#define SPSCR_SPSLN_MASK 0x07 106#define SPSR_IDLNF 0x02 /* RSPI Idle Flag */
101 107#define SPSR_OVRF 0x01 /* Overrun Error Flag */
102/* SPSSR */ 108
103#define SPSSR_SPECM_MASK 0x70 109/* SPSCR - Sequence Control Register */
104#define SPSSR_SPCP_MASK 0x07 110#define SPSCR_SPSLN_MASK 0x07 /* Sequence Length Specification */
105 111
106/* SPDCR */ 112/* SPSSR - Sequence Status Register */
107#define SPDCR_SPLW 0x20 113#define SPSSR_SPECM_MASK 0x70 /* Command Error Mask */
108#define SPDCR_SPRDTD 0x10 114#define SPSSR_SPCP_MASK 0x07 /* Command Pointer Mask */
115
116/* SPDCR - Data Control Register */
117#define SPDCR_TXDMY 0x80 /* Dummy Data Transmission Enable */
118#define SPDCR_SPLW1 0x40 /* Access Width Specification (RZ) */
119#define SPDCR_SPLW0 0x20 /* Access Width Specification (RZ) */
120#define SPDCR_SPLLWORD (SPDCR_SPLW1 | SPDCR_SPLW0)
121#define SPDCR_SPLWORD SPDCR_SPLW1
122#define SPDCR_SPLBYTE SPDCR_SPLW0
123#define SPDCR_SPLW 0x20 /* Access Width Specification (SH) */
124#define SPDCR_SPRDTD 0x10 /* Receive Transmit Data Select */
109#define SPDCR_SLSEL1 0x08 125#define SPDCR_SLSEL1 0x08
110#define SPDCR_SLSEL0 0x04 126#define SPDCR_SLSEL0 0x04
111#define SPDCR_SLSEL_MASK 0x0c 127#define SPDCR_SLSEL_MASK 0x0c /* SSL1 Output Select */
112#define SPDCR_SPFC1 0x02 128#define SPDCR_SPFC1 0x02
113#define SPDCR_SPFC0 0x01 129#define SPDCR_SPFC0 0x01
130#define SPDCR_SPFC_MASK 0x03 /* Frame Count Setting (1-4) */
114 131
115/* SPCKD */ 132/* SPCKD - Clock Delay Register */
116#define SPCKD_SCKDL_MASK 0x07 133#define SPCKD_SCKDL_MASK 0x07 /* Clock Delay Setting (1-8) */
117 134
118/* SSLND */ 135/* SSLND - Slave Select Negation Delay Register */
119#define SSLND_SLNDL_MASK 0x07 136#define SSLND_SLNDL_MASK 0x07 /* SSL Negation Delay Setting (1-8) */
120 137
121/* SPND */ 138/* SPND - Next-Access Delay Register */
122#define SPND_SPNDL_MASK 0x07 139#define SPND_SPNDL_MASK 0x07 /* Next-Access Delay Setting (1-8) */
123 140
124/* SPCR2 */ 141/* SPCR2 - Control Register 2 */
125#define SPCR2_PTE 0x08 142#define SPCR2_PTE 0x08 /* Parity Self-Test Enable */
126#define SPCR2_SPIE 0x04 143#define SPCR2_SPIE 0x04 /* Idle Interrupt Enable */
127#define SPCR2_SPOE 0x02 144#define SPCR2_SPOE 0x02 /* Odd Parity Enable (vs. Even) */
128#define SPCR2_SPPE 0x01 145#define SPCR2_SPPE 0x01 /* Parity Enable */
129 146
130/* SPCMDn */ 147/* SPCMDn - Command Registers */
131#define SPCMD_SCKDEN 0x8000 148#define SPCMD_SCKDEN 0x8000 /* Clock Delay Setting Enable */
132#define SPCMD_SLNDEN 0x4000 149#define SPCMD_SLNDEN 0x4000 /* SSL Negation Delay Setting Enable */
133#define SPCMD_SPNDEN 0x2000 150#define SPCMD_SPNDEN 0x2000 /* Next-Access Delay Enable */
134#define SPCMD_LSBF 0x1000 151#define SPCMD_LSBF 0x1000 /* LSB First */
135#define SPCMD_SPB_MASK 0x0f00 152#define SPCMD_SPB_MASK 0x0f00 /* Data Length Setting */
136#define SPCMD_SPB_8_TO_16(bit) (((bit - 1) << 8) & SPCMD_SPB_MASK) 153#define SPCMD_SPB_8_TO_16(bit) (((bit - 1) << 8) & SPCMD_SPB_MASK)
137#define SPCMD_SPB_8BIT 0x0000 /* qspi only */ 154#define SPCMD_SPB_8BIT 0x0000 /* qspi only */
138#define SPCMD_SPB_16BIT 0x0100 155#define SPCMD_SPB_16BIT 0x0100
139#define SPCMD_SPB_20BIT 0x0000 156#define SPCMD_SPB_20BIT 0x0000
140#define SPCMD_SPB_24BIT 0x0100 157#define SPCMD_SPB_24BIT 0x0100
141#define SPCMD_SPB_32BIT 0x0200 158#define SPCMD_SPB_32BIT 0x0200
142#define SPCMD_SSLKP 0x0080 159#define SPCMD_SSLKP 0x0080 /* SSL Signal Level Keeping */
143#define SPCMD_SSLA_MASK 0x0030 160#define SPCMD_SPIMOD_MASK 0x0060 /* SPI Operating Mode (QSPI only) */
144#define SPCMD_BRDV_MASK 0x000c 161#define SPCMD_SPIMOD1 0x0040
145#define SPCMD_CPOL 0x0002 162#define SPCMD_SPIMOD0 0x0020
146#define SPCMD_CPHA 0x0001 163#define SPCMD_SPIMOD_SINGLE 0
147 164#define SPCMD_SPIMOD_DUAL SPCMD_SPIMOD0
148/* SPBFCR */ 165#define SPCMD_SPIMOD_QUAD SPCMD_SPIMOD1
149#define SPBFCR_TXRST 0x80 /* qspi only */ 166#define SPCMD_SPRW 0x0010 /* SPI Read/Write Access (Dual/Quad) */
150#define SPBFCR_RXRST 0x40 /* qspi only */ 167#define SPCMD_SSLA_MASK 0x0030 /* SSL Assert Signal Setting (RSPI) */
168#define SPCMD_BRDV_MASK 0x000c /* Bit Rate Division Setting */
169#define SPCMD_CPOL 0x0002 /* Clock Polarity Setting */
170#define SPCMD_CPHA 0x0001 /* Clock Phase Setting */
171
172/* SPBFCR - Buffer Control Register */
173#define SPBFCR_TXRST 0x80 /* Transmit Buffer Data Reset (qspi only) */
174#define SPBFCR_RXRST 0x40 /* Receive Buffer Data Reset (qspi only) */
175#define SPBFCR_TXTRG_MASK 0x30 /* Transmit Buffer Data Triggering Number */
176#define SPBFCR_RXTRG_MASK 0x07 /* Receive Buffer Data Triggering Number */
177
178#define DUMMY_DATA 0x00
151 179
152struct rspi_data { 180struct rspi_data {
153 void __iomem *addr; 181 void __iomem *addr;
@@ -158,7 +186,8 @@ struct rspi_data {
158 wait_queue_head_t wait; 186 wait_queue_head_t wait;
159 spinlock_t lock; 187 spinlock_t lock;
160 struct clk *clk; 188 struct clk *clk;
161 unsigned char spsr; 189 u8 spsr;
190 u16 spcmd;
162 const struct spi_ops *ops; 191 const struct spi_ops *ops;
163 192
164 /* for dmaengine */ 193 /* for dmaengine */
@@ -170,34 +199,35 @@ struct rspi_data {
170 unsigned dma_callbacked:1; 199 unsigned dma_callbacked:1;
171}; 200};
172 201
173static void rspi_write8(struct rspi_data *rspi, u8 data, u16 offset) 202static void rspi_write8(const struct rspi_data *rspi, u8 data, u16 offset)
174{ 203{
175 iowrite8(data, rspi->addr + offset); 204 iowrite8(data, rspi->addr + offset);
176} 205}
177 206
178static void rspi_write16(struct rspi_data *rspi, u16 data, u16 offset) 207static void rspi_write16(const struct rspi_data *rspi, u16 data, u16 offset)
179{ 208{
180 iowrite16(data, rspi->addr + offset); 209 iowrite16(data, rspi->addr + offset);
181} 210}
182 211
183static void rspi_write32(struct rspi_data *rspi, u32 data, u16 offset) 212static void rspi_write32(const struct rspi_data *rspi, u32 data, u16 offset)
184{ 213{
185 iowrite32(data, rspi->addr + offset); 214 iowrite32(data, rspi->addr + offset);
186} 215}
187 216
188static u8 rspi_read8(struct rspi_data *rspi, u16 offset) 217static u8 rspi_read8(const struct rspi_data *rspi, u16 offset)
189{ 218{
190 return ioread8(rspi->addr + offset); 219 return ioread8(rspi->addr + offset);
191} 220}
192 221
193static u16 rspi_read16(struct rspi_data *rspi, u16 offset) 222static u16 rspi_read16(const struct rspi_data *rspi, u16 offset)
194{ 223{
195 return ioread16(rspi->addr + offset); 224 return ioread16(rspi->addr + offset);
196} 225}
197 226
198/* optional functions */ 227/* optional functions */
199struct spi_ops { 228struct spi_ops {
200 int (*set_config_register)(struct rspi_data *rspi, int access_size); 229 int (*set_config_register)(const struct rspi_data *rspi,
230 int access_size);
201 int (*send_pio)(struct rspi_data *rspi, struct spi_message *mesg, 231 int (*send_pio)(struct rspi_data *rspi, struct spi_message *mesg,
202 struct spi_transfer *t); 232 struct spi_transfer *t);
203 int (*receive_pio)(struct rspi_data *rspi, struct spi_message *mesg, 233 int (*receive_pio)(struct rspi_data *rspi, struct spi_message *mesg,
@@ -208,7 +238,8 @@ struct spi_ops {
208/* 238/*
209 * functions for RSPI 239 * functions for RSPI
210 */ 240 */
211static int rspi_set_config_register(struct rspi_data *rspi, int access_size) 241static int rspi_set_config_register(const struct rspi_data *rspi,
242 int access_size)
212{ 243{
213 int spbr; 244 int spbr;
214 245
@@ -231,7 +262,7 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
231 rspi_write8(rspi, 0x00, RSPI_SPCR2); 262 rspi_write8(rspi, 0x00, RSPI_SPCR2);
232 263
233 /* Sets SPCMD */ 264 /* Sets SPCMD */
234 rspi_write16(rspi, SPCMD_SPB_8_TO_16(access_size) | SPCMD_SSLKP, 265 rspi_write16(rspi, SPCMD_SPB_8_TO_16(access_size) | rspi->spcmd,
235 RSPI_SPCMD0); 266 RSPI_SPCMD0);
236 267
237 /* Sets RSPI mode */ 268 /* Sets RSPI mode */
@@ -243,7 +274,8 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
243/* 274/*
244 * functions for QSPI 275 * functions for QSPI
245 */ 276 */
246static int qspi_set_config_register(struct rspi_data *rspi, int access_size) 277static int qspi_set_config_register(const struct rspi_data *rspi,
278 int access_size)
247{ 279{
248 u16 spcmd; 280 u16 spcmd;
249 int spbr; 281 int spbr;
@@ -268,10 +300,10 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
268 spcmd = SPCMD_SPB_8BIT; 300 spcmd = SPCMD_SPB_8BIT;
269 else if (access_size == 16) 301 else if (access_size == 16)
270 spcmd = SPCMD_SPB_16BIT; 302 spcmd = SPCMD_SPB_16BIT;
271 else if (access_size == 32) 303 else
272 spcmd = SPCMD_SPB_32BIT; 304 spcmd = SPCMD_SPB_32BIT;
273 305
274 spcmd |= SPCMD_SCKDEN | SPCMD_SLNDEN | SPCMD_SSLKP | SPCMD_SPNDEN; 306 spcmd |= SPCMD_SCKDEN | SPCMD_SLNDEN | rspi->spcmd | SPCMD_SPNDEN;
275 307
276 /* Resets transfer data length */ 308 /* Resets transfer data length */
277 rspi_write32(rspi, 0, QSPI_SPBMUL0); 309 rspi_write32(rspi, 0, QSPI_SPBMUL0);
@@ -292,12 +324,12 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
292 324
293#define set_config_register(spi, n) spi->ops->set_config_register(spi, n) 325#define set_config_register(spi, n) spi->ops->set_config_register(spi, n)
294 326
295static void rspi_enable_irq(struct rspi_data *rspi, u8 enable) 327static void rspi_enable_irq(const struct rspi_data *rspi, u8 enable)
296{ 328{
297 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | enable, RSPI_SPCR); 329 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | enable, RSPI_SPCR);
298} 330}
299 331
300static void rspi_disable_irq(struct rspi_data *rspi, u8 disable) 332static void rspi_disable_irq(const struct rspi_data *rspi, u8 disable)
301{ 333{
302 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~disable, RSPI_SPCR); 334 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~disable, RSPI_SPCR);
303} 335}
@@ -316,12 +348,12 @@ static int rspi_wait_for_interrupt(struct rspi_data *rspi, u8 wait_mask,
316 return 0; 348 return 0;
317} 349}
318 350
319static void rspi_assert_ssl(struct rspi_data *rspi) 351static void rspi_assert_ssl(const struct rspi_data *rspi)
320{ 352{
321 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | SPCR_SPE, RSPI_SPCR); 353 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | SPCR_SPE, RSPI_SPCR);
322} 354}
323 355
324static void rspi_negate_ssl(struct rspi_data *rspi) 356static void rspi_negate_ssl(const struct rspi_data *rspi)
325{ 357{
326 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~SPCR_SPE, RSPI_SPCR); 358 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~SPCR_SPE, RSPI_SPCR);
327} 359}
@@ -330,9 +362,7 @@ static int rspi_send_pio(struct rspi_data *rspi, struct spi_message *mesg,
330 struct spi_transfer *t) 362 struct spi_transfer *t)
331{ 363{
332 int remain = t->len; 364 int remain = t->len;
333 u8 *data; 365 const u8 *data = t->tx_buf;
334
335 data = (u8 *)t->tx_buf;
336 while (remain > 0) { 366 while (remain > 0) {
337 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | SPCR_TXMD, 367 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | SPCR_TXMD,
338 RSPI_SPCR); 368 RSPI_SPCR);
@@ -348,7 +378,7 @@ static int rspi_send_pio(struct rspi_data *rspi, struct spi_message *mesg,
348 remain--; 378 remain--;
349 } 379 }
350 380
351 /* Waiting for the last transmition */ 381 /* Waiting for the last transmission */
352 rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE); 382 rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE);
353 383
354 return 0; 384 return 0;
@@ -358,12 +388,11 @@ static int qspi_send_pio(struct rspi_data *rspi, struct spi_message *mesg,
358 struct spi_transfer *t) 388 struct spi_transfer *t)
359{ 389{
360 int remain = t->len; 390 int remain = t->len;
361 u8 *data; 391 const u8 *data = t->tx_buf;
362 392
363 rspi_write8(rspi, SPBFCR_TXRST, QSPI_SPBFCR); 393 rspi_write8(rspi, SPBFCR_TXRST, QSPI_SPBFCR);
364 rspi_write8(rspi, 0x00, QSPI_SPBFCR); 394 rspi_write8(rspi, 0x00, QSPI_SPBFCR);
365 395
366 data = (u8 *)t->tx_buf;
367 while (remain > 0) { 396 while (remain > 0) {
368 397
369 if (rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE) < 0) { 398 if (rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE) < 0) {
@@ -383,7 +412,7 @@ static int qspi_send_pio(struct rspi_data *rspi, struct spi_message *mesg,
383 remain--; 412 remain--;
384 } 413 }
385 414
386 /* Waiting for the last transmition */ 415 /* Waiting for the last transmission */
387 rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE); 416 rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE);
388 417
389 return 0; 418 return 0;
@@ -399,8 +428,8 @@ static void rspi_dma_complete(void *arg)
399 wake_up_interruptible(&rspi->wait); 428 wake_up_interruptible(&rspi->wait);
400} 429}
401 430
402static int rspi_dma_map_sg(struct scatterlist *sg, void *buf, unsigned len, 431static int rspi_dma_map_sg(struct scatterlist *sg, const void *buf,
403 struct dma_chan *chan, 432 unsigned len, struct dma_chan *chan,
404 enum dma_transfer_direction dir) 433 enum dma_transfer_direction dir)
405{ 434{
406 sg_init_table(sg, 1); 435 sg_init_table(sg, 1);
@@ -440,12 +469,13 @@ static void rspi_memory_from_8bit(void *buf, const void *data, unsigned len)
440static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t) 469static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
441{ 470{
442 struct scatterlist sg; 471 struct scatterlist sg;
443 void *buf = NULL; 472 const void *buf = NULL;
444 struct dma_async_tx_descriptor *desc; 473 struct dma_async_tx_descriptor *desc;
445 unsigned len; 474 unsigned len;
446 int ret = 0; 475 int ret = 0;
447 476
448 if (rspi->dma_width_16bit) { 477 if (rspi->dma_width_16bit) {
478 void *tmp;
449 /* 479 /*
450 * If DMAC bus width is 16-bit, the driver allocates a dummy 480 * If DMAC bus width is 16-bit, the driver allocates a dummy
451 * buffer. And, the driver converts original data into the 481 * buffer. And, the driver converts original data into the
@@ -454,13 +484,14 @@ static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
454 * DMAC data: 1st byte, dummy, 2nd byte, dummy ... 484 * DMAC data: 1st byte, dummy, 2nd byte, dummy ...
455 */ 485 */
456 len = t->len * 2; 486 len = t->len * 2;
457 buf = kmalloc(len, GFP_KERNEL); 487 tmp = kmalloc(len, GFP_KERNEL);
458 if (!buf) 488 if (!tmp)
459 return -ENOMEM; 489 return -ENOMEM;
460 rspi_memory_to_8bit(buf, t->tx_buf, t->len); 490 rspi_memory_to_8bit(tmp, t->tx_buf, t->len);
491 buf = tmp;
461 } else { 492 } else {
462 len = t->len; 493 len = t->len;
463 buf = (void *)t->tx_buf; 494 buf = t->tx_buf;
464 } 495 }
465 496
466 if (!rspi_dma_map_sg(&sg, buf, len, rspi->chan_tx, DMA_TO_DEVICE)) { 497 if (!rspi_dma_map_sg(&sg, buf, len, rspi->chan_tx, DMA_TO_DEVICE)) {
@@ -508,9 +539,9 @@ end_nomap:
508 return ret; 539 return ret;
509} 540}
510 541
511static void rspi_receive_init(struct rspi_data *rspi) 542static void rspi_receive_init(const struct rspi_data *rspi)
512{ 543{
513 unsigned char spsr; 544 u8 spsr;
514 545
515 spsr = rspi_read8(rspi, RSPI_SPSR); 546 spsr = rspi_read8(rspi, RSPI_SPSR);
516 if (spsr & SPSR_SPRF) 547 if (spsr & SPSR_SPRF)
@@ -528,7 +559,7 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
528 559
529 rspi_receive_init(rspi); 560 rspi_receive_init(rspi);
530 561
531 data = (u8 *)t->rx_buf; 562 data = t->rx_buf;
532 while (remain > 0) { 563 while (remain > 0) {
533 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~SPCR_TXMD, 564 rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~SPCR_TXMD,
534 RSPI_SPCR); 565 RSPI_SPCR);
@@ -539,7 +570,7 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
539 return -ETIMEDOUT; 570 return -ETIMEDOUT;
540 } 571 }
541 /* dummy write for generate clock */ 572 /* dummy write for generate clock */
542 rspi_write16(rspi, 0x00, RSPI_SPDR); 573 rspi_write16(rspi, DUMMY_DATA, RSPI_SPDR);
543 574
544 if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) { 575 if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) {
545 dev_err(&rspi->master->dev, 576 dev_err(&rspi->master->dev,
@@ -556,9 +587,9 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
556 return 0; 587 return 0;
557} 588}
558 589
559static void qspi_receive_init(struct rspi_data *rspi) 590static void qspi_receive_init(const struct rspi_data *rspi)
560{ 591{
561 unsigned char spsr; 592 u8 spsr;
562 593
563 spsr = rspi_read8(rspi, RSPI_SPSR); 594 spsr = rspi_read8(rspi, RSPI_SPSR);
564 if (spsr & SPSR_SPRF) 595 if (spsr & SPSR_SPRF)
@@ -575,7 +606,7 @@ static int qspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
575 606
576 qspi_receive_init(rspi); 607 qspi_receive_init(rspi);
577 608
578 data = (u8 *)t->rx_buf; 609 data = t->rx_buf;
579 while (remain > 0) { 610 while (remain > 0) {
580 611
581 if (rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE) < 0) { 612 if (rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE) < 0) {
@@ -584,7 +615,7 @@ static int qspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
584 return -ETIMEDOUT; 615 return -ETIMEDOUT;
585 } 616 }
586 /* dummy write for generate clock */ 617 /* dummy write for generate clock */
587 rspi_write8(rspi, 0x00, RSPI_SPDR); 618 rspi_write8(rspi, DUMMY_DATA, RSPI_SPDR);
588 619
589 if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) { 620 if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) {
590 dev_err(&rspi->master->dev, 621 dev_err(&rspi->master->dev,
@@ -704,7 +735,7 @@ end_nomap:
704 return ret; 735 return ret;
705} 736}
706 737
707static int rspi_is_dma(struct rspi_data *rspi, struct spi_transfer *t) 738static int rspi_is_dma(const struct rspi_data *rspi, struct spi_transfer *t)
708{ 739{
709 if (t->tx_buf && rspi->chan_tx) 740 if (t->tx_buf && rspi->chan_tx)
710 return 1; 741 return 1;
@@ -771,10 +802,14 @@ static int rspi_setup(struct spi_device *spi)
771{ 802{
772 struct rspi_data *rspi = spi_master_get_devdata(spi->master); 803 struct rspi_data *rspi = spi_master_get_devdata(spi->master);
773 804
774 if (!spi->bits_per_word)
775 spi->bits_per_word = 8;
776 rspi->max_speed_hz = spi->max_speed_hz; 805 rspi->max_speed_hz = spi->max_speed_hz;
777 806
807 rspi->spcmd = SPCMD_SSLKP;
808 if (spi->mode & SPI_CPOL)
809 rspi->spcmd |= SPCMD_CPOL;
810 if (spi->mode & SPI_CPHA)
811 rspi->spcmd |= SPCMD_CPHA;
812
778 set_config_register(rspi, 8); 813 set_config_register(rspi, 8);
779 814
780 return 0; 815 return 0;
@@ -802,10 +837,10 @@ static void rspi_cleanup(struct spi_device *spi)
802 837
803static irqreturn_t rspi_irq(int irq, void *_sr) 838static irqreturn_t rspi_irq(int irq, void *_sr)
804{ 839{
805 struct rspi_data *rspi = (struct rspi_data *)_sr; 840 struct rspi_data *rspi = _sr;
806 unsigned long spsr; 841 u8 spsr;
807 irqreturn_t ret = IRQ_NONE; 842 irqreturn_t ret = IRQ_NONE;
808 unsigned char disable_irq = 0; 843 u8 disable_irq = 0;
809 844
810 rspi->spsr = spsr = rspi_read8(rspi, RSPI_SPSR); 845 rspi->spsr = spsr = rspi_read8(rspi, RSPI_SPSR);
811 if (spsr & SPSR_SPRF) 846 if (spsr & SPSR_SPRF)
@@ -825,7 +860,7 @@ static irqreturn_t rspi_irq(int irq, void *_sr)
825static int rspi_request_dma(struct rspi_data *rspi, 860static int rspi_request_dma(struct rspi_data *rspi,
826 struct platform_device *pdev) 861 struct platform_device *pdev)
827{ 862{
828 struct rspi_plat_data *rspi_pd = dev_get_platdata(&pdev->dev); 863 const struct rspi_plat_data *rspi_pd = dev_get_platdata(&pdev->dev);
829 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 864 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
830 dma_cap_mask_t mask; 865 dma_cap_mask_t mask;
831 struct dma_slave_config cfg; 866 struct dma_slave_config cfg;
@@ -885,14 +920,10 @@ static void rspi_release_dma(struct rspi_data *rspi)
885 920
886static int rspi_remove(struct platform_device *pdev) 921static int rspi_remove(struct platform_device *pdev)
887{ 922{
888 struct rspi_data *rspi = spi_master_get(platform_get_drvdata(pdev)); 923 struct rspi_data *rspi = platform_get_drvdata(pdev);
889 924
890 spi_unregister_master(rspi->master);
891 rspi_release_dma(rspi); 925 rspi_release_dma(rspi);
892 free_irq(platform_get_irq(pdev, 0), rspi); 926 clk_disable(rspi->clk);
893 clk_put(rspi->clk);
894 iounmap(rspi->addr);
895 spi_master_put(rspi->master);
896 927
897 return 0; 928 return 0;
898} 929}
@@ -904,7 +935,7 @@ static int rspi_probe(struct platform_device *pdev)
904 struct rspi_data *rspi; 935 struct rspi_data *rspi;
905 int ret, irq; 936 int ret, irq;
906 char clk_name[16]; 937 char clk_name[16];
907 struct rspi_plat_data *rspi_pd = pdev->dev.platform_data; 938 const struct rspi_plat_data *rspi_pd = dev_get_platdata(&pdev->dev);
908 const struct spi_ops *ops; 939 const struct spi_ops *ops;
909 const struct platform_device_id *id_entry = pdev->id_entry; 940 const struct platform_device_id *id_entry = pdev->id_entry;
910 941
@@ -914,12 +945,6 @@ static int rspi_probe(struct platform_device *pdev)
914 dev_err(&pdev->dev, "there is no set_config_register\n"); 945 dev_err(&pdev->dev, "there is no set_config_register\n");
915 return -ENODEV; 946 return -ENODEV;
916 } 947 }
917 /* get base addr */
918 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
919 if (unlikely(res == NULL)) {
920 dev_err(&pdev->dev, "invalid resource\n");
921 return -EINVAL;
922 }
923 948
924 irq = platform_get_irq(pdev, 0); 949 irq = platform_get_irq(pdev, 0);
925 if (irq < 0) { 950 if (irq < 0) {
@@ -937,19 +962,20 @@ static int rspi_probe(struct platform_device *pdev)
937 platform_set_drvdata(pdev, rspi); 962 platform_set_drvdata(pdev, rspi);
938 rspi->ops = ops; 963 rspi->ops = ops;
939 rspi->master = master; 964 rspi->master = master;
940 rspi->addr = ioremap(res->start, resource_size(res)); 965
941 if (rspi->addr == NULL) { 966 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
942 dev_err(&pdev->dev, "ioremap error.\n"); 967 rspi->addr = devm_ioremap_resource(&pdev->dev, res);
943 ret = -ENOMEM; 968 if (IS_ERR(rspi->addr)) {
969 ret = PTR_ERR(rspi->addr);
944 goto error1; 970 goto error1;
945 } 971 }
946 972
947 snprintf(clk_name, sizeof(clk_name), "%s%d", id_entry->name, pdev->id); 973 snprintf(clk_name, sizeof(clk_name), "%s%d", id_entry->name, pdev->id);
948 rspi->clk = clk_get(&pdev->dev, clk_name); 974 rspi->clk = devm_clk_get(&pdev->dev, clk_name);
949 if (IS_ERR(rspi->clk)) { 975 if (IS_ERR(rspi->clk)) {
950 dev_err(&pdev->dev, "cannot get clock\n"); 976 dev_err(&pdev->dev, "cannot get clock\n");
951 ret = PTR_ERR(rspi->clk); 977 ret = PTR_ERR(rspi->clk);
952 goto error2; 978 goto error1;
953 } 979 }
954 clk_enable(rspi->clk); 980 clk_enable(rspi->clk);
955 981
@@ -966,37 +992,36 @@ static int rspi_probe(struct platform_device *pdev)
966 master->setup = rspi_setup; 992 master->setup = rspi_setup;
967 master->transfer = rspi_transfer; 993 master->transfer = rspi_transfer;
968 master->cleanup = rspi_cleanup; 994 master->cleanup = rspi_cleanup;
995 master->mode_bits = SPI_CPHA | SPI_CPOL;
969 996
970 ret = request_irq(irq, rspi_irq, 0, dev_name(&pdev->dev), rspi); 997 ret = devm_request_irq(&pdev->dev, irq, rspi_irq, 0,
998 dev_name(&pdev->dev), rspi);
971 if (ret < 0) { 999 if (ret < 0) {
972 dev_err(&pdev->dev, "request_irq error\n"); 1000 dev_err(&pdev->dev, "request_irq error\n");
973 goto error3; 1001 goto error2;
974 } 1002 }
975 1003
976 rspi->irq = irq; 1004 rspi->irq = irq;
977 ret = rspi_request_dma(rspi, pdev); 1005 ret = rspi_request_dma(rspi, pdev);
978 if (ret < 0) { 1006 if (ret < 0) {
979 dev_err(&pdev->dev, "rspi_request_dma failed.\n"); 1007 dev_err(&pdev->dev, "rspi_request_dma failed.\n");
980 goto error4; 1008 goto error3;
981 } 1009 }
982 1010
983 ret = spi_register_master(master); 1011 ret = devm_spi_register_master(&pdev->dev, master);
984 if (ret < 0) { 1012 if (ret < 0) {
985 dev_err(&pdev->dev, "spi_register_master error.\n"); 1013 dev_err(&pdev->dev, "spi_register_master error.\n");
986 goto error4; 1014 goto error3;
987 } 1015 }
988 1016
989 dev_info(&pdev->dev, "probed\n"); 1017 dev_info(&pdev->dev, "probed\n");
990 1018
991 return 0; 1019 return 0;
992 1020
993error4:
994 rspi_release_dma(rspi);
995 free_irq(irq, rspi);
996error3: 1021error3:
997 clk_put(rspi->clk); 1022 rspi_release_dma(rspi);
998error2: 1023error2:
999 iounmap(rspi->addr); 1024 clk_disable(rspi->clk);
1000error1: 1025error1:
1001 spi_master_put(master); 1026 spi_master_put(master);
1002 1027
diff --git a/drivers/spi/spi-sc18is602.c b/drivers/spi/spi-sc18is602.c
index 9eda21d739c6..1edffed9e098 100644
--- a/drivers/spi/spi-sc18is602.c
+++ b/drivers/spi/spi-sc18is602.c
@@ -254,9 +254,6 @@ error:
254 254
255static int sc18is602_setup(struct spi_device *spi) 255static int sc18is602_setup(struct spi_device *spi)
256{ 256{
257 if (!spi->bits_per_word)
258 spi->bits_per_word = 8;
259
260 if (spi->mode & ~(SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST)) 257 if (spi->mode & ~(SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST))
261 return -EINVAL; 258 return -EINVAL;
262 259
@@ -319,7 +316,7 @@ static int sc18is602_probe(struct i2c_client *client,
319 master->transfer_one_message = sc18is602_transfer_one; 316 master->transfer_one_message = sc18is602_transfer_one;
320 master->dev.of_node = np; 317 master->dev.of_node = np;
321 318
322 error = spi_register_master(master); 319 error = devm_spi_register_master(dev, master);
323 if (error) 320 if (error)
324 goto error_reg; 321 goto error_reg;
325 322
@@ -330,16 +327,6 @@ error_reg:
330 return error; 327 return error;
331} 328}
332 329
333static int sc18is602_remove(struct i2c_client *client)
334{
335 struct sc18is602 *hw = i2c_get_clientdata(client);
336 struct spi_master *master = hw->master;
337
338 spi_unregister_master(master);
339
340 return 0;
341}
342
343static const struct i2c_device_id sc18is602_id[] = { 330static const struct i2c_device_id sc18is602_id[] = {
344 { "sc18is602", sc18is602 }, 331 { "sc18is602", sc18is602 },
345 { "sc18is602b", sc18is602b }, 332 { "sc18is602b", sc18is602b },
@@ -353,7 +340,6 @@ static struct i2c_driver sc18is602_driver = {
353 .name = "sc18is602", 340 .name = "sc18is602",
354 }, 341 },
355 .probe = sc18is602_probe, 342 .probe = sc18is602_probe,
356 .remove = sc18is602_remove,
357 .id_table = sc18is602_id, 343 .id_table = sc18is602_id,
358}; 344};
359 345
diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c
index 292567ab4c6c..40179d201966 100644
--- a/drivers/spi/spi-sh-hspi.c
+++ b/drivers/spi/spi-sh-hspi.c
@@ -353,4 +353,4 @@ module_platform_driver(hspi_driver);
353MODULE_DESCRIPTION("SuperH HSPI bus driver"); 353MODULE_DESCRIPTION("SuperH HSPI bus driver");
354MODULE_LICENSE("GPL"); 354MODULE_LICENSE("GPL");
355MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>"); 355MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
356MODULE_ALIAS("platform:sh_spi"); 356MODULE_ALIAS("platform:sh-hspi");
diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
index c74298cf70e2..ac8795f2e700 100644
--- a/drivers/spi/spi-sh-msiof.c
+++ b/drivers/spi/spi-sh-msiof.c
@@ -152,7 +152,7 @@ static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p,
152 size_t k; 152 size_t k;
153 153
154 if (!WARN_ON(!spi_hz || !parent_rate)) 154 if (!WARN_ON(!spi_hz || !parent_rate))
155 div = parent_rate / spi_hz; 155 div = DIV_ROUND_UP(parent_rate, spi_hz);
156 156
157 /* TODO: make more fine grained */ 157 /* TODO: make more fine grained */
158 158
diff --git a/drivers/spi/spi-sh.c b/drivers/spi/spi-sh.c
index c120a70094f2..86a17d60a68c 100644
--- a/drivers/spi/spi-sh.c
+++ b/drivers/spi/spi-sh.c
@@ -358,9 +358,6 @@ static int spi_sh_setup(struct spi_device *spi)
358{ 358{
359 struct spi_sh_data *ss = spi_master_get_devdata(spi->master); 359 struct spi_sh_data *ss = spi_master_get_devdata(spi->master);
360 360
361 if (!spi->bits_per_word)
362 spi->bits_per_word = 8;
363
364 pr_debug("%s: enter\n", __func__); 361 pr_debug("%s: enter\n", __func__);
365 362
366 spi_sh_write(ss, 0xfe, SPI_SH_CR1); /* SPI sycle stop */ 363 spi_sh_write(ss, 0xfe, SPI_SH_CR1); /* SPI sycle stop */
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index ed5e501c4652..e430689c3837 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -536,16 +536,9 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
536 536
537static int spi_sirfsoc_setup(struct spi_device *spi) 537static int spi_sirfsoc_setup(struct spi_device *spi)
538{ 538{
539 struct sirfsoc_spi *sspi;
540
541 if (!spi->max_speed_hz) 539 if (!spi->max_speed_hz)
542 return -EINVAL; 540 return -EINVAL;
543 541
544 sspi = spi_master_get_devdata(spi->master);
545
546 if (!spi->bits_per_word)
547 spi->bits_per_word = 8;
548
549 return spi_sirfsoc_setup_transfer(spi, NULL); 542 return spi_sirfsoc_setup_transfer(spi, NULL);
550} 543}
551 544
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 0b71270fbf67..286cf8d6764b 100644
--- a/drivers/spi/spi-ti-qspi.c
+++ b/drivers/spi/spi-ti-qspi.c
@@ -161,7 +161,7 @@ static int ti_qspi_setup(struct spi_device *spi)
161 qspi->spi_max_frequency, clk_div); 161 qspi->spi_max_frequency, clk_div);
162 162
163 ret = pm_runtime_get_sync(qspi->dev); 163 ret = pm_runtime_get_sync(qspi->dev);
164 if (ret) { 164 if (ret < 0) {
165 dev_err(qspi->dev, "pm_runtime_get_sync() failed\n"); 165 dev_err(qspi->dev, "pm_runtime_get_sync() failed\n");
166 return ret; 166 return ret;
167 } 167 }
@@ -417,10 +417,8 @@ out:
417static int ti_qspi_runtime_resume(struct device *dev) 417static int ti_qspi_runtime_resume(struct device *dev)
418{ 418{
419 struct ti_qspi *qspi; 419 struct ti_qspi *qspi;
420 struct spi_master *master;
421 420
422 master = dev_get_drvdata(dev); 421 qspi = dev_get_drvdata(dev);
423 qspi = spi_master_get_devdata(master);
424 ti_qspi_restore_ctx(qspi); 422 ti_qspi_restore_ctx(qspi);
425 423
426 return 0; 424 return 0;
@@ -459,11 +457,10 @@ static int ti_qspi_probe(struct platform_device *pdev)
459 if (!of_property_read_u32(np, "num-cs", &num_cs)) 457 if (!of_property_read_u32(np, "num-cs", &num_cs))
460 master->num_chipselect = num_cs; 458 master->num_chipselect = num_cs;
461 459
462 platform_set_drvdata(pdev, master);
463
464 qspi = spi_master_get_devdata(master); 460 qspi = spi_master_get_devdata(master);
465 qspi->master = master; 461 qspi->master = master;
466 qspi->dev = &pdev->dev; 462 qspi->dev = &pdev->dev;
463 platform_set_drvdata(pdev, qspi);
467 464
468 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 465 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
469 466
@@ -517,10 +514,20 @@ free_master:
517 514
518static int ti_qspi_remove(struct platform_device *pdev) 515static int ti_qspi_remove(struct platform_device *pdev)
519{ 516{
520 struct ti_qspi *qspi = platform_get_drvdata(pdev); 517 struct ti_qspi *qspi = platform_get_drvdata(pdev);
518 int ret;
519
520 ret = pm_runtime_get_sync(qspi->dev);
521 if (ret < 0) {
522 dev_err(qspi->dev, "pm_runtime_get_sync() failed\n");
523 return ret;
524 }
521 525
522 ti_qspi_write(qspi, QSPI_WC_INT_DISABLE, QSPI_INTR_ENABLE_CLEAR_REG); 526 ti_qspi_write(qspi, QSPI_WC_INT_DISABLE, QSPI_INTR_ENABLE_CLEAR_REG);
523 527
528 pm_runtime_put(qspi->dev);
529 pm_runtime_disable(&pdev->dev);
530
524 return 0; 531 return 0;
525} 532}
526 533
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
index 446131308acb..9322de9e13fb 100644
--- a/drivers/spi/spi-topcliff-pch.c
+++ b/drivers/spi/spi-topcliff-pch.c
@@ -466,12 +466,6 @@ static void pch_spi_reset(struct spi_master *master)
466 466
467static int pch_spi_setup(struct spi_device *pspi) 467static int pch_spi_setup(struct spi_device *pspi)
468{ 468{
469 /* check bits per word */
470 if (pspi->bits_per_word == 0) {
471 pspi->bits_per_word = 8;
472 dev_dbg(&pspi->dev, "%s 8 bits per word\n", __func__);
473 }
474
475 /* Check baud rate setting */ 469 /* Check baud rate setting */
476 /* if baud rate of chip is greater than 470 /* if baud rate of chip is greater than
477 max we can support,return error */ 471 max we can support,return error */
diff --git a/drivers/spi/spi-txx9.c b/drivers/spi/spi-txx9.c
index 637cce2b8bdd..18c9bb2b5f39 100644
--- a/drivers/spi/spi-txx9.c
+++ b/drivers/spi/spi-txx9.c
@@ -425,7 +425,7 @@ exit:
425 425
426static int txx9spi_remove(struct platform_device *dev) 426static int txx9spi_remove(struct platform_device *dev)
427{ 427{
428 struct spi_master *master = spi_master_get(platform_get_drvdata(dev)); 428 struct spi_master *master = platform_get_drvdata(dev);
429 struct txx9spi *c = spi_master_get_devdata(master); 429 struct txx9spi *c = spi_master_get_devdata(master);
430 430
431 destroy_workqueue(c->workqueue); 431 destroy_workqueue(c->workqueue);
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 18cc625d887f..63613a96233c 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -370,6 +370,17 @@ static void spi_dev_set_name(struct spi_device *spi)
370 spi->chip_select); 370 spi->chip_select);
371} 371}
372 372
373static int spi_dev_check(struct device *dev, void *data)
374{
375 struct spi_device *spi = to_spi_device(dev);
376 struct spi_device *new_spi = data;
377
378 if (spi->master == new_spi->master &&
379 spi->chip_select == new_spi->chip_select)
380 return -EBUSY;
381 return 0;
382}
383
373/** 384/**
374 * spi_add_device - Add spi_device allocated with spi_alloc_device 385 * spi_add_device - Add spi_device allocated with spi_alloc_device
375 * @spi: spi_device to register 386 * @spi: spi_device to register
@@ -384,7 +395,6 @@ int spi_add_device(struct spi_device *spi)
384 static DEFINE_MUTEX(spi_add_lock); 395 static DEFINE_MUTEX(spi_add_lock);
385 struct spi_master *master = spi->master; 396 struct spi_master *master = spi->master;
386 struct device *dev = master->dev.parent; 397 struct device *dev = master->dev.parent;
387 struct device *d;
388 int status; 398 int status;
389 399
390 /* Chipselects are numbered 0..max; validate. */ 400 /* Chipselects are numbered 0..max; validate. */
@@ -404,12 +414,10 @@ int spi_add_device(struct spi_device *spi)
404 */ 414 */
405 mutex_lock(&spi_add_lock); 415 mutex_lock(&spi_add_lock);
406 416
407 d = bus_find_device_by_name(&spi_bus_type, NULL, dev_name(&spi->dev)); 417 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
408 if (d != NULL) { 418 if (status) {
409 dev_err(dev, "chipselect %d already in use\n", 419 dev_err(dev, "chipselect %d already in use\n",
410 spi->chip_select); 420 spi->chip_select);
411 put_device(d);
412 status = -EBUSY;
413 goto done; 421 goto done;
414 } 422 }
415 423
@@ -591,8 +599,10 @@ static int spi_transfer_one_message(struct spi_master *master,
591 goto out; 599 goto out;
592 } 600 }
593 601
594 if (ret > 0) 602 if (ret > 0) {
603 ret = 0;
595 wait_for_completion(&master->xfer_completion); 604 wait_for_completion(&master->xfer_completion);
605 }
596 606
597 trace_spi_transfer_stop(msg, xfer); 607 trace_spi_transfer_stop(msg, xfer);
598 608
@@ -632,7 +642,7 @@ out:
632 * 642 *
633 * Called by SPI drivers using the core transfer_one_message() 643 * Called by SPI drivers using the core transfer_one_message()
634 * implementation to notify it that the current interrupt driven 644 * implementation to notify it that the current interrupt driven
635 * transfer has finised and the next one may be scheduled. 645 * transfer has finished and the next one may be scheduled.
636 */ 646 */
637void spi_finalize_current_transfer(struct spi_master *master) 647void spi_finalize_current_transfer(struct spi_master *master)
638{ 648{
@@ -685,7 +695,7 @@ static void spi_pump_messages(struct kthread_work *work)
685 } 695 }
686 /* Extract head of queue */ 696 /* Extract head of queue */
687 master->cur_msg = 697 master->cur_msg =
688 list_entry(master->queue.next, struct spi_message, queue); 698 list_first_entry(&master->queue, struct spi_message, queue);
689 699
690 list_del_init(&master->cur_msg->queue); 700 list_del_init(&master->cur_msg->queue);
691 if (master->busy) 701 if (master->busy)
@@ -735,7 +745,9 @@ static void spi_pump_messages(struct kthread_work *work)
735 ret = master->transfer_one_message(master, master->cur_msg); 745 ret = master->transfer_one_message(master, master->cur_msg);
736 if (ret) { 746 if (ret) {
737 dev_err(&master->dev, 747 dev_err(&master->dev,
738 "failed to transfer one message from queue\n"); 748 "failed to transfer one message from queue: %d\n", ret);
749 master->cur_msg->status = ret;
750 spi_finalize_current_message(master);
739 return; 751 return;
740 } 752 }
741} 753}
@@ -791,11 +803,8 @@ struct spi_message *spi_get_next_queued_message(struct spi_master *master)
791 803
792 /* get a pointer to the next message, if any */ 804 /* get a pointer to the next message, if any */
793 spin_lock_irqsave(&master->queue_lock, flags); 805 spin_lock_irqsave(&master->queue_lock, flags);
794 if (list_empty(&master->queue)) 806 next = list_first_entry_or_null(&master->queue, struct spi_message,
795 next = NULL; 807 queue);
796 else
797 next = list_entry(master->queue.next,
798 struct spi_message, queue);
799 spin_unlock_irqrestore(&master->queue_lock, flags); 808 spin_unlock_irqrestore(&master->queue_lock, flags);
800 809
801 return next; 810 return next;
@@ -1415,7 +1424,7 @@ int devm_spi_register_master(struct device *dev, struct spi_master *master)
1415 return -ENOMEM; 1424 return -ENOMEM;
1416 1425
1417 ret = spi_register_master(master); 1426 ret = spi_register_master(master);
1418 if (ret != 0) { 1427 if (!ret) {
1419 *ptr = master; 1428 *ptr = master;
1420 devres_add(dev, ptr); 1429 devres_add(dev, ptr);
1421 } else { 1430 } else {
@@ -1596,15 +1605,11 @@ int spi_setup(struct spi_device *spi)
1596} 1605}
1597EXPORT_SYMBOL_GPL(spi_setup); 1606EXPORT_SYMBOL_GPL(spi_setup);
1598 1607
1599static int __spi_async(struct spi_device *spi, struct spi_message *message) 1608static int __spi_validate(struct spi_device *spi, struct spi_message *message)
1600{ 1609{
1601 struct spi_master *master = spi->master; 1610 struct spi_master *master = spi->master;
1602 struct spi_transfer *xfer; 1611 struct spi_transfer *xfer;
1603 1612
1604 message->spi = spi;
1605
1606 trace_spi_message_submit(message);
1607
1608 if (list_empty(&message->transfers)) 1613 if (list_empty(&message->transfers))
1609 return -EINVAL; 1614 return -EINVAL;
1610 if (!message->complete) 1615 if (!message->complete)
@@ -1667,9 +1672,8 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
1667 if (xfer->rx_buf && !xfer->rx_nbits) 1672 if (xfer->rx_buf && !xfer->rx_nbits)
1668 xfer->rx_nbits = SPI_NBITS_SINGLE; 1673 xfer->rx_nbits = SPI_NBITS_SINGLE;
1669 /* check transfer tx/rx_nbits: 1674 /* check transfer tx/rx_nbits:
1670 * 1. keep the value is not out of single, dual and quad 1675 * 1. check the value matches one of single, dual and quad
1671 * 2. keep tx/rx_nbits is contained by mode in spi_device 1676 * 2. check tx/rx_nbits match the mode in spi_device
1672 * 3. if SPI_3WIRE, tx/rx_nbits should be in single
1673 */ 1677 */
1674 if (xfer->tx_buf) { 1678 if (xfer->tx_buf) {
1675 if (xfer->tx_nbits != SPI_NBITS_SINGLE && 1679 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
@@ -1682,9 +1686,6 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
1682 if ((xfer->tx_nbits == SPI_NBITS_QUAD) && 1686 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
1683 !(spi->mode & SPI_TX_QUAD)) 1687 !(spi->mode & SPI_TX_QUAD))
1684 return -EINVAL; 1688 return -EINVAL;
1685 if ((spi->mode & SPI_3WIRE) &&
1686 (xfer->tx_nbits != SPI_NBITS_SINGLE))
1687 return -EINVAL;
1688 } 1689 }
1689 /* check transfer rx_nbits */ 1690 /* check transfer rx_nbits */
1690 if (xfer->rx_buf) { 1691 if (xfer->rx_buf) {
@@ -1698,13 +1699,22 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
1698 if ((xfer->rx_nbits == SPI_NBITS_QUAD) && 1699 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
1699 !(spi->mode & SPI_RX_QUAD)) 1700 !(spi->mode & SPI_RX_QUAD))
1700 return -EINVAL; 1701 return -EINVAL;
1701 if ((spi->mode & SPI_3WIRE) &&
1702 (xfer->rx_nbits != SPI_NBITS_SINGLE))
1703 return -EINVAL;
1704 } 1702 }
1705 } 1703 }
1706 1704
1707 message->status = -EINPROGRESS; 1705 message->status = -EINPROGRESS;
1706
1707 return 0;
1708}
1709
1710static int __spi_async(struct spi_device *spi, struct spi_message *message)
1711{
1712 struct spi_master *master = spi->master;
1713
1714 message->spi = spi;
1715
1716 trace_spi_message_submit(message);
1717
1708 return master->transfer(spi, message); 1718 return master->transfer(spi, message);
1709} 1719}
1710 1720
@@ -1743,6 +1753,10 @@ int spi_async(struct spi_device *spi, struct spi_message *message)
1743 int ret; 1753 int ret;
1744 unsigned long flags; 1754 unsigned long flags;
1745 1755
1756 ret = __spi_validate(spi, message);
1757 if (ret != 0)
1758 return ret;
1759
1746 spin_lock_irqsave(&master->bus_lock_spinlock, flags); 1760 spin_lock_irqsave(&master->bus_lock_spinlock, flags);
1747 1761
1748 if (master->bus_lock_flag) 1762 if (master->bus_lock_flag)
@@ -1791,6 +1805,10 @@ int spi_async_locked(struct spi_device *spi, struct spi_message *message)
1791 int ret; 1805 int ret;
1792 unsigned long flags; 1806 unsigned long flags;
1793 1807
1808 ret = __spi_validate(spi, message);
1809 if (ret != 0)
1810 return ret;
1811
1794 spin_lock_irqsave(&master->bus_lock_spinlock, flags); 1812 spin_lock_irqsave(&master->bus_lock_spinlock, flags);
1795 1813
1796 ret = __spi_async(spi, message); 1814 ret = __spi_async(spi, message);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 11:46:44 -0500