aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/spi
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/Kconfig6
-rw-r--r--drivers/spi/Makefile1
-rw-r--r--drivers/spi/atmel_spi.c23
-rw-r--r--drivers/spi/omap2_mcspi.c4
-rw-r--r--drivers/spi/omap_uwire.c6
-rw-r--r--drivers/spi/orion_spi.c574
-rw-r--r--drivers/spi/pxa2xx_spi.c11
-rw-r--r--drivers/spi/spi.c40
-rw-r--r--drivers/spi/spi_imx.c7
-rw-r--r--drivers/spi/spi_s3c24xx.c31
-rw-r--r--drivers/spi/spi_s3c24xx_gpio.c6
11 files changed, 659 insertions, 50 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 2303521b4f09..b9d0efb6803f 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -149,6 +149,12 @@ config SPI_OMAP24XX
149 SPI master controller for OMAP24xx/OMAP34xx Multichannel SPI 149 SPI master controller for OMAP24xx/OMAP34xx Multichannel SPI
150 (McSPI) modules. 150 (McSPI) modules.
151 151
152config SPI_ORION
153 tristate "Orion SPI master (EXPERIMENTAL)"
154 depends on PLAT_ORION && EXPERIMENTAL
155 help
156 This enables using the SPI master controller on the Orion chips.
157
152config SPI_PXA2XX 158config SPI_PXA2XX
153 tristate "PXA2xx SSP SPI master" 159 tristate "PXA2xx SSP SPI master"
154 depends on ARCH_PXA && EXPERIMENTAL 160 depends on ARCH_PXA && EXPERIMENTAL
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 7fca043ce723..ccf18de34e1e 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
21obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o 21obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
22obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o 22obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
23obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o 23obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
24obj-$(CONFIG_SPI_ORION) += orion_spi.o
24obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o 25obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
25obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o 26obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o
26obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o 27obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 0c7165660853..02f9320f3efc 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -20,9 +20,9 @@
20#include <linux/spi/spi.h> 20#include <linux/spi/spi.h>
21 21
22#include <asm/io.h> 22#include <asm/io.h>
23#include <asm/arch/board.h> 23#include <mach/board.h>
24#include <asm/arch/gpio.h> 24#include <mach/gpio.h>
25#include <asm/arch/cpu.h> 25#include <mach/cpu.h>
26 26
27#include "atmel_spi.h" 27#include "atmel_spi.h"
28 28
@@ -184,7 +184,8 @@ static void atmel_spi_next_xfer(struct spi_master *master,
184{ 184{
185 struct atmel_spi *as = spi_master_get_devdata(master); 185 struct atmel_spi *as = spi_master_get_devdata(master);
186 struct spi_transfer *xfer; 186 struct spi_transfer *xfer;
187 u32 len, remaining, total; 187 u32 len, remaining;
188 u32 ieval;
188 dma_addr_t tx_dma, rx_dma; 189 dma_addr_t tx_dma, rx_dma;
189 190
190 if (!as->current_transfer) 191 if (!as->current_transfer)
@@ -197,6 +198,8 @@ static void atmel_spi_next_xfer(struct spi_master *master,
197 xfer = NULL; 198 xfer = NULL;
198 199
199 if (xfer) { 200 if (xfer) {
201 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
202
200 len = xfer->len; 203 len = xfer->len;
201 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); 204 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
202 remaining = xfer->len - len; 205 remaining = xfer->len - len;
@@ -234,6 +237,8 @@ static void atmel_spi_next_xfer(struct spi_master *master,
234 as->next_transfer = xfer; 237 as->next_transfer = xfer;
235 238
236 if (xfer) { 239 if (xfer) {
240 u32 total;
241
237 total = len; 242 total = len;
238 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); 243 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
239 as->next_remaining_bytes = total - len; 244 as->next_remaining_bytes = total - len;
@@ -250,9 +255,11 @@ static void atmel_spi_next_xfer(struct spi_master *master,
250 " next xfer %p: len %u tx %p/%08x rx %p/%08x\n", 255 " next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
251 xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, 256 xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
252 xfer->rx_buf, xfer->rx_dma); 257 xfer->rx_buf, xfer->rx_dma);
258 ieval = SPI_BIT(ENDRX) | SPI_BIT(OVRES);
253 } else { 259 } else {
254 spi_writel(as, RNCR, 0); 260 spi_writel(as, RNCR, 0);
255 spi_writel(as, TNCR, 0); 261 spi_writel(as, TNCR, 0);
262 ieval = SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) | SPI_BIT(OVRES);
256 } 263 }
257 264
258 /* REVISIT: We're waiting for ENDRX before we start the next 265 /* REVISIT: We're waiting for ENDRX before we start the next
@@ -265,7 +272,7 @@ static void atmel_spi_next_xfer(struct spi_master *master,
265 * 272 *
266 * It should be doable, though. Just not now... 273 * It should be doable, though. Just not now...
267 */ 274 */
268 spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES)); 275 spi_writel(as, IER, ieval);
269 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); 276 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
270} 277}
271 278
@@ -396,7 +403,7 @@ atmel_spi_interrupt(int irq, void *dev_id)
396 403
397 ret = IRQ_HANDLED; 404 ret = IRQ_HANDLED;
398 405
399 spi_writel(as, IDR, (SPI_BIT(ENDTX) | SPI_BIT(ENDRX) 406 spi_writel(as, IDR, (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX)
400 | SPI_BIT(OVRES))); 407 | SPI_BIT(OVRES)));
401 408
402 /* 409 /*
@@ -418,7 +425,7 @@ atmel_spi_interrupt(int irq, void *dev_id)
418 if (xfer->delay_usecs) 425 if (xfer->delay_usecs)
419 udelay(xfer->delay_usecs); 426 udelay(xfer->delay_usecs);
420 427
421 dev_warn(master->dev.parent, "fifo overrun (%u/%u remaining)\n", 428 dev_warn(master->dev.parent, "overrun (%u/%u remaining)\n",
422 spi_readl(as, TCR), spi_readl(as, RCR)); 429 spi_readl(as, TCR), spi_readl(as, RCR));
423 430
424 /* 431 /*
@@ -442,7 +449,7 @@ atmel_spi_interrupt(int irq, void *dev_id)
442 spi_readl(as, SR); 449 spi_readl(as, SR);
443 450
444 atmel_spi_msg_done(master, as, msg, -EIO, 0); 451 atmel_spi_msg_done(master, as, msg, -EIO, 0);
445 } else if (pending & SPI_BIT(ENDRX)) { 452 } else if (pending & (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX))) {
446 ret = IRQ_HANDLED; 453 ret = IRQ_HANDLED;
447 454
448 spi_writel(as, IDR, pending); 455 spi_writel(as, IDR, pending);
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index f6f987bb71ca..9d2186fd74aa 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -35,8 +35,8 @@
35 35
36#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
37 37
38#include <asm/arch/dma.h> 38#include <mach/dma.h>
39#include <asm/arch/clock.h> 39#include <mach/clock.h>
40 40
41 41
42#define OMAP2_MCSPI_MAX_FREQ 48000000 42#define OMAP2_MCSPI_MAX_FREQ 48000000
diff --git a/drivers/spi/omap_uwire.c b/drivers/spi/omap_uwire.c
index d9ae111c27ae..5515eb97d7c5 100644
--- a/drivers/spi/omap_uwire.c
+++ b/drivers/spi/omap_uwire.c
@@ -47,12 +47,12 @@
47 47
48#include <asm/system.h> 48#include <asm/system.h>
49#include <asm/irq.h> 49#include <asm/irq.h>
50#include <asm/hardware.h> 50#include <mach/hardware.h>
51#include <asm/io.h> 51#include <asm/io.h>
52#include <asm/mach-types.h> 52#include <asm/mach-types.h>
53 53
54#include <asm/arch/mux.h> 54#include <mach/mux.h>
55#include <asm/arch/omap730.h> /* OMAP730_IO_CONF registers */ 55#include <mach/omap730.h> /* OMAP730_IO_CONF registers */
56 56
57 57
58/* FIXME address is now a platform device resource, 58/* FIXME address is now a platform device resource,
diff --git a/drivers/spi/orion_spi.c b/drivers/spi/orion_spi.c
new file mode 100644
index 000000000000..c4eaacd6e553
--- /dev/null
+++ b/drivers/spi/orion_spi.c
@@ -0,0 +1,574 @@
1/*
2 * orion_spi.c -- Marvell Orion SPI controller driver
3 *
4 * Author: Shadi Ammouri <shadi@marvell.com>
5 * Copyright (C) 2007-2008 Marvell Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/delay.h>
15#include <linux/platform_device.h>
16#include <linux/err.h>
17#include <linux/io.h>
18#include <linux/spi/spi.h>
19#include <linux/spi/orion_spi.h>
20#include <asm/unaligned.h>
21
22#define DRIVER_NAME "orion_spi"
23
24#define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/
25#define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */
26
27#define ORION_SPI_IF_CTRL_REG 0x00
28#define ORION_SPI_IF_CONFIG_REG 0x04
29#define ORION_SPI_DATA_OUT_REG 0x08
30#define ORION_SPI_DATA_IN_REG 0x0c
31#define ORION_SPI_INT_CAUSE_REG 0x10
32
33#define ORION_SPI_IF_8_16_BIT_MODE (1 << 5)
34#define ORION_SPI_CLK_PRESCALE_MASK 0x1F
35
36struct orion_spi {
37 struct work_struct work;
38
39 /* Lock access to transfer list. */
40 spinlock_t lock;
41
42 struct list_head msg_queue;
43 struct spi_master *master;
44 void __iomem *base;
45 unsigned int max_speed;
46 unsigned int min_speed;
47 struct orion_spi_info *spi_info;
48};
49
50static struct workqueue_struct *orion_spi_wq;
51
52static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg)
53{
54 return orion_spi->base + reg;
55}
56
57static inline void
58orion_spi_setbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
59{
60 void __iomem *reg_addr = spi_reg(orion_spi, reg);
61 u32 val;
62
63 val = readl(reg_addr);
64 val |= mask;
65 writel(val, reg_addr);
66}
67
68static inline void
69orion_spi_clrbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
70{
71 void __iomem *reg_addr = spi_reg(orion_spi, reg);
72 u32 val;
73
74 val = readl(reg_addr);
75 val &= ~mask;
76 writel(val, reg_addr);
77}
78
79static int orion_spi_set_transfer_size(struct orion_spi *orion_spi, int size)
80{
81 if (size == 16) {
82 orion_spi_setbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
83 ORION_SPI_IF_8_16_BIT_MODE);
84 } else if (size == 8) {
85 orion_spi_clrbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
86 ORION_SPI_IF_8_16_BIT_MODE);
87 } else {
88 pr_debug("Bad bits per word value %d (only 8 or 16 are "
89 "allowed).\n", size);
90 return -EINVAL;
91 }
92
93 return 0;
94}
95
96static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
97{
98 u32 tclk_hz;
99 u32 rate;
100 u32 prescale;
101 u32 reg;
102 struct orion_spi *orion_spi;
103
104 orion_spi = spi_master_get_devdata(spi->master);
105
106 tclk_hz = orion_spi->spi_info->tclk;
107
108 /*
109 * the supported rates are: 4,6,8...30
110 * round up as we look for equal or less speed
111 */
112 rate = DIV_ROUND_UP(tclk_hz, speed);
113 rate = roundup(rate, 2);
114
115 /* check if requested speed is too small */
116 if (rate > 30)
117 return -EINVAL;
118
119 if (rate < 4)
120 rate = 4;
121
122 /* Convert the rate to SPI clock divisor value. */
123 prescale = 0x10 + rate/2;
124
125 reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
126 reg = ((reg & ~ORION_SPI_CLK_PRESCALE_MASK) | prescale);
127 writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
128
129 return 0;
130}
131
132/*
133 * called only when no transfer is active on the bus
134 */
135static int
136orion_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
137{
138 struct orion_spi *orion_spi;
139 unsigned int speed = spi->max_speed_hz;
140 unsigned int bits_per_word = spi->bits_per_word;
141 int rc;
142
143 orion_spi = spi_master_get_devdata(spi->master);
144
145 if ((t != NULL) && t->speed_hz)
146 speed = t->speed_hz;
147
148 if ((t != NULL) && t->bits_per_word)
149 bits_per_word = t->bits_per_word;
150
151 rc = orion_spi_baudrate_set(spi, speed);
152 if (rc)
153 return rc;
154
155 return orion_spi_set_transfer_size(orion_spi, bits_per_word);
156}
157
158static void orion_spi_set_cs(struct orion_spi *orion_spi, int enable)
159{
160 if (enable)
161 orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
162 else
163 orion_spi_clrbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
164}
165
166static inline int orion_spi_wait_till_ready(struct orion_spi *orion_spi)
167{
168 int i;
169
170 for (i = 0; i < ORION_SPI_WAIT_RDY_MAX_LOOP; i++) {
171 if (readl(spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG)))
172 return 1;
173 else
174 udelay(1);
175 }
176
177 return -1;
178}
179
180static inline int
181orion_spi_write_read_8bit(struct spi_device *spi,
182 const u8 **tx_buf, u8 **rx_buf)
183{
184 void __iomem *tx_reg, *rx_reg, *int_reg;
185 struct orion_spi *orion_spi;
186
187 orion_spi = spi_master_get_devdata(spi->master);
188 tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
189 rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
190 int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
191
192 /* clear the interrupt cause register */
193 writel(0x0, int_reg);
194
195 if (tx_buf && *tx_buf)
196 writel(*(*tx_buf)++, tx_reg);
197 else
198 writel(0, tx_reg);
199
200 if (orion_spi_wait_till_ready(orion_spi) < 0) {
201 dev_err(&spi->dev, "TXS timed out\n");
202 return -1;
203 }
204
205 if (rx_buf && *rx_buf)
206 *(*rx_buf)++ = readl(rx_reg);
207
208 return 1;
209}
210
211static inline int
212orion_spi_write_read_16bit(struct spi_device *spi,
213 const u16 **tx_buf, u16 **rx_buf)
214{
215 void __iomem *tx_reg, *rx_reg, *int_reg;
216 struct orion_spi *orion_spi;
217
218 orion_spi = spi_master_get_devdata(spi->master);
219 tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
220 rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
221 int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
222
223 /* clear the interrupt cause register */
224 writel(0x0, int_reg);
225
226 if (tx_buf && *tx_buf)
227 writel(__cpu_to_le16(get_unaligned((*tx_buf)++)), tx_reg);
228 else
229 writel(0, tx_reg);
230
231 if (orion_spi_wait_till_ready(orion_spi) < 0) {
232 dev_err(&spi->dev, "TXS timed out\n");
233 return -1;
234 }
235
236 if (rx_buf && *rx_buf)
237 put_unaligned(__le16_to_cpu(readl(rx_reg)), (*rx_buf)++);
238
239 return 1;
240}
241
242static unsigned int
243orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
244{
245 struct orion_spi *orion_spi;
246 unsigned int count;
247 int word_len;
248
249 orion_spi = spi_master_get_devdata(spi->master);
250 word_len = spi->bits_per_word;
251 count = xfer->len;
252
253 if (word_len == 8) {
254 const u8 *tx = xfer->tx_buf;
255 u8 *rx = xfer->rx_buf;
256
257 do {
258 if (orion_spi_write_read_8bit(spi, &tx, &rx) < 0)
259 goto out;
260 count--;
261 } while (count);
262 } else if (word_len == 16) {
263 const u16 *tx = xfer->tx_buf;
264 u16 *rx = xfer->rx_buf;
265
266 do {
267 if (orion_spi_write_read_16bit(spi, &tx, &rx) < 0)
268 goto out;
269 count -= 2;
270 } while (count);
271 }
272
273out:
274 return xfer->len - count;
275}
276
277
278static void orion_spi_work(struct work_struct *work)
279{
280 struct orion_spi *orion_spi =
281 container_of(work, struct orion_spi, work);
282
283 spin_lock_irq(&orion_spi->lock);
284 while (!list_empty(&orion_spi->msg_queue)) {
285 struct spi_message *m;
286 struct spi_device *spi;
287 struct spi_transfer *t = NULL;
288 int par_override = 0;
289 int status = 0;
290 int cs_active = 0;
291
292 m = container_of(orion_spi->msg_queue.next, struct spi_message,
293 queue);
294
295 list_del_init(&m->queue);
296 spin_unlock_irq(&orion_spi->lock);
297
298 spi = m->spi;
299
300 /* Load defaults */
301 status = orion_spi_setup_transfer(spi, NULL);
302
303 if (status < 0)
304 goto msg_done;
305
306 list_for_each_entry(t, &m->transfers, transfer_list) {
307 if (par_override || t->speed_hz || t->bits_per_word) {
308 par_override = 1;
309 status = orion_spi_setup_transfer(spi, t);
310 if (status < 0)
311 break;
312 if (!t->speed_hz && !t->bits_per_word)
313 par_override = 0;
314 }
315
316 if (!cs_active) {
317 orion_spi_set_cs(orion_spi, 1);
318 cs_active = 1;
319 }
320
321 if (t->len)
322 m->actual_length +=
323 orion_spi_write_read(spi, t);
324
325 if (t->delay_usecs)
326 udelay(t->delay_usecs);
327
328 if (t->cs_change) {
329 orion_spi_set_cs(orion_spi, 0);
330 cs_active = 0;
331 }
332 }
333
334msg_done:
335 if (cs_active)
336 orion_spi_set_cs(orion_spi, 0);
337
338 m->status = status;
339 m->complete(m->context);
340
341 spin_lock_irq(&orion_spi->lock);
342 }
343
344 spin_unlock_irq(&orion_spi->lock);
345}
346
347static int __init orion_spi_reset(struct orion_spi *orion_spi)
348{
349 /* Verify that the CS is deasserted */
350 orion_spi_set_cs(orion_spi, 0);
351
352 return 0;
353}
354
355static int orion_spi_setup(struct spi_device *spi)
356{
357 struct orion_spi *orion_spi;
358
359 orion_spi = spi_master_get_devdata(spi->master);
360
361 if (spi->mode) {
362 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
363 spi->mode);
364 return -EINVAL;
365 }
366
367 if (spi->bits_per_word == 0)
368 spi->bits_per_word = 8;
369
370 if ((spi->max_speed_hz == 0)
371 || (spi->max_speed_hz > orion_spi->max_speed))
372 spi->max_speed_hz = orion_spi->max_speed;
373
374 if (spi->max_speed_hz < orion_spi->min_speed) {
375 dev_err(&spi->dev, "setup: requested speed too low %d Hz\n",
376 spi->max_speed_hz);
377 return -EINVAL;
378 }
379
380 /*
381 * baudrate & width will be set orion_spi_setup_transfer
382 */
383 return 0;
384}
385
386static int orion_spi_transfer(struct spi_device *spi, struct spi_message *m)
387{
388 struct orion_spi *orion_spi;
389 struct spi_transfer *t = NULL;
390 unsigned long flags;
391
392 m->actual_length = 0;
393 m->status = 0;
394
395 /* reject invalid messages and transfers */
396 if (list_empty(&m->transfers) || !m->complete)
397 return -EINVAL;
398
399 orion_spi = spi_master_get_devdata(spi->master);
400
401 list_for_each_entry(t, &m->transfers, transfer_list) {
402 unsigned int bits_per_word = spi->bits_per_word;
403
404 if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
405 dev_err(&spi->dev,
406 "message rejected : "
407 "invalid transfer data buffers\n");
408 goto msg_rejected;
409 }
410
411 if ((t != NULL) && t->bits_per_word)
412 bits_per_word = t->bits_per_word;
413
414 if ((bits_per_word != 8) && (bits_per_word != 16)) {
415 dev_err(&spi->dev,
416 "message rejected : "
417 "invalid transfer bits_per_word (%d bits)\n",
418 bits_per_word);
419 goto msg_rejected;
420 }
421 /*make sure buffer length is even when working in 16 bit mode*/
422 if ((t != NULL) && (t->bits_per_word == 16) && (t->len & 1)) {
423 dev_err(&spi->dev,
424 "message rejected : "
425 "odd data length (%d) while in 16 bit mode\n",
426 t->len);
427 goto msg_rejected;
428 }
429
430 if (t->speed_hz < orion_spi->min_speed) {
431 dev_err(&spi->dev,
432 "message rejected : "
433 "device min speed (%d Hz) exceeds "
434 "required transfer speed (%d Hz)\n",
435 orion_spi->min_speed, t->speed_hz);
436 goto msg_rejected;
437 }
438 }
439
440
441 spin_lock_irqsave(&orion_spi->lock, flags);
442 list_add_tail(&m->queue, &orion_spi->msg_queue);
443 queue_work(orion_spi_wq, &orion_spi->work);
444 spin_unlock_irqrestore(&orion_spi->lock, flags);
445
446 return 0;
447msg_rejected:
448 /* Message rejected and not queued */
449 m->status = -EINVAL;
450 if (m->complete)
451 m->complete(m->context);
452 return -EINVAL;
453}
454
455static int __init orion_spi_probe(struct platform_device *pdev)
456{
457 struct spi_master *master;
458 struct orion_spi *spi;
459 struct resource *r;
460 struct orion_spi_info *spi_info;
461 int status = 0;
462
463 spi_info = pdev->dev.platform_data;
464
465 master = spi_alloc_master(&pdev->dev, sizeof *spi);
466 if (master == NULL) {
467 dev_dbg(&pdev->dev, "master allocation failed\n");
468 return -ENOMEM;
469 }
470
471 if (pdev->id != -1)
472 master->bus_num = pdev->id;
473
474 master->setup = orion_spi_setup;
475 master->transfer = orion_spi_transfer;
476 master->num_chipselect = ORION_NUM_CHIPSELECTS;
477
478 dev_set_drvdata(&pdev->dev, master);
479
480 spi = spi_master_get_devdata(master);
481 spi->master = master;
482 spi->spi_info = spi_info;
483
484 spi->max_speed = DIV_ROUND_UP(spi_info->tclk, 4);
485 spi->min_speed = DIV_ROUND_UP(spi_info->tclk, 30);
486
487 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
488 if (r == NULL) {
489 status = -ENODEV;
490 goto out;
491 }
492
493 if (!request_mem_region(r->start, (r->end - r->start) + 1,
494 pdev->dev.bus_id)) {
495 status = -EBUSY;
496 goto out;
497 }
498 spi->base = ioremap(r->start, SZ_1K);
499
500 INIT_WORK(&spi->work, orion_spi_work);
501
502 spin_lock_init(&spi->lock);
503 INIT_LIST_HEAD(&spi->msg_queue);
504
505 if (orion_spi_reset(spi) < 0)
506 goto out_rel_mem;
507
508 status = spi_register_master(master);
509 if (status < 0)
510 goto out_rel_mem;
511
512 return status;
513
514out_rel_mem:
515 release_mem_region(r->start, (r->end - r->start) + 1);
516
517out:
518 spi_master_put(master);
519 return status;
520}
521
522
523static int __exit orion_spi_remove(struct platform_device *pdev)
524{
525 struct spi_master *master;
526 struct orion_spi *spi;
527 struct resource *r;
528
529 master = dev_get_drvdata(&pdev->dev);
530 spi = spi_master_get_devdata(master);
531
532 cancel_work_sync(&spi->work);
533
534 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
535 release_mem_region(r->start, (r->end - r->start) + 1);
536
537 spi_unregister_master(master);
538
539 return 0;
540}
541
542MODULE_ALIAS("platform:" DRIVER_NAME);
543
544static struct platform_driver orion_spi_driver = {
545 .driver = {
546 .name = DRIVER_NAME,
547 .owner = THIS_MODULE,
548 },
549 .remove = __exit_p(orion_spi_remove),
550};
551
552static int __init orion_spi_init(void)
553{
554 orion_spi_wq = create_singlethread_workqueue(
555 orion_spi_driver.driver.name);
556 if (orion_spi_wq == NULL)
557 return -ENOMEM;
558
559 return platform_driver_probe(&orion_spi_driver, orion_spi_probe);
560}
561module_init(orion_spi_init);
562
563static void __exit orion_spi_exit(void)
564{
565 flush_workqueue(orion_spi_wq);
566 platform_driver_unregister(&orion_spi_driver);
567
568 destroy_workqueue(orion_spi_wq);
569}
570module_exit(orion_spi_exit);
571
572MODULE_DESCRIPTION("Orion SPI driver");
573MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
574MODULE_LICENSE("GPL");
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 067299d6d192..34c7c9875681 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -31,15 +31,14 @@
31 31
32#include <asm/io.h> 32#include <asm/io.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34#include <asm/hardware.h>
35#include <asm/delay.h> 34#include <asm/delay.h>
36#include <asm/dma.h> 35#include <asm/dma.h>
37 36
38#include <asm/arch/hardware.h> 37#include <mach/hardware.h>
39#include <asm/arch/pxa-regs.h> 38#include <mach/pxa-regs.h>
40#include <asm/arch/regs-ssp.h> 39#include <mach/regs-ssp.h>
41#include <asm/arch/ssp.h> 40#include <mach/ssp.h>
42#include <asm/arch/pxa2xx_spi.h> 41#include <mach/pxa2xx_spi.h>
43 42
44MODULE_AUTHOR("Stephen Street"); 43MODULE_AUTHOR("Stephen Street");
45MODULE_DESCRIPTION("PXA2xx SSP SPI Controller"); 44MODULE_DESCRIPTION("PXA2xx SSP SPI Controller");
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 964124b60db2..75e86865234c 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -226,10 +226,11 @@ EXPORT_SYMBOL_GPL(spi_alloc_device);
226 * Companion function to spi_alloc_device. Devices allocated with 226 * Companion function to spi_alloc_device. Devices allocated with
227 * spi_alloc_device can be added onto the spi bus with this function. 227 * spi_alloc_device can be added onto the spi bus with this function.
228 * 228 *
229 * Returns 0 on success; non-zero on failure 229 * Returns 0 on success; negative errno on failure
230 */ 230 */
231int spi_add_device(struct spi_device *spi) 231int spi_add_device(struct spi_device *spi)
232{ 232{
233 static DEFINE_MUTEX(spi_add_lock);
233 struct device *dev = spi->master->dev.parent; 234 struct device *dev = spi->master->dev.parent;
234 int status; 235 int status;
235 236
@@ -246,26 +247,43 @@ int spi_add_device(struct spi_device *spi)
246 "%s.%u", spi->master->dev.bus_id, 247 "%s.%u", spi->master->dev.bus_id,
247 spi->chip_select); 248 spi->chip_select);
248 249
249 /* drivers may modify this initial i/o setup */ 250
251 /* We need to make sure there's no other device with this
252 * chipselect **BEFORE** we call setup(), else we'll trash
253 * its configuration. Lock against concurrent add() calls.
254 */
255 mutex_lock(&spi_add_lock);
256
257 if (bus_find_device_by_name(&spi_bus_type, NULL, spi->dev.bus_id)
258 != NULL) {
259 dev_err(dev, "chipselect %d already in use\n",
260 spi->chip_select);
261 status = -EBUSY;
262 goto done;
263 }
264
265 /* Drivers may modify this initial i/o setup, but will
266 * normally rely on the device being setup. Devices
267 * using SPI_CS_HIGH can't coexist well otherwise...
268 */
250 status = spi->master->setup(spi); 269 status = spi->master->setup(spi);
251 if (status < 0) { 270 if (status < 0) {
252 dev_err(dev, "can't %s %s, status %d\n", 271 dev_err(dev, "can't %s %s, status %d\n",
253 "setup", spi->dev.bus_id, status); 272 "setup", spi->dev.bus_id, status);
254 return status; 273 goto done;
255 } 274 }
256 275
257 /* driver core catches callers that misbehave by defining 276 /* Device may be bound to an active driver when this returns */
258 * devices that already exist.
259 */
260 status = device_add(&spi->dev); 277 status = device_add(&spi->dev);
261 if (status < 0) { 278 if (status < 0)
262 dev_err(dev, "can't %s %s, status %d\n", 279 dev_err(dev, "can't %s %s, status %d\n",
263 "add", spi->dev.bus_id, status); 280 "add", spi->dev.bus_id, status);
264 return status; 281 else
265 } 282 dev_dbg(dev, "registered child %s\n", spi->dev.bus_id);
266 283
267 dev_dbg(dev, "registered child %s\n", spi->dev.bus_id); 284done:
268 return 0; 285 mutex_unlock(&spi_add_lock);
286 return status;
269} 287}
270EXPORT_SYMBOL_GPL(spi_add_device); 288EXPORT_SYMBOL_GPL(spi_add_device);
271 289
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
index 6fb77fcc4971..61ba147e384d 100644
--- a/drivers/spi/spi_imx.c
+++ b/drivers/spi/spi_imx.c
@@ -33,12 +33,11 @@
33 33
34#include <asm/io.h> 34#include <asm/io.h>
35#include <asm/irq.h> 35#include <asm/irq.h>
36#include <asm/hardware.h>
37#include <asm/delay.h> 36#include <asm/delay.h>
38 37
39#include <asm/arch/hardware.h> 38#include <mach/hardware.h>
40#include <asm/arch/imx-dma.h> 39#include <mach/imx-dma.h>
41#include <asm/arch/spi_imx.h> 40#include <mach/spi_imx.h>
42 41
43/*-------------------------------------------------------------------------*/ 42/*-------------------------------------------------------------------------*/
44/* SPI Registers offsets from peripheral base address */ 43/* SPI Registers offsets from peripheral base address */
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index 1c643c9e1f15..98abc73c1a1d 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -25,11 +25,11 @@
25 25
26#include <asm/io.h> 26#include <asm/io.h>
27#include <asm/dma.h> 27#include <asm/dma.h>
28#include <asm/hardware.h> 28#include <mach/hardware.h>
29 29
30#include <asm/arch/regs-gpio.h> 30#include <mach/regs-gpio.h>
31#include <asm/plat-s3c24xx/regs-spi.h> 31#include <asm/plat-s3c24xx/regs-spi.h>
32#include <asm/arch/spi.h> 32#include <mach/spi.h>
33 33
34struct s3c24xx_spi { 34struct s3c24xx_spi {
35 /* bitbang has to be first */ 35 /* bitbang has to be first */
@@ -236,6 +236,19 @@ static irqreturn_t s3c24xx_spi_irq(int irq, void *dev)
236 return IRQ_HANDLED; 236 return IRQ_HANDLED;
237} 237}
238 238
239static void s3c24xx_spi_initialsetup(struct s3c24xx_spi *hw)
240{
241 /* for the moment, permanently enable the clock */
242
243 clk_enable(hw->clk);
244
245 /* program defaults into the registers */
246
247 writeb(0xff, hw->regs + S3C2410_SPPRE);
248 writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN);
249 writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON);
250}
251
239static int __init s3c24xx_spi_probe(struct platform_device *pdev) 252static int __init s3c24xx_spi_probe(struct platform_device *pdev)
240{ 253{
241 struct s3c2410_spi_info *pdata; 254 struct s3c2410_spi_info *pdata;
@@ -327,15 +340,7 @@ static int __init s3c24xx_spi_probe(struct platform_device *pdev)
327 goto err_no_clk; 340 goto err_no_clk;
328 } 341 }
329 342
330 /* for the moment, permanently enable the clock */ 343 s3c24xx_spi_initialsetup(hw);
331
332 clk_enable(hw->clk);
333
334 /* program defaults into the registers */
335
336 writeb(0xff, hw->regs + S3C2410_SPPRE);
337 writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN);
338 writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON);
339 344
340 /* setup any gpio we can */ 345 /* setup any gpio we can */
341 346
@@ -415,7 +420,7 @@ static int s3c24xx_spi_resume(struct platform_device *pdev)
415{ 420{
416 struct s3c24xx_spi *hw = platform_get_drvdata(pdev); 421 struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
417 422
418 clk_enable(hw->clk); 423 s3c24xx_spi_initialsetup(hw);
419 return 0; 424 return 0;
420} 425}
421 426
diff --git a/drivers/spi/spi_s3c24xx_gpio.c b/drivers/spi/spi_s3c24xx_gpio.c
index e33f6145c560..cc1f647f579b 100644
--- a/drivers/spi/spi_s3c24xx_gpio.c
+++ b/drivers/spi/spi_s3c24xx_gpio.c
@@ -21,9 +21,9 @@
21#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
22#include <linux/spi/spi_bitbang.h> 22#include <linux/spi/spi_bitbang.h>
23 23
24#include <asm/arch/regs-gpio.h> 24#include <mach/regs-gpio.h>
25#include <asm/arch/spi-gpio.h> 25#include <mach/spi-gpio.h>
26#include <asm/hardware.h> 26#include <mach/hardware.h>
27 27
28struct s3c2410_spigpio { 28struct s3c2410_spigpio {
29 struct spi_bitbang bitbang; 29 struct spi_bitbang bitbang;
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-07 08:09:27 -0400