diff options
Diffstat (limited to 'drivers/spi')
49 files changed, 731 insertions, 853 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 20158978866f..89cbbabaff44 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig | |||
@@ -404,7 +404,7 @@ config SPI_SH_HSPI | |||
404 | 404 | ||
405 | config SPI_SIRF | 405 | config SPI_SIRF |
406 | tristate "CSR SiRFprimaII SPI controller" | 406 | tristate "CSR SiRFprimaII SPI controller" |
407 | depends on ARCH_PRIMA2 | 407 | depends on ARCH_SIRF |
408 | select SPI_BITBANG | 408 | select SPI_BITBANG |
409 | help | 409 | help |
410 | SPI driver for CSR SiRFprimaII SoCs | 410 | SPI driver for CSR SiRFprimaII SoCs |
diff --git a/drivers/spi/spi-altera.c b/drivers/spi/spi-altera.c index a537f8dffc09..8a6bb37910da 100644 --- a/drivers/spi/spi-altera.c +++ b/drivers/spi/spi-altera.c | |||
@@ -103,16 +103,6 @@ static void altera_spi_chipsel(struct spi_device *spi, int value) | |||
103 | } | 103 | } |
104 | } | 104 | } |
105 | 105 | ||
106 | static int altera_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t) | ||
107 | { | ||
108 | return 0; | ||
109 | } | ||
110 | |||
111 | static int altera_spi_setup(struct spi_device *spi) | ||
112 | { | ||
113 | return 0; | ||
114 | } | ||
115 | |||
116 | static inline unsigned int hw_txbyte(struct altera_spi *hw, int count) | 106 | static inline unsigned int hw_txbyte(struct altera_spi *hw, int count) |
117 | { | 107 | { |
118 | if (hw->tx) { | 108 | if (hw->tx) { |
@@ -231,7 +221,6 @@ static int altera_spi_probe(struct platform_device *pdev) | |||
231 | master->bus_num = pdev->id; | 221 | master->bus_num = pdev->id; |
232 | master->num_chipselect = 16; | 222 | master->num_chipselect = 16; |
233 | master->mode_bits = SPI_CS_HIGH; | 223 | master->mode_bits = SPI_CS_HIGH; |
234 | master->setup = altera_spi_setup; | ||
235 | 224 | ||
236 | hw = spi_master_get_devdata(master); | 225 | hw = spi_master_get_devdata(master); |
237 | platform_set_drvdata(pdev, hw); | 226 | platform_set_drvdata(pdev, hw); |
@@ -240,7 +229,6 @@ static int altera_spi_probe(struct platform_device *pdev) | |||
240 | hw->bitbang.master = spi_master_get(master); | 229 | hw->bitbang.master = spi_master_get(master); |
241 | if (!hw->bitbang.master) | 230 | if (!hw->bitbang.master) |
242 | return err; | 231 | return err; |
243 | hw->bitbang.setup_transfer = altera_spi_setupxfer; | ||
244 | hw->bitbang.chipselect = altera_spi_chipsel; | 232 | hw->bitbang.chipselect = altera_spi_chipsel; |
245 | hw->bitbang.txrx_bufs = altera_spi_txrx; | 233 | hw->bitbang.txrx_bufs = altera_spi_txrx; |
246 | 234 | ||
@@ -285,7 +273,6 @@ static int altera_spi_probe(struct platform_device *pdev) | |||
285 | exit_busy: | 273 | exit_busy: |
286 | err = -EBUSY; | 274 | err = -EBUSY; |
287 | exit: | 275 | exit: |
288 | platform_set_drvdata(pdev, NULL); | ||
289 | spi_master_put(master); | 276 | spi_master_put(master); |
290 | return err; | 277 | return err; |
291 | } | 278 | } |
@@ -296,7 +283,6 @@ static int altera_spi_remove(struct platform_device *dev) | |||
296 | struct spi_master *master = hw->bitbang.master; | 283 | struct spi_master *master = hw->bitbang.master; |
297 | 284 | ||
298 | spi_bitbang_stop(&hw->bitbang); | 285 | spi_bitbang_stop(&hw->bitbang); |
299 | platform_set_drvdata(dev, NULL); | ||
300 | spi_master_put(master); | 286 | spi_master_put(master); |
301 | return 0; | 287 | return 0; |
302 | } | 288 | } |
diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c index e504b7636058..0e06407a4670 100644 --- a/drivers/spi/spi-ath79.c +++ b/drivers/spi/spi-ath79.c | |||
@@ -155,9 +155,6 @@ static int ath79_spi_setup(struct spi_device *spi) | |||
155 | { | 155 | { |
156 | int status = 0; | 156 | int status = 0; |
157 | 157 | ||
158 | if (spi->bits_per_word > 32) | ||
159 | return -EINVAL; | ||
160 | |||
161 | if (!spi->controller_state) { | 158 | if (!spi->controller_state) { |
162 | status = ath79_spi_setup_cs(spi); | 159 | status = ath79_spi_setup_cs(spi); |
163 | if (status) | 160 | if (status) |
@@ -226,6 +223,7 @@ static int ath79_spi_probe(struct platform_device *pdev) | |||
226 | 223 | ||
227 | pdata = pdev->dev.platform_data; | 224 | pdata = pdev->dev.platform_data; |
228 | 225 | ||
226 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); | ||
229 | master->setup = ath79_spi_setup; | 227 | master->setup = ath79_spi_setup; |
230 | master->cleanup = ath79_spi_cleanup; | 228 | master->cleanup = ath79_spi_cleanup; |
231 | if (pdata) { | 229 | if (pdata) { |
@@ -287,7 +285,6 @@ err_clk_put: | |||
287 | err_unmap: | 285 | err_unmap: |
288 | iounmap(sp->base); | 286 | iounmap(sp->base); |
289 | err_put_master: | 287 | err_put_master: |
290 | platform_set_drvdata(pdev, NULL); | ||
291 | spi_master_put(sp->bitbang.master); | 288 | spi_master_put(sp->bitbang.master); |
292 | 289 | ||
293 | return ret; | 290 | return ret; |
@@ -302,7 +299,6 @@ static int ath79_spi_remove(struct platform_device *pdev) | |||
302 | clk_disable(sp->clk); | 299 | clk_disable(sp->clk); |
303 | clk_put(sp->clk); | 300 | clk_put(sp->clk); |
304 | iounmap(sp->base); | 301 | iounmap(sp->base); |
305 | platform_set_drvdata(pdev, NULL); | ||
306 | spi_master_put(sp->bitbang.master); | 302 | spi_master_put(sp->bitbang.master); |
307 | 303 | ||
308 | return 0; | 304 | return 0; |
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 380387a47b1d..ea1ec009f44d 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c | |||
@@ -424,10 +424,15 @@ static int atmel_spi_dma_slave_config(struct atmel_spi *as, | |||
424 | return err; | 424 | return err; |
425 | } | 425 | } |
426 | 426 | ||
427 | static bool filter(struct dma_chan *chan, void *slave) | 427 | static bool filter(struct dma_chan *chan, void *pdata) |
428 | { | 428 | { |
429 | struct at_dma_slave *sl = slave; | 429 | struct atmel_spi_dma *sl_pdata = pdata; |
430 | struct at_dma_slave *sl; | ||
430 | 431 | ||
432 | if (!sl_pdata) | ||
433 | return false; | ||
434 | |||
435 | sl = &sl_pdata->dma_slave; | ||
431 | if (sl->dma_dev == chan->device->dev) { | 436 | if (sl->dma_dev == chan->device->dev) { |
432 | chan->private = sl; | 437 | chan->private = sl; |
433 | return true; | 438 | return true; |
@@ -438,24 +443,31 @@ static bool filter(struct dma_chan *chan, void *slave) | |||
438 | 443 | ||
439 | static int atmel_spi_configure_dma(struct atmel_spi *as) | 444 | static int atmel_spi_configure_dma(struct atmel_spi *as) |
440 | { | 445 | { |
441 | struct at_dma_slave *sdata = &as->dma.dma_slave; | ||
442 | struct dma_slave_config slave_config; | 446 | struct dma_slave_config slave_config; |
447 | struct device *dev = &as->pdev->dev; | ||
443 | int err; | 448 | int err; |
444 | 449 | ||
445 | if (sdata && sdata->dma_dev) { | 450 | dma_cap_mask_t mask; |
446 | dma_cap_mask_t mask; | 451 | dma_cap_zero(mask); |
452 | dma_cap_set(DMA_SLAVE, mask); | ||
447 | 453 | ||
448 | /* Try to grab two DMA channels */ | 454 | as->dma.chan_tx = dma_request_slave_channel_compat(mask, filter, |
449 | dma_cap_zero(mask); | 455 | &as->dma, |
450 | dma_cap_set(DMA_SLAVE, mask); | 456 | dev, "tx"); |
451 | as->dma.chan_tx = dma_request_channel(mask, filter, sdata); | 457 | if (!as->dma.chan_tx) { |
452 | if (as->dma.chan_tx) | 458 | dev_err(dev, |
453 | as->dma.chan_rx = | 459 | "DMA TX channel not available, SPI unable to use DMA\n"); |
454 | dma_request_channel(mask, filter, sdata); | 460 | err = -EBUSY; |
461 | goto error; | ||
455 | } | 462 | } |
456 | if (!as->dma.chan_rx || !as->dma.chan_tx) { | 463 | |
457 | dev_err(&as->pdev->dev, | 464 | as->dma.chan_rx = dma_request_slave_channel_compat(mask, filter, |
458 | "DMA channel not available, SPI unable to use DMA\n"); | 465 | &as->dma, |
466 | dev, "rx"); | ||
467 | |||
468 | if (!as->dma.chan_rx) { | ||
469 | dev_err(dev, | ||
470 | "DMA RX channel not available, SPI unable to use DMA\n"); | ||
459 | err = -EBUSY; | 471 | err = -EBUSY; |
460 | goto error; | 472 | goto error; |
461 | } | 473 | } |
@@ -1268,13 +1280,6 @@ static int atmel_spi_setup(struct spi_device *spi) | |||
1268 | return -EINVAL; | 1280 | return -EINVAL; |
1269 | } | 1281 | } |
1270 | 1282 | ||
1271 | if (bits < 8 || bits > 16) { | ||
1272 | dev_dbg(&spi->dev, | ||
1273 | "setup: invalid bits_per_word %u (8 to 16)\n", | ||
1274 | bits); | ||
1275 | return -EINVAL; | ||
1276 | } | ||
1277 | |||
1278 | /* see notes above re chipselect */ | 1283 | /* see notes above re chipselect */ |
1279 | if (!atmel_spi_is_v2(as) | 1284 | if (!atmel_spi_is_v2(as) |
1280 | && spi->chip_select == 0 | 1285 | && spi->chip_select == 0 |
@@ -1515,7 +1520,7 @@ static int atmel_spi_probe(struct platform_device *pdev) | |||
1515 | 1520 | ||
1516 | /* the spi->mode bits understood by this driver: */ | 1521 | /* the spi->mode bits understood by this driver: */ |
1517 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; | 1522 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; |
1518 | 1523 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); | |
1519 | master->dev.of_node = pdev->dev.of_node; | 1524 | master->dev.of_node = pdev->dev.of_node; |
1520 | master->bus_num = pdev->id; | 1525 | master->bus_num = pdev->id; |
1521 | master->num_chipselect = master->dev.of_node ? 0 : 4; | 1526 | master->num_chipselect = master->dev.of_node ? 0 : 4; |
diff --git a/drivers/spi/spi-au1550.c b/drivers/spi/spi-au1550.c index 44dd34b6ad09..e1965553ab79 100644 --- a/drivers/spi/spi-au1550.c +++ b/drivers/spi/spi-au1550.c | |||
@@ -248,11 +248,6 @@ static int au1550_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t) | |||
248 | hz = t->speed_hz; | 248 | hz = t->speed_hz; |
249 | } | 249 | } |
250 | 250 | ||
251 | if (bpw < 4 || bpw > 24) { | ||
252 | dev_err(&spi->dev, "setupxfer: invalid bits_per_word=%d\n", | ||
253 | bpw); | ||
254 | return -EINVAL; | ||
255 | } | ||
256 | if (hz > spi->max_speed_hz || hz > hw->freq_max || hz < hw->freq_min) { | 251 | if (hz > spi->max_speed_hz || hz > hw->freq_max || hz < hw->freq_min) { |
257 | dev_err(&spi->dev, "setupxfer: clock rate=%d out of range\n", | 252 | dev_err(&spi->dev, "setupxfer: clock rate=%d out of range\n", |
258 | hz); | 253 | hz); |
@@ -296,12 +291,6 @@ static int au1550_spi_setup(struct spi_device *spi) | |||
296 | { | 291 | { |
297 | struct au1550_spi *hw = spi_master_get_devdata(spi->master); | 292 | struct au1550_spi *hw = spi_master_get_devdata(spi->master); |
298 | 293 | ||
299 | if (spi->bits_per_word < 4 || spi->bits_per_word > 24) { | ||
300 | dev_err(&spi->dev, "setup: invalid bits_per_word=%d\n", | ||
301 | spi->bits_per_word); | ||
302 | return -EINVAL; | ||
303 | } | ||
304 | |||
305 | if (spi->max_speed_hz == 0) | 294 | if (spi->max_speed_hz == 0) |
306 | spi->max_speed_hz = hw->freq_max; | 295 | spi->max_speed_hz = hw->freq_max; |
307 | if (spi->max_speed_hz > hw->freq_max | 296 | if (spi->max_speed_hz > hw->freq_max |
@@ -782,6 +771,7 @@ static int au1550_spi_probe(struct platform_device *pdev) | |||
782 | 771 | ||
783 | /* the spi->mode bits understood by this driver: */ | 772 | /* the spi->mode bits understood by this driver: */ |
784 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; | 773 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; |
774 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 24); | ||
785 | 775 | ||
786 | hw = spi_master_get_devdata(master); | 776 | hw = spi_master_get_devdata(master); |
787 | 777 | ||
@@ -987,8 +977,6 @@ static int au1550_spi_remove(struct platform_device *pdev) | |||
987 | au1xxx_dbdma_chan_free(hw->dma_tx_ch); | 977 | au1xxx_dbdma_chan_free(hw->dma_tx_ch); |
988 | } | 978 | } |
989 | 979 | ||
990 | platform_set_drvdata(pdev, NULL); | ||
991 | |||
992 | spi_master_put(hw->master); | 980 | spi_master_put(hw->master); |
993 | return 0; | 981 | return 0; |
994 | } | 982 | } |
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index 89c0b5033114..a4185e492321 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c | |||
@@ -331,10 +331,9 @@ static int bcm2835_spi_probe(struct platform_device *pdev) | |||
331 | goto out_master_put; | 331 | goto out_master_put; |
332 | } | 332 | } |
333 | 333 | ||
334 | bs->regs = devm_request_and_ioremap(&pdev->dev, res); | 334 | bs->regs = devm_ioremap_resource(&pdev->dev, res); |
335 | if (!bs->regs) { | 335 | if (IS_ERR(bs->regs)) { |
336 | dev_err(&pdev->dev, "could not request/map memory region\n"); | 336 | err = PTR_ERR(bs->regs); |
337 | err = -ENODEV; | ||
338 | goto out_master_put; | 337 | goto out_master_put; |
339 | } | 338 | } |
340 | 339 | ||
diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c index a4ec5f4ec817..9fd7a39b8029 100644 --- a/drivers/spi/spi-bcm63xx.c +++ b/drivers/spi/spi-bcm63xx.c | |||
@@ -124,17 +124,6 @@ static void bcm63xx_spi_setup_transfer(struct spi_device *spi, | |||
124 | /* the spi->mode bits understood by this driver: */ | 124 | /* the spi->mode bits understood by this driver: */ |
125 | #define MODEBITS (SPI_CPOL | SPI_CPHA) | 125 | #define MODEBITS (SPI_CPOL | SPI_CPHA) |
126 | 126 | ||
127 | static int bcm63xx_spi_setup(struct spi_device *spi) | ||
128 | { | ||
129 | if (spi->bits_per_word != 8) { | ||
130 | dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n", | ||
131 | __func__, spi->bits_per_word); | ||
132 | return -EINVAL; | ||
133 | } | ||
134 | |||
135 | return 0; | ||
136 | } | ||
137 | |||
138 | static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first, | 127 | static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first, |
139 | unsigned int num_transfers) | 128 | unsigned int num_transfers) |
140 | { | 129 | { |
@@ -277,13 +266,6 @@ static int bcm63xx_spi_transfer_one(struct spi_master *master, | |||
277 | * full-duplex transfers. | 266 | * full-duplex transfers. |
278 | */ | 267 | */ |
279 | list_for_each_entry(t, &m->transfers, transfer_list) { | 268 | list_for_each_entry(t, &m->transfers, transfer_list) { |
280 | if (t->bits_per_word != 8) { | ||
281 | dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n", | ||
282 | __func__, t->bits_per_word); | ||
283 | status = -EINVAL; | ||
284 | goto exit; | ||
285 | } | ||
286 | |||
287 | if (!first) | 269 | if (!first) |
288 | first = t; | 270 | first = t; |
289 | 271 | ||
@@ -430,11 +412,11 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) | |||
430 | 412 | ||
431 | master->bus_num = pdata->bus_num; | 413 | master->bus_num = pdata->bus_num; |
432 | master->num_chipselect = pdata->num_chipselect; | 414 | master->num_chipselect = pdata->num_chipselect; |
433 | master->setup = bcm63xx_spi_setup; | ||
434 | master->prepare_transfer_hardware = bcm63xx_spi_prepare_transfer; | 415 | master->prepare_transfer_hardware = bcm63xx_spi_prepare_transfer; |
435 | master->unprepare_transfer_hardware = bcm63xx_spi_unprepare_transfer; | 416 | master->unprepare_transfer_hardware = bcm63xx_spi_unprepare_transfer; |
436 | master->transfer_one_message = bcm63xx_spi_transfer_one; | 417 | master->transfer_one_message = bcm63xx_spi_transfer_one; |
437 | master->mode_bits = MODEBITS; | 418 | master->mode_bits = MODEBITS; |
419 | master->bits_per_word_mask = SPI_BPW_MASK(8); | ||
438 | bs->msg_type_shift = pdata->msg_type_shift; | 420 | bs->msg_type_shift = pdata->msg_type_shift; |
439 | bs->msg_ctl_width = pdata->msg_ctl_width; | 421 | bs->msg_ctl_width = pdata->msg_ctl_width; |
440 | bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA)); | 422 | bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA)); |
@@ -469,7 +451,6 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) | |||
469 | out_clk_disable: | 451 | out_clk_disable: |
470 | clk_disable_unprepare(clk); | 452 | clk_disable_unprepare(clk); |
471 | out_err: | 453 | out_err: |
472 | platform_set_drvdata(pdev, NULL); | ||
473 | spi_master_put(master); | 454 | spi_master_put(master); |
474 | out_clk: | 455 | out_clk: |
475 | clk_put(clk); | 456 | clk_put(clk); |
@@ -491,8 +472,6 @@ static int bcm63xx_spi_remove(struct platform_device *pdev) | |||
491 | clk_disable_unprepare(bs->clk); | 472 | clk_disable_unprepare(bs->clk); |
492 | clk_put(bs->clk); | 473 | clk_put(bs->clk); |
493 | 474 | ||
494 | platform_set_drvdata(pdev, 0); | ||
495 | |||
496 | spi_master_put(master); | 475 | spi_master_put(master); |
497 | 476 | ||
498 | return 0; | 477 | return 0; |
diff --git a/drivers/spi/spi-bfin-sport.c b/drivers/spi/spi-bfin-sport.c index 39b0d1711b4e..07ec597f9732 100644 --- a/drivers/spi/spi-bfin-sport.c +++ b/drivers/spi/spi-bfin-sport.c | |||
@@ -417,7 +417,7 @@ bfin_sport_spi_pump_transfers(unsigned long data) | |||
417 | 417 | ||
418 | /* Bits per word setup */ | 418 | /* Bits per word setup */ |
419 | bits_per_word = transfer->bits_per_word; | 419 | bits_per_word = transfer->bits_per_word; |
420 | if (bits_per_word % 16 == 0) | 420 | if (bits_per_word == 16) |
421 | drv_data->ops = &bfin_sport_transfer_ops_u16; | 421 | drv_data->ops = &bfin_sport_transfer_ops_u16; |
422 | else | 422 | else |
423 | drv_data->ops = &bfin_sport_transfer_ops_u8; | 423 | drv_data->ops = &bfin_sport_transfer_ops_u8; |
@@ -600,13 +600,6 @@ bfin_sport_spi_setup(struct spi_device *spi) | |||
600 | } | 600 | } |
601 | } | 601 | } |
602 | 602 | ||
603 | if (spi->bits_per_word % 8) { | ||
604 | dev_err(&spi->dev, "%d bits_per_word is not supported\n", | ||
605 | spi->bits_per_word); | ||
606 | ret = -EINVAL; | ||
607 | goto error; | ||
608 | } | ||
609 | |||
610 | /* translate common spi framework into our register | 603 | /* translate common spi framework into our register |
611 | * following configure contents are same for tx and rx. | 604 | * following configure contents are same for tx and rx. |
612 | */ | 605 | */ |
@@ -778,6 +771,7 @@ static int bfin_sport_spi_probe(struct platform_device *pdev) | |||
778 | drv_data->pin_req = platform_info->pin_req; | 771 | drv_data->pin_req = platform_info->pin_req; |
779 | 772 | ||
780 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; | 773 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; |
774 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); | ||
781 | master->bus_num = pdev->id; | 775 | master->bus_num = pdev->id; |
782 | master->num_chipselect = platform_info->num_chipselect; | 776 | master->num_chipselect = platform_info->num_chipselect; |
783 | master->cleanup = bfin_sport_spi_cleanup; | 777 | master->cleanup = bfin_sport_spi_cleanup; |
@@ -882,9 +876,6 @@ static int bfin_sport_spi_remove(struct platform_device *pdev) | |||
882 | 876 | ||
883 | peripheral_free_list(drv_data->pin_req); | 877 | peripheral_free_list(drv_data->pin_req); |
884 | 878 | ||
885 | /* Prevent double remove */ | ||
886 | platform_set_drvdata(pdev, NULL); | ||
887 | |||
888 | return 0; | 879 | return 0; |
889 | } | 880 | } |
890 | 881 | ||
diff --git a/drivers/spi/spi-bfin5xx.c b/drivers/spi/spi-bfin5xx.c index 317f564c899c..59a73424419c 100644 --- a/drivers/spi/spi-bfin5xx.c +++ b/drivers/spi/spi-bfin5xx.c | |||
@@ -643,21 +643,16 @@ static void bfin_spi_pump_transfers(unsigned long data) | |||
643 | 643 | ||
644 | /* Bits per word setup */ | 644 | /* Bits per word setup */ |
645 | bits_per_word = transfer->bits_per_word; | 645 | bits_per_word = transfer->bits_per_word; |
646 | if (bits_per_word % 16 == 0) { | 646 | if (bits_per_word == 16) { |
647 | drv_data->n_bytes = bits_per_word/8; | 647 | drv_data->n_bytes = bits_per_word/8; |
648 | drv_data->len = (transfer->len) >> 1; | 648 | drv_data->len = (transfer->len) >> 1; |
649 | cr_width = BIT_CTL_WORDSIZE; | 649 | cr_width = BIT_CTL_WORDSIZE; |
650 | drv_data->ops = &bfin_bfin_spi_transfer_ops_u16; | 650 | drv_data->ops = &bfin_bfin_spi_transfer_ops_u16; |
651 | } else if (bits_per_word % 8 == 0) { | 651 | } else if (bits_per_word == 8) { |
652 | drv_data->n_bytes = bits_per_word/8; | 652 | drv_data->n_bytes = bits_per_word/8; |
653 | drv_data->len = transfer->len; | 653 | drv_data->len = transfer->len; |
654 | cr_width = 0; | 654 | cr_width = 0; |
655 | drv_data->ops = &bfin_bfin_spi_transfer_ops_u8; | 655 | drv_data->ops = &bfin_bfin_spi_transfer_ops_u8; |
656 | } else { | ||
657 | dev_err(&drv_data->pdev->dev, "transfer: unsupported bits_per_word\n"); | ||
658 | message->status = -EINVAL; | ||
659 | bfin_spi_giveback(drv_data); | ||
660 | return; | ||
661 | } | 656 | } |
662 | cr = bfin_read(&drv_data->regs->ctl) & ~(BIT_CTL_TIMOD | BIT_CTL_WORDSIZE); | 657 | cr = bfin_read(&drv_data->regs->ctl) & ~(BIT_CTL_TIMOD | BIT_CTL_WORDSIZE); |
663 | cr |= cr_width; | 658 | cr |= cr_width; |
@@ -808,13 +803,13 @@ static void bfin_spi_pump_transfers(unsigned long data) | |||
808 | bfin_write(&drv_data->regs->tdbr, chip->idle_tx_val); | 803 | bfin_write(&drv_data->regs->tdbr, chip->idle_tx_val); |
809 | else { | 804 | else { |
810 | int loop; | 805 | int loop; |
811 | if (bits_per_word % 16 == 0) { | 806 | if (bits_per_word == 16) { |
812 | u16 *buf = (u16 *)drv_data->tx; | 807 | u16 *buf = (u16 *)drv_data->tx; |
813 | for (loop = 0; loop < bits_per_word / 16; | 808 | for (loop = 0; loop < bits_per_word / 16; |
814 | loop++) { | 809 | loop++) { |
815 | bfin_write(&drv_data->regs->tdbr, *buf++); | 810 | bfin_write(&drv_data->regs->tdbr, *buf++); |
816 | } | 811 | } |
817 | } else if (bits_per_word % 8 == 0) { | 812 | } else if (bits_per_word == 8) { |
818 | u8 *buf = (u8 *)drv_data->tx; | 813 | u8 *buf = (u8 *)drv_data->tx; |
819 | for (loop = 0; loop < bits_per_word / 8; loop++) | 814 | for (loop = 0; loop < bits_per_word / 8; loop++) |
820 | bfin_write(&drv_data->regs->tdbr, *buf++); | 815 | bfin_write(&drv_data->regs->tdbr, *buf++); |
@@ -1033,12 +1028,6 @@ static int bfin_spi_setup(struct spi_device *spi) | |||
1033 | chip->ctl_reg &= bfin_ctl_reg; | 1028 | chip->ctl_reg &= bfin_ctl_reg; |
1034 | } | 1029 | } |
1035 | 1030 | ||
1036 | if (spi->bits_per_word % 8) { | ||
1037 | dev_err(&spi->dev, "%d bits_per_word is not supported\n", | ||
1038 | spi->bits_per_word); | ||
1039 | goto error; | ||
1040 | } | ||
1041 | |||
1042 | /* translate common spi framework into our register */ | 1031 | /* translate common spi framework into our register */ |
1043 | if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) { | 1032 | if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) { |
1044 | dev_err(&spi->dev, "unsupported spi modes detected\n"); | 1033 | dev_err(&spi->dev, "unsupported spi modes detected\n"); |
@@ -1299,7 +1288,7 @@ static int bfin_spi_probe(struct platform_device *pdev) | |||
1299 | 1288 | ||
1300 | /* the spi->mode bits supported by this driver: */ | 1289 | /* the spi->mode bits supported by this driver: */ |
1301 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; | 1290 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; |
1302 | 1291 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); | |
1303 | master->bus_num = pdev->id; | 1292 | master->bus_num = pdev->id; |
1304 | master->num_chipselect = platform_info->num_chipselect; | 1293 | master->num_chipselect = platform_info->num_chipselect; |
1305 | master->cleanup = bfin_spi_cleanup; | 1294 | master->cleanup = bfin_spi_cleanup; |
@@ -1418,9 +1407,6 @@ static int bfin_spi_remove(struct platform_device *pdev) | |||
1418 | 1407 | ||
1419 | peripheral_free_list(drv_data->pin_req); | 1408 | peripheral_free_list(drv_data->pin_req); |
1420 | 1409 | ||
1421 | /* Prevent double remove */ | ||
1422 | platform_set_drvdata(pdev, NULL); | ||
1423 | |||
1424 | return 0; | 1410 | return 0; |
1425 | } | 1411 | } |
1426 | 1412 | ||
diff --git a/drivers/spi/spi-clps711x.c b/drivers/spi/spi-clps711x.c index a11cbf02691a..17965fe225cc 100644 --- a/drivers/spi/spi-clps711x.c +++ b/drivers/spi/spi-clps711x.c | |||
@@ -42,12 +42,6 @@ static int spi_clps711x_setup(struct spi_device *spi) | |||
42 | { | 42 | { |
43 | struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master); | 43 | struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master); |
44 | 44 | ||
45 | if (spi->bits_per_word != 8) { | ||
46 | dev_err(&spi->dev, "Unsupported master bus width %i\n", | ||
47 | spi->bits_per_word); | ||
48 | return -EINVAL; | ||
49 | } | ||
50 | |||
51 | /* We are expect that SPI-device is not selected */ | 45 | /* We are expect that SPI-device is not selected */ |
52 | gpio_direction_output(hw->chipselect[spi->chip_select], | 46 | gpio_direction_output(hw->chipselect[spi->chip_select], |
53 | !(spi->mode & SPI_CS_HIGH)); | 47 | !(spi->mode & SPI_CS_HIGH)); |
@@ -190,6 +184,7 @@ static int spi_clps711x_probe(struct platform_device *pdev) | |||
190 | 184 | ||
191 | master->bus_num = pdev->id; | 185 | master->bus_num = pdev->id; |
192 | master->mode_bits = SPI_CPHA | SPI_CS_HIGH; | 186 | master->mode_bits = SPI_CPHA | SPI_CS_HIGH; |
187 | master->bits_per_word_mask = SPI_BPW_MASK(8); | ||
193 | master->num_chipselect = pdata->num_chipselect; | 188 | master->num_chipselect = pdata->num_chipselect; |
194 | master->setup = spi_clps711x_setup; | 189 | master->setup = spi_clps711x_setup; |
195 | master->transfer_one_message = spi_clps711x_transfer_one_message; | 190 | master->transfer_one_message = spi_clps711x_transfer_one_message; |
@@ -254,7 +249,6 @@ err_out: | |||
254 | if (gpio_is_valid(hw->chipselect[i])) | 249 | if (gpio_is_valid(hw->chipselect[i])) |
255 | gpio_free(hw->chipselect[i]); | 250 | gpio_free(hw->chipselect[i]); |
256 | 251 | ||
257 | platform_set_drvdata(pdev, NULL); | ||
258 | spi_master_put(master); | 252 | spi_master_put(master); |
259 | kfree(master); | 253 | kfree(master); |
260 | 254 | ||
@@ -274,7 +268,6 @@ static int spi_clps711x_remove(struct platform_device *pdev) | |||
274 | gpio_free(hw->chipselect[i]); | 268 | gpio_free(hw->chipselect[i]); |
275 | 269 | ||
276 | devm_clk_put(&pdev->dev, hw->spi_clk); | 270 | devm_clk_put(&pdev->dev, hw->spi_clk); |
277 | platform_set_drvdata(pdev, NULL); | ||
278 | spi_unregister_master(master); | 271 | spi_unregister_master(master); |
279 | kfree(master); | 272 | kfree(master); |
280 | 273 | ||
diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c index 7b5cc9e4e94d..0631b9d4a5de 100644 --- a/drivers/spi/spi-coldfire-qspi.c +++ b/drivers/spi/spi-coldfire-qspi.c | |||
@@ -312,10 +312,7 @@ static int mcfqspi_transfer_one_message(struct spi_master *master, | |||
312 | bool cs_high = spi->mode & SPI_CS_HIGH; | 312 | bool cs_high = spi->mode & SPI_CS_HIGH; |
313 | u16 qmr = MCFQSPI_QMR_MSTR; | 313 | u16 qmr = MCFQSPI_QMR_MSTR; |
314 | 314 | ||
315 | if (t->bits_per_word) | 315 | qmr |= t->bits_per_word << 10; |
316 | qmr |= t->bits_per_word << 10; | ||
317 | else | ||
318 | qmr |= spi->bits_per_word << 10; | ||
319 | if (spi->mode & SPI_CPHA) | 316 | if (spi->mode & SPI_CPHA) |
320 | qmr |= MCFQSPI_QMR_CPHA; | 317 | qmr |= MCFQSPI_QMR_CPHA; |
321 | if (spi->mode & SPI_CPOL) | 318 | if (spi->mode & SPI_CPOL) |
@@ -377,11 +374,6 @@ static int mcfqspi_unprepare_transfer_hw(struct spi_master *master) | |||
377 | 374 | ||
378 | static int mcfqspi_setup(struct spi_device *spi) | 375 | static int mcfqspi_setup(struct spi_device *spi) |
379 | { | 376 | { |
380 | if ((spi->bits_per_word < 8) || (spi->bits_per_word > 16)) { | ||
381 | dev_dbg(&spi->dev, "%d bits per word is not supported\n", | ||
382 | spi->bits_per_word); | ||
383 | return -EINVAL; | ||
384 | } | ||
385 | if (spi->chip_select >= spi->master->num_chipselect) { | 377 | if (spi->chip_select >= spi->master->num_chipselect) { |
386 | dev_dbg(&spi->dev, "%d chip select is out of range\n", | 378 | dev_dbg(&spi->dev, "%d chip select is out of range\n", |
387 | spi->chip_select); | 379 | spi->chip_select); |
@@ -408,6 +400,12 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
408 | struct mcfqspi_platform_data *pdata; | 400 | struct mcfqspi_platform_data *pdata; |
409 | int status; | 401 | int status; |
410 | 402 | ||
403 | pdata = pdev->dev.platform_data; | ||
404 | if (!pdata) { | ||
405 | dev_dbg(&pdev->dev, "platform data is missing\n"); | ||
406 | return -ENOENT; | ||
407 | } | ||
408 | |||
411 | master = spi_alloc_master(&pdev->dev, sizeof(*mcfqspi)); | 409 | master = spi_alloc_master(&pdev->dev, sizeof(*mcfqspi)); |
412 | if (master == NULL) { | 410 | if (master == NULL) { |
413 | dev_dbg(&pdev->dev, "spi_alloc_master failed\n"); | 411 | dev_dbg(&pdev->dev, "spi_alloc_master failed\n"); |
@@ -458,11 +456,6 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
458 | } | 456 | } |
459 | clk_enable(mcfqspi->clk); | 457 | clk_enable(mcfqspi->clk); |
460 | 458 | ||
461 | pdata = pdev->dev.platform_data; | ||
462 | if (!pdata) { | ||
463 | dev_dbg(&pdev->dev, "platform data is missing\n"); | ||
464 | goto fail4; | ||
465 | } | ||
466 | master->bus_num = pdata->bus_num; | 459 | master->bus_num = pdata->bus_num; |
467 | master->num_chipselect = pdata->num_chipselect; | 460 | master->num_chipselect = pdata->num_chipselect; |
468 | 461 | ||
@@ -477,6 +470,7 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
477 | mcfqspi->dev = &pdev->dev; | 470 | mcfqspi->dev = &pdev->dev; |
478 | 471 | ||
479 | master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; | 472 | master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; |
473 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); | ||
480 | master->setup = mcfqspi_setup; | 474 | master->setup = mcfqspi_setup; |
481 | master->transfer_one_message = mcfqspi_transfer_one_message; | 475 | master->transfer_one_message = mcfqspi_transfer_one_message; |
482 | master->prepare_transfer_hardware = mcfqspi_prepare_transfer_hw; | 476 | master->prepare_transfer_hardware = mcfqspi_prepare_transfer_hw; |
@@ -524,7 +518,6 @@ static int mcfqspi_remove(struct platform_device *pdev) | |||
524 | /* disable the hardware (set the baud rate to 0) */ | 518 | /* disable the hardware (set the baud rate to 0) */ |
525 | mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR); | 519 | mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR); |
526 | 520 | ||
527 | platform_set_drvdata(pdev, NULL); | ||
528 | mcfqspi_cs_teardown(mcfqspi); | 521 | mcfqspi_cs_teardown(mcfqspi); |
529 | clk_disable(mcfqspi->clk); | 522 | clk_disable(mcfqspi->clk); |
530 | clk_put(mcfqspi->clk); | 523 | clk_put(mcfqspi->clk); |
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 50b13c9b1ab6..222d3e37fc28 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c | |||
@@ -299,16 +299,15 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, | |||
299 | * Assign function pointer to appropriate transfer method | 299 | * Assign function pointer to appropriate transfer method |
300 | * 8bit, 16bit or 32bit transfer | 300 | * 8bit, 16bit or 32bit transfer |
301 | */ | 301 | */ |
302 | if (bits_per_word <= 8 && bits_per_word >= 2) { | 302 | if (bits_per_word <= 8) { |
303 | dspi->get_rx = davinci_spi_rx_buf_u8; | 303 | dspi->get_rx = davinci_spi_rx_buf_u8; |
304 | dspi->get_tx = davinci_spi_tx_buf_u8; | 304 | dspi->get_tx = davinci_spi_tx_buf_u8; |
305 | dspi->bytes_per_word[spi->chip_select] = 1; | 305 | dspi->bytes_per_word[spi->chip_select] = 1; |
306 | } else if (bits_per_word <= 16 && bits_per_word >= 2) { | 306 | } else { |
307 | dspi->get_rx = davinci_spi_rx_buf_u16; | 307 | dspi->get_rx = davinci_spi_rx_buf_u16; |
308 | dspi->get_tx = davinci_spi_tx_buf_u16; | 308 | dspi->get_tx = davinci_spi_tx_buf_u16; |
309 | dspi->bytes_per_word[spi->chip_select] = 2; | 309 | dspi->bytes_per_word[spi->chip_select] = 2; |
310 | } else | 310 | } |
311 | return -EINVAL; | ||
312 | 311 | ||
313 | if (!hz) | 312 | if (!hz) |
314 | hz = spi->max_speed_hz; | 313 | hz = spi->max_speed_hz; |
@@ -865,7 +864,7 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
865 | goto err; | 864 | goto err; |
866 | } | 865 | } |
867 | 866 | ||
868 | dev_set_drvdata(&pdev->dev, master); | 867 | platform_set_drvdata(pdev, master); |
869 | 868 | ||
870 | dspi = spi_master_get_devdata(master); | 869 | dspi = spi_master_get_devdata(master); |
871 | if (dspi == NULL) { | 870 | if (dspi == NULL) { |
@@ -933,6 +932,7 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
933 | master->dev.of_node = pdev->dev.of_node; | 932 | master->dev.of_node = pdev->dev.of_node; |
934 | master->bus_num = pdev->id; | 933 | master->bus_num = pdev->id; |
935 | master->num_chipselect = pdata->num_chipselect; | 934 | master->num_chipselect = pdata->num_chipselect; |
935 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); | ||
936 | master->setup = davinci_spi_setup; | 936 | master->setup = davinci_spi_setup; |
937 | 937 | ||
938 | dspi->bitbang.chipselect = davinci_spi_chipselect; | 938 | dspi->bitbang.chipselect = davinci_spi_chipselect; |
@@ -1044,7 +1044,7 @@ static int davinci_spi_remove(struct platform_device *pdev) | |||
1044 | struct spi_master *master; | 1044 | struct spi_master *master; |
1045 | struct resource *r; | 1045 | struct resource *r; |
1046 | 1046 | ||
1047 | master = dev_get_drvdata(&pdev->dev); | 1047 | master = platform_get_drvdata(pdev); |
1048 | dspi = spi_master_get_devdata(master); | 1048 | dspi = spi_master_get_devdata(master); |
1049 | 1049 | ||
1050 | spi_bitbang_stop(&dspi->bitbang); | 1050 | spi_bitbang_stop(&dspi->bitbang); |
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 4a6d5c9057a4..4aa8be865cc0 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c | |||
@@ -111,8 +111,6 @@ static int dw_spi_mmio_remove(struct platform_device *pdev) | |||
111 | struct dw_spi_mmio *dwsmmio = platform_get_drvdata(pdev); | 111 | struct dw_spi_mmio *dwsmmio = platform_get_drvdata(pdev); |
112 | struct resource *mem; | 112 | struct resource *mem; |
113 | 113 | ||
114 | platform_set_drvdata(pdev, NULL); | ||
115 | |||
116 | clk_disable(dwsmmio->clk); | 114 | clk_disable(dwsmmio->clk); |
117 | clk_put(dwsmmio->clk); | 115 | clk_put(dwsmmio->clk); |
118 | dwsmmio->clk = NULL; | 116 | dwsmmio->clk = NULL; |
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index c1abc06899e7..79c958e49f61 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c | |||
@@ -457,19 +457,7 @@ static void pump_transfers(unsigned long data) | |||
457 | } | 457 | } |
458 | if (transfer->bits_per_word) { | 458 | if (transfer->bits_per_word) { |
459 | bits = transfer->bits_per_word; | 459 | bits = transfer->bits_per_word; |
460 | 460 | dws->n_bytes = dws->dma_width = bits >> 3; | |
461 | switch (bits) { | ||
462 | case 8: | ||
463 | case 16: | ||
464 | dws->n_bytes = dws->dma_width = bits >> 3; | ||
465 | break; | ||
466 | default: | ||
467 | printk(KERN_ERR "MRST SPI0: unsupported bits:" | ||
468 | "%db\n", bits); | ||
469 | message->status = -EIO; | ||
470 | goto early_exit; | ||
471 | } | ||
472 | |||
473 | cr0 = (bits - 1) | 461 | cr0 = (bits - 1) |
474 | | (chip->type << SPI_FRF_OFFSET) | 462 | | (chip->type << SPI_FRF_OFFSET) |
475 | | (spi->mode << SPI_MODE_OFFSET) | 463 | | (spi->mode << SPI_MODE_OFFSET) |
@@ -629,9 +617,6 @@ static int dw_spi_setup(struct spi_device *spi) | |||
629 | struct dw_spi_chip *chip_info = NULL; | 617 | struct dw_spi_chip *chip_info = NULL; |
630 | struct chip_data *chip; | 618 | struct chip_data *chip; |
631 | 619 | ||
632 | if (spi->bits_per_word != 8 && spi->bits_per_word != 16) | ||
633 | return -EINVAL; | ||
634 | |||
635 | /* Only alloc on first setup */ | 620 | /* Only alloc on first setup */ |
636 | chip = spi_get_ctldata(spi); | 621 | chip = spi_get_ctldata(spi); |
637 | if (!chip) { | 622 | if (!chip) { |
@@ -660,16 +645,12 @@ static int dw_spi_setup(struct spi_device *spi) | |||
660 | chip->enable_dma = chip_info->enable_dma; | 645 | chip->enable_dma = chip_info->enable_dma; |
661 | } | 646 | } |
662 | 647 | ||
663 | if (spi->bits_per_word <= 8) { | 648 | if (spi->bits_per_word == 8) { |
664 | chip->n_bytes = 1; | 649 | chip->n_bytes = 1; |
665 | chip->dma_width = 1; | 650 | chip->dma_width = 1; |
666 | } else if (spi->bits_per_word <= 16) { | 651 | } else if (spi->bits_per_word == 16) { |
667 | chip->n_bytes = 2; | 652 | chip->n_bytes = 2; |
668 | chip->dma_width = 2; | 653 | chip->dma_width = 2; |
669 | } else { | ||
670 | /* Never take >16b case for MRST SPIC */ | ||
671 | dev_err(&spi->dev, "invalid wordsize\n"); | ||
672 | return -EINVAL; | ||
673 | } | 654 | } |
674 | chip->bits_per_word = spi->bits_per_word; | 655 | chip->bits_per_word = spi->bits_per_word; |
675 | 656 | ||
@@ -824,6 +805,7 @@ int dw_spi_add_host(struct dw_spi *dws) | |||
824 | } | 805 | } |
825 | 806 | ||
826 | master->mode_bits = SPI_CPOL | SPI_CPHA; | 807 | master->mode_bits = SPI_CPOL | SPI_CPHA; |
808 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); | ||
827 | master->bus_num = dws->bus_num; | 809 | master->bus_num = dws->bus_num; |
828 | master->num_chipselect = dws->num_cs; | 810 | master->num_chipselect = dws->num_cs; |
829 | master->cleanup = dw_spi_cleanup; | 811 | master->cleanup = dw_spi_cleanup; |
diff --git a/drivers/spi/spi-ep93xx.c b/drivers/spi/spi-ep93xx.c index d7bac60253c9..cad30b8a1d71 100644 --- a/drivers/spi/spi-ep93xx.c +++ b/drivers/spi/spi-ep93xx.c | |||
@@ -296,12 +296,6 @@ static int ep93xx_spi_setup(struct spi_device *spi) | |||
296 | struct ep93xx_spi *espi = spi_master_get_devdata(spi->master); | 296 | struct ep93xx_spi *espi = spi_master_get_devdata(spi->master); |
297 | struct ep93xx_spi_chip *chip; | 297 | struct ep93xx_spi_chip *chip; |
298 | 298 | ||
299 | if (spi->bits_per_word < 4 || spi->bits_per_word > 16) { | ||
300 | dev_err(&espi->pdev->dev, "invalid bits per word %d\n", | ||
301 | spi->bits_per_word); | ||
302 | return -EINVAL; | ||
303 | } | ||
304 | |||
305 | chip = spi_get_ctldata(spi); | 299 | chip = spi_get_ctldata(spi); |
306 | if (!chip) { | 300 | if (!chip) { |
307 | dev_dbg(&espi->pdev->dev, "initial setup for %s\n", | 301 | dev_dbg(&espi->pdev->dev, "initial setup for %s\n", |
@@ -365,10 +359,6 @@ static int ep93xx_spi_transfer(struct spi_device *spi, struct spi_message *msg) | |||
365 | 359 | ||
366 | /* first validate each transfer */ | 360 | /* first validate each transfer */ |
367 | list_for_each_entry(t, &msg->transfers, transfer_list) { | 361 | list_for_each_entry(t, &msg->transfers, transfer_list) { |
368 | if (t->bits_per_word) { | ||
369 | if (t->bits_per_word < 4 || t->bits_per_word > 16) | ||
370 | return -EINVAL; | ||
371 | } | ||
372 | if (t->speed_hz && t->speed_hz < espi->min_rate) | 362 | if (t->speed_hz && t->speed_hz < espi->min_rate) |
373 | return -EINVAL; | 363 | return -EINVAL; |
374 | } | 364 | } |
@@ -1046,6 +1036,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev) | |||
1046 | master->bus_num = pdev->id; | 1036 | master->bus_num = pdev->id; |
1047 | master->num_chipselect = info->num_chipselect; | 1037 | master->num_chipselect = info->num_chipselect; |
1048 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; | 1038 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; |
1039 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); | ||
1049 | 1040 | ||
1050 | platform_set_drvdata(pdev, master); | 1041 | platform_set_drvdata(pdev, master); |
1051 | 1042 | ||
@@ -1104,6 +1095,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev) | |||
1104 | espi->wq = create_singlethread_workqueue("ep93xx_spid"); | 1095 | espi->wq = create_singlethread_workqueue("ep93xx_spid"); |
1105 | if (!espi->wq) { | 1096 | if (!espi->wq) { |
1106 | dev_err(&pdev->dev, "unable to create workqueue\n"); | 1097 | dev_err(&pdev->dev, "unable to create workqueue\n"); |
1098 | error = -ENOMEM; | ||
1107 | goto fail_free_dma; | 1099 | goto fail_free_dma; |
1108 | } | 1100 | } |
1109 | INIT_WORK(&espi->msg_work, ep93xx_spi_work); | 1101 | INIT_WORK(&espi->msg_work, ep93xx_spi_work); |
@@ -1132,7 +1124,6 @@ fail_put_clock: | |||
1132 | clk_put(espi->clk); | 1124 | clk_put(espi->clk); |
1133 | fail_release_master: | 1125 | fail_release_master: |
1134 | spi_master_put(master); | 1126 | spi_master_put(master); |
1135 | platform_set_drvdata(pdev, NULL); | ||
1136 | 1127 | ||
1137 | return error; | 1128 | return error; |
1138 | } | 1129 | } |
@@ -1167,7 +1158,6 @@ static int ep93xx_spi_remove(struct platform_device *pdev) | |||
1167 | 1158 | ||
1168 | ep93xx_spi_release_dma(espi); | 1159 | ep93xx_spi_release_dma(espi); |
1169 | clk_put(espi->clk); | 1160 | clk_put(espi->clk); |
1170 | platform_set_drvdata(pdev, NULL); | ||
1171 | 1161 | ||
1172 | spi_unregister_master(master); | 1162 | spi_unregister_master(master); |
1173 | return 0; | 1163 | return 0; |
diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi-fsl-espi.c index 24610ca8955d..6a74d7848d93 100644 --- a/drivers/spi/spi-fsl-espi.c +++ b/drivers/spi/spi-fsl-espi.c | |||
@@ -144,10 +144,6 @@ static int fsl_espi_setup_transfer(struct spi_device *spi, | |||
144 | if (!bits_per_word) | 144 | if (!bits_per_word) |
145 | bits_per_word = spi->bits_per_word; | 145 | bits_per_word = spi->bits_per_word; |
146 | 146 | ||
147 | /* Make sure its a bit width we support [4..16] */ | ||
148 | if ((bits_per_word < 4) || (bits_per_word > 16)) | ||
149 | return -EINVAL; | ||
150 | |||
151 | if (!hz) | 147 | if (!hz) |
152 | hz = spi->max_speed_hz; | 148 | hz = spi->max_speed_hz; |
153 | 149 | ||
@@ -157,12 +153,10 @@ static int fsl_espi_setup_transfer(struct spi_device *spi, | |||
157 | cs->get_tx = mpc8xxx_spi_tx_buf_u32; | 153 | cs->get_tx = mpc8xxx_spi_tx_buf_u32; |
158 | if (bits_per_word <= 8) { | 154 | if (bits_per_word <= 8) { |
159 | cs->rx_shift = 8 - bits_per_word; | 155 | cs->rx_shift = 8 - bits_per_word; |
160 | } else if (bits_per_word <= 16) { | 156 | } else { |
161 | cs->rx_shift = 16 - bits_per_word; | 157 | cs->rx_shift = 16 - bits_per_word; |
162 | if (spi->mode & SPI_LSB_FIRST) | 158 | if (spi->mode & SPI_LSB_FIRST) |
163 | cs->get_tx = fsl_espi_tx_buf_lsb; | 159 | cs->get_tx = fsl_espi_tx_buf_lsb; |
164 | } else { | ||
165 | return -EINVAL; | ||
166 | } | 160 | } |
167 | 161 | ||
168 | mpc8xxx_spi->rx_shift = cs->rx_shift; | 162 | mpc8xxx_spi->rx_shift = cs->rx_shift; |
@@ -609,6 +603,7 @@ static struct spi_master * fsl_espi_probe(struct device *dev, | |||
609 | if (ret) | 603 | if (ret) |
610 | goto err_probe; | 604 | goto err_probe; |
611 | 605 | ||
606 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); | ||
612 | master->setup = fsl_espi_setup; | 607 | master->setup = fsl_espi_setup; |
613 | 608 | ||
614 | mpc8xxx_spi = spi_master_get_devdata(master); | 609 | mpc8xxx_spi = spi_master_get_devdata(master); |
diff --git a/drivers/spi/spi-fsl-lib.c b/drivers/spi/spi-fsl-lib.c index a91db0e57b23..e947f2d1b2f5 100644 --- a/drivers/spi/spi-fsl-lib.c +++ b/drivers/spi/spi-fsl-lib.c | |||
@@ -61,7 +61,7 @@ struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata) | |||
61 | return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata); | 61 | return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata); |
62 | } | 62 | } |
63 | 63 | ||
64 | void mpc8xxx_spi_work(struct work_struct *work) | 64 | static void mpc8xxx_spi_work(struct work_struct *work) |
65 | { | 65 | { |
66 | struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi, | 66 | struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi, |
67 | work); | 67 | work); |
diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c index 14e202ee7036..41e89c3e3edc 100644 --- a/drivers/spi/spi-fsl-spi.c +++ b/drivers/spi/spi-fsl-spi.c | |||
@@ -853,7 +853,7 @@ err: | |||
853 | 853 | ||
854 | static int of_fsl_spi_remove(struct platform_device *ofdev) | 854 | static int of_fsl_spi_remove(struct platform_device *ofdev) |
855 | { | 855 | { |
856 | struct spi_master *master = dev_get_drvdata(&ofdev->dev); | 856 | struct spi_master *master = platform_get_drvdata(ofdev); |
857 | struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); | 857 | struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); |
858 | int ret; | 858 | int ret; |
859 | 859 | ||
diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c index 0021fc4c45bc..a54524cf42cc 100644 --- a/drivers/spi/spi-gpio.c +++ b/drivers/spi/spi-gpio.c | |||
@@ -239,9 +239,6 @@ static int spi_gpio_setup(struct spi_device *spi) | |||
239 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | 239 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
240 | struct device_node *np = spi->master->dev.of_node; | 240 | struct device_node *np = spi->master->dev.of_node; |
241 | 241 | ||
242 | if (spi->bits_per_word > 32) | ||
243 | return -EINVAL; | ||
244 | |||
245 | if (np) { | 242 | if (np) { |
246 | /* | 243 | /* |
247 | * In DT environments, the CS GPIOs have already been | 244 | * In DT environments, the CS GPIOs have already been |
@@ -446,6 +443,7 @@ static int spi_gpio_probe(struct platform_device *pdev) | |||
446 | if (pdata) | 443 | if (pdata) |
447 | spi_gpio->pdata = *pdata; | 444 | spi_gpio->pdata = *pdata; |
448 | 445 | ||
446 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); | ||
449 | master->flags = master_flags; | 447 | master->flags = master_flags; |
450 | master->bus_num = pdev->id; | 448 | master->bus_num = pdev->id; |
451 | master->num_chipselect = SPI_N_CHIPSEL; | 449 | master->num_chipselect = SPI_N_CHIPSEL; |
@@ -514,8 +512,6 @@ static int spi_gpio_remove(struct platform_device *pdev) | |||
514 | status = spi_bitbang_stop(&spi_gpio->bitbang); | 512 | status = spi_bitbang_stop(&spi_gpio->bitbang); |
515 | spi_master_put(spi_gpio->bitbang.master); | 513 | spi_master_put(spi_gpio->bitbang.master); |
516 | 514 | ||
517 | platform_set_drvdata(pdev, NULL); | ||
518 | |||
519 | if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) | 515 | if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) |
520 | gpio_free(SPI_MISO_GPIO); | 516 | gpio_free(SPI_MISO_GPIO); |
521 | if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) | 517 | if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) |
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 0befeeb522f4..7db4f43ee4d8 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c | |||
@@ -37,7 +37,6 @@ | |||
37 | #include <linux/of.h> | 37 | #include <linux/of.h> |
38 | #include <linux/of_device.h> | 38 | #include <linux/of_device.h> |
39 | #include <linux/of_gpio.h> | 39 | #include <linux/of_gpio.h> |
40 | #include <linux/pinctrl/consumer.h> | ||
41 | 40 | ||
42 | #include <linux/platform_data/spi-imx.h> | 41 | #include <linux/platform_data/spi-imx.h> |
43 | 42 | ||
@@ -698,11 +697,10 @@ static int spi_imx_setupxfer(struct spi_device *spi, | |||
698 | } else if (config.bpw <= 16) { | 697 | } else if (config.bpw <= 16) { |
699 | spi_imx->rx = spi_imx_buf_rx_u16; | 698 | spi_imx->rx = spi_imx_buf_rx_u16; |
700 | spi_imx->tx = spi_imx_buf_tx_u16; | 699 | spi_imx->tx = spi_imx_buf_tx_u16; |
701 | } else if (config.bpw <= 32) { | 700 | } else { |
702 | spi_imx->rx = spi_imx_buf_rx_u32; | 701 | spi_imx->rx = spi_imx_buf_rx_u32; |
703 | spi_imx->tx = spi_imx_buf_tx_u32; | 702 | spi_imx->tx = spi_imx_buf_tx_u32; |
704 | } else | 703 | } |
705 | BUG(); | ||
706 | 704 | ||
707 | spi_imx->devtype_data->config(spi_imx, &config); | 705 | spi_imx->devtype_data->config(spi_imx, &config); |
708 | 706 | ||
@@ -760,7 +758,6 @@ static int spi_imx_probe(struct platform_device *pdev) | |||
760 | struct spi_master *master; | 758 | struct spi_master *master; |
761 | struct spi_imx_data *spi_imx; | 759 | struct spi_imx_data *spi_imx; |
762 | struct resource *res; | 760 | struct resource *res; |
763 | struct pinctrl *pinctrl; | ||
764 | int i, ret, num_cs; | 761 | int i, ret, num_cs; |
765 | 762 | ||
766 | if (!np && !mxc_platform_info) { | 763 | if (!np && !mxc_platform_info) { |
@@ -783,6 +780,7 @@ static int spi_imx_probe(struct platform_device *pdev) | |||
783 | 780 | ||
784 | platform_set_drvdata(pdev, master); | 781 | platform_set_drvdata(pdev, master); |
785 | 782 | ||
783 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); | ||
786 | master->bus_num = pdev->id; | 784 | master->bus_num = pdev->id; |
787 | master->num_chipselect = num_cs; | 785 | master->num_chipselect = num_cs; |
788 | 786 | ||
@@ -848,12 +846,6 @@ static int spi_imx_probe(struct platform_device *pdev) | |||
848 | goto out_iounmap; | 846 | goto out_iounmap; |
849 | } | 847 | } |
850 | 848 | ||
851 | pinctrl = devm_pinctrl_get_select_default(&pdev->dev); | ||
852 | if (IS_ERR(pinctrl)) { | ||
853 | ret = PTR_ERR(pinctrl); | ||
854 | goto out_free_irq; | ||
855 | } | ||
856 | |||
857 | spi_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); | 849 | spi_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); |
858 | if (IS_ERR(spi_imx->clk_ipg)) { | 850 | if (IS_ERR(spi_imx->clk_ipg)) { |
859 | ret = PTR_ERR(spi_imx->clk_ipg); | 851 | ret = PTR_ERR(spi_imx->clk_ipg); |
@@ -902,7 +894,6 @@ out_gpio_free: | |||
902 | } | 894 | } |
903 | spi_master_put(master); | 895 | spi_master_put(master); |
904 | kfree(master); | 896 | kfree(master); |
905 | platform_set_drvdata(pdev, NULL); | ||
906 | return ret; | 897 | return ret; |
907 | } | 898 | } |
908 | 899 | ||
@@ -929,8 +920,6 @@ static int spi_imx_remove(struct platform_device *pdev) | |||
929 | 920 | ||
930 | release_mem_region(res->start, resource_size(res)); | 921 | release_mem_region(res->start, resource_size(res)); |
931 | 922 | ||
932 | platform_set_drvdata(pdev, NULL); | ||
933 | |||
934 | return 0; | 923 | return 0; |
935 | } | 924 | } |
936 | 925 | ||
diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c index dfddf336912d..29fce6af5145 100644 --- a/drivers/spi/spi-mpc512x-psc.c +++ b/drivers/spi/spi-mpc512x-psc.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/of_address.h> | 22 | #include <linux/of_address.h> |
23 | #include <linux/of_platform.h> | 23 | #include <linux/of_platform.h> |
24 | #include <linux/workqueue.h> | ||
25 | #include <linux/completion.h> | 24 | #include <linux/completion.h> |
26 | #include <linux/io.h> | 25 | #include <linux/io.h> |
27 | #include <linux/delay.h> | 26 | #include <linux/delay.h> |
@@ -33,24 +32,15 @@ | |||
33 | 32 | ||
34 | struct mpc512x_psc_spi { | 33 | struct mpc512x_psc_spi { |
35 | void (*cs_control)(struct spi_device *spi, bool on); | 34 | void (*cs_control)(struct spi_device *spi, bool on); |
36 | u32 sysclk; | ||
37 | 35 | ||
38 | /* driver internal data */ | 36 | /* driver internal data */ |
39 | struct mpc52xx_psc __iomem *psc; | 37 | struct mpc52xx_psc __iomem *psc; |
40 | struct mpc512x_psc_fifo __iomem *fifo; | 38 | struct mpc512x_psc_fifo __iomem *fifo; |
41 | unsigned int irq; | 39 | unsigned int irq; |
42 | u8 bits_per_word; | 40 | u8 bits_per_word; |
43 | u8 busy; | ||
44 | u32 mclk; | 41 | u32 mclk; |
45 | u8 eofbyte; | ||
46 | 42 | ||
47 | struct workqueue_struct *workqueue; | 43 | struct completion txisrdone; |
48 | struct work_struct work; | ||
49 | |||
50 | struct list_head queue; | ||
51 | spinlock_t lock; /* Message queue lock */ | ||
52 | |||
53 | struct completion done; | ||
54 | }; | 44 | }; |
55 | 45 | ||
56 | /* controller state */ | 46 | /* controller state */ |
@@ -136,145 +126,223 @@ static int mpc512x_psc_spi_transfer_rxtx(struct spi_device *spi, | |||
136 | struct spi_transfer *t) | 126 | struct spi_transfer *t) |
137 | { | 127 | { |
138 | struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master); | 128 | struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master); |
139 | struct mpc52xx_psc __iomem *psc = mps->psc; | ||
140 | struct mpc512x_psc_fifo __iomem *fifo = mps->fifo; | 129 | struct mpc512x_psc_fifo __iomem *fifo = mps->fifo; |
141 | size_t len = t->len; | 130 | size_t tx_len = t->len; |
131 | size_t rx_len = t->len; | ||
142 | u8 *tx_buf = (u8 *)t->tx_buf; | 132 | u8 *tx_buf = (u8 *)t->tx_buf; |
143 | u8 *rx_buf = (u8 *)t->rx_buf; | 133 | u8 *rx_buf = (u8 *)t->rx_buf; |
144 | 134 | ||
145 | if (!tx_buf && !rx_buf && t->len) | 135 | if (!tx_buf && !rx_buf && t->len) |
146 | return -EINVAL; | 136 | return -EINVAL; |
147 | 137 | ||
148 | /* Zero MR2 */ | 138 | while (rx_len || tx_len) { |
149 | in_8(&psc->mode); | 139 | size_t txcount; |
150 | out_8(&psc->mode, 0x0); | ||
151 | |||
152 | /* enable transmiter/receiver */ | ||
153 | out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); | ||
154 | |||
155 | while (len) { | ||
156 | int count; | ||
157 | int i; | ||
158 | u8 data; | 140 | u8 data; |
159 | size_t fifosz; | 141 | size_t fifosz; |
160 | int rxcount; | 142 | size_t rxcount; |
143 | int rxtries; | ||
161 | 144 | ||
162 | /* | 145 | /* |
163 | * The number of bytes that can be sent at a time | 146 | * send the TX bytes in as large a chunk as possible |
164 | * depends on the fifo size. | 147 | * but neither exceed the TX nor the RX FIFOs |
165 | */ | 148 | */ |
166 | fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->txsz)); | 149 | fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->txsz)); |
167 | count = min(fifosz, len); | 150 | txcount = min(fifosz, tx_len); |
168 | 151 | fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->rxsz)); | |
169 | for (i = count; i > 0; i--) { | 152 | fifosz -= in_be32(&fifo->rxcnt) + 1; |
170 | data = tx_buf ? *tx_buf++ : 0; | 153 | txcount = min(fifosz, txcount); |
171 | if (len == EOFBYTE && t->cs_change) | 154 | if (txcount) { |
172 | setbits32(&fifo->txcmd, MPC512x_PSC_FIFO_EOF); | 155 | |
173 | out_8(&fifo->txdata_8, data); | 156 | /* fill the TX FIFO */ |
174 | len--; | 157 | while (txcount-- > 0) { |
158 | data = tx_buf ? *tx_buf++ : 0; | ||
159 | if (tx_len == EOFBYTE && t->cs_change) | ||
160 | setbits32(&fifo->txcmd, | ||
161 | MPC512x_PSC_FIFO_EOF); | ||
162 | out_8(&fifo->txdata_8, data); | ||
163 | tx_len--; | ||
164 | } | ||
165 | |||
166 | /* have the ISR trigger when the TX FIFO is empty */ | ||
167 | INIT_COMPLETION(mps->txisrdone); | ||
168 | out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); | ||
169 | out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY); | ||
170 | wait_for_completion(&mps->txisrdone); | ||
175 | } | 171 | } |
176 | 172 | ||
177 | INIT_COMPLETION(mps->done); | 173 | /* |
174 | * consume as much RX data as the FIFO holds, while we | ||
175 | * iterate over the transfer's TX data length | ||
176 | * | ||
177 | * only insist in draining all the remaining RX bytes | ||
178 | * when the TX bytes were exhausted (that's at the very | ||
179 | * end of this transfer, not when still iterating over | ||
180 | * the transfer's chunks) | ||
181 | */ | ||
182 | rxtries = 50; | ||
183 | do { | ||
184 | |||
185 | /* | ||
186 | * grab whatever was in the FIFO when we started | ||
187 | * looking, don't bother fetching what was added to | ||
188 | * the FIFO while we read from it -- we'll return | ||
189 | * here eventually and prefer sending out remaining | ||
190 | * TX data | ||
191 | */ | ||
192 | fifosz = in_be32(&fifo->rxcnt); | ||
193 | rxcount = min(fifosz, rx_len); | ||
194 | while (rxcount-- > 0) { | ||
195 | data = in_8(&fifo->rxdata_8); | ||
196 | if (rx_buf) | ||
197 | *rx_buf++ = data; | ||
198 | rx_len--; | ||
199 | } | ||
178 | 200 | ||
179 | /* interrupt on tx fifo empty */ | 201 | /* |
180 | out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); | 202 | * come back later if there still is TX data to send, |
181 | out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY); | 203 | * bail out of the RX drain loop if all of the TX data |
204 | * was sent and all of the RX data was received (i.e. | ||
205 | * when the transmission has completed) | ||
206 | */ | ||
207 | if (tx_len) | ||
208 | break; | ||
209 | if (!rx_len) | ||
210 | break; | ||
182 | 211 | ||
183 | wait_for_completion(&mps->done); | 212 | /* |
213 | * TX data transmission has completed while RX data | ||
214 | * is still pending -- that's a transient situation | ||
215 | * which depends on wire speed and specific | ||
216 | * hardware implementation details (buffering) yet | ||
217 | * should resolve very quickly | ||
218 | * | ||
219 | * just yield for a moment to not hog the CPU for | ||
220 | * too long when running SPI at low speed | ||
221 | * | ||
222 | * the timeout range is rather arbitrary and tries | ||
223 | * to balance throughput against system load; the | ||
224 | * chosen values result in a minimal timeout of 50 | ||
225 | * times 10us and thus work at speeds as low as | ||
226 | * some 20kbps, while the maximum timeout at the | ||
227 | * transfer's end could be 5ms _if_ nothing else | ||
228 | * ticks in the system _and_ RX data still wasn't | ||
229 | * received, which only occurs in situations that | ||
230 | * are exceptional; removing the unpredictability | ||
231 | * of the timeout either decreases throughput | ||
232 | * (longer timeouts), or puts more load on the | ||
233 | * system (fixed short timeouts) or requires the | ||
234 | * use of a timeout API instead of a counter and an | ||
235 | * unknown inner delay | ||
236 | */ | ||
237 | usleep_range(10, 100); | ||
238 | |||
239 | } while (--rxtries > 0); | ||
240 | if (!tx_len && rx_len && !rxtries) { | ||
241 | /* | ||
242 | * not enough RX bytes even after several retries | ||
243 | * and the resulting rather long timeout? | ||
244 | */ | ||
245 | rxcount = in_be32(&fifo->rxcnt); | ||
246 | dev_warn(&spi->dev, | ||
247 | "short xfer, missing %zd RX bytes, FIFO level %zd\n", | ||
248 | rx_len, rxcount); | ||
249 | } | ||
184 | 250 | ||
185 | mdelay(1); | 251 | /* |
252 | * drain and drop RX data which "should not be there" in | ||
253 | * the first place, for undisturbed transmission this turns | ||
254 | * into a NOP (except for the FIFO level fetch) | ||
255 | */ | ||
256 | if (!tx_len && !rx_len) { | ||
257 | while (in_be32(&fifo->rxcnt)) | ||
258 | in_8(&fifo->rxdata_8); | ||
259 | } | ||
186 | 260 | ||
187 | /* rx fifo should have count bytes in it */ | 261 | } |
188 | rxcount = in_be32(&fifo->rxcnt); | 262 | return 0; |
189 | if (rxcount != count) | 263 | } |
190 | mdelay(1); | ||
191 | 264 | ||
192 | rxcount = in_be32(&fifo->rxcnt); | 265 | static int mpc512x_psc_spi_msg_xfer(struct spi_master *master, |
193 | if (rxcount != count) { | 266 | struct spi_message *m) |
194 | dev_warn(&spi->dev, "expected %d bytes in rx fifo " | 267 | { |
195 | "but got %d\n", count, rxcount); | 268 | struct spi_device *spi; |
269 | unsigned cs_change; | ||
270 | int status; | ||
271 | struct spi_transfer *t; | ||
272 | |||
273 | spi = m->spi; | ||
274 | cs_change = 1; | ||
275 | status = 0; | ||
276 | list_for_each_entry(t, &m->transfers, transfer_list) { | ||
277 | if (t->bits_per_word || t->speed_hz) { | ||
278 | status = mpc512x_psc_spi_transfer_setup(spi, t); | ||
279 | if (status < 0) | ||
280 | break; | ||
196 | } | 281 | } |
197 | 282 | ||
198 | rxcount = min(rxcount, count); | 283 | if (cs_change) |
199 | for (i = rxcount; i > 0; i--) { | 284 | mpc512x_psc_spi_activate_cs(spi); |
200 | data = in_8(&fifo->rxdata_8); | 285 | cs_change = t->cs_change; |
201 | if (rx_buf) | 286 | |
202 | *rx_buf++ = data; | 287 | status = mpc512x_psc_spi_transfer_rxtx(spi, t); |
203 | } | 288 | if (status) |
204 | while (in_be32(&fifo->rxcnt)) { | 289 | break; |
205 | in_8(&fifo->rxdata_8); | 290 | m->actual_length += t->len; |
206 | } | 291 | |
292 | if (t->delay_usecs) | ||
293 | udelay(t->delay_usecs); | ||
294 | |||
295 | if (cs_change) | ||
296 | mpc512x_psc_spi_deactivate_cs(spi); | ||
207 | } | 297 | } |
208 | /* disable transmiter/receiver and fifo interrupt */ | 298 | |
209 | out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE); | 299 | m->status = status; |
210 | out_be32(&fifo->tximr, 0); | 300 | m->complete(m->context); |
211 | return 0; | 301 | |
302 | if (status || !cs_change) | ||
303 | mpc512x_psc_spi_deactivate_cs(spi); | ||
304 | |||
305 | mpc512x_psc_spi_transfer_setup(spi, NULL); | ||
306 | |||
307 | spi_finalize_current_message(master); | ||
308 | return status; | ||
212 | } | 309 | } |
213 | 310 | ||
214 | static void mpc512x_psc_spi_work(struct work_struct *work) | 311 | static int mpc512x_psc_spi_prep_xfer_hw(struct spi_master *master) |
215 | { | 312 | { |
216 | struct mpc512x_psc_spi *mps = container_of(work, | 313 | struct mpc512x_psc_spi *mps = spi_master_get_devdata(master); |
217 | struct mpc512x_psc_spi, | 314 | struct mpc52xx_psc __iomem *psc = mps->psc; |
218 | work); | ||
219 | |||
220 | spin_lock_irq(&mps->lock); | ||
221 | mps->busy = 1; | ||
222 | while (!list_empty(&mps->queue)) { | ||
223 | struct spi_message *m; | ||
224 | struct spi_device *spi; | ||
225 | struct spi_transfer *t = NULL; | ||
226 | unsigned cs_change; | ||
227 | int status; | ||
228 | |||
229 | m = container_of(mps->queue.next, struct spi_message, queue); | ||
230 | list_del_init(&m->queue); | ||
231 | spin_unlock_irq(&mps->lock); | ||
232 | |||
233 | spi = m->spi; | ||
234 | cs_change = 1; | ||
235 | status = 0; | ||
236 | list_for_each_entry(t, &m->transfers, transfer_list) { | ||
237 | if (t->bits_per_word || t->speed_hz) { | ||
238 | status = mpc512x_psc_spi_transfer_setup(spi, t); | ||
239 | if (status < 0) | ||
240 | break; | ||
241 | } | ||
242 | 315 | ||
243 | if (cs_change) | 316 | dev_dbg(&master->dev, "%s()\n", __func__); |
244 | mpc512x_psc_spi_activate_cs(spi); | ||
245 | cs_change = t->cs_change; | ||
246 | 317 | ||
247 | status = mpc512x_psc_spi_transfer_rxtx(spi, t); | 318 | /* Zero MR2 */ |
248 | if (status) | 319 | in_8(&psc->mode); |
249 | break; | 320 | out_8(&psc->mode, 0x0); |
250 | m->actual_length += t->len; | ||
251 | 321 | ||
252 | if (t->delay_usecs) | 322 | /* enable transmitter/receiver */ |
253 | udelay(t->delay_usecs); | 323 | out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); |
254 | 324 | ||
255 | if (cs_change) | 325 | return 0; |
256 | mpc512x_psc_spi_deactivate_cs(spi); | 326 | } |
257 | } | ||
258 | 327 | ||
259 | m->status = status; | 328 | static int mpc512x_psc_spi_unprep_xfer_hw(struct spi_master *master) |
260 | m->complete(m->context); | 329 | { |
330 | struct mpc512x_psc_spi *mps = spi_master_get_devdata(master); | ||
331 | struct mpc52xx_psc __iomem *psc = mps->psc; | ||
332 | struct mpc512x_psc_fifo __iomem *fifo = mps->fifo; | ||
261 | 333 | ||
262 | if (status || !cs_change) | 334 | dev_dbg(&master->dev, "%s()\n", __func__); |
263 | mpc512x_psc_spi_deactivate_cs(spi); | ||
264 | 335 | ||
265 | mpc512x_psc_spi_transfer_setup(spi, NULL); | 336 | /* disable transmitter/receiver and fifo interrupt */ |
337 | out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE); | ||
338 | out_be32(&fifo->tximr, 0); | ||
266 | 339 | ||
267 | spin_lock_irq(&mps->lock); | 340 | return 0; |
268 | } | ||
269 | mps->busy = 0; | ||
270 | spin_unlock_irq(&mps->lock); | ||
271 | } | 341 | } |
272 | 342 | ||
273 | static int mpc512x_psc_spi_setup(struct spi_device *spi) | 343 | static int mpc512x_psc_spi_setup(struct spi_device *spi) |
274 | { | 344 | { |
275 | struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master); | ||
276 | struct mpc512x_psc_spi_cs *cs = spi->controller_state; | 345 | struct mpc512x_psc_spi_cs *cs = spi->controller_state; |
277 | unsigned long flags; | ||
278 | int ret; | 346 | int ret; |
279 | 347 | ||
280 | if (spi->bits_per_word % 8) | 348 | if (spi->bits_per_word % 8) |
@@ -303,28 +371,6 @@ static int mpc512x_psc_spi_setup(struct spi_device *spi) | |||
303 | cs->bits_per_word = spi->bits_per_word; | 371 | cs->bits_per_word = spi->bits_per_word; |
304 | cs->speed_hz = spi->max_speed_hz; | 372 | cs->speed_hz = spi->max_speed_hz; |
305 | 373 | ||
306 | spin_lock_irqsave(&mps->lock, flags); | ||
307 | if (!mps->busy) | ||
308 | mpc512x_psc_spi_deactivate_cs(spi); | ||
309 | spin_unlock_irqrestore(&mps->lock, flags); | ||
310 | |||
311 | return 0; | ||
312 | } | ||
313 | |||
314 | static int mpc512x_psc_spi_transfer(struct spi_device *spi, | ||
315 | struct spi_message *m) | ||
316 | { | ||
317 | struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master); | ||
318 | unsigned long flags; | ||
319 | |||
320 | m->actual_length = 0; | ||
321 | m->status = -EINPROGRESS; | ||
322 | |||
323 | spin_lock_irqsave(&mps->lock, flags); | ||
324 | list_add_tail(&m->queue, &mps->queue); | ||
325 | queue_work(mps->workqueue, &mps->work); | ||
326 | spin_unlock_irqrestore(&mps->lock, flags); | ||
327 | |||
328 | return 0; | 374 | return 0; |
329 | } | 375 | } |
330 | 376 | ||
@@ -407,12 +453,12 @@ static irqreturn_t mpc512x_psc_spi_isr(int irq, void *dev_id) | |||
407 | struct mpc512x_psc_spi *mps = (struct mpc512x_psc_spi *)dev_id; | 453 | struct mpc512x_psc_spi *mps = (struct mpc512x_psc_spi *)dev_id; |
408 | struct mpc512x_psc_fifo __iomem *fifo = mps->fifo; | 454 | struct mpc512x_psc_fifo __iomem *fifo = mps->fifo; |
409 | 455 | ||
410 | /* clear interrupt and wake up the work queue */ | 456 | /* clear interrupt and wake up the rx/tx routine */ |
411 | if (in_be32(&fifo->txisr) & | 457 | if (in_be32(&fifo->txisr) & |
412 | in_be32(&fifo->tximr) & MPC512x_PSC_FIFO_EMPTY) { | 458 | in_be32(&fifo->tximr) & MPC512x_PSC_FIFO_EMPTY) { |
413 | out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); | 459 | out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); |
414 | out_be32(&fifo->tximr, 0); | 460 | out_be32(&fifo->tximr, 0); |
415 | complete(&mps->done); | 461 | complete(&mps->txisrdone); |
416 | return IRQ_HANDLED; | 462 | return IRQ_HANDLED; |
417 | } | 463 | } |
418 | return IRQ_NONE; | 464 | return IRQ_NONE; |
@@ -444,18 +490,18 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr, | |||
444 | 490 | ||
445 | if (pdata == NULL) { | 491 | if (pdata == NULL) { |
446 | mps->cs_control = mpc512x_spi_cs_control; | 492 | mps->cs_control = mpc512x_spi_cs_control; |
447 | mps->sysclk = 0; | ||
448 | master->bus_num = bus_num; | 493 | master->bus_num = bus_num; |
449 | } else { | 494 | } else { |
450 | mps->cs_control = pdata->cs_control; | 495 | mps->cs_control = pdata->cs_control; |
451 | mps->sysclk = pdata->sysclk; | ||
452 | master->bus_num = pdata->bus_num; | 496 | master->bus_num = pdata->bus_num; |
453 | master->num_chipselect = pdata->max_chipselect; | 497 | master->num_chipselect = pdata->max_chipselect; |
454 | } | 498 | } |
455 | 499 | ||
456 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; | 500 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; |
457 | master->setup = mpc512x_psc_spi_setup; | 501 | master->setup = mpc512x_psc_spi_setup; |
458 | master->transfer = mpc512x_psc_spi_transfer; | 502 | master->prepare_transfer_hardware = mpc512x_psc_spi_prep_xfer_hw; |
503 | master->transfer_one_message = mpc512x_psc_spi_msg_xfer; | ||
504 | master->unprepare_transfer_hardware = mpc512x_psc_spi_unprep_xfer_hw; | ||
459 | master->cleanup = mpc512x_psc_spi_cleanup; | 505 | master->cleanup = mpc512x_psc_spi_cleanup; |
460 | master->dev.of_node = dev->of_node; | 506 | master->dev.of_node = dev->of_node; |
461 | 507 | ||
@@ -473,31 +519,18 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr, | |||
473 | "mpc512x-psc-spi", mps); | 519 | "mpc512x-psc-spi", mps); |
474 | if (ret) | 520 | if (ret) |
475 | goto free_master; | 521 | goto free_master; |
522 | init_completion(&mps->txisrdone); | ||
476 | 523 | ||
477 | ret = mpc512x_psc_spi_port_config(master, mps); | 524 | ret = mpc512x_psc_spi_port_config(master, mps); |
478 | if (ret < 0) | 525 | if (ret < 0) |
479 | goto free_irq; | 526 | goto free_irq; |
480 | 527 | ||
481 | spin_lock_init(&mps->lock); | ||
482 | init_completion(&mps->done); | ||
483 | INIT_WORK(&mps->work, mpc512x_psc_spi_work); | ||
484 | INIT_LIST_HEAD(&mps->queue); | ||
485 | |||
486 | mps->workqueue = | ||
487 | create_singlethread_workqueue(dev_name(master->dev.parent)); | ||
488 | if (mps->workqueue == NULL) { | ||
489 | ret = -EBUSY; | ||
490 | goto free_irq; | ||
491 | } | ||
492 | |||
493 | ret = spi_register_master(master); | 528 | ret = spi_register_master(master); |
494 | if (ret < 0) | 529 | if (ret < 0) |
495 | goto unreg_master; | 530 | goto free_irq; |
496 | 531 | ||
497 | return ret; | 532 | return ret; |
498 | 533 | ||
499 | unreg_master: | ||
500 | destroy_workqueue(mps->workqueue); | ||
501 | free_irq: | 534 | free_irq: |
502 | free_irq(mps->irq, mps); | 535 | free_irq(mps->irq, mps); |
503 | free_master: | 536 | free_master: |
@@ -513,8 +546,6 @@ static int mpc512x_psc_spi_do_remove(struct device *dev) | |||
513 | struct spi_master *master = spi_master_get(dev_get_drvdata(dev)); | 546 | struct spi_master *master = spi_master_get(dev_get_drvdata(dev)); |
514 | struct mpc512x_psc_spi *mps = spi_master_get_devdata(master); | 547 | struct mpc512x_psc_spi *mps = spi_master_get_devdata(master); |
515 | 548 | ||
516 | flush_workqueue(mps->workqueue); | ||
517 | destroy_workqueue(mps->workqueue); | ||
518 | spi_unregister_master(master); | 549 | spi_unregister_master(master); |
519 | free_irq(mps->irq, mps); | 550 | free_irq(mps->irq, mps); |
520 | if (mps->psc) | 551 | if (mps->psc) |
diff --git a/drivers/spi/spi-mpc52xx-psc.c b/drivers/spi/spi-mpc52xx-psc.c index 291120b37dbb..fed0571d4dec 100644 --- a/drivers/spi/spi-mpc52xx-psc.c +++ b/drivers/spi/spi-mpc52xx-psc.c | |||
@@ -481,7 +481,7 @@ static int mpc52xx_psc_spi_of_probe(struct platform_device *op) | |||
481 | 481 | ||
482 | static int mpc52xx_psc_spi_of_remove(struct platform_device *op) | 482 | static int mpc52xx_psc_spi_of_remove(struct platform_device *op) |
483 | { | 483 | { |
484 | struct spi_master *master = spi_master_get(dev_get_drvdata(&op->dev)); | 484 | struct spi_master *master = spi_master_get(platform_get_drvdata(op)); |
485 | struct mpc52xx_psc_spi *mps = spi_master_get_devdata(master); | 485 | struct mpc52xx_psc_spi *mps = spi_master_get_devdata(master); |
486 | 486 | ||
487 | flush_workqueue(mps->workqueue); | 487 | flush_workqueue(mps->workqueue); |
diff --git a/drivers/spi/spi-mpc52xx.c b/drivers/spi/spi-mpc52xx.c index 29f77056eedc..7c675fe83101 100644 --- a/drivers/spi/spi-mpc52xx.c +++ b/drivers/spi/spi-mpc52xx.c | |||
@@ -438,7 +438,7 @@ static int mpc52xx_spi_probe(struct platform_device *op) | |||
438 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; | 438 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; |
439 | master->dev.of_node = op->dev.of_node; | 439 | master->dev.of_node = op->dev.of_node; |
440 | 440 | ||
441 | dev_set_drvdata(&op->dev, master); | 441 | platform_set_drvdata(op, master); |
442 | 442 | ||
443 | ms = spi_master_get_devdata(master); | 443 | ms = spi_master_get_devdata(master); |
444 | ms->master = master; | 444 | ms->master = master; |
@@ -529,7 +529,7 @@ static int mpc52xx_spi_probe(struct platform_device *op) | |||
529 | 529 | ||
530 | static int mpc52xx_spi_remove(struct platform_device *op) | 530 | static int mpc52xx_spi_remove(struct platform_device *op) |
531 | { | 531 | { |
532 | struct spi_master *master = spi_master_get(dev_get_drvdata(&op->dev)); | 532 | struct spi_master *master = spi_master_get(platform_get_drvdata(op)); |
533 | struct mpc52xx_spi *ms = spi_master_get_devdata(master); | 533 | struct mpc52xx_spi *ms = spi_master_get_devdata(master); |
534 | int i; | 534 | int i; |
535 | 535 | ||
diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c index 84982768cd10..424d38e59421 100644 --- a/drivers/spi/spi-mxs.c +++ b/drivers/spi/spi-mxs.c | |||
@@ -46,7 +46,6 @@ | |||
46 | #include <linux/gpio.h> | 46 | #include <linux/gpio.h> |
47 | #include <linux/regulator/consumer.h> | 47 | #include <linux/regulator/consumer.h> |
48 | #include <linux/module.h> | 48 | #include <linux/module.h> |
49 | #include <linux/pinctrl/consumer.h> | ||
50 | #include <linux/stmp_device.h> | 49 | #include <linux/stmp_device.h> |
51 | #include <linux/spi/spi.h> | 50 | #include <linux/spi/spi.h> |
52 | #include <linux/spi/mxs-spi.h> | 51 | #include <linux/spi/mxs-spi.h> |
@@ -75,12 +74,6 @@ static int mxs_spi_setup_transfer(struct spi_device *dev, | |||
75 | if (t && t->bits_per_word) | 74 | if (t && t->bits_per_word) |
76 | bits_per_word = t->bits_per_word; | 75 | bits_per_word = t->bits_per_word; |
77 | 76 | ||
78 | if (bits_per_word != 8) { | ||
79 | dev_err(&dev->dev, "%s, unsupported bits_per_word=%d\n", | ||
80 | __func__, bits_per_word); | ||
81 | return -EINVAL; | ||
82 | } | ||
83 | |||
84 | hz = dev->max_speed_hz; | 77 | hz = dev->max_speed_hz; |
85 | if (t && t->speed_hz) | 78 | if (t && t->speed_hz) |
86 | hz = min(hz, t->speed_hz); | 79 | hz = min(hz, t->speed_hz); |
@@ -506,7 +499,6 @@ static int mxs_spi_probe(struct platform_device *pdev) | |||
506 | struct mxs_spi *spi; | 499 | struct mxs_spi *spi; |
507 | struct mxs_ssp *ssp; | 500 | struct mxs_ssp *ssp; |
508 | struct resource *iores; | 501 | struct resource *iores; |
509 | struct pinctrl *pinctrl; | ||
510 | struct clk *clk; | 502 | struct clk *clk; |
511 | void __iomem *base; | 503 | void __iomem *base; |
512 | int devid, clk_freq; | 504 | int devid, clk_freq; |
@@ -528,10 +520,6 @@ static int mxs_spi_probe(struct platform_device *pdev) | |||
528 | if (IS_ERR(base)) | 520 | if (IS_ERR(base)) |
529 | return PTR_ERR(base); | 521 | return PTR_ERR(base); |
530 | 522 | ||
531 | pinctrl = devm_pinctrl_get_select_default(&pdev->dev); | ||
532 | if (IS_ERR(pinctrl)) | ||
533 | return PTR_ERR(pinctrl); | ||
534 | |||
535 | clk = devm_clk_get(&pdev->dev, NULL); | 523 | clk = devm_clk_get(&pdev->dev, NULL); |
536 | if (IS_ERR(clk)) | 524 | if (IS_ERR(clk)) |
537 | return PTR_ERR(clk); | 525 | return PTR_ERR(clk); |
@@ -548,6 +536,7 @@ static int mxs_spi_probe(struct platform_device *pdev) | |||
548 | 536 | ||
549 | master->transfer_one_message = mxs_spi_transfer_one; | 537 | master->transfer_one_message = mxs_spi_transfer_one; |
550 | master->setup = mxs_spi_setup; | 538 | master->setup = mxs_spi_setup; |
539 | master->bits_per_word_mask = SPI_BPW_MASK(8); | ||
551 | master->mode_bits = SPI_CPOL | SPI_CPHA; | 540 | master->mode_bits = SPI_CPOL | SPI_CPHA; |
552 | master->num_chipselect = 3; | 541 | master->num_chipselect = 3; |
553 | master->dev.of_node = np; | 542 | master->dev.of_node = np; |
diff --git a/drivers/spi/spi-nuc900.c b/drivers/spi/spi-nuc900.c index b3f9ec83ef73..2ad3d74ac021 100644 --- a/drivers/spi/spi-nuc900.c +++ b/drivers/spi/spi-nuc900.c | |||
@@ -174,17 +174,6 @@ static void nuc900_spi_gobusy(struct nuc900_spi *hw) | |||
174 | spin_unlock_irqrestore(&hw->lock, flags); | 174 | spin_unlock_irqrestore(&hw->lock, flags); |
175 | } | 175 | } |
176 | 176 | ||
177 | static int nuc900_spi_setupxfer(struct spi_device *spi, | ||
178 | struct spi_transfer *t) | ||
179 | { | ||
180 | return 0; | ||
181 | } | ||
182 | |||
183 | static int nuc900_spi_setup(struct spi_device *spi) | ||
184 | { | ||
185 | return 0; | ||
186 | } | ||
187 | |||
188 | static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count) | 177 | static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count) |
189 | { | 178 | { |
190 | return hw->tx ? hw->tx[count] : 0; | 179 | return hw->tx ? hw->tx[count] : 0; |
@@ -377,10 +366,8 @@ static int nuc900_spi_probe(struct platform_device *pdev) | |||
377 | master->num_chipselect = hw->pdata->num_cs; | 366 | master->num_chipselect = hw->pdata->num_cs; |
378 | master->bus_num = hw->pdata->bus_num; | 367 | master->bus_num = hw->pdata->bus_num; |
379 | hw->bitbang.master = hw->master; | 368 | hw->bitbang.master = hw->master; |
380 | hw->bitbang.setup_transfer = nuc900_spi_setupxfer; | ||
381 | hw->bitbang.chipselect = nuc900_spi_chipsel; | 369 | hw->bitbang.chipselect = nuc900_spi_chipsel; |
382 | hw->bitbang.txrx_bufs = nuc900_spi_txrx; | 370 | hw->bitbang.txrx_bufs = nuc900_spi_txrx; |
383 | hw->bitbang.master->setup = nuc900_spi_setup; | ||
384 | 371 | ||
385 | hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 372 | hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
386 | if (hw->res == NULL) { | 373 | if (hw->res == NULL) { |
@@ -459,8 +446,6 @@ static int nuc900_spi_remove(struct platform_device *dev) | |||
459 | 446 | ||
460 | free_irq(hw->irq, hw); | 447 | free_irq(hw->irq, hw); |
461 | 448 | ||
462 | platform_set_drvdata(dev, NULL); | ||
463 | |||
464 | spi_bitbang_stop(&hw->bitbang); | 449 | spi_bitbang_stop(&hw->bitbang); |
465 | 450 | ||
466 | clk_disable(hw->clk); | 451 | clk_disable(hw->clk); |
diff --git a/drivers/spi/spi-oc-tiny.c b/drivers/spi/spi-oc-tiny.c index e60a776ed2d4..58deb79d046b 100644 --- a/drivers/spi/spi-oc-tiny.c +++ b/drivers/spi/spi-oc-tiny.c | |||
@@ -368,7 +368,6 @@ exit_gpio: | |||
368 | exit_busy: | 368 | exit_busy: |
369 | err = -EBUSY; | 369 | err = -EBUSY; |
370 | exit: | 370 | exit: |
371 | platform_set_drvdata(pdev, NULL); | ||
372 | spi_master_put(master); | 371 | spi_master_put(master); |
373 | return err; | 372 | return err; |
374 | } | 373 | } |
@@ -382,7 +381,6 @@ static int tiny_spi_remove(struct platform_device *pdev) | |||
382 | spi_bitbang_stop(&hw->bitbang); | 381 | spi_bitbang_stop(&hw->bitbang); |
383 | for (i = 0; i < hw->gpio_cs_count; i++) | 382 | for (i = 0; i < hw->gpio_cs_count; i++) |
384 | gpio_free(hw->gpio_cs[i]); | 383 | gpio_free(hw->gpio_cs[i]); |
385 | platform_set_drvdata(pdev, NULL); | ||
386 | spi_master_put(master); | 384 | spi_master_put(master); |
387 | return 0; | 385 | return 0; |
388 | } | 386 | } |
diff --git a/drivers/spi/spi-omap-100k.c b/drivers/spi/spi-omap-100k.c index 78d29a18dcc4..ee25670f8cfd 100644 --- a/drivers/spi/spi-omap-100k.c +++ b/drivers/spi/spi-omap-100k.c | |||
@@ -298,12 +298,6 @@ static int omap1_spi100k_setup(struct spi_device *spi) | |||
298 | struct omap1_spi100k *spi100k; | 298 | struct omap1_spi100k *spi100k; |
299 | struct omap1_spi100k_cs *cs = spi->controller_state; | 299 | struct omap1_spi100k_cs *cs = spi->controller_state; |
300 | 300 | ||
301 | if (spi->bits_per_word < 4 || spi->bits_per_word > 32) { | ||
302 | dev_dbg(&spi->dev, "setup: unsupported %d bit words\n", | ||
303 | spi->bits_per_word); | ||
304 | return -EINVAL; | ||
305 | } | ||
306 | |||
307 | spi100k = spi_master_get_devdata(spi->master); | 301 | spi100k = spi_master_get_devdata(spi->master); |
308 | 302 | ||
309 | if (!cs) { | 303 | if (!cs) { |
@@ -451,10 +445,7 @@ static int omap1_spi100k_transfer(struct spi_device *spi, struct spi_message *m) | |||
451 | unsigned len = t->len; | 445 | unsigned len = t->len; |
452 | 446 | ||
453 | if (t->speed_hz > OMAP1_SPI100K_MAX_FREQ | 447 | if (t->speed_hz > OMAP1_SPI100K_MAX_FREQ |
454 | || (len && !(rx_buf || tx_buf)) | 448 | || (len && !(rx_buf || tx_buf))) { |
455 | || (t->bits_per_word && | ||
456 | ( t->bits_per_word < 4 | ||
457 | || t->bits_per_word > 32))) { | ||
458 | dev_dbg(&spi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n", | 449 | dev_dbg(&spi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n", |
459 | t->speed_hz, | 450 | t->speed_hz, |
460 | len, | 451 | len, |
@@ -509,8 +500,9 @@ static int omap1_spi100k_probe(struct platform_device *pdev) | |||
509 | master->cleanup = NULL; | 500 | master->cleanup = NULL; |
510 | master->num_chipselect = 2; | 501 | master->num_chipselect = 2; |
511 | master->mode_bits = MODEBITS; | 502 | master->mode_bits = MODEBITS; |
503 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); | ||
512 | 504 | ||
513 | dev_set_drvdata(&pdev->dev, master); | 505 | platform_set_drvdata(pdev, master); |
514 | 506 | ||
515 | spi100k = spi_master_get_devdata(master); | 507 | spi100k = spi_master_get_devdata(master); |
516 | spi100k->master = master; | 508 | spi100k->master = master; |
@@ -569,7 +561,7 @@ static int omap1_spi100k_remove(struct platform_device *pdev) | |||
569 | unsigned long flags; | 561 | unsigned long flags; |
570 | int status = 0; | 562 | int status = 0; |
571 | 563 | ||
572 | master = dev_get_drvdata(&pdev->dev); | 564 | master = platform_get_drvdata(pdev); |
573 | spi100k = spi_master_get_devdata(master); | 565 | spi100k = spi_master_get_devdata(master); |
574 | 566 | ||
575 | spin_lock_irqsave(&spi100k->lock, flags); | 567 | spin_lock_irqsave(&spi100k->lock, flags); |
diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index 102b233b50c4..a6a8f0961750 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c | |||
@@ -495,7 +495,7 @@ static int uwire_probe(struct platform_device *pdev) | |||
495 | return -ENOMEM; | 495 | return -ENOMEM; |
496 | } | 496 | } |
497 | 497 | ||
498 | dev_set_drvdata(&pdev->dev, uwire); | 498 | platform_set_drvdata(pdev, uwire); |
499 | 499 | ||
500 | uwire->ck = clk_get(&pdev->dev, "fck"); | 500 | uwire->ck = clk_get(&pdev->dev, "fck"); |
501 | if (IS_ERR(uwire->ck)) { | 501 | if (IS_ERR(uwire->ck)) { |
@@ -538,7 +538,7 @@ static int uwire_probe(struct platform_device *pdev) | |||
538 | 538 | ||
539 | static int uwire_remove(struct platform_device *pdev) | 539 | static int uwire_remove(struct platform_device *pdev) |
540 | { | 540 | { |
541 | struct uwire_spi *uwire = dev_get_drvdata(&pdev->dev); | 541 | struct uwire_spi *uwire = platform_get_drvdata(pdev); |
542 | int status; | 542 | int status; |
543 | 543 | ||
544 | // FIXME remove all child devices, somewhere ... | 544 | // FIXME remove all child devices, somewhere ... |
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 86d2158946bb..5994039758de 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c | |||
@@ -38,13 +38,15 @@ | |||
38 | #include <linux/pm_runtime.h> | 38 | #include <linux/pm_runtime.h> |
39 | #include <linux/of.h> | 39 | #include <linux/of.h> |
40 | #include <linux/of_device.h> | 40 | #include <linux/of_device.h> |
41 | #include <linux/pinctrl/consumer.h> | 41 | #include <linux/gcd.h> |
42 | 42 | ||
43 | #include <linux/spi/spi.h> | 43 | #include <linux/spi/spi.h> |
44 | 44 | ||
45 | #include <linux/platform_data/spi-omap2-mcspi.h> | 45 | #include <linux/platform_data/spi-omap2-mcspi.h> |
46 | 46 | ||
47 | #define OMAP2_MCSPI_MAX_FREQ 48000000 | 47 | #define OMAP2_MCSPI_MAX_FREQ 48000000 |
48 | #define OMAP2_MCSPI_MAX_FIFODEPTH 64 | ||
49 | #define OMAP2_MCSPI_MAX_FIFOWCNT 0xFFFF | ||
48 | #define SPI_AUTOSUSPEND_TIMEOUT 2000 | 50 | #define SPI_AUTOSUSPEND_TIMEOUT 2000 |
49 | 51 | ||
50 | #define OMAP2_MCSPI_REVISION 0x00 | 52 | #define OMAP2_MCSPI_REVISION 0x00 |
@@ -54,6 +56,7 @@ | |||
54 | #define OMAP2_MCSPI_WAKEUPENABLE 0x20 | 56 | #define OMAP2_MCSPI_WAKEUPENABLE 0x20 |
55 | #define OMAP2_MCSPI_SYST 0x24 | 57 | #define OMAP2_MCSPI_SYST 0x24 |
56 | #define OMAP2_MCSPI_MODULCTRL 0x28 | 58 | #define OMAP2_MCSPI_MODULCTRL 0x28 |
59 | #define OMAP2_MCSPI_XFERLEVEL 0x7c | ||
57 | 60 | ||
58 | /* per-channel banks, 0x14 bytes each, first is: */ | 61 | /* per-channel banks, 0x14 bytes each, first is: */ |
59 | #define OMAP2_MCSPI_CHCONF0 0x2c | 62 | #define OMAP2_MCSPI_CHCONF0 0x2c |
@@ -63,6 +66,7 @@ | |||
63 | #define OMAP2_MCSPI_RX0 0x3c | 66 | #define OMAP2_MCSPI_RX0 0x3c |
64 | 67 | ||
65 | /* per-register bitmasks: */ | 68 | /* per-register bitmasks: */ |
69 | #define OMAP2_MCSPI_IRQSTATUS_EOW BIT(17) | ||
66 | 70 | ||
67 | #define OMAP2_MCSPI_MODULCTRL_SINGLE BIT(0) | 71 | #define OMAP2_MCSPI_MODULCTRL_SINGLE BIT(0) |
68 | #define OMAP2_MCSPI_MODULCTRL_MS BIT(2) | 72 | #define OMAP2_MCSPI_MODULCTRL_MS BIT(2) |
@@ -83,10 +87,13 @@ | |||
83 | #define OMAP2_MCSPI_CHCONF_IS BIT(18) | 87 | #define OMAP2_MCSPI_CHCONF_IS BIT(18) |
84 | #define OMAP2_MCSPI_CHCONF_TURBO BIT(19) | 88 | #define OMAP2_MCSPI_CHCONF_TURBO BIT(19) |
85 | #define OMAP2_MCSPI_CHCONF_FORCE BIT(20) | 89 | #define OMAP2_MCSPI_CHCONF_FORCE BIT(20) |
90 | #define OMAP2_MCSPI_CHCONF_FFET BIT(27) | ||
91 | #define OMAP2_MCSPI_CHCONF_FFER BIT(28) | ||
86 | 92 | ||
87 | #define OMAP2_MCSPI_CHSTAT_RXS BIT(0) | 93 | #define OMAP2_MCSPI_CHSTAT_RXS BIT(0) |
88 | #define OMAP2_MCSPI_CHSTAT_TXS BIT(1) | 94 | #define OMAP2_MCSPI_CHSTAT_TXS BIT(1) |
89 | #define OMAP2_MCSPI_CHSTAT_EOT BIT(2) | 95 | #define OMAP2_MCSPI_CHSTAT_EOT BIT(2) |
96 | #define OMAP2_MCSPI_CHSTAT_TXFFE BIT(3) | ||
90 | 97 | ||
91 | #define OMAP2_MCSPI_CHCTRL_EN BIT(0) | 98 | #define OMAP2_MCSPI_CHCTRL_EN BIT(0) |
92 | 99 | ||
@@ -102,6 +109,9 @@ struct omap2_mcspi_dma { | |||
102 | 109 | ||
103 | struct completion dma_tx_completion; | 110 | struct completion dma_tx_completion; |
104 | struct completion dma_rx_completion; | 111 | struct completion dma_rx_completion; |
112 | |||
113 | char dma_rx_ch_name[14]; | ||
114 | char dma_tx_ch_name[14]; | ||
105 | }; | 115 | }; |
106 | 116 | ||
107 | /* use PIO for small transfers, avoiding DMA setup/teardown overhead and | 117 | /* use PIO for small transfers, avoiding DMA setup/teardown overhead and |
@@ -129,6 +139,7 @@ struct omap2_mcspi { | |||
129 | struct omap2_mcspi_dma *dma_channels; | 139 | struct omap2_mcspi_dma *dma_channels; |
130 | struct device *dev; | 140 | struct device *dev; |
131 | struct omap2_mcspi_regs ctx; | 141 | struct omap2_mcspi_regs ctx; |
142 | int fifo_depth; | ||
132 | unsigned int pin_dir:1; | 143 | unsigned int pin_dir:1; |
133 | }; | 144 | }; |
134 | 145 | ||
@@ -187,6 +198,16 @@ static inline void mcspi_write_chconf0(const struct spi_device *spi, u32 val) | |||
187 | mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0); | 198 | mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0); |
188 | } | 199 | } |
189 | 200 | ||
201 | static inline int mcspi_bytes_per_word(int word_len) | ||
202 | { | ||
203 | if (word_len <= 8) | ||
204 | return 1; | ||
205 | else if (word_len <= 16) | ||
206 | return 2; | ||
207 | else /* word_len <= 32 */ | ||
208 | return 4; | ||
209 | } | ||
210 | |||
190 | static void omap2_mcspi_set_dma_req(const struct spi_device *spi, | 211 | static void omap2_mcspi_set_dma_req(const struct spi_device *spi, |
191 | int is_read, int enable) | 212 | int is_read, int enable) |
192 | { | 213 | { |
@@ -248,6 +269,58 @@ static void omap2_mcspi_set_master_mode(struct spi_master *master) | |||
248 | ctx->modulctrl = l; | 269 | ctx->modulctrl = l; |
249 | } | 270 | } |
250 | 271 | ||
272 | static void omap2_mcspi_set_fifo(const struct spi_device *spi, | ||
273 | struct spi_transfer *t, int enable) | ||
274 | { | ||
275 | struct spi_master *master = spi->master; | ||
276 | struct omap2_mcspi_cs *cs = spi->controller_state; | ||
277 | struct omap2_mcspi *mcspi; | ||
278 | unsigned int wcnt; | ||
279 | int fifo_depth, bytes_per_word; | ||
280 | u32 chconf, xferlevel; | ||
281 | |||
282 | mcspi = spi_master_get_devdata(master); | ||
283 | |||
284 | chconf = mcspi_cached_chconf0(spi); | ||
285 | if (enable) { | ||
286 | bytes_per_word = mcspi_bytes_per_word(cs->word_len); | ||
287 | if (t->len % bytes_per_word != 0) | ||
288 | goto disable_fifo; | ||
289 | |||
290 | fifo_depth = gcd(t->len, OMAP2_MCSPI_MAX_FIFODEPTH); | ||
291 | if (fifo_depth < 2 || fifo_depth % bytes_per_word != 0) | ||
292 | goto disable_fifo; | ||
293 | |||
294 | wcnt = t->len / bytes_per_word; | ||
295 | if (wcnt > OMAP2_MCSPI_MAX_FIFOWCNT) | ||
296 | goto disable_fifo; | ||
297 | |||
298 | xferlevel = wcnt << 16; | ||
299 | if (t->rx_buf != NULL) { | ||
300 | chconf |= OMAP2_MCSPI_CHCONF_FFER; | ||
301 | xferlevel |= (fifo_depth - 1) << 8; | ||
302 | } else { | ||
303 | chconf |= OMAP2_MCSPI_CHCONF_FFET; | ||
304 | xferlevel |= fifo_depth - 1; | ||
305 | } | ||
306 | |||
307 | mcspi_write_reg(master, OMAP2_MCSPI_XFERLEVEL, xferlevel); | ||
308 | mcspi_write_chconf0(spi, chconf); | ||
309 | mcspi->fifo_depth = fifo_depth; | ||
310 | |||
311 | return; | ||
312 | } | ||
313 | |||
314 | disable_fifo: | ||
315 | if (t->rx_buf != NULL) | ||
316 | chconf &= ~OMAP2_MCSPI_CHCONF_FFER; | ||
317 | else | ||
318 | chconf &= ~OMAP2_MCSPI_CHCONF_FFET; | ||
319 | |||
320 | mcspi_write_chconf0(spi, chconf); | ||
321 | mcspi->fifo_depth = 0; | ||
322 | } | ||
323 | |||
251 | static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi) | 324 | static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi) |
252 | { | 325 | { |
253 | struct spi_master *spi_cntrl = mcspi->master; | 326 | struct spi_master *spi_cntrl = mcspi->master; |
@@ -364,7 +437,7 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, | |||
364 | { | 437 | { |
365 | struct omap2_mcspi *mcspi; | 438 | struct omap2_mcspi *mcspi; |
366 | struct omap2_mcspi_dma *mcspi_dma; | 439 | struct omap2_mcspi_dma *mcspi_dma; |
367 | unsigned int count; | 440 | unsigned int count, dma_count; |
368 | u32 l; | 441 | u32 l; |
369 | int elements = 0; | 442 | int elements = 0; |
370 | int word_len, element_count; | 443 | int word_len, element_count; |
@@ -372,6 +445,11 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, | |||
372 | mcspi = spi_master_get_devdata(spi->master); | 445 | mcspi = spi_master_get_devdata(spi->master); |
373 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; | 446 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; |
374 | count = xfer->len; | 447 | count = xfer->len; |
448 | dma_count = xfer->len; | ||
449 | |||
450 | if (mcspi->fifo_depth == 0) | ||
451 | dma_count -= es; | ||
452 | |||
375 | word_len = cs->word_len; | 453 | word_len = cs->word_len; |
376 | l = mcspi_cached_chconf0(spi); | 454 | l = mcspi_cached_chconf0(spi); |
377 | 455 | ||
@@ -385,16 +463,15 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, | |||
385 | if (mcspi_dma->dma_rx) { | 463 | if (mcspi_dma->dma_rx) { |
386 | struct dma_async_tx_descriptor *tx; | 464 | struct dma_async_tx_descriptor *tx; |
387 | struct scatterlist sg; | 465 | struct scatterlist sg; |
388 | size_t len = xfer->len - es; | ||
389 | 466 | ||
390 | dmaengine_slave_config(mcspi_dma->dma_rx, &cfg); | 467 | dmaengine_slave_config(mcspi_dma->dma_rx, &cfg); |
391 | 468 | ||
392 | if (l & OMAP2_MCSPI_CHCONF_TURBO) | 469 | if ((l & OMAP2_MCSPI_CHCONF_TURBO) && mcspi->fifo_depth == 0) |
393 | len -= es; | 470 | dma_count -= es; |
394 | 471 | ||
395 | sg_init_table(&sg, 1); | 472 | sg_init_table(&sg, 1); |
396 | sg_dma_address(&sg) = xfer->rx_dma; | 473 | sg_dma_address(&sg) = xfer->rx_dma; |
397 | sg_dma_len(&sg) = len; | 474 | sg_dma_len(&sg) = dma_count; |
398 | 475 | ||
399 | tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, &sg, 1, | 476 | tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, &sg, 1, |
400 | DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | | 477 | DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | |
@@ -414,6 +491,10 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, | |||
414 | wait_for_completion(&mcspi_dma->dma_rx_completion); | 491 | wait_for_completion(&mcspi_dma->dma_rx_completion); |
415 | dma_unmap_single(mcspi->dev, xfer->rx_dma, count, | 492 | dma_unmap_single(mcspi->dev, xfer->rx_dma, count, |
416 | DMA_FROM_DEVICE); | 493 | DMA_FROM_DEVICE); |
494 | |||
495 | if (mcspi->fifo_depth > 0) | ||
496 | return count; | ||
497 | |||
417 | omap2_mcspi_set_enable(spi, 0); | 498 | omap2_mcspi_set_enable(spi, 0); |
418 | 499 | ||
419 | elements = element_count - 1; | 500 | elements = element_count - 1; |
@@ -433,10 +514,9 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, | |||
433 | else /* word_len <= 32 */ | 514 | else /* word_len <= 32 */ |
434 | ((u32 *)xfer->rx_buf)[elements++] = w; | 515 | ((u32 *)xfer->rx_buf)[elements++] = w; |
435 | } else { | 516 | } else { |
517 | int bytes_per_word = mcspi_bytes_per_word(word_len); | ||
436 | dev_err(&spi->dev, "DMA RX penultimate word empty"); | 518 | dev_err(&spi->dev, "DMA RX penultimate word empty"); |
437 | count -= (word_len <= 8) ? 2 : | 519 | count -= (bytes_per_word << 1); |
438 | (word_len <= 16) ? 4 : | ||
439 | /* word_len <= 32 */ 8; | ||
440 | omap2_mcspi_set_enable(spi, 1); | 520 | omap2_mcspi_set_enable(spi, 1); |
441 | return count; | 521 | return count; |
442 | } | 522 | } |
@@ -454,9 +534,7 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, | |||
454 | ((u32 *)xfer->rx_buf)[elements] = w; | 534 | ((u32 *)xfer->rx_buf)[elements] = w; |
455 | } else { | 535 | } else { |
456 | dev_err(&spi->dev, "DMA RX last word empty"); | 536 | dev_err(&spi->dev, "DMA RX last word empty"); |
457 | count -= (word_len <= 8) ? 1 : | 537 | count -= mcspi_bytes_per_word(word_len); |
458 | (word_len <= 16) ? 2 : | ||
459 | /* word_len <= 32 */ 4; | ||
460 | } | 538 | } |
461 | omap2_mcspi_set_enable(spi, 1); | 539 | omap2_mcspi_set_enable(spi, 1); |
462 | return count; | 540 | return count; |
@@ -475,7 +553,10 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) | |||
475 | struct dma_slave_config cfg; | 553 | struct dma_slave_config cfg; |
476 | enum dma_slave_buswidth width; | 554 | enum dma_slave_buswidth width; |
477 | unsigned es; | 555 | unsigned es; |
556 | u32 burst; | ||
478 | void __iomem *chstat_reg; | 557 | void __iomem *chstat_reg; |
558 | void __iomem *irqstat_reg; | ||
559 | int wait_res; | ||
479 | 560 | ||
480 | mcspi = spi_master_get_devdata(spi->master); | 561 | mcspi = spi_master_get_devdata(spi->master); |
481 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; | 562 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; |
@@ -493,19 +574,27 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) | |||
493 | es = 4; | 574 | es = 4; |
494 | } | 575 | } |
495 | 576 | ||
577 | count = xfer->len; | ||
578 | burst = 1; | ||
579 | |||
580 | if (mcspi->fifo_depth > 0) { | ||
581 | if (count > mcspi->fifo_depth) | ||
582 | burst = mcspi->fifo_depth / es; | ||
583 | else | ||
584 | burst = count / es; | ||
585 | } | ||
586 | |||
496 | memset(&cfg, 0, sizeof(cfg)); | 587 | memset(&cfg, 0, sizeof(cfg)); |
497 | cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0; | 588 | cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0; |
498 | cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0; | 589 | cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0; |
499 | cfg.src_addr_width = width; | 590 | cfg.src_addr_width = width; |
500 | cfg.dst_addr_width = width; | 591 | cfg.dst_addr_width = width; |
501 | cfg.src_maxburst = 1; | 592 | cfg.src_maxburst = burst; |
502 | cfg.dst_maxburst = 1; | 593 | cfg.dst_maxburst = burst; |
503 | 594 | ||
504 | rx = xfer->rx_buf; | 595 | rx = xfer->rx_buf; |
505 | tx = xfer->tx_buf; | 596 | tx = xfer->tx_buf; |
506 | 597 | ||
507 | count = xfer->len; | ||
508 | |||
509 | if (tx != NULL) | 598 | if (tx != NULL) |
510 | omap2_mcspi_tx_dma(spi, xfer, cfg); | 599 | omap2_mcspi_tx_dma(spi, xfer, cfg); |
511 | 600 | ||
@@ -513,18 +602,38 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) | |||
513 | count = omap2_mcspi_rx_dma(spi, xfer, cfg, es); | 602 | count = omap2_mcspi_rx_dma(spi, xfer, cfg, es); |
514 | 603 | ||
515 | if (tx != NULL) { | 604 | if (tx != NULL) { |
516 | chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0; | ||
517 | wait_for_completion(&mcspi_dma->dma_tx_completion); | 605 | wait_for_completion(&mcspi_dma->dma_tx_completion); |
518 | dma_unmap_single(mcspi->dev, xfer->tx_dma, xfer->len, | 606 | dma_unmap_single(mcspi->dev, xfer->tx_dma, xfer->len, |
519 | DMA_TO_DEVICE); | 607 | DMA_TO_DEVICE); |
520 | 608 | ||
609 | if (mcspi->fifo_depth > 0) { | ||
610 | irqstat_reg = mcspi->base + OMAP2_MCSPI_IRQSTATUS; | ||
611 | |||
612 | if (mcspi_wait_for_reg_bit(irqstat_reg, | ||
613 | OMAP2_MCSPI_IRQSTATUS_EOW) < 0) | ||
614 | dev_err(&spi->dev, "EOW timed out\n"); | ||
615 | |||
616 | mcspi_write_reg(mcspi->master, OMAP2_MCSPI_IRQSTATUS, | ||
617 | OMAP2_MCSPI_IRQSTATUS_EOW); | ||
618 | } | ||
619 | |||
521 | /* for TX_ONLY mode, be sure all words have shifted out */ | 620 | /* for TX_ONLY mode, be sure all words have shifted out */ |
522 | if (rx == NULL) { | 621 | if (rx == NULL) { |
523 | if (mcspi_wait_for_reg_bit(chstat_reg, | 622 | chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0; |
524 | OMAP2_MCSPI_CHSTAT_TXS) < 0) | 623 | if (mcspi->fifo_depth > 0) { |
525 | dev_err(&spi->dev, "TXS timed out\n"); | 624 | wait_res = mcspi_wait_for_reg_bit(chstat_reg, |
526 | else if (mcspi_wait_for_reg_bit(chstat_reg, | 625 | OMAP2_MCSPI_CHSTAT_TXFFE); |
527 | OMAP2_MCSPI_CHSTAT_EOT) < 0) | 626 | if (wait_res < 0) |
627 | dev_err(&spi->dev, "TXFFE timed out\n"); | ||
628 | } else { | ||
629 | wait_res = mcspi_wait_for_reg_bit(chstat_reg, | ||
630 | OMAP2_MCSPI_CHSTAT_TXS); | ||
631 | if (wait_res < 0) | ||
632 | dev_err(&spi->dev, "TXS timed out\n"); | ||
633 | } | ||
634 | if (wait_res >= 0 && | ||
635 | (mcspi_wait_for_reg_bit(chstat_reg, | ||
636 | OMAP2_MCSPI_CHSTAT_EOT) < 0)) | ||
528 | dev_err(&spi->dev, "EOT timed out\n"); | 637 | dev_err(&spi->dev, "EOT timed out\n"); |
529 | } | 638 | } |
530 | } | 639 | } |
@@ -830,12 +939,20 @@ static int omap2_mcspi_request_dma(struct spi_device *spi) | |||
830 | dma_cap_zero(mask); | 939 | dma_cap_zero(mask); |
831 | dma_cap_set(DMA_SLAVE, mask); | 940 | dma_cap_set(DMA_SLAVE, mask); |
832 | sig = mcspi_dma->dma_rx_sync_dev; | 941 | sig = mcspi_dma->dma_rx_sync_dev; |
833 | mcspi_dma->dma_rx = dma_request_channel(mask, omap_dma_filter_fn, &sig); | 942 | |
943 | mcspi_dma->dma_rx = | ||
944 | dma_request_slave_channel_compat(mask, omap_dma_filter_fn, | ||
945 | &sig, &master->dev, | ||
946 | mcspi_dma->dma_rx_ch_name); | ||
834 | if (!mcspi_dma->dma_rx) | 947 | if (!mcspi_dma->dma_rx) |
835 | goto no_dma; | 948 | goto no_dma; |
836 | 949 | ||
837 | sig = mcspi_dma->dma_tx_sync_dev; | 950 | sig = mcspi_dma->dma_tx_sync_dev; |
838 | mcspi_dma->dma_tx = dma_request_channel(mask, omap_dma_filter_fn, &sig); | 951 | mcspi_dma->dma_tx = |
952 | dma_request_slave_channel_compat(mask, omap_dma_filter_fn, | ||
953 | &sig, &master->dev, | ||
954 | mcspi_dma->dma_tx_ch_name); | ||
955 | |||
839 | if (!mcspi_dma->dma_tx) { | 956 | if (!mcspi_dma->dma_tx) { |
840 | dma_release_channel(mcspi_dma->dma_rx); | 957 | dma_release_channel(mcspi_dma->dma_rx); |
841 | mcspi_dma->dma_rx = NULL; | 958 | mcspi_dma->dma_rx = NULL; |
@@ -857,12 +974,6 @@ static int omap2_mcspi_setup(struct spi_device *spi) | |||
857 | struct omap2_mcspi_dma *mcspi_dma; | 974 | struct omap2_mcspi_dma *mcspi_dma; |
858 | struct omap2_mcspi_cs *cs = spi->controller_state; | 975 | struct omap2_mcspi_cs *cs = spi->controller_state; |
859 | 976 | ||
860 | if (spi->bits_per_word < 4 || spi->bits_per_word > 32) { | ||
861 | dev_dbg(&spi->dev, "setup: unsupported %d bit words\n", | ||
862 | spi->bits_per_word); | ||
863 | return -EINVAL; | ||
864 | } | ||
865 | |||
866 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; | 977 | mcspi_dma = &mcspi->dma_channels[spi->chip_select]; |
867 | 978 | ||
868 | if (!cs) { | 979 | if (!cs) { |
@@ -951,7 +1062,7 @@ static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m) | |||
951 | cs = spi->controller_state; | 1062 | cs = spi->controller_state; |
952 | cd = spi->controller_data; | 1063 | cd = spi->controller_data; |
953 | 1064 | ||
954 | omap2_mcspi_set_enable(spi, 1); | 1065 | omap2_mcspi_set_enable(spi, 0); |
955 | list_for_each_entry(t, &m->transfers, transfer_list) { | 1066 | list_for_each_entry(t, &m->transfers, transfer_list) { |
956 | if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) { | 1067 | if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) { |
957 | status = -EINVAL; | 1068 | status = -EINVAL; |
@@ -999,6 +1110,12 @@ static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m) | |||
999 | if (t->len) { | 1110 | if (t->len) { |
1000 | unsigned count; | 1111 | unsigned count; |
1001 | 1112 | ||
1113 | if ((mcspi_dma->dma_rx && mcspi_dma->dma_tx) && | ||
1114 | (m->is_dma_mapped || t->len >= DMA_MIN_BYTES)) | ||
1115 | omap2_mcspi_set_fifo(spi, t, 1); | ||
1116 | |||
1117 | omap2_mcspi_set_enable(spi, 1); | ||
1118 | |||
1002 | /* RX_ONLY mode needs dummy data in TX reg */ | 1119 | /* RX_ONLY mode needs dummy data in TX reg */ |
1003 | if (t->tx_buf == NULL) | 1120 | if (t->tx_buf == NULL) |
1004 | __raw_writel(0, cs->base | 1121 | __raw_writel(0, cs->base |
@@ -1025,6 +1142,11 @@ static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m) | |||
1025 | omap2_mcspi_force_cs(spi, 0); | 1142 | omap2_mcspi_force_cs(spi, 0); |
1026 | cs_active = 0; | 1143 | cs_active = 0; |
1027 | } | 1144 | } |
1145 | |||
1146 | omap2_mcspi_set_enable(spi, 0); | ||
1147 | |||
1148 | if (mcspi->fifo_depth > 0) | ||
1149 | omap2_mcspi_set_fifo(spi, t, 0); | ||
1028 | } | 1150 | } |
1029 | /* Restore defaults if they were overriden */ | 1151 | /* Restore defaults if they were overriden */ |
1030 | if (par_override) { | 1152 | if (par_override) { |
@@ -1045,8 +1167,10 @@ static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m) | |||
1045 | 1167 | ||
1046 | omap2_mcspi_set_enable(spi, 0); | 1168 | omap2_mcspi_set_enable(spi, 0); |
1047 | 1169 | ||
1048 | m->status = status; | 1170 | if (mcspi->fifo_depth > 0 && t) |
1171 | omap2_mcspi_set_fifo(spi, t, 0); | ||
1049 | 1172 | ||
1173 | m->status = status; | ||
1050 | } | 1174 | } |
1051 | 1175 | ||
1052 | static int omap2_mcspi_transfer_one_message(struct spi_master *master, | 1176 | static int omap2_mcspi_transfer_one_message(struct spi_master *master, |
@@ -1072,10 +1196,7 @@ static int omap2_mcspi_transfer_one_message(struct spi_master *master, | |||
1072 | unsigned len = t->len; | 1196 | unsigned len = t->len; |
1073 | 1197 | ||
1074 | if (t->speed_hz > OMAP2_MCSPI_MAX_FREQ | 1198 | if (t->speed_hz > OMAP2_MCSPI_MAX_FREQ |
1075 | || (len && !(rx_buf || tx_buf)) | 1199 | || (len && !(rx_buf || tx_buf))) { |
1076 | || (t->bits_per_word && | ||
1077 | ( t->bits_per_word < 4 | ||
1078 | || t->bits_per_word > 32))) { | ||
1079 | dev_dbg(mcspi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n", | 1200 | dev_dbg(mcspi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n", |
1080 | t->speed_hz, | 1201 | t->speed_hz, |
1081 | len, | 1202 | len, |
@@ -1186,7 +1307,6 @@ static int omap2_mcspi_probe(struct platform_device *pdev) | |||
1186 | static int bus_num = 1; | 1307 | static int bus_num = 1; |
1187 | struct device_node *node = pdev->dev.of_node; | 1308 | struct device_node *node = pdev->dev.of_node; |
1188 | const struct of_device_id *match; | 1309 | const struct of_device_id *match; |
1189 | struct pinctrl *pinctrl; | ||
1190 | 1310 | ||
1191 | master = spi_alloc_master(&pdev->dev, sizeof *mcspi); | 1311 | master = spi_alloc_master(&pdev->dev, sizeof *mcspi); |
1192 | if (master == NULL) { | 1312 | if (master == NULL) { |
@@ -1196,7 +1316,7 @@ static int omap2_mcspi_probe(struct platform_device *pdev) | |||
1196 | 1316 | ||
1197 | /* the spi->mode bits understood by this driver: */ | 1317 | /* the spi->mode bits understood by this driver: */ |
1198 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; | 1318 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; |
1199 | 1319 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); | |
1200 | master->setup = omap2_mcspi_setup; | 1320 | master->setup = omap2_mcspi_setup; |
1201 | master->prepare_transfer_hardware = omap2_prepare_transfer; | 1321 | master->prepare_transfer_hardware = omap2_prepare_transfer; |
1202 | master->unprepare_transfer_hardware = omap2_unprepare_transfer; | 1322 | master->unprepare_transfer_hardware = omap2_unprepare_transfer; |
@@ -1204,7 +1324,7 @@ static int omap2_mcspi_probe(struct platform_device *pdev) | |||
1204 | master->cleanup = omap2_mcspi_cleanup; | 1324 | master->cleanup = omap2_mcspi_cleanup; |
1205 | master->dev.of_node = node; | 1325 | master->dev.of_node = node; |
1206 | 1326 | ||
1207 | dev_set_drvdata(&pdev->dev, master); | 1327 | platform_set_drvdata(pdev, master); |
1208 | 1328 | ||
1209 | mcspi = spi_master_get_devdata(master); | 1329 | mcspi = spi_master_get_devdata(master); |
1210 | mcspi->master = master; | 1330 | mcspi->master = master; |
@@ -1256,39 +1376,47 @@ static int omap2_mcspi_probe(struct platform_device *pdev) | |||
1256 | goto free_master; | 1376 | goto free_master; |
1257 | 1377 | ||
1258 | for (i = 0; i < master->num_chipselect; i++) { | 1378 | for (i = 0; i < master->num_chipselect; i++) { |
1259 | char dma_ch_name[14]; | 1379 | char *dma_rx_ch_name = mcspi->dma_channels[i].dma_rx_ch_name; |
1380 | char *dma_tx_ch_name = mcspi->dma_channels[i].dma_tx_ch_name; | ||
1260 | struct resource *dma_res; | 1381 | struct resource *dma_res; |
1261 | 1382 | ||
1262 | sprintf(dma_ch_name, "rx%d", i); | 1383 | sprintf(dma_rx_ch_name, "rx%d", i); |
1263 | dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA, | 1384 | if (!pdev->dev.of_node) { |
1264 | dma_ch_name); | 1385 | dma_res = |
1265 | if (!dma_res) { | 1386 | platform_get_resource_byname(pdev, |
1266 | dev_dbg(&pdev->dev, "cannot get DMA RX channel\n"); | 1387 | IORESOURCE_DMA, |
1267 | status = -ENODEV; | 1388 | dma_rx_ch_name); |
1268 | break; | 1389 | if (!dma_res) { |
1269 | } | 1390 | dev_dbg(&pdev->dev, |
1391 | "cannot get DMA RX channel\n"); | ||
1392 | status = -ENODEV; | ||
1393 | break; | ||
1394 | } | ||
1270 | 1395 | ||
1271 | mcspi->dma_channels[i].dma_rx_sync_dev = dma_res->start; | 1396 | mcspi->dma_channels[i].dma_rx_sync_dev = |
1272 | sprintf(dma_ch_name, "tx%d", i); | 1397 | dma_res->start; |
1273 | dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA, | ||
1274 | dma_ch_name); | ||
1275 | if (!dma_res) { | ||
1276 | dev_dbg(&pdev->dev, "cannot get DMA TX channel\n"); | ||
1277 | status = -ENODEV; | ||
1278 | break; | ||
1279 | } | 1398 | } |
1399 | sprintf(dma_tx_ch_name, "tx%d", i); | ||
1400 | if (!pdev->dev.of_node) { | ||
1401 | dma_res = | ||
1402 | platform_get_resource_byname(pdev, | ||
1403 | IORESOURCE_DMA, | ||
1404 | dma_tx_ch_name); | ||
1405 | if (!dma_res) { | ||
1406 | dev_dbg(&pdev->dev, | ||
1407 | "cannot get DMA TX channel\n"); | ||
1408 | status = -ENODEV; | ||
1409 | break; | ||
1410 | } | ||
1280 | 1411 | ||
1281 | mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start; | 1412 | mcspi->dma_channels[i].dma_tx_sync_dev = |
1413 | dma_res->start; | ||
1414 | } | ||
1282 | } | 1415 | } |
1283 | 1416 | ||
1284 | if (status < 0) | 1417 | if (status < 0) |
1285 | goto dma_chnl_free; | 1418 | goto dma_chnl_free; |
1286 | 1419 | ||
1287 | pinctrl = devm_pinctrl_get_select_default(&pdev->dev); | ||
1288 | if (IS_ERR(pinctrl)) | ||
1289 | dev_warn(&pdev->dev, | ||
1290 | "pins are not configured from the driver\n"); | ||
1291 | |||
1292 | pm_runtime_use_autosuspend(&pdev->dev); | 1420 | pm_runtime_use_autosuspend(&pdev->dev); |
1293 | pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); | 1421 | pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); |
1294 | pm_runtime_enable(&pdev->dev); | 1422 | pm_runtime_enable(&pdev->dev); |
@@ -1318,7 +1446,7 @@ static int omap2_mcspi_remove(struct platform_device *pdev) | |||
1318 | struct omap2_mcspi *mcspi; | 1446 | struct omap2_mcspi *mcspi; |
1319 | struct omap2_mcspi_dma *dma_channels; | 1447 | struct omap2_mcspi_dma *dma_channels; |
1320 | 1448 | ||
1321 | master = dev_get_drvdata(&pdev->dev); | 1449 | master = platform_get_drvdata(pdev); |
1322 | mcspi = spi_master_get_devdata(master); | 1450 | mcspi = spi_master_get_devdata(master); |
1323 | dma_channels = mcspi->dma_channels; | 1451 | dma_channels = mcspi->dma_channels; |
1324 | 1452 | ||
diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index 66a5f82cf138..5d90bebaa0fa 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c | |||
@@ -428,7 +428,7 @@ static int orion_spi_probe(struct platform_device *pdev) | |||
428 | master->transfer_one_message = orion_spi_transfer_one_message; | 428 | master->transfer_one_message = orion_spi_transfer_one_message; |
429 | master->num_chipselect = ORION_NUM_CHIPSELECTS; | 429 | master->num_chipselect = ORION_NUM_CHIPSELECTS; |
430 | 430 | ||
431 | dev_set_drvdata(&pdev->dev, master); | 431 | platform_set_drvdata(pdev, master); |
432 | 432 | ||
433 | spi = spi_master_get_devdata(master); | 433 | spi = spi_master_get_devdata(master); |
434 | spi->master = master; | 434 | spi->master = master; |
@@ -485,7 +485,7 @@ static int orion_spi_remove(struct platform_device *pdev) | |||
485 | struct resource *r; | 485 | struct resource *r; |
486 | struct orion_spi *spi; | 486 | struct orion_spi *spi; |
487 | 487 | ||
488 | master = dev_get_drvdata(&pdev->dev); | 488 | master = platform_get_drvdata(pdev); |
489 | spi = spi_master_get_devdata(master); | 489 | spi = spi_master_get_devdata(master); |
490 | 490 | ||
491 | clk_disable_unprepare(spi->clk); | 491 | clk_disable_unprepare(spi->clk); |
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c index 371cc66f1a0e..abef061fb84a 100644 --- a/drivers/spi/spi-pl022.c +++ b/drivers/spi/spi-pl022.c | |||
@@ -368,11 +368,6 @@ struct pl022 { | |||
368 | resource_size_t phybase; | 368 | resource_size_t phybase; |
369 | void __iomem *virtbase; | 369 | void __iomem *virtbase; |
370 | struct clk *clk; | 370 | struct clk *clk; |
371 | /* Two optional pin states - default & sleep */ | ||
372 | struct pinctrl *pinctrl; | ||
373 | struct pinctrl_state *pins_default; | ||
374 | struct pinctrl_state *pins_idle; | ||
375 | struct pinctrl_state *pins_sleep; | ||
376 | struct spi_master *master; | 371 | struct spi_master *master; |
377 | struct pl022_ssp_controller *master_info; | 372 | struct pl022_ssp_controller *master_info; |
378 | /* Message per-transfer pump */ | 373 | /* Message per-transfer pump */ |
@@ -2083,6 +2078,7 @@ pl022_platform_data_dt_get(struct device *dev) | |||
2083 | } | 2078 | } |
2084 | 2079 | ||
2085 | pd->bus_id = -1; | 2080 | pd->bus_id = -1; |
2081 | pd->enable_dma = 1; | ||
2086 | of_property_read_u32(np, "num-cs", &tmp); | 2082 | of_property_read_u32(np, "num-cs", &tmp); |
2087 | pd->num_chipselect = tmp; | 2083 | pd->num_chipselect = tmp; |
2088 | of_property_read_u32(np, "pl022,autosuspend-delay", | 2084 | of_property_read_u32(np, "pl022,autosuspend-delay", |
@@ -2133,32 +2129,7 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id) | |||
2133 | pl022->chipselects = devm_kzalloc(dev, num_cs * sizeof(int), | 2129 | pl022->chipselects = devm_kzalloc(dev, num_cs * sizeof(int), |
2134 | GFP_KERNEL); | 2130 | GFP_KERNEL); |
2135 | 2131 | ||
2136 | pl022->pinctrl = devm_pinctrl_get(dev); | 2132 | pinctrl_pm_select_default_state(dev); |
2137 | if (IS_ERR(pl022->pinctrl)) { | ||
2138 | status = PTR_ERR(pl022->pinctrl); | ||
2139 | goto err_no_pinctrl; | ||
2140 | } | ||
2141 | |||
2142 | pl022->pins_default = pinctrl_lookup_state(pl022->pinctrl, | ||
2143 | PINCTRL_STATE_DEFAULT); | ||
2144 | /* enable pins to be muxed in and configured */ | ||
2145 | if (!IS_ERR(pl022->pins_default)) { | ||
2146 | status = pinctrl_select_state(pl022->pinctrl, | ||
2147 | pl022->pins_default); | ||
2148 | if (status) | ||
2149 | dev_err(dev, "could not set default pins\n"); | ||
2150 | } else | ||
2151 | dev_err(dev, "could not get default pinstate\n"); | ||
2152 | |||
2153 | pl022->pins_idle = pinctrl_lookup_state(pl022->pinctrl, | ||
2154 | PINCTRL_STATE_IDLE); | ||
2155 | if (IS_ERR(pl022->pins_idle)) | ||
2156 | dev_dbg(dev, "could not get idle pinstate\n"); | ||
2157 | |||
2158 | pl022->pins_sleep = pinctrl_lookup_state(pl022->pinctrl, | ||
2159 | PINCTRL_STATE_SLEEP); | ||
2160 | if (IS_ERR(pl022->pins_sleep)) | ||
2161 | dev_dbg(dev, "could not get sleep pinstate\n"); | ||
2162 | 2133 | ||
2163 | /* | 2134 | /* |
2164 | * Bus Number Which has been Assigned to this SSP controller | 2135 | * Bus Number Which has been Assigned to this SSP controller |
@@ -2308,7 +2279,6 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id) | |||
2308 | amba_release_regions(adev); | 2279 | amba_release_regions(adev); |
2309 | err_no_ioregion: | 2280 | err_no_ioregion: |
2310 | err_no_gpio: | 2281 | err_no_gpio: |
2311 | err_no_pinctrl: | ||
2312 | spi_master_put(master); | 2282 | spi_master_put(master); |
2313 | return status; | 2283 | return status; |
2314 | } | 2284 | } |
@@ -2348,44 +2318,21 @@ pl022_remove(struct amba_device *adev) | |||
2348 | */ | 2318 | */ |
2349 | static void pl022_suspend_resources(struct pl022 *pl022, bool runtime) | 2319 | static void pl022_suspend_resources(struct pl022 *pl022, bool runtime) |
2350 | { | 2320 | { |
2351 | int ret; | ||
2352 | struct pinctrl_state *pins_state; | ||
2353 | |||
2354 | clk_disable(pl022->clk); | 2321 | clk_disable(pl022->clk); |
2355 | 2322 | ||
2356 | pins_state = runtime ? pl022->pins_idle : pl022->pins_sleep; | 2323 | if (runtime) |
2357 | /* Optionally let pins go into sleep states */ | 2324 | pinctrl_pm_select_idle_state(&pl022->adev->dev); |
2358 | if (!IS_ERR(pins_state)) { | 2325 | else |
2359 | ret = pinctrl_select_state(pl022->pinctrl, pins_state); | 2326 | pinctrl_pm_select_sleep_state(&pl022->adev->dev); |
2360 | if (ret) | ||
2361 | dev_err(&pl022->adev->dev, "could not set %s pins\n", | ||
2362 | runtime ? "idle" : "sleep"); | ||
2363 | } | ||
2364 | } | 2327 | } |
2365 | 2328 | ||
2366 | static void pl022_resume_resources(struct pl022 *pl022, bool runtime) | 2329 | static void pl022_resume_resources(struct pl022 *pl022, bool runtime) |
2367 | { | 2330 | { |
2368 | int ret; | ||
2369 | |||
2370 | /* Optionaly enable pins to be muxed in and configured */ | ||
2371 | /* First go to the default state */ | 2331 | /* First go to the default state */ |
2372 | if (!IS_ERR(pl022->pins_default)) { | 2332 | pinctrl_pm_select_default_state(&pl022->adev->dev); |
2373 | ret = pinctrl_select_state(pl022->pinctrl, pl022->pins_default); | 2333 | if (!runtime) |
2374 | if (ret) | ||
2375 | dev_err(&pl022->adev->dev, | ||
2376 | "could not set default pins\n"); | ||
2377 | } | ||
2378 | |||
2379 | if (!runtime) { | ||
2380 | /* Then let's idle the pins until the next transfer happens */ | 2334 | /* Then let's idle the pins until the next transfer happens */ |
2381 | if (!IS_ERR(pl022->pins_idle)) { | 2335 | pinctrl_pm_select_idle_state(&pl022->adev->dev); |
2382 | ret = pinctrl_select_state(pl022->pinctrl, | ||
2383 | pl022->pins_idle); | ||
2384 | if (ret) | ||
2385 | dev_err(&pl022->adev->dev, | ||
2386 | "could not set idle pins\n"); | ||
2387 | } | ||
2388 | } | ||
2389 | 2336 | ||
2390 | clk_enable(pl022->clk); | 2337 | clk_enable(pl022->clk); |
2391 | } | 2338 | } |
diff --git a/drivers/spi/spi-ppc4xx.c b/drivers/spi/spi-ppc4xx.c index 357f183a4fb7..0ee53c25ba58 100644 --- a/drivers/spi/spi-ppc4xx.c +++ b/drivers/spi/spi-ppc4xx.c | |||
@@ -190,12 +190,6 @@ static int spi_ppc4xx_setupxfer(struct spi_device *spi, struct spi_transfer *t) | |||
190 | speed = min(t->speed_hz, spi->max_speed_hz); | 190 | speed = min(t->speed_hz, spi->max_speed_hz); |
191 | } | 191 | } |
192 | 192 | ||
193 | if (bits_per_word != 8) { | ||
194 | dev_err(&spi->dev, "invalid bits-per-word (%d)\n", | ||
195 | bits_per_word); | ||
196 | return -EINVAL; | ||
197 | } | ||
198 | |||
199 | if (!speed || (speed > spi->max_speed_hz)) { | 193 | if (!speed || (speed > spi->max_speed_hz)) { |
200 | dev_err(&spi->dev, "invalid speed_hz (%d)\n", speed); | 194 | dev_err(&spi->dev, "invalid speed_hz (%d)\n", speed); |
201 | return -EINVAL; | 195 | return -EINVAL; |
@@ -229,12 +223,6 @@ static int spi_ppc4xx_setup(struct spi_device *spi) | |||
229 | { | 223 | { |
230 | struct spi_ppc4xx_cs *cs = spi->controller_state; | 224 | struct spi_ppc4xx_cs *cs = spi->controller_state; |
231 | 225 | ||
232 | if (spi->bits_per_word != 8) { | ||
233 | dev_err(&spi->dev, "invalid bits-per-word (%d)\n", | ||
234 | spi->bits_per_word); | ||
235 | return -EINVAL; | ||
236 | } | ||
237 | |||
238 | if (!spi->max_speed_hz) { | 226 | if (!spi->max_speed_hz) { |
239 | dev_err(&spi->dev, "invalid max_speed_hz (must be non-zero)\n"); | 227 | dev_err(&spi->dev, "invalid max_speed_hz (must be non-zero)\n"); |
240 | return -EINVAL; | 228 | return -EINVAL; |
@@ -406,7 +394,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op) | |||
406 | if (master == NULL) | 394 | if (master == NULL) |
407 | return -ENOMEM; | 395 | return -ENOMEM; |
408 | master->dev.of_node = np; | 396 | master->dev.of_node = np; |
409 | dev_set_drvdata(dev, master); | 397 | platform_set_drvdata(op, master); |
410 | hw = spi_master_get_devdata(master); | 398 | hw = spi_master_get_devdata(master); |
411 | hw->master = spi_master_get(master); | 399 | hw->master = spi_master_get(master); |
412 | hw->dev = dev; | 400 | hw->dev = dev; |
@@ -465,6 +453,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op) | |||
465 | bbp->use_dma = 0; | 453 | bbp->use_dma = 0; |
466 | bbp->master->setup = spi_ppc4xx_setup; | 454 | bbp->master->setup = spi_ppc4xx_setup; |
467 | bbp->master->cleanup = spi_ppc4xx_cleanup; | 455 | bbp->master->cleanup = spi_ppc4xx_cleanup; |
456 | bbp->master->bits_per_word_mask = SPI_BPW_MASK(8); | ||
468 | 457 | ||
469 | /* the spi->mode bits understood by this driver: */ | 458 | /* the spi->mode bits understood by this driver: */ |
470 | bbp->master->mode_bits = | 459 | bbp->master->mode_bits = |
@@ -553,7 +542,6 @@ request_mem_error: | |||
553 | free_gpios: | 542 | free_gpios: |
554 | free_gpios(hw); | 543 | free_gpios(hw); |
555 | free_master: | 544 | free_master: |
556 | dev_set_drvdata(dev, NULL); | ||
557 | spi_master_put(master); | 545 | spi_master_put(master); |
558 | 546 | ||
559 | dev_err(dev, "initialization failed\n"); | 547 | dev_err(dev, "initialization failed\n"); |
@@ -562,11 +550,10 @@ free_master: | |||
562 | 550 | ||
563 | static int spi_ppc4xx_of_remove(struct platform_device *op) | 551 | static int spi_ppc4xx_of_remove(struct platform_device *op) |
564 | { | 552 | { |
565 | struct spi_master *master = dev_get_drvdata(&op->dev); | 553 | struct spi_master *master = platform_get_drvdata(op); |
566 | struct ppc4xx_spi *hw = spi_master_get_devdata(master); | 554 | struct ppc4xx_spi *hw = spi_master_get_devdata(master); |
567 | 555 | ||
568 | spi_bitbang_stop(&hw->bitbang); | 556 | spi_bitbang_stop(&hw->bitbang); |
569 | dev_set_drvdata(&op->dev, NULL); | ||
570 | release_mem_region(hw->mapbase, hw->mapsize); | 557 | release_mem_region(hw->mapbase, hw->mapsize); |
571 | free_irq(hw->irqnum, hw); | 558 | free_irq(hw->irqnum, hw); |
572 | iounmap(hw->regs); | 559 | iounmap(hw->regs); |
diff --git a/drivers/spi/spi-pxa2xx-dma.c b/drivers/spi/spi-pxa2xx-dma.c index c735c5a008a2..3c0b55125f1e 100644 --- a/drivers/spi/spi-pxa2xx-dma.c +++ b/drivers/spi/spi-pxa2xx-dma.c | |||
@@ -59,7 +59,7 @@ static int pxa2xx_spi_map_dma_buffer(struct driver_data *drv_data, | |||
59 | int ret; | 59 | int ret; |
60 | 60 | ||
61 | sg_free_table(sgt); | 61 | sg_free_table(sgt); |
62 | ret = sg_alloc_table(sgt, nents, GFP_KERNEL); | 62 | ret = sg_alloc_table(sgt, nents, GFP_ATOMIC); |
63 | if (ret) | 63 | if (ret) |
64 | return ret; | 64 | return ret; |
65 | } | 65 | } |
@@ -327,22 +327,23 @@ void pxa2xx_spi_dma_start(struct driver_data *drv_data) | |||
327 | int pxa2xx_spi_dma_setup(struct driver_data *drv_data) | 327 | int pxa2xx_spi_dma_setup(struct driver_data *drv_data) |
328 | { | 328 | { |
329 | struct pxa2xx_spi_master *pdata = drv_data->master_info; | 329 | struct pxa2xx_spi_master *pdata = drv_data->master_info; |
330 | struct device *dev = &drv_data->pdev->dev; | ||
330 | dma_cap_mask_t mask; | 331 | dma_cap_mask_t mask; |
331 | 332 | ||
332 | dma_cap_zero(mask); | 333 | dma_cap_zero(mask); |
333 | dma_cap_set(DMA_SLAVE, mask); | 334 | dma_cap_set(DMA_SLAVE, mask); |
334 | 335 | ||
335 | drv_data->dummy = devm_kzalloc(&drv_data->pdev->dev, SZ_2K, GFP_KERNEL); | 336 | drv_data->dummy = devm_kzalloc(dev, SZ_2K, GFP_KERNEL); |
336 | if (!drv_data->dummy) | 337 | if (!drv_data->dummy) |
337 | return -ENOMEM; | 338 | return -ENOMEM; |
338 | 339 | ||
339 | drv_data->tx_chan = dma_request_channel(mask, pxa2xx_spi_dma_filter, | 340 | drv_data->tx_chan = dma_request_slave_channel_compat(mask, |
340 | pdata); | 341 | pxa2xx_spi_dma_filter, pdata, dev, "tx"); |
341 | if (!drv_data->tx_chan) | 342 | if (!drv_data->tx_chan) |
342 | return -ENODEV; | 343 | return -ENODEV; |
343 | 344 | ||
344 | drv_data->rx_chan = dma_request_channel(mask, pxa2xx_spi_dma_filter, | 345 | drv_data->rx_chan = dma_request_slave_channel_compat(mask, |
345 | pdata); | 346 | pxa2xx_spi_dma_filter, pdata, dev, "rx"); |
346 | if (!drv_data->rx_chan) { | 347 | if (!drv_data->rx_chan) { |
347 | dma_release_channel(drv_data->tx_chan); | 348 | dma_release_channel(drv_data->tx_chan); |
348 | drv_data->tx_chan = NULL; | 349 | drv_data->tx_chan = NULL; |
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index f5d84d6f8222..f440dcee852b 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c | |||
@@ -881,21 +881,6 @@ static int setup(struct spi_device *spi) | |||
881 | rx_thres = RX_THRESH_DFLT; | 881 | rx_thres = RX_THRESH_DFLT; |
882 | } | 882 | } |
883 | 883 | ||
884 | if (!pxa25x_ssp_comp(drv_data) | ||
885 | && (spi->bits_per_word < 4 || spi->bits_per_word > 32)) { | ||
886 | dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d " | ||
887 | "b/w not 4-32 for type non-PXA25x_SSP\n", | ||
888 | drv_data->ssp_type, spi->bits_per_word); | ||
889 | return -EINVAL; | ||
890 | } else if (pxa25x_ssp_comp(drv_data) | ||
891 | && (spi->bits_per_word < 4 | ||
892 | || spi->bits_per_word > 16)) { | ||
893 | dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d " | ||
894 | "b/w not 4-16 for type PXA25x_SSP\n", | ||
895 | drv_data->ssp_type, spi->bits_per_word); | ||
896 | return -EINVAL; | ||
897 | } | ||
898 | |||
899 | /* Only alloc on first setup */ | 884 | /* Only alloc on first setup */ |
900 | chip = spi_get_ctldata(spi); | 885 | chip = spi_get_ctldata(spi); |
901 | if (!chip) { | 886 | if (!chip) { |
@@ -1011,9 +996,6 @@ static int setup(struct spi_device *spi) | |||
1011 | chip->n_bytes = 4; | 996 | chip->n_bytes = 4; |
1012 | chip->read = u32_reader; | 997 | chip->read = u32_reader; |
1013 | chip->write = u32_writer; | 998 | chip->write = u32_writer; |
1014 | } else { | ||
1015 | dev_err(&spi->dev, "invalid wordsize\n"); | ||
1016 | return -ENODEV; | ||
1017 | } | 999 | } |
1018 | chip->bits_per_word = spi->bits_per_word; | 1000 | chip->bits_per_word = spi->bits_per_word; |
1019 | 1001 | ||
@@ -1040,32 +1022,10 @@ static void cleanup(struct spi_device *spi) | |||
1040 | } | 1022 | } |
1041 | 1023 | ||
1042 | #ifdef CONFIG_ACPI | 1024 | #ifdef CONFIG_ACPI |
1043 | static int pxa2xx_spi_acpi_add_dma(struct acpi_resource *res, void *data) | ||
1044 | { | ||
1045 | struct pxa2xx_spi_master *pdata = data; | ||
1046 | |||
1047 | if (res->type == ACPI_RESOURCE_TYPE_FIXED_DMA) { | ||
1048 | const struct acpi_resource_fixed_dma *dma; | ||
1049 | |||
1050 | dma = &res->data.fixed_dma; | ||
1051 | if (pdata->tx_slave_id < 0) { | ||
1052 | pdata->tx_slave_id = dma->request_lines; | ||
1053 | pdata->tx_chan_id = dma->channels; | ||
1054 | } else if (pdata->rx_slave_id < 0) { | ||
1055 | pdata->rx_slave_id = dma->request_lines; | ||
1056 | pdata->rx_chan_id = dma->channels; | ||
1057 | } | ||
1058 | } | ||
1059 | |||
1060 | /* Tell the ACPI core to skip this resource */ | ||
1061 | return 1; | ||
1062 | } | ||
1063 | |||
1064 | static struct pxa2xx_spi_master * | 1025 | static struct pxa2xx_spi_master * |
1065 | pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) | 1026 | pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) |
1066 | { | 1027 | { |
1067 | struct pxa2xx_spi_master *pdata; | 1028 | struct pxa2xx_spi_master *pdata; |
1068 | struct list_head resource_list; | ||
1069 | struct acpi_device *adev; | 1029 | struct acpi_device *adev; |
1070 | struct ssp_device *ssp; | 1030 | struct ssp_device *ssp; |
1071 | struct resource *res; | 1031 | struct resource *res; |
@@ -1075,7 +1035,7 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) | |||
1075 | acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) | 1035 | acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) |
1076 | return NULL; | 1036 | return NULL; |
1077 | 1037 | ||
1078 | pdata = devm_kzalloc(&pdev->dev, sizeof(*ssp), GFP_KERNEL); | 1038 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
1079 | if (!pdata) { | 1039 | if (!pdata) { |
1080 | dev_err(&pdev->dev, | 1040 | dev_err(&pdev->dev, |
1081 | "failed to allocate memory for platform data\n"); | 1041 | "failed to allocate memory for platform data\n"); |
@@ -1091,7 +1051,7 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) | |||
1091 | ssp->phys_base = res->start; | 1051 | ssp->phys_base = res->start; |
1092 | ssp->mmio_base = devm_ioremap_resource(&pdev->dev, res); | 1052 | ssp->mmio_base = devm_ioremap_resource(&pdev->dev, res); |
1093 | if (IS_ERR(ssp->mmio_base)) | 1053 | if (IS_ERR(ssp->mmio_base)) |
1094 | return PTR_ERR(ssp->mmio_base); | 1054 | return NULL; |
1095 | 1055 | ||
1096 | ssp->clk = devm_clk_get(&pdev->dev, NULL); | 1056 | ssp->clk = devm_clk_get(&pdev->dev, NULL); |
1097 | ssp->irq = platform_get_irq(pdev, 0); | 1057 | ssp->irq = platform_get_irq(pdev, 0); |
@@ -1103,15 +1063,7 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) | |||
1103 | ssp->port_id = devid; | 1063 | ssp->port_id = devid; |
1104 | 1064 | ||
1105 | pdata->num_chipselect = 1; | 1065 | pdata->num_chipselect = 1; |
1106 | pdata->rx_slave_id = -1; | 1066 | pdata->enable_dma = true; |
1107 | pdata->tx_slave_id = -1; | ||
1108 | |||
1109 | INIT_LIST_HEAD(&resource_list); | ||
1110 | acpi_dev_get_resources(adev, &resource_list, pxa2xx_spi_acpi_add_dma, | ||
1111 | pdata); | ||
1112 | acpi_dev_free_resource_list(&resource_list); | ||
1113 | |||
1114 | pdata->enable_dma = pdata->rx_slave_id >= 0 && pdata->tx_slave_id >= 0; | ||
1115 | 1067 | ||
1116 | return pdata; | 1068 | return pdata; |
1117 | } | 1069 | } |
@@ -1119,6 +1071,7 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) | |||
1119 | static struct acpi_device_id pxa2xx_spi_acpi_match[] = { | 1071 | static struct acpi_device_id pxa2xx_spi_acpi_match[] = { |
1120 | { "INT33C0", 0 }, | 1072 | { "INT33C0", 0 }, |
1121 | { "INT33C1", 0 }, | 1073 | { "INT33C1", 0 }, |
1074 | { "80860F0E", 0 }, | ||
1122 | { }, | 1075 | { }, |
1123 | }; | 1076 | }; |
1124 | MODULE_DEVICE_TABLE(acpi, pxa2xx_spi_acpi_match); | 1077 | MODULE_DEVICE_TABLE(acpi, pxa2xx_spi_acpi_match); |
@@ -1190,11 +1143,13 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1190 | drv_data->ioaddr = ssp->mmio_base; | 1143 | drv_data->ioaddr = ssp->mmio_base; |
1191 | drv_data->ssdr_physical = ssp->phys_base + SSDR; | 1144 | drv_data->ssdr_physical = ssp->phys_base + SSDR; |
1192 | if (pxa25x_ssp_comp(drv_data)) { | 1145 | if (pxa25x_ssp_comp(drv_data)) { |
1146 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); | ||
1193 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE; | 1147 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE; |
1194 | drv_data->dma_cr1 = 0; | 1148 | drv_data->dma_cr1 = 0; |
1195 | drv_data->clear_sr = SSSR_ROR; | 1149 | drv_data->clear_sr = SSSR_ROR; |
1196 | drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR; | 1150 | drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR; |
1197 | } else { | 1151 | } else { |
1152 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); | ||
1198 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE; | 1153 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE; |
1199 | drv_data->dma_cr1 = DEFAULT_DMA_CR1; | 1154 | drv_data->dma_cr1 = DEFAULT_DMA_CR1; |
1200 | drv_data->clear_sr = SSSR_ROR | SSSR_TINT; | 1155 | drv_data->clear_sr = SSSR_ROR | SSSR_TINT; |
@@ -1214,7 +1169,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1214 | if (platform_info->enable_dma) { | 1169 | if (platform_info->enable_dma) { |
1215 | status = pxa2xx_spi_dma_setup(drv_data); | 1170 | status = pxa2xx_spi_dma_setup(drv_data); |
1216 | if (status) { | 1171 | if (status) { |
1217 | dev_warn(dev, "failed to setup DMA, using PIO\n"); | 1172 | dev_dbg(dev, "no DMA channels available, using PIO\n"); |
1218 | platform_info->enable_dma = false; | 1173 | platform_info->enable_dma = false; |
1219 | } | 1174 | } |
1220 | } | 1175 | } |
@@ -1299,9 +1254,6 @@ static int pxa2xx_spi_remove(struct platform_device *pdev) | |||
1299 | /* Disconnect from the SPI framework */ | 1254 | /* Disconnect from the SPI framework */ |
1300 | spi_unregister_master(drv_data->master); | 1255 | spi_unregister_master(drv_data->master); |
1301 | 1256 | ||
1302 | /* Prevent double remove */ | ||
1303 | platform_set_drvdata(pdev, NULL); | ||
1304 | |||
1305 | return 0; | 1257 | return 0; |
1306 | } | 1258 | } |
1307 | 1259 | ||
diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 902f2fb902db..b44a6ac3cec9 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c | |||
@@ -719,7 +719,7 @@ static void rspi_release_dma(struct rspi_data *rspi) | |||
719 | 719 | ||
720 | static int rspi_remove(struct platform_device *pdev) | 720 | static int rspi_remove(struct platform_device *pdev) |
721 | { | 721 | { |
722 | struct rspi_data *rspi = dev_get_drvdata(&pdev->dev); | 722 | struct rspi_data *rspi = platform_get_drvdata(pdev); |
723 | 723 | ||
724 | spi_unregister_master(rspi->master); | 724 | spi_unregister_master(rspi->master); |
725 | rspi_release_dma(rspi); | 725 | rspi_release_dma(rspi); |
@@ -759,7 +759,7 @@ static int rspi_probe(struct platform_device *pdev) | |||
759 | } | 759 | } |
760 | 760 | ||
761 | rspi = spi_master_get_devdata(master); | 761 | rspi = spi_master_get_devdata(master); |
762 | dev_set_drvdata(&pdev->dev, rspi); | 762 | platform_set_drvdata(pdev, rspi); |
763 | 763 | ||
764 | rspi->master = master; | 764 | rspi->master = master; |
765 | rspi->addr = ioremap(res->start, resource_size(res)); | 765 | rspi->addr = ioremap(res->start, resource_size(res)); |
diff --git a/drivers/spi/spi-s3c24xx.c b/drivers/spi/spi-s3c24xx.c index 02d64603fcc5..68910b310152 100644 --- a/drivers/spi/spi-s3c24xx.c +++ b/drivers/spi/spi-s3c24xx.c | |||
@@ -667,8 +667,6 @@ static int s3c24xx_spi_remove(struct platform_device *dev) | |||
667 | { | 667 | { |
668 | struct s3c24xx_spi *hw = platform_get_drvdata(dev); | 668 | struct s3c24xx_spi *hw = platform_get_drvdata(dev); |
669 | 669 | ||
670 | platform_set_drvdata(dev, NULL); | ||
671 | |||
672 | spi_bitbang_stop(&hw->bitbang); | 670 | spi_bitbang_stop(&hw->bitbang); |
673 | 671 | ||
674 | clk_disable(hw->clk); | 672 | clk_disable(hw->clk); |
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 5000586cb98d..eb53df27e7ea 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #endif | 39 | #endif |
40 | 40 | ||
41 | #define MAX_SPI_PORTS 3 | 41 | #define MAX_SPI_PORTS 3 |
42 | #define S3C64XX_SPI_QUIRK_POLL (1 << 0) | ||
42 | 43 | ||
43 | /* Registers and bit-fields */ | 44 | /* Registers and bit-fields */ |
44 | 45 | ||
@@ -130,6 +131,7 @@ | |||
130 | #define S3C64XX_SPI_TRAILCNT S3C64XX_SPI_MAX_TRAILCNT | 131 | #define S3C64XX_SPI_TRAILCNT S3C64XX_SPI_MAX_TRAILCNT |
131 | 132 | ||
132 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | 133 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) |
134 | #define is_polling(x) (x->port_conf->quirks & S3C64XX_SPI_QUIRK_POLL) | ||
133 | 135 | ||
134 | #define RXBUSY (1<<2) | 136 | #define RXBUSY (1<<2) |
135 | #define TXBUSY (1<<3) | 137 | #define TXBUSY (1<<3) |
@@ -158,6 +160,7 @@ struct s3c64xx_spi_port_config { | |||
158 | int fifo_lvl_mask[MAX_SPI_PORTS]; | 160 | int fifo_lvl_mask[MAX_SPI_PORTS]; |
159 | int rx_lvl_offset; | 161 | int rx_lvl_offset; |
160 | int tx_st_done; | 162 | int tx_st_done; |
163 | int quirks; | ||
161 | bool high_speed; | 164 | bool high_speed; |
162 | bool clk_from_cmu; | 165 | bool clk_from_cmu; |
163 | }; | 166 | }; |
@@ -205,6 +208,7 @@ struct s3c64xx_spi_driver_data { | |||
205 | struct s3c64xx_spi_port_config *port_conf; | 208 | struct s3c64xx_spi_port_config *port_conf; |
206 | unsigned int port_id; | 209 | unsigned int port_id; |
207 | unsigned long gpios[4]; | 210 | unsigned long gpios[4]; |
211 | bool cs_gpio; | ||
208 | }; | 212 | }; |
209 | 213 | ||
210 | static void flush_fifo(struct s3c64xx_spi_driver_data *sdd) | 214 | static void flush_fifo(struct s3c64xx_spi_driver_data *sdd) |
@@ -344,8 +348,12 @@ static int s3c64xx_spi_prepare_transfer(struct spi_master *spi) | |||
344 | { | 348 | { |
345 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); | 349 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); |
346 | 350 | ||
347 | /* Acquire DMA channels */ | 351 | /* |
348 | while (!acquire_dma(sdd)) | 352 | * If DMA resource was not available during |
353 | * probe, no need to continue with dma requests | ||
354 | * else Acquire DMA channels | ||
355 | */ | ||
356 | while (!is_polling(sdd) && !acquire_dma(sdd)) | ||
349 | usleep_range(10000, 11000); | 357 | usleep_range(10000, 11000); |
350 | 358 | ||
351 | pm_runtime_get_sync(&sdd->pdev->dev); | 359 | pm_runtime_get_sync(&sdd->pdev->dev); |
@@ -358,9 +366,12 @@ static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi) | |||
358 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); | 366 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); |
359 | 367 | ||
360 | /* Free DMA channels */ | 368 | /* Free DMA channels */ |
361 | sdd->ops->release((enum dma_ch)sdd->rx_dma.ch, &s3c64xx_spi_dma_client); | 369 | if (!is_polling(sdd)) { |
362 | sdd->ops->release((enum dma_ch)sdd->tx_dma.ch, &s3c64xx_spi_dma_client); | 370 | sdd->ops->release((enum dma_ch)sdd->rx_dma.ch, |
363 | 371 | &s3c64xx_spi_dma_client); | |
372 | sdd->ops->release((enum dma_ch)sdd->tx_dma.ch, | ||
373 | &s3c64xx_spi_dma_client); | ||
374 | } | ||
364 | pm_runtime_put(&sdd->pdev->dev); | 375 | pm_runtime_put(&sdd->pdev->dev); |
365 | 376 | ||
366 | return 0; | 377 | return 0; |
@@ -444,7 +455,7 @@ static int s3c64xx_spi_prepare_transfer(struct spi_master *spi) | |||
444 | } | 455 | } |
445 | 456 | ||
446 | ret = pm_runtime_get_sync(&sdd->pdev->dev); | 457 | ret = pm_runtime_get_sync(&sdd->pdev->dev); |
447 | if (ret != 0) { | 458 | if (ret < 0) { |
448 | dev_err(dev, "Failed to enable device: %d\n", ret); | 459 | dev_err(dev, "Failed to enable device: %d\n", ret); |
449 | goto out_tx; | 460 | goto out_tx; |
450 | } | 461 | } |
@@ -464,8 +475,10 @@ static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi) | |||
464 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); | 475 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); |
465 | 476 | ||
466 | /* Free DMA channels */ | 477 | /* Free DMA channels */ |
467 | dma_release_channel(sdd->rx_dma.ch); | 478 | if (!is_polling(sdd)) { |
468 | dma_release_channel(sdd->tx_dma.ch); | 479 | dma_release_channel(sdd->rx_dma.ch); |
480 | dma_release_channel(sdd->tx_dma.ch); | ||
481 | } | ||
469 | 482 | ||
470 | pm_runtime_put(&sdd->pdev->dev); | 483 | pm_runtime_put(&sdd->pdev->dev); |
471 | return 0; | 484 | return 0; |
@@ -558,14 +571,40 @@ static inline void enable_cs(struct s3c64xx_spi_driver_data *sdd, | |||
558 | if (sdd->tgl_spi != spi) { /* if last mssg on diff device */ | 571 | if (sdd->tgl_spi != spi) { /* if last mssg on diff device */ |
559 | /* Deselect the last toggled device */ | 572 | /* Deselect the last toggled device */ |
560 | cs = sdd->tgl_spi->controller_data; | 573 | cs = sdd->tgl_spi->controller_data; |
561 | gpio_set_value(cs->line, | 574 | if (sdd->cs_gpio) |
562 | spi->mode & SPI_CS_HIGH ? 0 : 1); | 575 | gpio_set_value(cs->line, |
576 | spi->mode & SPI_CS_HIGH ? 0 : 1); | ||
563 | } | 577 | } |
564 | sdd->tgl_spi = NULL; | 578 | sdd->tgl_spi = NULL; |
565 | } | 579 | } |
566 | 580 | ||
567 | cs = spi->controller_data; | 581 | cs = spi->controller_data; |
568 | gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 1 : 0); | 582 | if (sdd->cs_gpio) |
583 | gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 1 : 0); | ||
584 | |||
585 | /* Start the signals */ | ||
586 | writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL); | ||
587 | } | ||
588 | |||
589 | static u32 s3c64xx_spi_wait_for_timeout(struct s3c64xx_spi_driver_data *sdd, | ||
590 | int timeout_ms) | ||
591 | { | ||
592 | void __iomem *regs = sdd->regs; | ||
593 | unsigned long val = 1; | ||
594 | u32 status; | ||
595 | |||
596 | /* max fifo depth available */ | ||
597 | u32 max_fifo = (FIFO_LVL_MASK(sdd) >> 1) + 1; | ||
598 | |||
599 | if (timeout_ms) | ||
600 | val = msecs_to_loops(timeout_ms); | ||
601 | |||
602 | do { | ||
603 | status = readl(regs + S3C64XX_SPI_STATUS); | ||
604 | } while (RX_FIFO_LVL(status, sdd) < max_fifo && --val); | ||
605 | |||
606 | /* return the actual received data length */ | ||
607 | return RX_FIFO_LVL(status, sdd); | ||
569 | } | 608 | } |
570 | 609 | ||
571 | static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd, | 610 | static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd, |
@@ -590,20 +629,19 @@ static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd, | |||
590 | } while (RX_FIFO_LVL(status, sdd) < xfer->len && --val); | 629 | } while (RX_FIFO_LVL(status, sdd) < xfer->len && --val); |
591 | } | 630 | } |
592 | 631 | ||
593 | if (!val) | ||
594 | return -EIO; | ||
595 | |||
596 | if (dma_mode) { | 632 | if (dma_mode) { |
597 | u32 status; | 633 | u32 status; |
598 | 634 | ||
599 | /* | 635 | /* |
636 | * If the previous xfer was completed within timeout, then | ||
637 | * proceed further else return -EIO. | ||
600 | * DmaTx returns after simply writing data in the FIFO, | 638 | * DmaTx returns after simply writing data in the FIFO, |
601 | * w/o waiting for real transmission on the bus to finish. | 639 | * w/o waiting for real transmission on the bus to finish. |
602 | * DmaRx returns only after Dma read data from FIFO which | 640 | * DmaRx returns only after Dma read data from FIFO which |
603 | * needs bus transmission to finish, so we don't worry if | 641 | * needs bus transmission to finish, so we don't worry if |
604 | * Xfer involved Rx(with or without Tx). | 642 | * Xfer involved Rx(with or without Tx). |
605 | */ | 643 | */ |
606 | if (xfer->rx_buf == NULL) { | 644 | if (val && !xfer->rx_buf) { |
607 | val = msecs_to_loops(10); | 645 | val = msecs_to_loops(10); |
608 | status = readl(regs + S3C64XX_SPI_STATUS); | 646 | status = readl(regs + S3C64XX_SPI_STATUS); |
609 | while ((TX_FIFO_LVL(status, sdd) | 647 | while ((TX_FIFO_LVL(status, sdd) |
@@ -613,30 +651,54 @@ static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd, | |||
613 | status = readl(regs + S3C64XX_SPI_STATUS); | 651 | status = readl(regs + S3C64XX_SPI_STATUS); |
614 | } | 652 | } |
615 | 653 | ||
616 | if (!val) | ||
617 | return -EIO; | ||
618 | } | 654 | } |
655 | |||
656 | /* If timed out while checking rx/tx status return error */ | ||
657 | if (!val) | ||
658 | return -EIO; | ||
619 | } else { | 659 | } else { |
660 | int loops; | ||
661 | u32 cpy_len; | ||
662 | u8 *buf; | ||
663 | |||
620 | /* If it was only Tx */ | 664 | /* If it was only Tx */ |
621 | if (xfer->rx_buf == NULL) { | 665 | if (!xfer->rx_buf) { |
622 | sdd->state &= ~TXBUSY; | 666 | sdd->state &= ~TXBUSY; |
623 | return 0; | 667 | return 0; |
624 | } | 668 | } |
625 | 669 | ||
626 | switch (sdd->cur_bpw) { | 670 | /* |
627 | case 32: | 671 | * If the receive length is bigger than the controller fifo |
628 | ioread32_rep(regs + S3C64XX_SPI_RX_DATA, | 672 | * size, calculate the loops and read the fifo as many times. |
629 | xfer->rx_buf, xfer->len / 4); | 673 | * loops = length / max fifo size (calculated by using the |
630 | break; | 674 | * fifo mask). |
631 | case 16: | 675 | * For any size less than the fifo size the below code is |
632 | ioread16_rep(regs + S3C64XX_SPI_RX_DATA, | 676 | * executed atleast once. |
633 | xfer->rx_buf, xfer->len / 2); | 677 | */ |
634 | break; | 678 | loops = xfer->len / ((FIFO_LVL_MASK(sdd) >> 1) + 1); |
635 | default: | 679 | buf = xfer->rx_buf; |
636 | ioread8_rep(regs + S3C64XX_SPI_RX_DATA, | 680 | do { |
637 | xfer->rx_buf, xfer->len); | 681 | /* wait for data to be received in the fifo */ |
638 | break; | 682 | cpy_len = s3c64xx_spi_wait_for_timeout(sdd, |
639 | } | 683 | (loops ? ms : 0)); |
684 | |||
685 | switch (sdd->cur_bpw) { | ||
686 | case 32: | ||
687 | ioread32_rep(regs + S3C64XX_SPI_RX_DATA, | ||
688 | buf, cpy_len / 4); | ||
689 | break; | ||
690 | case 16: | ||
691 | ioread16_rep(regs + S3C64XX_SPI_RX_DATA, | ||
692 | buf, cpy_len / 2); | ||
693 | break; | ||
694 | default: | ||
695 | ioread8_rep(regs + S3C64XX_SPI_RX_DATA, | ||
696 | buf, cpy_len); | ||
697 | break; | ||
698 | } | ||
699 | |||
700 | buf = buf + cpy_len; | ||
701 | } while (loops--); | ||
640 | sdd->state &= ~RXBUSY; | 702 | sdd->state &= ~RXBUSY; |
641 | } | 703 | } |
642 | 704 | ||
@@ -651,7 +713,11 @@ static inline void disable_cs(struct s3c64xx_spi_driver_data *sdd, | |||
651 | if (sdd->tgl_spi == spi) | 713 | if (sdd->tgl_spi == spi) |
652 | sdd->tgl_spi = NULL; | 714 | sdd->tgl_spi = NULL; |
653 | 715 | ||
654 | gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 0 : 1); | 716 | if (sdd->cs_gpio) |
717 | gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 0 : 1); | ||
718 | |||
719 | /* Quiese the signals */ | ||
720 | writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); | ||
655 | } | 721 | } |
656 | 722 | ||
657 | static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) | 723 | static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) |
@@ -733,7 +799,7 @@ static int s3c64xx_spi_map_mssg(struct s3c64xx_spi_driver_data *sdd, | |||
733 | struct device *dev = &sdd->pdev->dev; | 799 | struct device *dev = &sdd->pdev->dev; |
734 | struct spi_transfer *xfer; | 800 | struct spi_transfer *xfer; |
735 | 801 | ||
736 | if (msg->is_dma_mapped) | 802 | if (is_polling(sdd) || msg->is_dma_mapped) |
737 | return 0; | 803 | return 0; |
738 | 804 | ||
739 | /* First mark all xfer unmapped */ | 805 | /* First mark all xfer unmapped */ |
@@ -782,7 +848,7 @@ static void s3c64xx_spi_unmap_mssg(struct s3c64xx_spi_driver_data *sdd, | |||
782 | struct device *dev = &sdd->pdev->dev; | 848 | struct device *dev = &sdd->pdev->dev; |
783 | struct spi_transfer *xfer; | 849 | struct spi_transfer *xfer; |
784 | 850 | ||
785 | if (msg->is_dma_mapped) | 851 | if (is_polling(sdd) || msg->is_dma_mapped) |
786 | return; | 852 | return; |
787 | 853 | ||
788 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | 854 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { |
@@ -861,8 +927,9 @@ static int s3c64xx_spi_transfer_one_message(struct spi_master *master, | |||
861 | 927 | ||
862 | /* Polling method for xfers not bigger than FIFO capacity */ | 928 | /* Polling method for xfers not bigger than FIFO capacity */ |
863 | use_dma = 0; | 929 | use_dma = 0; |
864 | if (sdd->rx_dma.ch && sdd->tx_dma.ch && | 930 | if (!is_polling(sdd) && |
865 | (xfer->len > ((FIFO_LVL_MASK(sdd) >> 1) + 1))) | 931 | (sdd->rx_dma.ch && sdd->tx_dma.ch && |
932 | (xfer->len > ((FIFO_LVL_MASK(sdd) >> 1) + 1)))) | ||
866 | use_dma = 1; | 933 | use_dma = 1; |
867 | 934 | ||
868 | spin_lock_irqsave(&sdd->lock, flags); | 935 | spin_lock_irqsave(&sdd->lock, flags); |
@@ -876,17 +943,10 @@ static int s3c64xx_spi_transfer_one_message(struct spi_master *master, | |||
876 | /* Slave Select */ | 943 | /* Slave Select */ |
877 | enable_cs(sdd, spi); | 944 | enable_cs(sdd, spi); |
878 | 945 | ||
879 | /* Start the signals */ | ||
880 | writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL); | ||
881 | |||
882 | spin_unlock_irqrestore(&sdd->lock, flags); | 946 | spin_unlock_irqrestore(&sdd->lock, flags); |
883 | 947 | ||
884 | status = wait_for_xfer(sdd, xfer, use_dma); | 948 | status = wait_for_xfer(sdd, xfer, use_dma); |
885 | 949 | ||
886 | /* Quiese the signals */ | ||
887 | writel(S3C64XX_SPI_SLAVE_SIG_INACT, | ||
888 | sdd->regs + S3C64XX_SPI_SLAVE_SEL); | ||
889 | |||
890 | if (status) { | 950 | if (status) { |
891 | dev_err(&spi->dev, "I/O Error: rx-%d tx-%d res:rx-%c tx-%c len-%d\n", | 951 | dev_err(&spi->dev, "I/O Error: rx-%d tx-%d res:rx-%c tx-%c len-%d\n", |
892 | xfer->rx_buf ? 1 : 0, xfer->tx_buf ? 1 : 0, | 952 | xfer->rx_buf ? 1 : 0, xfer->tx_buf ? 1 : 0, |
@@ -942,8 +1002,10 @@ static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata( | |||
942 | { | 1002 | { |
943 | struct s3c64xx_spi_csinfo *cs; | 1003 | struct s3c64xx_spi_csinfo *cs; |
944 | struct device_node *slave_np, *data_np = NULL; | 1004 | struct device_node *slave_np, *data_np = NULL; |
1005 | struct s3c64xx_spi_driver_data *sdd; | ||
945 | u32 fb_delay = 0; | 1006 | u32 fb_delay = 0; |
946 | 1007 | ||
1008 | sdd = spi_master_get_devdata(spi->master); | ||
947 | slave_np = spi->dev.of_node; | 1009 | slave_np = spi->dev.of_node; |
948 | if (!slave_np) { | 1010 | if (!slave_np) { |
949 | dev_err(&spi->dev, "device node not found\n"); | 1011 | dev_err(&spi->dev, "device node not found\n"); |
@@ -963,7 +1025,10 @@ static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata( | |||
963 | return ERR_PTR(-ENOMEM); | 1025 | return ERR_PTR(-ENOMEM); |
964 | } | 1026 | } |
965 | 1027 | ||
966 | cs->line = of_get_named_gpio(data_np, "cs-gpio", 0); | 1028 | /* The CS line is asserted/deasserted by the gpio pin */ |
1029 | if (sdd->cs_gpio) | ||
1030 | cs->line = of_get_named_gpio(data_np, "cs-gpio", 0); | ||
1031 | |||
967 | if (!gpio_is_valid(cs->line)) { | 1032 | if (!gpio_is_valid(cs->line)) { |
968 | dev_err(&spi->dev, "chip select gpio is not specified or invalid\n"); | 1033 | dev_err(&spi->dev, "chip select gpio is not specified or invalid\n"); |
969 | kfree(cs); | 1034 | kfree(cs); |
@@ -1003,7 +1068,8 @@ static int s3c64xx_spi_setup(struct spi_device *spi) | |||
1003 | return -ENODEV; | 1068 | return -ENODEV; |
1004 | } | 1069 | } |
1005 | 1070 | ||
1006 | if (!spi_get_ctldata(spi)) { | 1071 | /* Request gpio only if cs line is asserted by gpio pins */ |
1072 | if (sdd->cs_gpio) { | ||
1007 | err = gpio_request_one(cs->line, GPIOF_OUT_INIT_HIGH, | 1073 | err = gpio_request_one(cs->line, GPIOF_OUT_INIT_HIGH, |
1008 | dev_name(&spi->dev)); | 1074 | dev_name(&spi->dev)); |
1009 | if (err) { | 1075 | if (err) { |
@@ -1012,9 +1078,11 @@ static int s3c64xx_spi_setup(struct spi_device *spi) | |||
1012 | cs->line, err); | 1078 | cs->line, err); |
1013 | goto err_gpio_req; | 1079 | goto err_gpio_req; |
1014 | } | 1080 | } |
1015 | spi_set_ctldata(spi, cs); | ||
1016 | } | 1081 | } |
1017 | 1082 | ||
1083 | if (!spi_get_ctldata(spi)) | ||
1084 | spi_set_ctldata(spi, cs); | ||
1085 | |||
1018 | sci = sdd->cntrlr_info; | 1086 | sci = sdd->cntrlr_info; |
1019 | 1087 | ||
1020 | spin_lock_irqsave(&sdd->lock, flags); | 1088 | spin_lock_irqsave(&sdd->lock, flags); |
@@ -1092,8 +1160,10 @@ err_gpio_req: | |||
1092 | static void s3c64xx_spi_cleanup(struct spi_device *spi) | 1160 | static void s3c64xx_spi_cleanup(struct spi_device *spi) |
1093 | { | 1161 | { |
1094 | struct s3c64xx_spi_csinfo *cs = spi_get_ctldata(spi); | 1162 | struct s3c64xx_spi_csinfo *cs = spi_get_ctldata(spi); |
1163 | struct s3c64xx_spi_driver_data *sdd; | ||
1095 | 1164 | ||
1096 | if (cs) { | 1165 | sdd = spi_master_get_devdata(spi->master); |
1166 | if (cs && sdd->cs_gpio) { | ||
1097 | gpio_free(cs->line); | 1167 | gpio_free(cs->line); |
1098 | if (spi->dev.of_node) | 1168 | if (spi->dev.of_node) |
1099 | kfree(cs); | 1169 | kfree(cs); |
@@ -1270,7 +1340,11 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) | |||
1270 | sdd->cntrlr_info = sci; | 1340 | sdd->cntrlr_info = sci; |
1271 | sdd->pdev = pdev; | 1341 | sdd->pdev = pdev; |
1272 | sdd->sfr_start = mem_res->start; | 1342 | sdd->sfr_start = mem_res->start; |
1343 | sdd->cs_gpio = true; | ||
1273 | if (pdev->dev.of_node) { | 1344 | if (pdev->dev.of_node) { |
1345 | if (!of_find_property(pdev->dev.of_node, "cs-gpio", NULL)) | ||
1346 | sdd->cs_gpio = false; | ||
1347 | |||
1274 | ret = of_alias_get_id(pdev->dev.of_node, "spi"); | 1348 | ret = of_alias_get_id(pdev->dev.of_node, "spi"); |
1275 | if (ret < 0) { | 1349 | if (ret < 0) { |
1276 | dev_err(&pdev->dev, "failed to get alias id, errno %d\n", | 1350 | dev_err(&pdev->dev, "failed to get alias id, errno %d\n", |
@@ -1287,19 +1361,19 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) | |||
1287 | if (!sdd->pdev->dev.of_node) { | 1361 | if (!sdd->pdev->dev.of_node) { |
1288 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); | 1362 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); |
1289 | if (!res) { | 1363 | if (!res) { |
1290 | dev_err(&pdev->dev, "Unable to get SPI tx dma " | 1364 | dev_warn(&pdev->dev, "Unable to get SPI tx dma " |
1291 | "resource\n"); | 1365 | "resource. Switching to poll mode\n"); |
1292 | return -ENXIO; | 1366 | sdd->port_conf->quirks = S3C64XX_SPI_QUIRK_POLL; |
1293 | } | 1367 | } else |
1294 | sdd->tx_dma.dmach = res->start; | 1368 | sdd->tx_dma.dmach = res->start; |
1295 | 1369 | ||
1296 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); | 1370 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); |
1297 | if (!res) { | 1371 | if (!res) { |
1298 | dev_err(&pdev->dev, "Unable to get SPI rx dma " | 1372 | dev_warn(&pdev->dev, "Unable to get SPI rx dma " |
1299 | "resource\n"); | 1373 | "resource. Switching to poll mode\n"); |
1300 | return -ENXIO; | 1374 | sdd->port_conf->quirks = S3C64XX_SPI_QUIRK_POLL; |
1301 | } | 1375 | } else |
1302 | sdd->rx_dma.dmach = res->start; | 1376 | sdd->rx_dma.dmach = res->start; |
1303 | } | 1377 | } |
1304 | 1378 | ||
1305 | sdd->tx_dma.direction = DMA_MEM_TO_DEV; | 1379 | sdd->tx_dma.direction = DMA_MEM_TO_DEV; |
@@ -1314,7 +1388,8 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) | |||
1314 | master->unprepare_transfer_hardware = s3c64xx_spi_unprepare_transfer; | 1388 | master->unprepare_transfer_hardware = s3c64xx_spi_unprepare_transfer; |
1315 | master->num_chipselect = sci->num_cs; | 1389 | master->num_chipselect = sci->num_cs; |
1316 | master->dma_alignment = 8; | 1390 | master->dma_alignment = 8; |
1317 | master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1); | 1391 | master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | |
1392 | SPI_BPW_MASK(8); | ||
1318 | /* the spi->mode bits understood by this driver: */ | 1393 | /* the spi->mode bits understood by this driver: */ |
1319 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; | 1394 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; |
1320 | 1395 | ||
@@ -1399,7 +1474,6 @@ err3: | |||
1399 | err2: | 1474 | err2: |
1400 | clk_disable_unprepare(sdd->clk); | 1475 | clk_disable_unprepare(sdd->clk); |
1401 | err0: | 1476 | err0: |
1402 | platform_set_drvdata(pdev, NULL); | ||
1403 | spi_master_put(master); | 1477 | spi_master_put(master); |
1404 | 1478 | ||
1405 | return ret; | 1479 | return ret; |
@@ -1420,7 +1494,6 @@ static int s3c64xx_spi_remove(struct platform_device *pdev) | |||
1420 | 1494 | ||
1421 | clk_disable_unprepare(sdd->clk); | 1495 | clk_disable_unprepare(sdd->clk); |
1422 | 1496 | ||
1423 | platform_set_drvdata(pdev, NULL); | ||
1424 | spi_master_put(master); | 1497 | spi_master_put(master); |
1425 | 1498 | ||
1426 | return 0; | 1499 | return 0; |
@@ -1535,6 +1608,15 @@ static struct s3c64xx_spi_port_config exynos4_spi_port_config = { | |||
1535 | .clk_from_cmu = true, | 1608 | .clk_from_cmu = true, |
1536 | }; | 1609 | }; |
1537 | 1610 | ||
1611 | static struct s3c64xx_spi_port_config exynos5440_spi_port_config = { | ||
1612 | .fifo_lvl_mask = { 0x1ff }, | ||
1613 | .rx_lvl_offset = 15, | ||
1614 | .tx_st_done = 25, | ||
1615 | .high_speed = true, | ||
1616 | .clk_from_cmu = true, | ||
1617 | .quirks = S3C64XX_SPI_QUIRK_POLL, | ||
1618 | }; | ||
1619 | |||
1538 | static struct platform_device_id s3c64xx_spi_driver_ids[] = { | 1620 | static struct platform_device_id s3c64xx_spi_driver_ids[] = { |
1539 | { | 1621 | { |
1540 | .name = "s3c2443-spi", | 1622 | .name = "s3c2443-spi", |
@@ -1558,15 +1640,16 @@ static struct platform_device_id s3c64xx_spi_driver_ids[] = { | |||
1558 | { }, | 1640 | { }, |
1559 | }; | 1641 | }; |
1560 | 1642 | ||
1561 | #ifdef CONFIG_OF | ||
1562 | static const struct of_device_id s3c64xx_spi_dt_match[] = { | 1643 | static const struct of_device_id s3c64xx_spi_dt_match[] = { |
1563 | { .compatible = "samsung,exynos4210-spi", | 1644 | { .compatible = "samsung,exynos4210-spi", |
1564 | .data = (void *)&exynos4_spi_port_config, | 1645 | .data = (void *)&exynos4_spi_port_config, |
1565 | }, | 1646 | }, |
1647 | { .compatible = "samsung,exynos5440-spi", | ||
1648 | .data = (void *)&exynos5440_spi_port_config, | ||
1649 | }, | ||
1566 | { }, | 1650 | { }, |
1567 | }; | 1651 | }; |
1568 | MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match); | 1652 | MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match); |
1569 | #endif /* CONFIG_OF */ | ||
1570 | 1653 | ||
1571 | static struct platform_driver s3c64xx_spi_driver = { | 1654 | static struct platform_driver s3c64xx_spi_driver = { |
1572 | .driver = { | 1655 | .driver = { |
diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c index 60cfae51c713..716edf999538 100644 --- a/drivers/spi/spi-sh-hspi.c +++ b/drivers/spi/spi-sh-hspi.c | |||
@@ -89,7 +89,7 @@ static int hspi_status_check_timeout(struct hspi_priv *hspi, u32 mask, u32 val) | |||
89 | if ((mask & hspi_read(hspi, SPSR)) == val) | 89 | if ((mask & hspi_read(hspi, SPSR)) == val) |
90 | return 0; | 90 | return 0; |
91 | 91 | ||
92 | msleep(20); | 92 | udelay(10); |
93 | } | 93 | } |
94 | 94 | ||
95 | dev_err(hspi->dev, "timeout\n"); | 95 | dev_err(hspi->dev, "timeout\n"); |
@@ -297,7 +297,7 @@ static int hspi_probe(struct platform_device *pdev) | |||
297 | } | 297 | } |
298 | 298 | ||
299 | hspi = spi_master_get_devdata(master); | 299 | hspi = spi_master_get_devdata(master); |
300 | dev_set_drvdata(&pdev->dev, hspi); | 300 | platform_set_drvdata(pdev, hspi); |
301 | 301 | ||
302 | /* init hspi */ | 302 | /* init hspi */ |
303 | hspi->master = master; | 303 | hspi->master = master; |
@@ -341,7 +341,7 @@ static int hspi_probe(struct platform_device *pdev) | |||
341 | 341 | ||
342 | static int hspi_remove(struct platform_device *pdev) | 342 | static int hspi_remove(struct platform_device *pdev) |
343 | { | 343 | { |
344 | struct hspi_priv *hspi = dev_get_drvdata(&pdev->dev); | 344 | struct hspi_priv *hspi = platform_get_drvdata(pdev); |
345 | 345 | ||
346 | pm_runtime_disable(&pdev->dev); | 346 | pm_runtime_disable(&pdev->dev); |
347 | 347 | ||
diff --git a/drivers/spi/spi-sh.c b/drivers/spi/spi-sh.c index 3c3600a994bd..c120a70094f2 100644 --- a/drivers/spi/spi-sh.c +++ b/drivers/spi/spi-sh.c | |||
@@ -434,7 +434,7 @@ static irqreturn_t spi_sh_irq(int irq, void *_ss) | |||
434 | 434 | ||
435 | static int spi_sh_remove(struct platform_device *pdev) | 435 | static int spi_sh_remove(struct platform_device *pdev) |
436 | { | 436 | { |
437 | struct spi_sh_data *ss = dev_get_drvdata(&pdev->dev); | 437 | struct spi_sh_data *ss = platform_get_drvdata(pdev); |
438 | 438 | ||
439 | spi_unregister_master(ss->master); | 439 | spi_unregister_master(ss->master); |
440 | destroy_workqueue(ss->workqueue); | 440 | destroy_workqueue(ss->workqueue); |
@@ -471,7 +471,7 @@ static int spi_sh_probe(struct platform_device *pdev) | |||
471 | } | 471 | } |
472 | 472 | ||
473 | ss = spi_master_get_devdata(master); | 473 | ss = spi_master_get_devdata(master); |
474 | dev_set_drvdata(&pdev->dev, ss); | 474 | platform_set_drvdata(pdev, ss); |
475 | 475 | ||
476 | switch (res->flags & IORESOURCE_MEM_TYPE_MASK) { | 476 | switch (res->flags & IORESOURCE_MEM_TYPE_MASK) { |
477 | case IORESOURCE_MEM_8BIT: | 477 | case IORESOURCE_MEM_8BIT: |
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c index 0808cd56bf8d..fc20bcfd90c3 100644 --- a/drivers/spi/spi-sirf.c +++ b/drivers/spi/spi-sirf.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/of_gpio.h> | 19 | #include <linux/of_gpio.h> |
20 | #include <linux/spi/spi.h> | 20 | #include <linux/spi/spi.h> |
21 | #include <linux/spi/spi_bitbang.h> | 21 | #include <linux/spi/spi_bitbang.h> |
22 | #include <linux/pinctrl/consumer.h> | ||
23 | 22 | ||
24 | #define DRIVER_NAME "sirfsoc_spi" | 23 | #define DRIVER_NAME "sirfsoc_spi" |
25 | 24 | ||
@@ -127,7 +126,6 @@ struct sirfsoc_spi { | |||
127 | void __iomem *base; | 126 | void __iomem *base; |
128 | u32 ctrl_freq; /* SPI controller clock speed */ | 127 | u32 ctrl_freq; /* SPI controller clock speed */ |
129 | struct clk *clk; | 128 | struct clk *clk; |
130 | struct pinctrl *p; | ||
131 | 129 | ||
132 | /* rx & tx bufs from the spi_transfer */ | 130 | /* rx & tx bufs from the spi_transfer */ |
133 | const void *tx; | 131 | const void *tx; |
@@ -142,9 +140,6 @@ struct sirfsoc_spi { | |||
142 | unsigned int left_tx_cnt; | 140 | unsigned int left_tx_cnt; |
143 | unsigned int left_rx_cnt; | 141 | unsigned int left_rx_cnt; |
144 | 142 | ||
145 | /* tasklet to push tx msg into FIFO */ | ||
146 | struct tasklet_struct tasklet_tx; | ||
147 | |||
148 | int chipselect[0]; | 143 | int chipselect[0]; |
149 | }; | 144 | }; |
150 | 145 | ||
@@ -236,17 +231,6 @@ static void spi_sirfsoc_tx_word_u32(struct sirfsoc_spi *sspi) | |||
236 | sspi->left_tx_cnt--; | 231 | sspi->left_tx_cnt--; |
237 | } | 232 | } |
238 | 233 | ||
239 | static void spi_sirfsoc_tasklet_tx(unsigned long arg) | ||
240 | { | ||
241 | struct sirfsoc_spi *sspi = (struct sirfsoc_spi *)arg; | ||
242 | |||
243 | /* Fill Tx FIFO while there are left words to be transmitted */ | ||
244 | while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS) & | ||
245 | SIRFSOC_SPI_FIFO_FULL)) && | ||
246 | sspi->left_tx_cnt) | ||
247 | sspi->tx_word(sspi); | ||
248 | } | ||
249 | |||
250 | static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id) | 234 | static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id) |
251 | { | 235 | { |
252 | struct sirfsoc_spi *sspi = dev_id; | 236 | struct sirfsoc_spi *sspi = dev_id; |
@@ -261,25 +245,25 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id) | |||
261 | writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); | 245 | writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); |
262 | } | 246 | } |
263 | 247 | ||
264 | if (spi_stat & SIRFSOC_SPI_FRM_END) { | 248 | if (spi_stat & (SIRFSOC_SPI_FRM_END |
249 | | SIRFSOC_SPI_RXFIFO_THD_REACH)) | ||
265 | while (!((readl(sspi->base + SIRFSOC_SPI_RXFIFO_STATUS) | 250 | while (!((readl(sspi->base + SIRFSOC_SPI_RXFIFO_STATUS) |
266 | & SIRFSOC_SPI_FIFO_EMPTY)) && | 251 | & SIRFSOC_SPI_FIFO_EMPTY)) && |
267 | sspi->left_rx_cnt) | 252 | sspi->left_rx_cnt) |
268 | sspi->rx_word(sspi); | 253 | sspi->rx_word(sspi); |
269 | 254 | ||
270 | /* Received all words */ | 255 | if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY |
271 | if ((sspi->left_rx_cnt == 0) && (sspi->left_tx_cnt == 0)) { | 256 | | SIRFSOC_SPI_TXFIFO_THD_REACH)) |
272 | complete(&sspi->done); | 257 | while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS) |
273 | writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); | 258 | & SIRFSOC_SPI_FIFO_FULL)) && |
274 | } | 259 | sspi->left_tx_cnt) |
275 | } | 260 | sspi->tx_word(sspi); |
276 | |||
277 | if (spi_stat & SIRFSOC_SPI_RXFIFO_THD_REACH || | ||
278 | spi_stat & SIRFSOC_SPI_TXFIFO_THD_REACH || | ||
279 | spi_stat & SIRFSOC_SPI_RX_FIFO_FULL || | ||
280 | spi_stat & SIRFSOC_SPI_TXFIFO_EMPTY) | ||
281 | tasklet_schedule(&sspi->tasklet_tx); | ||
282 | 261 | ||
262 | /* Received all words */ | ||
263 | if ((sspi->left_rx_cnt == 0) && (sspi->left_tx_cnt == 0)) { | ||
264 | complete(&sspi->done); | ||
265 | writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); | ||
266 | } | ||
283 | return IRQ_HANDLED; | 267 | return IRQ_HANDLED; |
284 | } | 268 | } |
285 | 269 | ||
@@ -426,9 +410,7 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
426 | SIRFSOC_SPI_FIFO_WIDTH_DWORD; | 410 | SIRFSOC_SPI_FIFO_WIDTH_DWORD; |
427 | break; | 411 | break; |
428 | default: | 412 | default: |
429 | dev_err(&spi->dev, "Bits per word %d not supported\n", | 413 | BUG(); |
430 | bits_per_word); | ||
431 | return -EINVAL; | ||
432 | } | 414 | } |
433 | 415 | ||
434 | if (!(spi->mode & SPI_CS_HIGH)) | 416 | if (!(spi->mode & SPI_CS_HIGH)) |
@@ -556,26 +538,20 @@ static int spi_sirfsoc_probe(struct platform_device *pdev) | |||
556 | sspi->bitbang.txrx_bufs = spi_sirfsoc_transfer; | 538 | sspi->bitbang.txrx_bufs = spi_sirfsoc_transfer; |
557 | sspi->bitbang.master->setup = spi_sirfsoc_setup; | 539 | sspi->bitbang.master->setup = spi_sirfsoc_setup; |
558 | master->bus_num = pdev->id; | 540 | master->bus_num = pdev->id; |
541 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(12) | | ||
542 | SPI_BPW_MASK(16) | SPI_BPW_MASK(32); | ||
559 | sspi->bitbang.master->dev.of_node = pdev->dev.of_node; | 543 | sspi->bitbang.master->dev.of_node = pdev->dev.of_node; |
560 | 544 | ||
561 | sspi->p = pinctrl_get_select_default(&pdev->dev); | ||
562 | ret = IS_ERR(sspi->p); | ||
563 | if (ret) | ||
564 | goto free_master; | ||
565 | |||
566 | sspi->clk = clk_get(&pdev->dev, NULL); | 545 | sspi->clk = clk_get(&pdev->dev, NULL); |
567 | if (IS_ERR(sspi->clk)) { | 546 | if (IS_ERR(sspi->clk)) { |
568 | ret = -EINVAL; | 547 | ret = -EINVAL; |
569 | goto free_pin; | 548 | goto free_master; |
570 | } | 549 | } |
571 | clk_prepare_enable(sspi->clk); | 550 | clk_prepare_enable(sspi->clk); |
572 | sspi->ctrl_freq = clk_get_rate(sspi->clk); | 551 | sspi->ctrl_freq = clk_get_rate(sspi->clk); |
573 | 552 | ||
574 | init_completion(&sspi->done); | 553 | init_completion(&sspi->done); |
575 | 554 | ||
576 | tasklet_init(&sspi->tasklet_tx, spi_sirfsoc_tasklet_tx, | ||
577 | (unsigned long)sspi); | ||
578 | |||
579 | writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_RXFIFO_OP); | 555 | writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_RXFIFO_OP); |
580 | writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_TXFIFO_OP); | 556 | writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_TXFIFO_OP); |
581 | writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_RXFIFO_OP); | 557 | writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_RXFIFO_OP); |
@@ -594,8 +570,6 @@ static int spi_sirfsoc_probe(struct platform_device *pdev) | |||
594 | free_clk: | 570 | free_clk: |
595 | clk_disable_unprepare(sspi->clk); | 571 | clk_disable_unprepare(sspi->clk); |
596 | clk_put(sspi->clk); | 572 | clk_put(sspi->clk); |
597 | free_pin: | ||
598 | pinctrl_put(sspi->p); | ||
599 | free_master: | 573 | free_master: |
600 | spi_master_put(master); | 574 | spi_master_put(master); |
601 | err_cs: | 575 | err_cs: |
@@ -618,7 +592,6 @@ static int spi_sirfsoc_remove(struct platform_device *pdev) | |||
618 | } | 592 | } |
619 | clk_disable_unprepare(sspi->clk); | 593 | clk_disable_unprepare(sspi->clk); |
620 | clk_put(sspi->clk); | 594 | clk_put(sspi->clk); |
621 | pinctrl_put(sspi->p); | ||
622 | spi_master_put(master); | 595 | spi_master_put(master); |
623 | return 0; | 596 | return 0; |
624 | } | 597 | } |
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 598eb45e8008..e8f542ab8935 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c | |||
@@ -1041,7 +1041,7 @@ static int tegra_spi_probe(struct platform_device *pdev) | |||
1041 | dev_err(&pdev->dev, "master allocation failed\n"); | 1041 | dev_err(&pdev->dev, "master allocation failed\n"); |
1042 | return -ENOMEM; | 1042 | return -ENOMEM; |
1043 | } | 1043 | } |
1044 | dev_set_drvdata(&pdev->dev, master); | 1044 | platform_set_drvdata(pdev, master); |
1045 | tspi = spi_master_get_devdata(master); | 1045 | tspi = spi_master_get_devdata(master); |
1046 | 1046 | ||
1047 | /* Parse DT */ | 1047 | /* Parse DT */ |
@@ -1152,7 +1152,7 @@ exit_free_master: | |||
1152 | 1152 | ||
1153 | static int tegra_spi_remove(struct platform_device *pdev) | 1153 | static int tegra_spi_remove(struct platform_device *pdev) |
1154 | { | 1154 | { |
1155 | struct spi_master *master = dev_get_drvdata(&pdev->dev); | 1155 | struct spi_master *master = platform_get_drvdata(pdev); |
1156 | struct tegra_spi_data *tspi = spi_master_get_devdata(master); | 1156 | struct tegra_spi_data *tspi = spi_master_get_devdata(master); |
1157 | 1157 | ||
1158 | free_irq(tspi->irq, tspi); | 1158 | free_irq(tspi->irq, tspi); |
diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c index 09df8e22dba0..c1d5d95e70ea 100644 --- a/drivers/spi/spi-tegra20-sflash.c +++ b/drivers/spi/spi-tegra20-sflash.c | |||
@@ -480,7 +480,7 @@ static int tegra_sflash_probe(struct platform_device *pdev) | |||
480 | master->num_chipselect = MAX_CHIP_SELECT; | 480 | master->num_chipselect = MAX_CHIP_SELECT; |
481 | master->bus_num = -1; | 481 | master->bus_num = -1; |
482 | 482 | ||
483 | dev_set_drvdata(&pdev->dev, master); | 483 | platform_set_drvdata(pdev, master); |
484 | tsd = spi_master_get_devdata(master); | 484 | tsd = spi_master_get_devdata(master); |
485 | tsd->master = master; | 485 | tsd->master = master; |
486 | tsd->dev = &pdev->dev; | 486 | tsd->dev = &pdev->dev; |
@@ -555,7 +555,7 @@ exit_free_master: | |||
555 | 555 | ||
556 | static int tegra_sflash_remove(struct platform_device *pdev) | 556 | static int tegra_sflash_remove(struct platform_device *pdev) |
557 | { | 557 | { |
558 | struct spi_master *master = dev_get_drvdata(&pdev->dev); | 558 | struct spi_master *master = platform_get_drvdata(pdev); |
559 | struct tegra_sflash_data *tsd = spi_master_get_devdata(master); | 559 | struct tegra_sflash_data *tsd = spi_master_get_devdata(master); |
560 | 560 | ||
561 | free_irq(tsd->irq, tsd); | 561 | free_irq(tsd->irq, tsd); |
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index 3faf88d003de..80490cc11ce5 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c | |||
@@ -1089,7 +1089,7 @@ static int tegra_slink_probe(struct platform_device *pdev) | |||
1089 | master->num_chipselect = MAX_CHIP_SELECT; | 1089 | master->num_chipselect = MAX_CHIP_SELECT; |
1090 | master->bus_num = -1; | 1090 | master->bus_num = -1; |
1091 | 1091 | ||
1092 | dev_set_drvdata(&pdev->dev, master); | 1092 | platform_set_drvdata(pdev, master); |
1093 | tspi = spi_master_get_devdata(master); | 1093 | tspi = spi_master_get_devdata(master); |
1094 | tspi->master = master; | 1094 | tspi->master = master; |
1095 | tspi->dev = &pdev->dev; | 1095 | tspi->dev = &pdev->dev; |
@@ -1193,7 +1193,7 @@ exit_free_master: | |||
1193 | 1193 | ||
1194 | static int tegra_slink_remove(struct platform_device *pdev) | 1194 | static int tegra_slink_remove(struct platform_device *pdev) |
1195 | { | 1195 | { |
1196 | struct spi_master *master = dev_get_drvdata(&pdev->dev); | 1196 | struct spi_master *master = platform_get_drvdata(pdev); |
1197 | struct tegra_slink_data *tspi = spi_master_get_devdata(master); | 1197 | struct tegra_slink_data *tspi = spi_master_get_devdata(master); |
1198 | 1198 | ||
1199 | free_irq(tspi->irq, tspi); | 1199 | free_irq(tspi->irq, tspi); |
diff --git a/drivers/spi/spi-ti-ssp.c b/drivers/spi/spi-ti-ssp.c index 46992cab65f1..10606fcc6efc 100644 --- a/drivers/spi/spi-ti-ssp.c +++ b/drivers/spi/spi-ti-ssp.c | |||
@@ -237,14 +237,6 @@ static void ti_ssp_spi_work(struct work_struct *work) | |||
237 | spin_unlock(&hw->lock); | 237 | spin_unlock(&hw->lock); |
238 | } | 238 | } |
239 | 239 | ||
240 | static int ti_ssp_spi_setup(struct spi_device *spi) | ||
241 | { | ||
242 | if (spi->bits_per_word > 32) | ||
243 | return -EINVAL; | ||
244 | |||
245 | return 0; | ||
246 | } | ||
247 | |||
248 | static int ti_ssp_spi_transfer(struct spi_device *spi, struct spi_message *m) | 240 | static int ti_ssp_spi_transfer(struct spi_device *spi, struct spi_message *m) |
249 | { | 241 | { |
250 | struct ti_ssp_spi *hw; | 242 | struct ti_ssp_spi *hw; |
@@ -269,12 +261,6 @@ static int ti_ssp_spi_transfer(struct spi_device *spi, struct spi_message *m) | |||
269 | dev_err(&spi->dev, "invalid xfer, full duplex\n"); | 261 | dev_err(&spi->dev, "invalid xfer, full duplex\n"); |
270 | return -EINVAL; | 262 | return -EINVAL; |
271 | } | 263 | } |
272 | |||
273 | if (t->bits_per_word > 32) { | ||
274 | dev_err(&spi->dev, "invalid xfer width %d\n", | ||
275 | t->bits_per_word); | ||
276 | return -EINVAL; | ||
277 | } | ||
278 | } | 264 | } |
279 | 265 | ||
280 | spin_lock(&hw->lock); | 266 | spin_lock(&hw->lock); |
@@ -337,8 +323,8 @@ static int ti_ssp_spi_probe(struct platform_device *pdev) | |||
337 | master->bus_num = pdev->id; | 323 | master->bus_num = pdev->id; |
338 | master->num_chipselect = pdata->num_cs; | 324 | master->num_chipselect = pdata->num_cs; |
339 | master->mode_bits = MODE_BITS; | 325 | master->mode_bits = MODE_BITS; |
326 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); | ||
340 | master->flags = SPI_MASTER_HALF_DUPLEX; | 327 | master->flags = SPI_MASTER_HALF_DUPLEX; |
341 | master->setup = ti_ssp_spi_setup; | ||
342 | master->transfer = ti_ssp_spi_transfer; | 328 | master->transfer = ti_ssp_spi_transfer; |
343 | 329 | ||
344 | error = spi_register_master(master); | 330 | error = spi_register_master(master); |
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index 35f60bd252dd..dd55707a6aa5 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c | |||
@@ -367,7 +367,7 @@ static irqreturn_t pch_spi_handler(int irq, void *dev_id) | |||
367 | 367 | ||
368 | if (reg_spsr_val & SPSR_ORF_BIT) { | 368 | if (reg_spsr_val & SPSR_ORF_BIT) { |
369 | dev_err(&board_dat->pdev->dev, "%s Over run error\n", __func__); | 369 | dev_err(&board_dat->pdev->dev, "%s Over run error\n", __func__); |
370 | if (data->current_msg->complete != 0) { | 370 | if (data->current_msg->complete) { |
371 | data->transfer_complete = true; | 371 | data->transfer_complete = true; |
372 | data->current_msg->status = -EIO; | 372 | data->current_msg->status = -EIO; |
373 | data->current_msg->complete(data->current_msg->context); | 373 | data->current_msg->complete(data->current_msg->context); |
@@ -472,11 +472,6 @@ static int pch_spi_setup(struct spi_device *pspi) | |||
472 | dev_dbg(&pspi->dev, "%s 8 bits per word\n", __func__); | 472 | dev_dbg(&pspi->dev, "%s 8 bits per word\n", __func__); |
473 | } | 473 | } |
474 | 474 | ||
475 | if ((pspi->bits_per_word != 8) && (pspi->bits_per_word != 16)) { | ||
476 | dev_err(&pspi->dev, "%s Invalid bits per word\n", __func__); | ||
477 | return -EINVAL; | ||
478 | } | ||
479 | |||
480 | /* Check baud rate setting */ | 475 | /* Check baud rate setting */ |
481 | /* if baud rate of chip is greater than | 476 | /* if baud rate of chip is greater than |
482 | max we can support,return error */ | 477 | max we can support,return error */ |
@@ -537,17 +532,6 @@ static int pch_spi_transfer(struct spi_device *pspi, struct spi_message *pmsg) | |||
537 | /* if baud rate has been specified validate the same */ | 532 | /* if baud rate has been specified validate the same */ |
538 | if (transfer->speed_hz > PCH_MAX_BAUDRATE) | 533 | if (transfer->speed_hz > PCH_MAX_BAUDRATE) |
539 | transfer->speed_hz = PCH_MAX_BAUDRATE; | 534 | transfer->speed_hz = PCH_MAX_BAUDRATE; |
540 | |||
541 | /* if bits per word has been specified validate the same */ | ||
542 | if (transfer->bits_per_word) { | ||
543 | if ((transfer->bits_per_word != 8) | ||
544 | && (transfer->bits_per_word != 16)) { | ||
545 | retval = -EINVAL; | ||
546 | dev_err(&pspi->dev, | ||
547 | "%s Invalid bits per word\n", __func__); | ||
548 | goto err_return_spinlock; | ||
549 | } | ||
550 | } | ||
551 | } | 535 | } |
552 | spin_unlock_irqrestore(&data->lock, flags); | 536 | spin_unlock_irqrestore(&data->lock, flags); |
553 | 537 | ||
@@ -659,7 +643,7 @@ static void pch_spi_set_tx(struct pch_spi_data *data, int *bpw) | |||
659 | list_for_each_entry_safe(pmsg, tmp, data->queue.next, queue) { | 643 | list_for_each_entry_safe(pmsg, tmp, data->queue.next, queue) { |
660 | pmsg->status = -ENOMEM; | 644 | pmsg->status = -ENOMEM; |
661 | 645 | ||
662 | if (pmsg->complete != 0) | 646 | if (pmsg->complete) |
663 | pmsg->complete(pmsg->context); | 647 | pmsg->complete(pmsg->context); |
664 | 648 | ||
665 | /* delete from queue */ | 649 | /* delete from queue */ |
@@ -709,7 +693,7 @@ static void pch_spi_nomore_transfer(struct pch_spi_data *data) | |||
709 | * [To the spi core..indicating end of transfer] */ | 693 | * [To the spi core..indicating end of transfer] */ |
710 | data->current_msg->status = 0; | 694 | data->current_msg->status = 0; |
711 | 695 | ||
712 | if (data->current_msg->complete != 0) { | 696 | if (data->current_msg->complete) { |
713 | dev_dbg(&data->master->dev, | 697 | dev_dbg(&data->master->dev, |
714 | "%s:Invoking callback of SPI core\n", __func__); | 698 | "%s:Invoking callback of SPI core\n", __func__); |
715 | data->current_msg->complete(data->current_msg->context); | 699 | data->current_msg->complete(data->current_msg->context); |
@@ -1202,7 +1186,7 @@ static void pch_spi_process_messages(struct work_struct *pwork) | |||
1202 | list_for_each_entry_safe(pmsg, tmp, data->queue.next, queue) { | 1186 | list_for_each_entry_safe(pmsg, tmp, data->queue.next, queue) { |
1203 | pmsg->status = -EIO; | 1187 | pmsg->status = -EIO; |
1204 | 1188 | ||
1205 | if (pmsg->complete != 0) { | 1189 | if (pmsg->complete) { |
1206 | spin_unlock(&data->lock); | 1190 | spin_unlock(&data->lock); |
1207 | pmsg->complete(pmsg->context); | 1191 | pmsg->complete(pmsg->context); |
1208 | spin_lock(&data->lock); | 1192 | spin_lock(&data->lock); |
@@ -1442,6 +1426,7 @@ static int pch_spi_pd_probe(struct platform_device *plat_dev) | |||
1442 | master->setup = pch_spi_setup; | 1426 | master->setup = pch_spi_setup; |
1443 | master->transfer = pch_spi_transfer; | 1427 | master->transfer = pch_spi_transfer; |
1444 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; | 1428 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; |
1429 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); | ||
1445 | 1430 | ||
1446 | data->board_dat = board_dat; | 1431 | data->board_dat = board_dat; |
1447 | data->plat_dev = plat_dev; | 1432 | data->plat_dev = plat_dev; |
@@ -1487,7 +1472,7 @@ static int pch_spi_pd_probe(struct platform_device *plat_dev) | |||
1487 | return 0; | 1472 | return 0; |
1488 | 1473 | ||
1489 | err_spi_register_master: | 1474 | err_spi_register_master: |
1490 | free_irq(board_dat->pdev->irq, board_dat); | 1475 | free_irq(board_dat->pdev->irq, data); |
1491 | err_request_irq: | 1476 | err_request_irq: |
1492 | pch_spi_free_resources(board_dat, data); | 1477 | pch_spi_free_resources(board_dat, data); |
1493 | err_spi_get_resources: | 1478 | err_spi_get_resources: |
@@ -1667,6 +1652,7 @@ static int pch_spi_probe(struct pci_dev *pdev, | |||
1667 | pd_dev = platform_device_alloc("pch-spi", i); | 1652 | pd_dev = platform_device_alloc("pch-spi", i); |
1668 | if (!pd_dev) { | 1653 | if (!pd_dev) { |
1669 | dev_err(&pdev->dev, "platform_device_alloc failed\n"); | 1654 | dev_err(&pdev->dev, "platform_device_alloc failed\n"); |
1655 | retval = -ENOMEM; | ||
1670 | goto err_platform_device; | 1656 | goto err_platform_device; |
1671 | } | 1657 | } |
1672 | pd_dev_save->pd_save[i] = pd_dev; | 1658 | pd_dev_save->pd_save[i] = pd_dev; |
diff --git a/drivers/spi/spi-txx9.c b/drivers/spi/spi-txx9.c index adb853047926..e9b7681ff6ac 100644 --- a/drivers/spi/spi-txx9.c +++ b/drivers/spi/spi-txx9.c | |||
@@ -116,17 +116,12 @@ static void txx9spi_cs_func(struct spi_device *spi, struct txx9spi *c, | |||
116 | static int txx9spi_setup(struct spi_device *spi) | 116 | static int txx9spi_setup(struct spi_device *spi) |
117 | { | 117 | { |
118 | struct txx9spi *c = spi_master_get_devdata(spi->master); | 118 | struct txx9spi *c = spi_master_get_devdata(spi->master); |
119 | u8 bits_per_word; | ||
120 | 119 | ||
121 | if (!spi->max_speed_hz | 120 | if (!spi->max_speed_hz |
122 | || spi->max_speed_hz > c->max_speed_hz | 121 | || spi->max_speed_hz > c->max_speed_hz |
123 | || spi->max_speed_hz < c->min_speed_hz) | 122 | || spi->max_speed_hz < c->min_speed_hz) |
124 | return -EINVAL; | 123 | return -EINVAL; |
125 | 124 | ||
126 | bits_per_word = spi->bits_per_word; | ||
127 | if (bits_per_word != 8 && bits_per_word != 16) | ||
128 | return -EINVAL; | ||
129 | |||
130 | if (gpio_direction_output(spi->chip_select, | 125 | if (gpio_direction_output(spi->chip_select, |
131 | !(spi->mode & SPI_CS_HIGH))) { | 126 | !(spi->mode & SPI_CS_HIGH))) { |
132 | dev_err(&spi->dev, "Cannot setup GPIO for chipselect.\n"); | 127 | dev_err(&spi->dev, "Cannot setup GPIO for chipselect.\n"); |
@@ -319,8 +314,6 @@ static int txx9spi_transfer(struct spi_device *spi, struct spi_message *m) | |||
319 | 314 | ||
320 | if (!t->tx_buf && !t->rx_buf && t->len) | 315 | if (!t->tx_buf && !t->rx_buf && t->len) |
321 | return -EINVAL; | 316 | return -EINVAL; |
322 | if (bits_per_word != 8 && bits_per_word != 16) | ||
323 | return -EINVAL; | ||
324 | if (t->len & ((bits_per_word >> 3) - 1)) | 317 | if (t->len & ((bits_per_word >> 3) - 1)) |
325 | return -EINVAL; | 318 | return -EINVAL; |
326 | if (speed_hz < c->min_speed_hz || speed_hz > c->max_speed_hz) | 319 | if (speed_hz < c->min_speed_hz || speed_hz > c->max_speed_hz) |
@@ -411,6 +404,7 @@ static int txx9spi_probe(struct platform_device *dev) | |||
411 | master->setup = txx9spi_setup; | 404 | master->setup = txx9spi_setup; |
412 | master->transfer = txx9spi_transfer; | 405 | master->transfer = txx9spi_transfer; |
413 | master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */ | 406 | master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */ |
407 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); | ||
414 | 408 | ||
415 | ret = spi_register_master(master); | 409 | ret = spi_register_master(master); |
416 | if (ret) | 410 | if (ret) |
@@ -425,7 +419,6 @@ exit: | |||
425 | clk_disable(c->clk); | 419 | clk_disable(c->clk); |
426 | clk_put(c->clk); | 420 | clk_put(c->clk); |
427 | } | 421 | } |
428 | platform_set_drvdata(dev, NULL); | ||
429 | spi_master_put(master); | 422 | spi_master_put(master); |
430 | return ret; | 423 | return ret; |
431 | } | 424 | } |
@@ -436,7 +429,6 @@ static int txx9spi_remove(struct platform_device *dev) | |||
436 | struct txx9spi *c = spi_master_get_devdata(master); | 429 | struct txx9spi *c = spi_master_get_devdata(master); |
437 | 430 | ||
438 | spi_unregister_master(master); | 431 | spi_unregister_master(master); |
439 | platform_set_drvdata(dev, NULL); | ||
440 | destroy_workqueue(c->workqueue); | 432 | destroy_workqueue(c->workqueue); |
441 | clk_disable(c->clk); | 433 | clk_disable(c->clk); |
442 | clk_put(c->clk); | 434 | clk_put(c->clk); |
diff --git a/drivers/spi/spi-xcomm.c b/drivers/spi/spi-xcomm.c index 4d3ec8b9f479..4258c712ad3c 100644 --- a/drivers/spi/spi-xcomm.c +++ b/drivers/spi/spi-xcomm.c | |||
@@ -76,7 +76,7 @@ static int spi_xcomm_setup_transfer(struct spi_xcomm *spi_xcomm, | |||
76 | { | 76 | { |
77 | unsigned int speed; | 77 | unsigned int speed; |
78 | 78 | ||
79 | if ((t->bits_per_word && t->bits_per_word != 8) || t->len > 62) | 79 | if (t->len > 62) |
80 | return -EINVAL; | 80 | return -EINVAL; |
81 | 81 | ||
82 | speed = t->speed_hz ? t->speed_hz : spi->max_speed_hz; | 82 | speed = t->speed_hz ? t->speed_hz : spi->max_speed_hz; |
@@ -209,14 +209,6 @@ static int spi_xcomm_transfer_one(struct spi_master *master, | |||
209 | return status; | 209 | return status; |
210 | } | 210 | } |
211 | 211 | ||
212 | static int spi_xcomm_setup(struct spi_device *spi) | ||
213 | { | ||
214 | if (spi->bits_per_word != 8) | ||
215 | return -EINVAL; | ||
216 | |||
217 | return 0; | ||
218 | } | ||
219 | |||
220 | static int spi_xcomm_probe(struct i2c_client *i2c, | 212 | static int spi_xcomm_probe(struct i2c_client *i2c, |
221 | const struct i2c_device_id *id) | 213 | const struct i2c_device_id *id) |
222 | { | 214 | { |
@@ -233,8 +225,8 @@ static int spi_xcomm_probe(struct i2c_client *i2c, | |||
233 | 225 | ||
234 | master->num_chipselect = 16; | 226 | master->num_chipselect = 16; |
235 | master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_3WIRE; | 227 | master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_3WIRE; |
228 | master->bits_per_word_mask = SPI_BPW_MASK(8); | ||
236 | master->flags = SPI_MASTER_HALF_DUPLEX; | 229 | master->flags = SPI_MASTER_HALF_DUPLEX; |
237 | master->setup = spi_xcomm_setup; | ||
238 | master->transfer_one_message = spi_xcomm_transfer_one; | 230 | master->transfer_one_message = spi_xcomm_transfer_one; |
239 | master->dev.of_node = i2c->dev.of_node; | 231 | master->dev.of_node = i2c->dev.of_node; |
240 | i2c_set_clientdata(i2c, master); | 232 | i2c_set_clientdata(i2c, master); |
diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c index e1d769607425..fb56fcfdf65e 100644 --- a/drivers/spi/spi-xilinx.c +++ b/drivers/spi/spi-xilinx.c | |||
@@ -30,6 +30,7 @@ | |||
30 | */ | 30 | */ |
31 | #define XSPI_CR_OFFSET 0x60 /* Control Register */ | 31 | #define XSPI_CR_OFFSET 0x60 /* Control Register */ |
32 | 32 | ||
33 | #define XSPI_CR_LOOP 0x01 | ||
33 | #define XSPI_CR_ENABLE 0x02 | 34 | #define XSPI_CR_ENABLE 0x02 |
34 | #define XSPI_CR_MASTER_MODE 0x04 | 35 | #define XSPI_CR_MASTER_MODE 0x04 |
35 | #define XSPI_CR_CPOL 0x08 | 36 | #define XSPI_CR_CPOL 0x08 |
@@ -232,21 +233,6 @@ static int xilinx_spi_setup_transfer(struct spi_device *spi, | |||
232 | return 0; | 233 | return 0; |
233 | } | 234 | } |
234 | 235 | ||
235 | static int xilinx_spi_setup(struct spi_device *spi) | ||
236 | { | ||
237 | /* always return 0, we can not check the number of bits. | ||
238 | * There are cases when SPI setup is called before any driver is | ||
239 | * there, in that case the SPI core defaults to 8 bits, which we | ||
240 | * do not support in some cases. But if we return an error, the | ||
241 | * SPI device would not be registered and no driver can get hold of it | ||
242 | * When the driver is there, it will call SPI setup again with the | ||
243 | * correct number of bits per transfer. | ||
244 | * If a driver setups with the wrong bit number, it will fail when | ||
245 | * it tries to do a transfer | ||
246 | */ | ||
247 | return 0; | ||
248 | } | ||
249 | |||
250 | static void xilinx_spi_fill_tx_fifo(struct xilinx_spi *xspi) | 236 | static void xilinx_spi_fill_tx_fifo(struct xilinx_spi *xspi) |
251 | { | 237 | { |
252 | u8 sr; | 238 | u8 sr; |
@@ -267,7 +253,6 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) | |||
267 | { | 253 | { |
268 | struct xilinx_spi *xspi = spi_master_get_devdata(spi->master); | 254 | struct xilinx_spi *xspi = spi_master_get_devdata(spi->master); |
269 | u32 ipif_ier; | 255 | u32 ipif_ier; |
270 | u16 cr; | ||
271 | 256 | ||
272 | /* We get here with transmitter inhibited */ | 257 | /* We get here with transmitter inhibited */ |
273 | 258 | ||
@@ -276,7 +261,6 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) | |||
276 | xspi->remaining_bytes = t->len; | 261 | xspi->remaining_bytes = t->len; |
277 | INIT_COMPLETION(xspi->done); | 262 | INIT_COMPLETION(xspi->done); |
278 | 263 | ||
279 | xilinx_spi_fill_tx_fifo(xspi); | ||
280 | 264 | ||
281 | /* Enable the transmit empty interrupt, which we use to determine | 265 | /* Enable the transmit empty interrupt, which we use to determine |
282 | * progress on the transmission. | 266 | * progress on the transmission. |
@@ -285,12 +269,41 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) | |||
285 | xspi->write_fn(ipif_ier | XSPI_INTR_TX_EMPTY, | 269 | xspi->write_fn(ipif_ier | XSPI_INTR_TX_EMPTY, |
286 | xspi->regs + XIPIF_V123B_IIER_OFFSET); | 270 | xspi->regs + XIPIF_V123B_IIER_OFFSET); |
287 | 271 | ||
288 | /* Start the transfer by not inhibiting the transmitter any longer */ | 272 | for (;;) { |
289 | cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) & | 273 | u16 cr; |
290 | ~XSPI_CR_TRANS_INHIBIT; | 274 | u8 sr; |
291 | xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); | 275 | |
276 | xilinx_spi_fill_tx_fifo(xspi); | ||
277 | |||
278 | /* Start the transfer by not inhibiting the transmitter any | ||
279 | * longer | ||
280 | */ | ||
281 | cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) & | ||
282 | ~XSPI_CR_TRANS_INHIBIT; | ||
283 | xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); | ||
292 | 284 | ||
293 | wait_for_completion(&xspi->done); | 285 | wait_for_completion(&xspi->done); |
286 | |||
287 | /* A transmit has just completed. Process received data and | ||
288 | * check for more data to transmit. Always inhibit the | ||
289 | * transmitter while the Isr refills the transmit register/FIFO, | ||
290 | * or make sure it is stopped if we're done. | ||
291 | */ | ||
292 | cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET); | ||
293 | xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT, | ||
294 | xspi->regs + XSPI_CR_OFFSET); | ||
295 | |||
296 | /* Read out all the data from the Rx FIFO */ | ||
297 | sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); | ||
298 | while ((sr & XSPI_SR_RX_EMPTY_MASK) == 0) { | ||
299 | xspi->rx_fn(xspi); | ||
300 | sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); | ||
301 | } | ||
302 | |||
303 | /* See if there is more data to send */ | ||
304 | if (xspi->remaining_bytes <= 0) | ||
305 | break; | ||
306 | } | ||
294 | 307 | ||
295 | /* Disable the transmit empty interrupt */ | 308 | /* Disable the transmit empty interrupt */ |
296 | xspi->write_fn(ipif_ier, xspi->regs + XIPIF_V123B_IIER_OFFSET); | 309 | xspi->write_fn(ipif_ier, xspi->regs + XIPIF_V123B_IIER_OFFSET); |
@@ -314,38 +327,7 @@ static irqreturn_t xilinx_spi_irq(int irq, void *dev_id) | |||
314 | xspi->write_fn(ipif_isr, xspi->regs + XIPIF_V123B_IISR_OFFSET); | 327 | xspi->write_fn(ipif_isr, xspi->regs + XIPIF_V123B_IISR_OFFSET); |
315 | 328 | ||
316 | if (ipif_isr & XSPI_INTR_TX_EMPTY) { /* Transmission completed */ | 329 | if (ipif_isr & XSPI_INTR_TX_EMPTY) { /* Transmission completed */ |
317 | u16 cr; | 330 | complete(&xspi->done); |
318 | u8 sr; | ||
319 | |||
320 | /* A transmit has just completed. Process received data and | ||
321 | * check for more data to transmit. Always inhibit the | ||
322 | * transmitter while the Isr refills the transmit register/FIFO, | ||
323 | * or make sure it is stopped if we're done. | ||
324 | */ | ||
325 | cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET); | ||
326 | xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT, | ||
327 | xspi->regs + XSPI_CR_OFFSET); | ||
328 | |||
329 | /* Read out all the data from the Rx FIFO */ | ||
330 | sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); | ||
331 | while ((sr & XSPI_SR_RX_EMPTY_MASK) == 0) { | ||
332 | xspi->rx_fn(xspi); | ||
333 | sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); | ||
334 | } | ||
335 | |||
336 | /* See if there is more data to send */ | ||
337 | if (xspi->remaining_bytes > 0) { | ||
338 | xilinx_spi_fill_tx_fifo(xspi); | ||
339 | /* Start the transfer by not inhibiting the | ||
340 | * transmitter any longer | ||
341 | */ | ||
342 | xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); | ||
343 | } else { | ||
344 | /* No more data to send. | ||
345 | * Indicate the transfer is completed. | ||
346 | */ | ||
347 | complete(&xspi->done); | ||
348 | } | ||
349 | } | 331 | } |
350 | 332 | ||
351 | return IRQ_HANDLED; | 333 | return IRQ_HANDLED; |
@@ -359,11 +341,12 @@ static const struct of_device_id xilinx_spi_of_match[] = { | |||
359 | MODULE_DEVICE_TABLE(of, xilinx_spi_of_match); | 341 | MODULE_DEVICE_TABLE(of, xilinx_spi_of_match); |
360 | 342 | ||
361 | struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, | 343 | struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, |
362 | u32 irq, s16 bus_num, int num_cs, int little_endian, int bits_per_word) | 344 | u32 irq, s16 bus_num, int num_cs, int bits_per_word) |
363 | { | 345 | { |
364 | struct spi_master *master; | 346 | struct spi_master *master; |
365 | struct xilinx_spi *xspi; | 347 | struct xilinx_spi *xspi; |
366 | int ret; | 348 | int ret; |
349 | u32 tmp; | ||
367 | 350 | ||
368 | master = spi_alloc_master(dev, sizeof(struct xilinx_spi)); | 351 | master = spi_alloc_master(dev, sizeof(struct xilinx_spi)); |
369 | if (!master) | 352 | if (!master) |
@@ -377,7 +360,6 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, | |||
377 | xspi->bitbang.chipselect = xilinx_spi_chipselect; | 360 | xspi->bitbang.chipselect = xilinx_spi_chipselect; |
378 | xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer; | 361 | xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer; |
379 | xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs; | 362 | xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs; |
380 | xspi->bitbang.master->setup = xilinx_spi_setup; | ||
381 | init_completion(&xspi->done); | 363 | init_completion(&xspi->done); |
382 | 364 | ||
383 | if (!request_mem_region(mem->start, resource_size(mem), | 365 | if (!request_mem_region(mem->start, resource_size(mem), |
@@ -396,13 +378,25 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, | |||
396 | 378 | ||
397 | xspi->mem = *mem; | 379 | xspi->mem = *mem; |
398 | xspi->irq = irq; | 380 | xspi->irq = irq; |
399 | if (little_endian) { | 381 | |
400 | xspi->read_fn = xspi_read32; | 382 | /* |
401 | xspi->write_fn = xspi_write32; | 383 | * Detect endianess on the IP via loop bit in CR. Detection |
402 | } else { | 384 | * must be done before reset is sent because incorrect reset |
385 | * value generates error interrupt. | ||
386 | * Setup little endian helper functions first and try to use them | ||
387 | * and check if bit was correctly setup or not. | ||
388 | */ | ||
389 | xspi->read_fn = xspi_read32; | ||
390 | xspi->write_fn = xspi_write32; | ||
391 | |||
392 | xspi->write_fn(XSPI_CR_LOOP, xspi->regs + XSPI_CR_OFFSET); | ||
393 | tmp = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET); | ||
394 | tmp &= XSPI_CR_LOOP; | ||
395 | if (tmp != XSPI_CR_LOOP) { | ||
403 | xspi->read_fn = xspi_read32_be; | 396 | xspi->read_fn = xspi_read32_be; |
404 | xspi->write_fn = xspi_write32_be; | 397 | xspi->write_fn = xspi_write32_be; |
405 | } | 398 | } |
399 | |||
406 | xspi->bits_per_word = bits_per_word; | 400 | xspi->bits_per_word = bits_per_word; |
407 | if (xspi->bits_per_word == 8) { | 401 | if (xspi->bits_per_word == 8) { |
408 | xspi->tx_fn = xspi_tx8; | 402 | xspi->tx_fn = xspi_tx8; |
@@ -466,14 +460,13 @@ static int xilinx_spi_probe(struct platform_device *dev) | |||
466 | { | 460 | { |
467 | struct xspi_platform_data *pdata; | 461 | struct xspi_platform_data *pdata; |
468 | struct resource *r; | 462 | struct resource *r; |
469 | int irq, num_cs = 0, little_endian = 0, bits_per_word = 8; | 463 | int irq, num_cs = 0, bits_per_word = 8; |
470 | struct spi_master *master; | 464 | struct spi_master *master; |
471 | u8 i; | 465 | u8 i; |
472 | 466 | ||
473 | pdata = dev->dev.platform_data; | 467 | pdata = dev->dev.platform_data; |
474 | if (pdata) { | 468 | if (pdata) { |
475 | num_cs = pdata->num_chipselect; | 469 | num_cs = pdata->num_chipselect; |
476 | little_endian = pdata->little_endian; | ||
477 | bits_per_word = pdata->bits_per_word; | 470 | bits_per_word = pdata->bits_per_word; |
478 | } | 471 | } |
479 | 472 | ||
@@ -505,7 +498,7 @@ static int xilinx_spi_probe(struct platform_device *dev) | |||
505 | return -ENXIO; | 498 | return -ENXIO; |
506 | 499 | ||
507 | master = xilinx_spi_init(&dev->dev, r, irq, dev->id, num_cs, | 500 | master = xilinx_spi_init(&dev->dev, r, irq, dev->id, num_cs, |
508 | little_endian, bits_per_word); | 501 | bits_per_word); |
509 | if (!master) | 502 | if (!master) |
510 | return -ENODEV; | 503 | return -ENODEV; |
511 | 504 | ||
@@ -521,7 +514,6 @@ static int xilinx_spi_probe(struct platform_device *dev) | |||
521 | static int xilinx_spi_remove(struct platform_device *dev) | 514 | static int xilinx_spi_remove(struct platform_device *dev) |
522 | { | 515 | { |
523 | xilinx_spi_deinit(platform_get_drvdata(dev)); | 516 | xilinx_spi_deinit(platform_get_drvdata(dev)); |
524 | platform_set_drvdata(dev, 0); | ||
525 | 517 | ||
526 | return 0; | 518 | return 0; |
527 | } | 519 | } |
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 32b7bb111eb6..978dda2c5239 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c | |||
@@ -223,7 +223,7 @@ static const struct dev_pm_ops spi_pm = { | |||
223 | SET_RUNTIME_PM_OPS( | 223 | SET_RUNTIME_PM_OPS( |
224 | pm_generic_runtime_suspend, | 224 | pm_generic_runtime_suspend, |
225 | pm_generic_runtime_resume, | 225 | pm_generic_runtime_resume, |
226 | pm_generic_runtime_idle | 226 | NULL |
227 | ) | 227 | ) |
228 | }; | 228 | }; |
229 | 229 | ||
@@ -601,7 +601,7 @@ static int spi_init_queue(struct spi_master *master) | |||
601 | 601 | ||
602 | init_kthread_worker(&master->kworker); | 602 | init_kthread_worker(&master->kworker); |
603 | master->kworker_task = kthread_run(kthread_worker_fn, | 603 | master->kworker_task = kthread_run(kthread_worker_fn, |
604 | &master->kworker, | 604 | &master->kworker, "%s", |
605 | dev_name(&master->dev)); | 605 | dev_name(&master->dev)); |
606 | if (IS_ERR(master->kworker_task)) { | 606 | if (IS_ERR(master->kworker_task)) { |
607 | dev_err(&master->dev, "failed to create message pump task\n"); | 607 | dev_err(&master->dev, "failed to create message pump task\n"); |