diff options
Diffstat (limited to 'drivers/spi')
40 files changed, 665 insertions, 633 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index ba9310bc9acb..eea4eb83f352 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig | |||
@@ -150,7 +150,7 @@ config SPI_BUTTERFLY | |||
150 | 150 | ||
151 | config SPI_CLPS711X | 151 | config SPI_CLPS711X |
152 | tristate "CLPS711X host SPI controller" | 152 | tristate "CLPS711X host SPI controller" |
153 | depends on ARCH_CLPS711X | 153 | depends on ARCH_CLPS711X || COMPILE_TEST |
154 | help | 154 | help |
155 | This enables dedicated general purpose SPI/Microwire1-compatible | 155 | This enables dedicated general purpose SPI/Microwire1-compatible |
156 | master mode interface (SSI1) for CLPS711X-based CPUs. | 156 | master mode interface (SSI1) for CLPS711X-based CPUs. |
@@ -270,6 +270,7 @@ config SPI_FSL_SPI | |||
270 | config SPI_FSL_DSPI | 270 | config SPI_FSL_DSPI |
271 | tristate "Freescale DSPI controller" | 271 | tristate "Freescale DSPI controller" |
272 | select SPI_BITBANG | 272 | select SPI_BITBANG |
273 | select REGMAP_MMIO | ||
273 | depends on SOC_VF610 || COMPILE_TEST | 274 | depends on SOC_VF610 || COMPILE_TEST |
274 | help | 275 | help |
275 | This enables support for the Freescale DSPI controller in master | 276 | This enables support for the Freescale DSPI controller in master |
@@ -376,10 +377,10 @@ config SPI_PXA2XX_PCI | |||
376 | def_tristate SPI_PXA2XX && PCI | 377 | def_tristate SPI_PXA2XX && PCI |
377 | 378 | ||
378 | config SPI_RSPI | 379 | config SPI_RSPI |
379 | tristate "Renesas RSPI controller" | 380 | tristate "Renesas RSPI/QSPI controller" |
380 | depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE | 381 | depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE |
381 | help | 382 | help |
382 | SPI driver for Renesas RSPI blocks. | 383 | SPI driver for Renesas RSPI and QSPI blocks. |
383 | 384 | ||
384 | config SPI_S3C24XX | 385 | config SPI_S3C24XX |
385 | tristate "Samsung S3C24XX series SPI" | 386 | tristate "Samsung S3C24XX series SPI" |
@@ -546,7 +547,7 @@ config SPI_DW_MID_DMA | |||
546 | 547 | ||
547 | config SPI_DW_MMIO | 548 | config SPI_DW_MMIO |
548 | tristate "Memory-mapped io interface driver for DW SPI core" | 549 | tristate "Memory-mapped io interface driver for DW SPI core" |
549 | depends on SPI_DESIGNWARE && HAVE_CLK | 550 | depends on SPI_DESIGNWARE |
550 | 551 | ||
551 | # | 552 | # |
552 | # There are lots of SPI device types, with sensors and memory | 553 | # There are lots of SPI device types, with sensors and memory |
diff --git a/drivers/spi/spi-altera.c b/drivers/spi/spi-altera.c index 5d7deaf62867..09df64950234 100644 --- a/drivers/spi/spi-altera.c +++ b/drivers/spi/spi-altera.c | |||
@@ -200,7 +200,6 @@ static irqreturn_t altera_spi_irq(int irq, void *dev) | |||
200 | 200 | ||
201 | static int altera_spi_probe(struct platform_device *pdev) | 201 | static int altera_spi_probe(struct platform_device *pdev) |
202 | { | 202 | { |
203 | struct altera_spi_platform_data *platp = dev_get_platdata(&pdev->dev); | ||
204 | struct altera_spi *hw; | 203 | struct altera_spi *hw; |
205 | struct spi_master *master; | 204 | struct spi_master *master; |
206 | struct resource *res; | 205 | struct resource *res; |
@@ -214,6 +213,8 @@ static int altera_spi_probe(struct platform_device *pdev) | |||
214 | master->bus_num = pdev->id; | 213 | master->bus_num = pdev->id; |
215 | master->num_chipselect = 16; | 214 | master->num_chipselect = 16; |
216 | master->mode_bits = SPI_CS_HIGH; | 215 | master->mode_bits = SPI_CS_HIGH; |
216 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16); | ||
217 | master->dev.of_node = pdev->dev.of_node; | ||
217 | 218 | ||
218 | hw = spi_master_get_devdata(master); | 219 | hw = spi_master_get_devdata(master); |
219 | platform_set_drvdata(pdev, hw); | 220 | platform_set_drvdata(pdev, hw); |
@@ -245,9 +246,6 @@ static int altera_spi_probe(struct platform_device *pdev) | |||
245 | if (err) | 246 | if (err) |
246 | goto exit; | 247 | goto exit; |
247 | } | 248 | } |
248 | /* find platform data */ | ||
249 | if (!platp) | ||
250 | hw->bitbang.master->dev.of_node = pdev->dev.of_node; | ||
251 | 249 | ||
252 | /* register our spi controller */ | 250 | /* register our spi controller */ |
253 | err = spi_bitbang_start(&hw->bitbang); | 251 | err = spi_bitbang_start(&hw->bitbang); |
diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c index 31534b51715a..c3b2fb9b6713 100644 --- a/drivers/spi/spi-ath79.c +++ b/drivers/spi/spi-ath79.c | |||
@@ -132,9 +132,9 @@ static int ath79_spi_setup_cs(struct spi_device *spi) | |||
132 | 132 | ||
133 | flags = GPIOF_DIR_OUT; | 133 | flags = GPIOF_DIR_OUT; |
134 | if (spi->mode & SPI_CS_HIGH) | 134 | if (spi->mode & SPI_CS_HIGH) |
135 | flags |= GPIOF_INIT_HIGH; | ||
136 | else | ||
137 | flags |= GPIOF_INIT_LOW; | 135 | flags |= GPIOF_INIT_LOW; |
136 | else | ||
137 | flags |= GPIOF_INIT_HIGH; | ||
138 | 138 | ||
139 | status = gpio_request_one(cdata->gpio, flags, | 139 | status = gpio_request_one(cdata->gpio, flags, |
140 | dev_name(&spi->dev)); | 140 | dev_name(&spi->dev)); |
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index b0842f751016..9641237295cd 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c | |||
@@ -26,6 +26,7 @@ | |||
26 | 26 | ||
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
29 | #include <linux/pinctrl/consumer.h> | ||
29 | 30 | ||
30 | /* SPI register offsets */ | 31 | /* SPI register offsets */ |
31 | #define SPI_CR 0x0000 | 32 | #define SPI_CR 0x0000 |
@@ -993,13 +994,6 @@ static int atmel_spi_setup(struct spi_device *spi) | |||
993 | 994 | ||
994 | as = spi_master_get_devdata(spi->master); | 995 | as = spi_master_get_devdata(spi->master); |
995 | 996 | ||
996 | if (spi->chip_select > spi->master->num_chipselect) { | ||
997 | dev_dbg(&spi->dev, | ||
998 | "setup: invalid chipselect %u (%u defined)\n", | ||
999 | spi->chip_select, spi->master->num_chipselect); | ||
1000 | return -EINVAL; | ||
1001 | } | ||
1002 | |||
1003 | /* see notes above re chipselect */ | 997 | /* see notes above re chipselect */ |
1004 | if (!atmel_spi_is_v2(as) | 998 | if (!atmel_spi_is_v2(as) |
1005 | && spi->chip_select == 0 | 999 | && spi->chip_select == 0 |
@@ -1087,14 +1081,6 @@ static int atmel_spi_one_transfer(struct spi_master *master, | |||
1087 | } | 1081 | } |
1088 | } | 1082 | } |
1089 | 1083 | ||
1090 | if (xfer->bits_per_word > 8) { | ||
1091 | if (xfer->len % 2) { | ||
1092 | dev_dbg(&spi->dev, | ||
1093 | "buffer len should be 16 bits aligned\n"); | ||
1094 | return -EINVAL; | ||
1095 | } | ||
1096 | } | ||
1097 | |||
1098 | /* | 1084 | /* |
1099 | * DMA map early, for performance (empties dcache ASAP) and | 1085 | * DMA map early, for performance (empties dcache ASAP) and |
1100 | * better fault reporting. | 1086 | * better fault reporting. |
@@ -1221,9 +1207,6 @@ static int atmel_spi_transfer_one_message(struct spi_master *master, | |||
1221 | dev_dbg(&spi->dev, "new message %p submitted for %s\n", | 1207 | dev_dbg(&spi->dev, "new message %p submitted for %s\n", |
1222 | msg, dev_name(&spi->dev)); | 1208 | msg, dev_name(&spi->dev)); |
1223 | 1209 | ||
1224 | if (unlikely(list_empty(&msg->transfers))) | ||
1225 | return -EINVAL; | ||
1226 | |||
1227 | atmel_spi_lock(as); | 1210 | atmel_spi_lock(as); |
1228 | cs_activate(as, spi); | 1211 | cs_activate(as, spi); |
1229 | 1212 | ||
@@ -1244,10 +1227,10 @@ static int atmel_spi_transfer_one_message(struct spi_master *master, | |||
1244 | 1227 | ||
1245 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | 1228 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { |
1246 | dev_dbg(&spi->dev, | 1229 | dev_dbg(&spi->dev, |
1247 | " xfer %p: len %u tx %p/%08x rx %p/%08x\n", | 1230 | " xfer %p: len %u tx %p/%pad rx %p/%pad\n", |
1248 | xfer, xfer->len, | 1231 | xfer, xfer->len, |
1249 | xfer->tx_buf, xfer->tx_dma, | 1232 | xfer->tx_buf, &xfer->tx_dma, |
1250 | xfer->rx_buf, xfer->rx_dma); | 1233 | xfer->rx_buf, &xfer->rx_dma); |
1251 | } | 1234 | } |
1252 | 1235 | ||
1253 | msg_done: | 1236 | msg_done: |
@@ -1303,6 +1286,9 @@ static int atmel_spi_probe(struct platform_device *pdev) | |||
1303 | struct spi_master *master; | 1286 | struct spi_master *master; |
1304 | struct atmel_spi *as; | 1287 | struct atmel_spi *as; |
1305 | 1288 | ||
1289 | /* Select default pin state */ | ||
1290 | pinctrl_pm_select_default_state(&pdev->dev); | ||
1291 | |||
1306 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1292 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1307 | if (!regs) | 1293 | if (!regs) |
1308 | return -ENXIO; | 1294 | return -ENXIO; |
@@ -1455,8 +1441,19 @@ static int atmel_spi_suspend(struct device *dev) | |||
1455 | { | 1441 | { |
1456 | struct spi_master *master = dev_get_drvdata(dev); | 1442 | struct spi_master *master = dev_get_drvdata(dev); |
1457 | struct atmel_spi *as = spi_master_get_devdata(master); | 1443 | struct atmel_spi *as = spi_master_get_devdata(master); |
1444 | int ret; | ||
1445 | |||
1446 | /* Stop the queue running */ | ||
1447 | ret = spi_master_suspend(master); | ||
1448 | if (ret) { | ||
1449 | dev_warn(dev, "cannot suspend master\n"); | ||
1450 | return ret; | ||
1451 | } | ||
1458 | 1452 | ||
1459 | clk_disable_unprepare(as->clk); | 1453 | clk_disable_unprepare(as->clk); |
1454 | |||
1455 | pinctrl_pm_select_sleep_state(dev); | ||
1456 | |||
1460 | return 0; | 1457 | return 0; |
1461 | } | 1458 | } |
1462 | 1459 | ||
@@ -1464,9 +1461,18 @@ static int atmel_spi_resume(struct device *dev) | |||
1464 | { | 1461 | { |
1465 | struct spi_master *master = dev_get_drvdata(dev); | 1462 | struct spi_master *master = dev_get_drvdata(dev); |
1466 | struct atmel_spi *as = spi_master_get_devdata(master); | 1463 | struct atmel_spi *as = spi_master_get_devdata(master); |
1464 | int ret; | ||
1465 | |||
1466 | pinctrl_pm_select_default_state(dev); | ||
1467 | 1467 | ||
1468 | clk_prepare_enable(as->clk); | 1468 | clk_prepare_enable(as->clk); |
1469 | return 0; | 1469 | |
1470 | /* Start the queue running */ | ||
1471 | ret = spi_master_resume(master); | ||
1472 | if (ret) | ||
1473 | dev_err(dev, "problem starting queue (%d)\n", ret); | ||
1474 | |||
1475 | return ret; | ||
1470 | } | 1476 | } |
1471 | 1477 | ||
1472 | static SIMPLE_DEV_PM_OPS(atmel_spi_pm_ops, atmel_spi_suspend, atmel_spi_resume); | 1478 | static SIMPLE_DEV_PM_OPS(atmel_spi_pm_ops, atmel_spi_suspend, atmel_spi_resume); |
diff --git a/drivers/spi/spi-au1550.c b/drivers/spi/spi-au1550.c index c4141c92bcff..aafb812d7ea6 100644 --- a/drivers/spi/spi-au1550.c +++ b/drivers/spi/spi-au1550.c | |||
@@ -55,8 +55,6 @@ struct au1550_spi { | |||
55 | 55 | ||
56 | volatile psc_spi_t __iomem *regs; | 56 | volatile psc_spi_t __iomem *regs; |
57 | int irq; | 57 | int irq; |
58 | unsigned freq_max; | ||
59 | unsigned freq_min; | ||
60 | 58 | ||
61 | unsigned len; | 59 | unsigned len; |
62 | unsigned tx_count; | 60 | unsigned tx_count; |
@@ -248,11 +246,8 @@ static int au1550_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t) | |||
248 | hz = t->speed_hz; | 246 | hz = t->speed_hz; |
249 | } | 247 | } |
250 | 248 | ||
251 | if (hz > spi->max_speed_hz || hz > hw->freq_max || hz < hw->freq_min) { | 249 | if (!hz) |
252 | dev_err(&spi->dev, "setupxfer: clock rate=%d out of range\n", | ||
253 | hz); | ||
254 | return -EINVAL; | 250 | return -EINVAL; |
255 | } | ||
256 | 251 | ||
257 | au1550_spi_bits_handlers_set(hw, spi->bits_per_word); | 252 | au1550_spi_bits_handlers_set(hw, spi->bits_per_word); |
258 | 253 | ||
@@ -287,23 +282,6 @@ static int au1550_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t) | |||
287 | return 0; | 282 | return 0; |
288 | } | 283 | } |
289 | 284 | ||
290 | static int au1550_spi_setup(struct spi_device *spi) | ||
291 | { | ||
292 | struct au1550_spi *hw = spi_master_get_devdata(spi->master); | ||
293 | |||
294 | if (spi->max_speed_hz == 0) | ||
295 | spi->max_speed_hz = hw->freq_max; | ||
296 | if (spi->max_speed_hz > hw->freq_max | ||
297 | || spi->max_speed_hz < hw->freq_min) | ||
298 | return -EINVAL; | ||
299 | /* | ||
300 | * NOTE: cannot change speed and other hw settings immediately, | ||
301 | * otherwise sharing of spi bus is not possible, | ||
302 | * so do not call setupxfer(spi, NULL) here | ||
303 | */ | ||
304 | return 0; | ||
305 | } | ||
306 | |||
307 | /* | 285 | /* |
308 | * for dma spi transfers, we have to setup rx channel, otherwise there is | 286 | * for dma spi transfers, we have to setup rx channel, otherwise there is |
309 | * no reliable way how to recognize that spi transfer is done | 287 | * no reliable way how to recognize that spi transfer is done |
@@ -838,7 +816,6 @@ static int au1550_spi_probe(struct platform_device *pdev) | |||
838 | hw->bitbang.master = hw->master; | 816 | hw->bitbang.master = hw->master; |
839 | hw->bitbang.setup_transfer = au1550_spi_setupxfer; | 817 | hw->bitbang.setup_transfer = au1550_spi_setupxfer; |
840 | hw->bitbang.chipselect = au1550_spi_chipsel; | 818 | hw->bitbang.chipselect = au1550_spi_chipsel; |
841 | hw->bitbang.master->setup = au1550_spi_setup; | ||
842 | hw->bitbang.txrx_bufs = au1550_spi_txrx_bufs; | 819 | hw->bitbang.txrx_bufs = au1550_spi_txrx_bufs; |
843 | 820 | ||
844 | if (hw->usedma) { | 821 | if (hw->usedma) { |
@@ -909,8 +886,9 @@ static int au1550_spi_probe(struct platform_device *pdev) | |||
909 | { | 886 | { |
910 | int min_div = (2 << 0) * (2 * (4 + 1)); | 887 | int min_div = (2 << 0) * (2 * (4 + 1)); |
911 | int max_div = (2 << 3) * (2 * (63 + 1)); | 888 | int max_div = (2 << 3) * (2 * (63 + 1)); |
912 | hw->freq_max = hw->pdata->mainclk_hz / min_div; | 889 | master->max_speed_hz = hw->pdata->mainclk_hz / min_div; |
913 | hw->freq_min = hw->pdata->mainclk_hz / (max_div + 1) + 1; | 890 | master->min_speed_hz = |
891 | hw->pdata->mainclk_hz / (max_div + 1) + 1; | ||
914 | } | 892 | } |
915 | 893 | ||
916 | au1550_spi_setup_psc_as_spi(hw); | 894 | au1550_spi_setup_psc_as_spi(hw); |
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index 8a89dd1f2654..69167456ec1e 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c | |||
@@ -315,7 +315,6 @@ static int bcm2835_spi_probe(struct platform_device *pdev) | |||
315 | 315 | ||
316 | master->mode_bits = BCM2835_SPI_MODE_BITS; | 316 | master->mode_bits = BCM2835_SPI_MODE_BITS; |
317 | master->bits_per_word_mask = SPI_BPW_MASK(8); | 317 | master->bits_per_word_mask = SPI_BPW_MASK(8); |
318 | master->bus_num = -1; | ||
319 | master->num_chipselect = 3; | 318 | master->num_chipselect = 3; |
320 | master->transfer_one_message = bcm2835_spi_transfer_one; | 319 | master->transfer_one_message = bcm2835_spi_transfer_one; |
321 | master->dev.of_node = pdev->dev.of_node; | 320 | master->dev.of_node = pdev->dev.of_node; |
diff --git a/drivers/spi/spi-bcm63xx-hsspi.c b/drivers/spi/spi-bcm63xx-hsspi.c index b528f9fc8bc0..5a211e98383b 100644 --- a/drivers/spi/spi-bcm63xx-hsspi.c +++ b/drivers/spi/spi-bcm63xx-hsspi.c | |||
@@ -180,7 +180,7 @@ static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t) | |||
180 | while (pending > 0) { | 180 | while (pending > 0) { |
181 | int curr_step = min_t(int, step_size, pending); | 181 | int curr_step = min_t(int, step_size, pending); |
182 | 182 | ||
183 | init_completion(&bs->done); | 183 | reinit_completion(&bs->done); |
184 | if (tx) { | 184 | if (tx) { |
185 | memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step); | 185 | memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step); |
186 | tx += curr_step; | 186 | tx += curr_step; |
@@ -369,6 +369,7 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) | |||
369 | bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0)); | 369 | bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0)); |
370 | 370 | ||
371 | mutex_init(&bs->bus_mutex); | 371 | mutex_init(&bs->bus_mutex); |
372 | init_completion(&bs->done); | ||
372 | 373 | ||
373 | master->bus_num = HSSPI_BUS_NUM; | 374 | master->bus_num = HSSPI_BUS_NUM; |
374 | master->num_chipselect = 8; | 375 | master->num_chipselect = 8; |
@@ -453,9 +454,8 @@ static int bcm63xx_hsspi_resume(struct device *dev) | |||
453 | } | 454 | } |
454 | #endif | 455 | #endif |
455 | 456 | ||
456 | static const struct dev_pm_ops bcm63xx_hsspi_pm_ops = { | 457 | static SIMPLE_DEV_PM_OPS(bcm63xx_hsspi_pm_ops, bcm63xx_hsspi_suspend, |
457 | SET_SYSTEM_SLEEP_PM_OPS(bcm63xx_hsspi_suspend, bcm63xx_hsspi_resume) | 458 | bcm63xx_hsspi_resume); |
458 | }; | ||
459 | 459 | ||
460 | static struct platform_driver bcm63xx_hsspi_driver = { | 460 | static struct platform_driver bcm63xx_hsspi_driver = { |
461 | .driver = { | 461 | .driver = { |
diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c index 77286aef2adf..c1cd2e0f54d1 100644 --- a/drivers/spi/spi-bcm63xx.c +++ b/drivers/spi/spi-bcm63xx.c | |||
@@ -35,8 +35,6 @@ | |||
35 | 35 | ||
36 | #include <bcm63xx_dev_spi.h> | 36 | #include <bcm63xx_dev_spi.h> |
37 | 37 | ||
38 | #define PFX KBUILD_MODNAME | ||
39 | |||
40 | #define BCM63XX_SPI_MAX_PREPEND 15 | 38 | #define BCM63XX_SPI_MAX_PREPEND 15 |
41 | 39 | ||
42 | struct bcm63xx_spi { | 40 | struct bcm63xx_spi { |
@@ -169,7 +167,7 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first, | |||
169 | transfer_list); | 167 | transfer_list); |
170 | } | 168 | } |
171 | 169 | ||
172 | init_completion(&bs->done); | 170 | reinit_completion(&bs->done); |
173 | 171 | ||
174 | /* Fill in the Message control register */ | 172 | /* Fill in the Message control register */ |
175 | msg_ctl = (len << SPI_BYTE_CNT_SHIFT); | 173 | msg_ctl = (len << SPI_BYTE_CNT_SHIFT); |
@@ -353,6 +351,7 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) | |||
353 | } | 351 | } |
354 | 352 | ||
355 | bs = spi_master_get_devdata(master); | 353 | bs = spi_master_get_devdata(master); |
354 | init_completion(&bs->done); | ||
356 | 355 | ||
357 | platform_set_drvdata(pdev, master); | 356 | platform_set_drvdata(pdev, master); |
358 | bs->pdev = pdev; | 357 | bs->pdev = pdev; |
diff --git a/drivers/spi/spi-bfin-v3.c b/drivers/spi/spi-bfin-v3.c index 8f8598834b30..4089d0e0d84e 100644 --- a/drivers/spi/spi-bfin-v3.c +++ b/drivers/spi/spi-bfin-v3.c | |||
@@ -822,7 +822,8 @@ static int bfin_spi_probe(struct platform_device *pdev) | |||
822 | master->cleanup = bfin_spi_cleanup; | 822 | master->cleanup = bfin_spi_cleanup; |
823 | master->setup = bfin_spi_setup; | 823 | master->setup = bfin_spi_setup; |
824 | master->transfer_one_message = bfin_spi_transfer_one_message; | 824 | master->transfer_one_message = bfin_spi_transfer_one_message; |
825 | master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1); | 825 | master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | |
826 | SPI_BPW_MASK(8); | ||
826 | 827 | ||
827 | drv_data = spi_master_get_devdata(master); | 828 | drv_data = spi_master_get_devdata(master); |
828 | drv_data->master = master; | 829 | drv_data->master = master; |
diff --git a/drivers/spi/spi-bfin5xx.c b/drivers/spi/spi-bfin5xx.c index f0f195af75d4..55e57c3eb9bd 100644 --- a/drivers/spi/spi-bfin5xx.c +++ b/drivers/spi/spi-bfin5xx.c | |||
@@ -350,7 +350,6 @@ static void *bfin_spi_next_transfer(struct bfin_spi_master_data *drv_data) | |||
350 | static void bfin_spi_giveback(struct bfin_spi_master_data *drv_data) | 350 | static void bfin_spi_giveback(struct bfin_spi_master_data *drv_data) |
351 | { | 351 | { |
352 | struct bfin_spi_slave_data *chip = drv_data->cur_chip; | 352 | struct bfin_spi_slave_data *chip = drv_data->cur_chip; |
353 | struct spi_transfer *last_transfer; | ||
354 | unsigned long flags; | 353 | unsigned long flags; |
355 | struct spi_message *msg; | 354 | struct spi_message *msg; |
356 | 355 | ||
@@ -362,9 +361,6 @@ static void bfin_spi_giveback(struct bfin_spi_master_data *drv_data) | |||
362 | queue_work(drv_data->workqueue, &drv_data->pump_messages); | 361 | queue_work(drv_data->workqueue, &drv_data->pump_messages); |
363 | spin_unlock_irqrestore(&drv_data->lock, flags); | 362 | spin_unlock_irqrestore(&drv_data->lock, flags); |
364 | 363 | ||
365 | last_transfer = list_entry(msg->transfers.prev, | ||
366 | struct spi_transfer, transfer_list); | ||
367 | |||
368 | msg->state = NULL; | 364 | msg->state = NULL; |
369 | 365 | ||
370 | if (!drv_data->cs_change) | 366 | if (!drv_data->cs_change) |
@@ -1030,10 +1026,6 @@ static int bfin_spi_setup(struct spi_device *spi) | |||
1030 | } | 1026 | } |
1031 | 1027 | ||
1032 | /* translate common spi framework into our register */ | 1028 | /* translate common spi framework into our register */ |
1033 | if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) { | ||
1034 | dev_err(&spi->dev, "unsupported spi modes detected\n"); | ||
1035 | goto error; | ||
1036 | } | ||
1037 | if (spi->mode & SPI_CPOL) | 1029 | if (spi->mode & SPI_CPOL) |
1038 | chip->ctl_reg |= BIT_CTL_CPOL; | 1030 | chip->ctl_reg |= BIT_CTL_CPOL; |
1039 | if (spi->mode & SPI_CPHA) | 1031 | if (spi->mode & SPI_CPHA) |
diff --git a/drivers/spi/spi-bitbang.c b/drivers/spi/spi-bitbang.c index bd222f6b677d..67aead248753 100644 --- a/drivers/spi/spi-bitbang.c +++ b/drivers/spi/spi-bitbang.c | |||
@@ -467,11 +467,9 @@ EXPORT_SYMBOL_GPL(spi_bitbang_start); | |||
467 | /** | 467 | /** |
468 | * spi_bitbang_stop - stops the task providing spi communication | 468 | * spi_bitbang_stop - stops the task providing spi communication |
469 | */ | 469 | */ |
470 | int spi_bitbang_stop(struct spi_bitbang *bitbang) | 470 | void spi_bitbang_stop(struct spi_bitbang *bitbang) |
471 | { | 471 | { |
472 | spi_unregister_master(bitbang->master); | 472 | spi_unregister_master(bitbang->master); |
473 | |||
474 | return 0; | ||
475 | } | 473 | } |
476 | EXPORT_SYMBOL_GPL(spi_bitbang_stop); | 474 | EXPORT_SYMBOL_GPL(spi_bitbang_stop); |
477 | 475 | ||
diff --git a/drivers/spi/spi-butterfly.c b/drivers/spi/spi-butterfly.c index 8081f96bd1d5..ee4f91ccd8fd 100644 --- a/drivers/spi/spi-butterfly.c +++ b/drivers/spi/spi-butterfly.c | |||
@@ -309,7 +309,6 @@ done: | |||
309 | static void butterfly_detach(struct parport *p) | 309 | static void butterfly_detach(struct parport *p) |
310 | { | 310 | { |
311 | struct butterfly *pp; | 311 | struct butterfly *pp; |
312 | int status; | ||
313 | 312 | ||
314 | /* FIXME this global is ugly ... but, how to quickly get from | 313 | /* FIXME this global is ugly ... but, how to quickly get from |
315 | * the parport to the "struct butterfly" associated with it? | 314 | * the parport to the "struct butterfly" associated with it? |
@@ -321,7 +320,7 @@ static void butterfly_detach(struct parport *p) | |||
321 | butterfly = NULL; | 320 | butterfly = NULL; |
322 | 321 | ||
323 | /* stop() unregisters child devices too */ | 322 | /* stop() unregisters child devices too */ |
324 | status = spi_bitbang_stop(&pp->bitbang); | 323 | spi_bitbang_stop(&pp->bitbang); |
325 | 324 | ||
326 | /* turn off VCC */ | 325 | /* turn off VCC */ |
327 | parport_write_data(pp->port, 0); | 326 | parport_write_data(pp->port, 0); |
diff --git a/drivers/spi/spi-clps711x.c b/drivers/spi/spi-clps711x.c index 374ba4a48a9e..a2b8ef5d8c59 100644 --- a/drivers/spi/spi-clps711x.c +++ b/drivers/spi/spi-clps711x.c | |||
@@ -17,152 +17,120 @@ | |||
17 | #include <linux/module.h> | 17 | #include <linux/module.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/regmap.h> | ||
21 | #include <linux/mfd/syscon.h> | ||
22 | #include <linux/mfd/syscon/clps711x.h> | ||
20 | #include <linux/spi/spi.h> | 23 | #include <linux/spi/spi.h> |
21 | #include <linux/platform_data/spi-clps711x.h> | 24 | #include <linux/platform_data/spi-clps711x.h> |
22 | 25 | ||
23 | #include <mach/hardware.h> | ||
24 | |||
25 | #define DRIVER_NAME "spi-clps711x" | 26 | #define DRIVER_NAME "spi-clps711x" |
26 | 27 | ||
27 | struct spi_clps711x_data { | 28 | #define SYNCIO_FRMLEN(x) ((x) << 8) |
28 | struct completion done; | 29 | #define SYNCIO_TXFRMEN (1 << 14) |
29 | 30 | ||
31 | struct spi_clps711x_data { | ||
32 | void __iomem *syncio; | ||
33 | struct regmap *syscon; | ||
34 | struct regmap *syscon1; | ||
30 | struct clk *spi_clk; | 35 | struct clk *spi_clk; |
31 | u32 max_speed_hz; | ||
32 | 36 | ||
33 | u8 *tx_buf; | 37 | u8 *tx_buf; |
34 | u8 *rx_buf; | 38 | u8 *rx_buf; |
35 | int count; | 39 | unsigned int bpw; |
36 | int len; | 40 | int len; |
37 | |||
38 | int chipselect[0]; | ||
39 | }; | 41 | }; |
40 | 42 | ||
41 | static int spi_clps711x_setup(struct spi_device *spi) | 43 | static int spi_clps711x_setup(struct spi_device *spi) |
42 | { | 44 | { |
43 | struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master); | ||
44 | |||
45 | /* We are expect that SPI-device is not selected */ | 45 | /* We are expect that SPI-device is not selected */ |
46 | gpio_direction_output(hw->chipselect[spi->chip_select], | 46 | gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); |
47 | !(spi->mode & SPI_CS_HIGH)); | ||
48 | 47 | ||
49 | return 0; | 48 | return 0; |
50 | } | 49 | } |
51 | 50 | ||
52 | static void spi_clps711x_setup_mode(struct spi_device *spi) | 51 | static void spi_clps711x_setup_xfer(struct spi_device *spi, |
53 | { | 52 | struct spi_transfer *xfer) |
54 | /* Setup edge for transfer */ | ||
55 | if (spi->mode & SPI_CPHA) | ||
56 | clps_writew(clps_readw(SYSCON3) | SYSCON3_ADCCKNSEN, SYSCON3); | ||
57 | else | ||
58 | clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCKNSEN, SYSCON3); | ||
59 | } | ||
60 | |||
61 | static int spi_clps711x_setup_xfer(struct spi_device *spi, | ||
62 | struct spi_transfer *xfer) | ||
63 | { | 53 | { |
64 | u32 speed = xfer->speed_hz ? : spi->max_speed_hz; | 54 | struct spi_master *master = spi->master; |
65 | u8 bpw = xfer->bits_per_word; | 55 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); |
66 | struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master); | ||
67 | |||
68 | if (bpw != 8) { | ||
69 | dev_err(&spi->dev, "Unsupported master bus width %i\n", bpw); | ||
70 | return -EINVAL; | ||
71 | } | ||
72 | 56 | ||
73 | /* Setup SPI frequency divider */ | 57 | /* Setup SPI frequency divider */ |
74 | if (!speed || (speed >= hw->max_speed_hz)) | 58 | if (xfer->speed_hz >= master->max_speed_hz) |
75 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | | 59 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
76 | SYSCON1_ADCKSEL(3), SYSCON1); | 60 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(3)); |
77 | else if (speed >= (hw->max_speed_hz / 2)) | 61 | else if (xfer->speed_hz >= (master->max_speed_hz / 2)) |
78 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | | 62 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
79 | SYSCON1_ADCKSEL(2), SYSCON1); | 63 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(2)); |
80 | else if (speed >= (hw->max_speed_hz / 8)) | 64 | else if (xfer->speed_hz >= (master->max_speed_hz / 8)) |
81 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | | 65 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
82 | SYSCON1_ADCKSEL(1), SYSCON1); | 66 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(1)); |
83 | else | 67 | else |
84 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | | 68 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
85 | SYSCON1_ADCKSEL(0), SYSCON1); | 69 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(0)); |
86 | |||
87 | return 0; | ||
88 | } | 70 | } |
89 | 71 | ||
90 | static int spi_clps711x_transfer_one_message(struct spi_master *master, | 72 | static int spi_clps711x_prepare_message(struct spi_master *master, |
91 | struct spi_message *msg) | 73 | struct spi_message *msg) |
92 | { | 74 | { |
93 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | 75 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); |
94 | struct spi_transfer *xfer; | 76 | struct spi_device *spi = msg->spi; |
95 | int status = 0, cs = hw->chipselect[msg->spi->chip_select]; | ||
96 | u32 data; | ||
97 | |||
98 | spi_clps711x_setup_mode(msg->spi); | ||
99 | |||
100 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
101 | if (spi_clps711x_setup_xfer(msg->spi, xfer)) { | ||
102 | status = -EINVAL; | ||
103 | goto out_xfr; | ||
104 | } | ||
105 | 77 | ||
106 | gpio_set_value(cs, !!(msg->spi->mode & SPI_CS_HIGH)); | 78 | /* Setup mode for transfer */ |
107 | 79 | return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN, | |
108 | reinit_completion(&hw->done); | 80 | (spi->mode & SPI_CPHA) ? |
109 | 81 | SYSCON3_ADCCKNSEN : 0); | |
110 | hw->count = 0; | 82 | } |
111 | hw->len = xfer->len; | ||
112 | hw->tx_buf = (u8 *)xfer->tx_buf; | ||
113 | hw->rx_buf = (u8 *)xfer->rx_buf; | ||
114 | |||
115 | /* Initiate transfer */ | ||
116 | data = hw->tx_buf ? hw->tx_buf[hw->count] : 0; | ||
117 | clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO); | ||
118 | |||
119 | wait_for_completion(&hw->done); | ||
120 | 83 | ||
121 | if (xfer->delay_usecs) | 84 | static int spi_clps711x_transfer_one(struct spi_master *master, |
122 | udelay(xfer->delay_usecs); | 85 | struct spi_device *spi, |
86 | struct spi_transfer *xfer) | ||
87 | { | ||
88 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | ||
89 | u8 data; | ||
123 | 90 | ||
124 | if (xfer->cs_change || | 91 | spi_clps711x_setup_xfer(spi, xfer); |
125 | list_is_last(&xfer->transfer_list, &msg->transfers)) | ||
126 | gpio_set_value(cs, !(msg->spi->mode & SPI_CS_HIGH)); | ||
127 | 92 | ||
128 | msg->actual_length += xfer->len; | 93 | hw->len = xfer->len; |
129 | } | 94 | hw->bpw = xfer->bits_per_word; |
95 | hw->tx_buf = (u8 *)xfer->tx_buf; | ||
96 | hw->rx_buf = (u8 *)xfer->rx_buf; | ||
130 | 97 | ||
131 | out_xfr: | 98 | /* Initiate transfer */ |
132 | msg->status = status; | 99 | data = hw->tx_buf ? *hw->tx_buf++ : 0; |
133 | spi_finalize_current_message(master); | 100 | writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio); |
134 | 101 | ||
135 | return 0; | 102 | return 1; |
136 | } | 103 | } |
137 | 104 | ||
138 | static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) | 105 | static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) |
139 | { | 106 | { |
140 | struct spi_clps711x_data *hw = (struct spi_clps711x_data *)dev_id; | 107 | struct spi_master *master = dev_id; |
141 | u32 data; | 108 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); |
109 | u8 data; | ||
142 | 110 | ||
143 | /* Handle RX */ | 111 | /* Handle RX */ |
144 | data = clps_readb(SYNCIO); | 112 | data = readb(hw->syncio); |
145 | if (hw->rx_buf) | 113 | if (hw->rx_buf) |
146 | hw->rx_buf[hw->count] = (u8)data; | 114 | *hw->rx_buf++ = data; |
147 | |||
148 | hw->count++; | ||
149 | 115 | ||
150 | /* Handle TX */ | 116 | /* Handle TX */ |
151 | if (hw->count < hw->len) { | 117 | if (--hw->len > 0) { |
152 | data = hw->tx_buf ? hw->tx_buf[hw->count] : 0; | 118 | data = hw->tx_buf ? *hw->tx_buf++ : 0; |
153 | clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO); | 119 | writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, |
120 | hw->syncio); | ||
154 | } else | 121 | } else |
155 | complete(&hw->done); | 122 | spi_finalize_current_transfer(master); |
156 | 123 | ||
157 | return IRQ_HANDLED; | 124 | return IRQ_HANDLED; |
158 | } | 125 | } |
159 | 126 | ||
160 | static int spi_clps711x_probe(struct platform_device *pdev) | 127 | static int spi_clps711x_probe(struct platform_device *pdev) |
161 | { | 128 | { |
162 | int i, ret; | ||
163 | struct spi_master *master; | ||
164 | struct spi_clps711x_data *hw; | 129 | struct spi_clps711x_data *hw; |
165 | struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev); | 130 | struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev); |
131 | struct spi_master *master; | ||
132 | struct resource *res; | ||
133 | int i, irq, ret; | ||
166 | 134 | ||
167 | if (!pdata) { | 135 | if (!pdata) { |
168 | dev_err(&pdev->dev, "No platform data supplied\n"); | 136 | dev_err(&pdev->dev, "No platform data supplied\n"); |
@@ -174,33 +142,37 @@ static int spi_clps711x_probe(struct platform_device *pdev) | |||
174 | return -EINVAL; | 142 | return -EINVAL; |
175 | } | 143 | } |
176 | 144 | ||
177 | master = spi_alloc_master(&pdev->dev, | 145 | irq = platform_get_irq(pdev, 0); |
178 | sizeof(struct spi_clps711x_data) + | 146 | if (irq < 0) |
179 | sizeof(int) * pdata->num_chipselect); | 147 | return irq; |
180 | if (!master) { | 148 | |
181 | dev_err(&pdev->dev, "SPI allocating memory error\n"); | 149 | master = spi_alloc_master(&pdev->dev, sizeof(*hw)); |
150 | if (!master) | ||
182 | return -ENOMEM; | 151 | return -ENOMEM; |
152 | |||
153 | master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) * | ||
154 | pdata->num_chipselect, GFP_KERNEL); | ||
155 | if (!master->cs_gpios) { | ||
156 | ret = -ENOMEM; | ||
157 | goto err_out; | ||
183 | } | 158 | } |
184 | 159 | ||
185 | master->bus_num = pdev->id; | 160 | master->bus_num = pdev->id; |
186 | master->mode_bits = SPI_CPHA | SPI_CS_HIGH; | 161 | master->mode_bits = SPI_CPHA | SPI_CS_HIGH; |
187 | master->bits_per_word_mask = SPI_BPW_MASK(8); | 162 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); |
188 | master->num_chipselect = pdata->num_chipselect; | 163 | master->num_chipselect = pdata->num_chipselect; |
189 | master->setup = spi_clps711x_setup; | 164 | master->setup = spi_clps711x_setup; |
190 | master->transfer_one_message = spi_clps711x_transfer_one_message; | 165 | master->prepare_message = spi_clps711x_prepare_message; |
166 | master->transfer_one = spi_clps711x_transfer_one; | ||
191 | 167 | ||
192 | hw = spi_master_get_devdata(master); | 168 | hw = spi_master_get_devdata(master); |
193 | 169 | ||
194 | for (i = 0; i < master->num_chipselect; i++) { | 170 | for (i = 0; i < master->num_chipselect; i++) { |
195 | hw->chipselect[i] = pdata->chipselect[i]; | 171 | master->cs_gpios[i] = pdata->chipselect[i]; |
196 | if (!gpio_is_valid(hw->chipselect[i])) { | 172 | ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i], |
197 | dev_err(&pdev->dev, "Invalid CS GPIO %i\n", i); | 173 | DRIVER_NAME); |
198 | ret = -EINVAL; | 174 | if (ret) { |
199 | goto err_out; | ||
200 | } | ||
201 | if (devm_gpio_request(&pdev->dev, hw->chipselect[i], NULL)) { | ||
202 | dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); | 175 | dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); |
203 | ret = -EINVAL; | ||
204 | goto err_out; | 176 | goto err_out; |
205 | } | 177 | } |
206 | } | 178 | } |
@@ -211,29 +183,45 @@ static int spi_clps711x_probe(struct platform_device *pdev) | |||
211 | ret = PTR_ERR(hw->spi_clk); | 183 | ret = PTR_ERR(hw->spi_clk); |
212 | goto err_out; | 184 | goto err_out; |
213 | } | 185 | } |
214 | hw->max_speed_hz = clk_get_rate(hw->spi_clk); | 186 | master->max_speed_hz = clk_get_rate(hw->spi_clk); |
215 | 187 | ||
216 | init_completion(&hw->done); | ||
217 | platform_set_drvdata(pdev, master); | 188 | platform_set_drvdata(pdev, master); |
218 | 189 | ||
190 | hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3"); | ||
191 | if (IS_ERR(hw->syscon)) { | ||
192 | ret = PTR_ERR(hw->syscon); | ||
193 | goto err_out; | ||
194 | } | ||
195 | |||
196 | hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1"); | ||
197 | if (IS_ERR(hw->syscon1)) { | ||
198 | ret = PTR_ERR(hw->syscon1); | ||
199 | goto err_out; | ||
200 | } | ||
201 | |||
202 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
203 | hw->syncio = devm_ioremap_resource(&pdev->dev, res); | ||
204 | if (IS_ERR(hw->syncio)) { | ||
205 | ret = PTR_ERR(hw->syncio); | ||
206 | goto err_out; | ||
207 | } | ||
208 | |||
219 | /* Disable extended mode due hardware problems */ | 209 | /* Disable extended mode due hardware problems */ |
220 | clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCON, SYSCON3); | 210 | regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0); |
221 | 211 | ||
222 | /* Clear possible pending interrupt */ | 212 | /* Clear possible pending interrupt */ |
223 | clps_readl(SYNCIO); | 213 | readl(hw->syncio); |
224 | 214 | ||
225 | ret = devm_request_irq(&pdev->dev, IRQ_SSEOTI, spi_clps711x_isr, 0, | 215 | ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0, |
226 | dev_name(&pdev->dev), hw); | 216 | dev_name(&pdev->dev), master); |
227 | if (ret) { | 217 | if (ret) |
228 | dev_err(&pdev->dev, "Can't request IRQ\n"); | ||
229 | goto err_out; | 218 | goto err_out; |
230 | } | ||
231 | 219 | ||
232 | ret = devm_spi_register_master(&pdev->dev, master); | 220 | ret = devm_spi_register_master(&pdev->dev, master); |
233 | if (!ret) { | 221 | if (!ret) { |
234 | dev_info(&pdev->dev, | 222 | dev_info(&pdev->dev, |
235 | "SPI bus driver initialized. Master clock %u Hz\n", | 223 | "SPI bus driver initialized. Master clock %u Hz\n", |
236 | hw->max_speed_hz); | 224 | master->max_speed_hz); |
237 | return 0; | 225 | return 0; |
238 | } | 226 | } |
239 | 227 | ||
diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c index cabed8f9119e..e2fa628e55e7 100644 --- a/drivers/spi/spi-coldfire-qspi.c +++ b/drivers/spi/spi-coldfire-qspi.c | |||
@@ -77,8 +77,6 @@ struct mcfqspi { | |||
77 | struct mcfqspi_cs_control *cs_control; | 77 | struct mcfqspi_cs_control *cs_control; |
78 | 78 | ||
79 | wait_queue_head_t waitq; | 79 | wait_queue_head_t waitq; |
80 | |||
81 | struct device *dev; | ||
82 | }; | 80 | }; |
83 | 81 | ||
84 | static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val) | 82 | static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val) |
@@ -135,13 +133,13 @@ static void mcfqspi_cs_deselect(struct mcfqspi *mcfqspi, u8 chip_select, | |||
135 | 133 | ||
136 | static int mcfqspi_cs_setup(struct mcfqspi *mcfqspi) | 134 | static int mcfqspi_cs_setup(struct mcfqspi *mcfqspi) |
137 | { | 135 | { |
138 | return (mcfqspi->cs_control && mcfqspi->cs_control->setup) ? | 136 | return (mcfqspi->cs_control->setup) ? |
139 | mcfqspi->cs_control->setup(mcfqspi->cs_control) : 0; | 137 | mcfqspi->cs_control->setup(mcfqspi->cs_control) : 0; |
140 | } | 138 | } |
141 | 139 | ||
142 | static void mcfqspi_cs_teardown(struct mcfqspi *mcfqspi) | 140 | static void mcfqspi_cs_teardown(struct mcfqspi *mcfqspi) |
143 | { | 141 | { |
144 | if (mcfqspi->cs_control && mcfqspi->cs_control->teardown) | 142 | if (mcfqspi->cs_control->teardown) |
145 | mcfqspi->cs_control->teardown(mcfqspi->cs_control); | 143 | mcfqspi->cs_control->teardown(mcfqspi->cs_control); |
146 | } | 144 | } |
147 | 145 | ||
@@ -300,68 +298,45 @@ static void mcfqspi_transfer_msg16(struct mcfqspi *mcfqspi, unsigned count, | |||
300 | } | 298 | } |
301 | } | 299 | } |
302 | 300 | ||
303 | static int mcfqspi_transfer_one_message(struct spi_master *master, | 301 | static void mcfqspi_set_cs(struct spi_device *spi, bool enable) |
304 | struct spi_message *msg) | ||
305 | { | 302 | { |
306 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | 303 | struct mcfqspi *mcfqspi = spi_master_get_devdata(spi->master); |
307 | struct spi_device *spi = msg->spi; | 304 | bool cs_high = spi->mode & SPI_CS_HIGH; |
308 | struct spi_transfer *t; | ||
309 | int status = 0; | ||
310 | |||
311 | list_for_each_entry(t, &msg->transfers, transfer_list) { | ||
312 | bool cs_high = spi->mode & SPI_CS_HIGH; | ||
313 | u16 qmr = MCFQSPI_QMR_MSTR; | ||
314 | |||
315 | qmr |= t->bits_per_word << 10; | ||
316 | if (spi->mode & SPI_CPHA) | ||
317 | qmr |= MCFQSPI_QMR_CPHA; | ||
318 | if (spi->mode & SPI_CPOL) | ||
319 | qmr |= MCFQSPI_QMR_CPOL; | ||
320 | if (t->speed_hz) | ||
321 | qmr |= mcfqspi_qmr_baud(t->speed_hz); | ||
322 | else | ||
323 | qmr |= mcfqspi_qmr_baud(spi->max_speed_hz); | ||
324 | mcfqspi_wr_qmr(mcfqspi, qmr); | ||
325 | 305 | ||
306 | if (enable) | ||
326 | mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high); | 307 | mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high); |
308 | else | ||
309 | mcfqspi_cs_deselect(mcfqspi, spi->chip_select, cs_high); | ||
310 | } | ||
327 | 311 | ||
328 | mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE); | 312 | static int mcfqspi_transfer_one(struct spi_master *master, |
329 | if (t->bits_per_word == 8) | 313 | struct spi_device *spi, |
330 | mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf, | 314 | struct spi_transfer *t) |
331 | t->rx_buf); | 315 | { |
332 | else | 316 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); |
333 | mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf, | 317 | u16 qmr = MCFQSPI_QMR_MSTR; |
334 | t->rx_buf); | 318 | |
335 | mcfqspi_wr_qir(mcfqspi, 0); | 319 | qmr |= t->bits_per_word << 10; |
336 | 320 | if (spi->mode & SPI_CPHA) | |
337 | if (t->delay_usecs) | 321 | qmr |= MCFQSPI_QMR_CPHA; |
338 | udelay(t->delay_usecs); | 322 | if (spi->mode & SPI_CPOL) |
339 | if (t->cs_change) { | 323 | qmr |= MCFQSPI_QMR_CPOL; |
340 | if (!list_is_last(&t->transfer_list, &msg->transfers)) | 324 | qmr |= mcfqspi_qmr_baud(t->speed_hz); |
341 | mcfqspi_cs_deselect(mcfqspi, spi->chip_select, | 325 | mcfqspi_wr_qmr(mcfqspi, qmr); |
342 | cs_high); | 326 | |
343 | } else { | 327 | mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE); |
344 | if (list_is_last(&t->transfer_list, &msg->transfers)) | 328 | if (t->bits_per_word == 8) |
345 | mcfqspi_cs_deselect(mcfqspi, spi->chip_select, | 329 | mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf, t->rx_buf); |
346 | cs_high); | 330 | else |
347 | } | 331 | mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf, |
348 | msg->actual_length += t->len; | 332 | t->rx_buf); |
349 | } | 333 | mcfqspi_wr_qir(mcfqspi, 0); |
350 | msg->status = status; | ||
351 | spi_finalize_current_message(master); | ||
352 | |||
353 | return status; | ||
354 | 334 | ||
335 | return 0; | ||
355 | } | 336 | } |
356 | 337 | ||
357 | static int mcfqspi_setup(struct spi_device *spi) | 338 | static int mcfqspi_setup(struct spi_device *spi) |
358 | { | 339 | { |
359 | if (spi->chip_select >= spi->master->num_chipselect) { | ||
360 | dev_dbg(&spi->dev, "%d chip select is out of range\n", | ||
361 | spi->chip_select); | ||
362 | return -EINVAL; | ||
363 | } | ||
364 | |||
365 | mcfqspi_cs_deselect(spi_master_get_devdata(spi->master), | 340 | mcfqspi_cs_deselect(spi_master_get_devdata(spi->master), |
366 | spi->chip_select, spi->mode & SPI_CS_HIGH); | 341 | spi->chip_select, spi->mode & SPI_CS_HIGH); |
367 | 342 | ||
@@ -388,6 +363,11 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
388 | return -ENOENT; | 363 | return -ENOENT; |
389 | } | 364 | } |
390 | 365 | ||
366 | if (!pdata->cs_control) { | ||
367 | dev_dbg(&pdev->dev, "pdata->cs_control is NULL\n"); | ||
368 | return -EINVAL; | ||
369 | } | ||
370 | |||
391 | master = spi_alloc_master(&pdev->dev, sizeof(*mcfqspi)); | 371 | master = spi_alloc_master(&pdev->dev, sizeof(*mcfqspi)); |
392 | if (master == NULL) { | 372 | if (master == NULL) { |
393 | dev_dbg(&pdev->dev, "spi_alloc_master failed\n"); | 373 | dev_dbg(&pdev->dev, "spi_alloc_master failed\n"); |
@@ -436,12 +416,12 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
436 | } | 416 | } |
437 | 417 | ||
438 | init_waitqueue_head(&mcfqspi->waitq); | 418 | init_waitqueue_head(&mcfqspi->waitq); |
439 | mcfqspi->dev = &pdev->dev; | ||
440 | 419 | ||
441 | master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; | 420 | master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; |
442 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); | 421 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); |
443 | master->setup = mcfqspi_setup; | 422 | master->setup = mcfqspi_setup; |
444 | master->transfer_one_message = mcfqspi_transfer_one_message; | 423 | master->set_cs = mcfqspi_set_cs; |
424 | master->transfer_one = mcfqspi_transfer_one; | ||
445 | master->auto_runtime_pm = true; | 425 | master->auto_runtime_pm = true; |
446 | 426 | ||
447 | platform_set_drvdata(pdev, master); | 427 | platform_set_drvdata(pdev, master); |
@@ -451,7 +431,7 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
451 | dev_dbg(&pdev->dev, "spi_register_master failed\n"); | 431 | dev_dbg(&pdev->dev, "spi_register_master failed\n"); |
452 | goto fail2; | 432 | goto fail2; |
453 | } | 433 | } |
454 | pm_runtime_enable(mcfqspi->dev); | 434 | pm_runtime_enable(&pdev->dev); |
455 | 435 | ||
456 | dev_info(&pdev->dev, "Coldfire QSPI bus driver\n"); | 436 | dev_info(&pdev->dev, "Coldfire QSPI bus driver\n"); |
457 | 437 | ||
@@ -473,9 +453,8 @@ static int mcfqspi_remove(struct platform_device *pdev) | |||
473 | { | 453 | { |
474 | struct spi_master *master = platform_get_drvdata(pdev); | 454 | struct spi_master *master = platform_get_drvdata(pdev); |
475 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | 455 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); |
476 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
477 | 456 | ||
478 | pm_runtime_disable(mcfqspi->dev); | 457 | pm_runtime_disable(&pdev->dev); |
479 | /* disable the hardware (set the baud rate to 0) */ | 458 | /* disable the hardware (set the baud rate to 0) */ |
480 | mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR); | 459 | mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR); |
481 | 460 | ||
@@ -490,8 +469,11 @@ static int mcfqspi_suspend(struct device *dev) | |||
490 | { | 469 | { |
491 | struct spi_master *master = dev_get_drvdata(dev); | 470 | struct spi_master *master = dev_get_drvdata(dev); |
492 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | 471 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); |
472 | int ret; | ||
493 | 473 | ||
494 | spi_master_suspend(master); | 474 | ret = spi_master_suspend(master); |
475 | if (ret) | ||
476 | return ret; | ||
495 | 477 | ||
496 | clk_disable(mcfqspi->clk); | 478 | clk_disable(mcfqspi->clk); |
497 | 479 | ||
@@ -503,18 +485,17 @@ static int mcfqspi_resume(struct device *dev) | |||
503 | struct spi_master *master = dev_get_drvdata(dev); | 485 | struct spi_master *master = dev_get_drvdata(dev); |
504 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | 486 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); |
505 | 487 | ||
506 | spi_master_resume(master); | ||
507 | |||
508 | clk_enable(mcfqspi->clk); | 488 | clk_enable(mcfqspi->clk); |
509 | 489 | ||
510 | return 0; | 490 | return spi_master_resume(master); |
511 | } | 491 | } |
512 | #endif | 492 | #endif |
513 | 493 | ||
514 | #ifdef CONFIG_PM_RUNTIME | 494 | #ifdef CONFIG_PM_RUNTIME |
515 | static int mcfqspi_runtime_suspend(struct device *dev) | 495 | static int mcfqspi_runtime_suspend(struct device *dev) |
516 | { | 496 | { |
517 | struct mcfqspi *mcfqspi = dev_get_drvdata(dev); | 497 | struct spi_master *master = dev_get_drvdata(dev); |
498 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | ||
518 | 499 | ||
519 | clk_disable(mcfqspi->clk); | 500 | clk_disable(mcfqspi->clk); |
520 | 501 | ||
@@ -523,7 +504,8 @@ static int mcfqspi_runtime_suspend(struct device *dev) | |||
523 | 504 | ||
524 | static int mcfqspi_runtime_resume(struct device *dev) | 505 | static int mcfqspi_runtime_resume(struct device *dev) |
525 | { | 506 | { |
526 | struct mcfqspi *mcfqspi = dev_get_drvdata(dev); | 507 | struct spi_master *master = dev_get_drvdata(dev); |
508 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | ||
527 | 509 | ||
528 | clk_enable(mcfqspi->clk); | 510 | clk_enable(mcfqspi->clk); |
529 | 511 | ||
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 5e7389faa2a0..50f750989258 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c | |||
@@ -802,8 +802,7 @@ static int spi_davinci_get_pdata(struct platform_device *pdev, | |||
802 | pdata = &dspi->pdata; | 802 | pdata = &dspi->pdata; |
803 | 803 | ||
804 | pdata->version = SPI_VERSION_1; | 804 | pdata->version = SPI_VERSION_1; |
805 | match = of_match_device(of_match_ptr(davinci_spi_of_match), | 805 | match = of_match_device(davinci_spi_of_match, &pdev->dev); |
806 | &pdev->dev); | ||
807 | if (!match) | 806 | if (!match) |
808 | return -ENODEV; | 807 | return -ENODEV; |
809 | 808 | ||
@@ -824,7 +823,6 @@ static int spi_davinci_get_pdata(struct platform_device *pdev, | |||
824 | return 0; | 823 | return 0; |
825 | } | 824 | } |
826 | #else | 825 | #else |
827 | #define davinci_spi_of_match NULL | ||
828 | static struct davinci_spi_platform_data | 826 | static struct davinci_spi_platform_data |
829 | *spi_davinci_get_pdata(struct platform_device *pdev, | 827 | *spi_davinci_get_pdata(struct platform_device *pdev, |
830 | struct davinci_spi *dspi) | 828 | struct davinci_spi *dspi) |
@@ -864,10 +862,6 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
864 | platform_set_drvdata(pdev, master); | 862 | platform_set_drvdata(pdev, master); |
865 | 863 | ||
866 | dspi = spi_master_get_devdata(master); | 864 | dspi = spi_master_get_devdata(master); |
867 | if (dspi == NULL) { | ||
868 | ret = -ENOENT; | ||
869 | goto free_master; | ||
870 | } | ||
871 | 865 | ||
872 | if (dev_get_platdata(&pdev->dev)) { | 866 | if (dev_get_platdata(&pdev->dev)) { |
873 | pdata = dev_get_platdata(&pdev->dev); | 867 | pdata = dev_get_platdata(&pdev->dev); |
@@ -908,10 +902,6 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
908 | goto free_master; | 902 | goto free_master; |
909 | 903 | ||
910 | dspi->bitbang.master = master; | 904 | dspi->bitbang.master = master; |
911 | if (dspi->bitbang.master == NULL) { | ||
912 | ret = -ENODEV; | ||
913 | goto free_master; | ||
914 | } | ||
915 | 905 | ||
916 | dspi->clk = devm_clk_get(&pdev->dev, NULL); | 906 | dspi->clk = devm_clk_get(&pdev->dev, NULL); |
917 | if (IS_ERR(dspi->clk)) { | 907 | if (IS_ERR(dspi->clk)) { |
@@ -1040,7 +1030,7 @@ static struct platform_driver davinci_spi_driver = { | |||
1040 | .driver = { | 1030 | .driver = { |
1041 | .name = "spi_davinci", | 1031 | .name = "spi_davinci", |
1042 | .owner = THIS_MODULE, | 1032 | .owner = THIS_MODULE, |
1043 | .of_match_table = davinci_spi_of_match, | 1033 | .of_match_table = of_match_ptr(davinci_spi_of_match), |
1044 | }, | 1034 | }, |
1045 | .probe = davinci_spi_probe, | 1035 | .probe = davinci_spi_probe, |
1046 | .remove = davinci_spi_remove, | 1036 | .remove = davinci_spi_remove, |
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 9af56cdf1540..1492f5ee9aaa 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c | |||
@@ -66,7 +66,7 @@ static int dw_spi_mmio_probe(struct platform_device *pdev) | |||
66 | if (ret) | 66 | if (ret) |
67 | return ret; | 67 | return ret; |
68 | 68 | ||
69 | dws->bus_num = 0; | 69 | dws->bus_num = pdev->id; |
70 | dws->num_cs = 4; | 70 | dws->num_cs = 4; |
71 | dws->max_freq = clk_get_rate(dwsmmio->clk); | 71 | dws->max_freq = clk_get_rate(dwsmmio->clk); |
72 | 72 | ||
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index bf98d63d92b3..712ac5629cd4 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c | |||
@@ -276,8 +276,7 @@ static void giveback(struct dw_spi *dws) | |||
276 | queue_work(dws->workqueue, &dws->pump_messages); | 276 | queue_work(dws->workqueue, &dws->pump_messages); |
277 | spin_unlock_irqrestore(&dws->lock, flags); | 277 | spin_unlock_irqrestore(&dws->lock, flags); |
278 | 278 | ||
279 | last_transfer = list_entry(msg->transfers.prev, | 279 | last_transfer = list_last_entry(&msg->transfers, struct spi_transfer, |
280 | struct spi_transfer, | ||
281 | transfer_list); | 280 | transfer_list); |
282 | 281 | ||
283 | if (!last_transfer->cs_change && dws->cs_control) | 282 | if (!last_transfer->cs_change && dws->cs_control) |
@@ -439,12 +438,6 @@ static void pump_transfers(unsigned long data) | |||
439 | 438 | ||
440 | if (transfer->speed_hz != speed) { | 439 | if (transfer->speed_hz != speed) { |
441 | speed = transfer->speed_hz; | 440 | speed = transfer->speed_hz; |
442 | if (speed > dws->max_freq) { | ||
443 | printk(KERN_ERR "MRST SPI0: unsupported" | ||
444 | "freq: %dHz\n", speed); | ||
445 | message->status = -EIO; | ||
446 | goto early_exit; | ||
447 | } | ||
448 | 441 | ||
449 | /* clk_div doesn't support odd number */ | 442 | /* clk_div doesn't support odd number */ |
450 | clk_div = dws->max_freq / speed; | 443 | clk_div = dws->max_freq / speed; |
@@ -671,12 +664,6 @@ static int dw_spi_setup(struct spi_device *spi) | |||
671 | return 0; | 664 | return 0; |
672 | } | 665 | } |
673 | 666 | ||
674 | static void dw_spi_cleanup(struct spi_device *spi) | ||
675 | { | ||
676 | struct chip_data *chip = spi_get_ctldata(spi); | ||
677 | kfree(chip); | ||
678 | } | ||
679 | |||
680 | static int init_queue(struct dw_spi *dws) | 667 | static int init_queue(struct dw_spi *dws) |
681 | { | 668 | { |
682 | INIT_LIST_HEAD(&dws->queue); | 669 | INIT_LIST_HEAD(&dws->queue); |
@@ -806,9 +793,9 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) | |||
806 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); | 793 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); |
807 | master->bus_num = dws->bus_num; | 794 | master->bus_num = dws->bus_num; |
808 | master->num_chipselect = dws->num_cs; | 795 | master->num_chipselect = dws->num_cs; |
809 | master->cleanup = dw_spi_cleanup; | ||
810 | master->setup = dw_spi_setup; | 796 | master->setup = dw_spi_setup; |
811 | master->transfer = dw_spi_transfer; | 797 | master->transfer = dw_spi_transfer; |
798 | master->max_speed_hz = dws->max_freq; | ||
812 | 799 | ||
813 | /* Basic HW init */ | 800 | /* Basic HW init */ |
814 | spi_hw_init(dws); | 801 | spi_hw_init(dws); |
diff --git a/drivers/spi/spi-efm32.c b/drivers/spi/spi-efm32.c index d4d3cc534792..be44a3eeb5e8 100644 --- a/drivers/spi/spi-efm32.c +++ b/drivers/spi/spi-efm32.c | |||
@@ -198,7 +198,7 @@ static int efm32_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) | |||
198 | 198 | ||
199 | efm32_spi_filltx(ddata); | 199 | efm32_spi_filltx(ddata); |
200 | 200 | ||
201 | init_completion(&ddata->done); | 201 | reinit_completion(&ddata->done); |
202 | 202 | ||
203 | efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN); | 203 | efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN); |
204 | 204 | ||
@@ -287,17 +287,17 @@ static u32 efm32_spi_get_configured_location(struct efm32_spi_ddata *ddata) | |||
287 | return (reg & REG_ROUTE_LOCATION__MASK) >> __ffs(REG_ROUTE_LOCATION__MASK); | 287 | return (reg & REG_ROUTE_LOCATION__MASK) >> __ffs(REG_ROUTE_LOCATION__MASK); |
288 | } | 288 | } |
289 | 289 | ||
290 | static int efm32_spi_probe_dt(struct platform_device *pdev, | 290 | static void efm32_spi_probe_dt(struct platform_device *pdev, |
291 | struct spi_master *master, struct efm32_spi_ddata *ddata) | 291 | struct spi_master *master, struct efm32_spi_ddata *ddata) |
292 | { | 292 | { |
293 | struct device_node *np = pdev->dev.of_node; | 293 | struct device_node *np = pdev->dev.of_node; |
294 | u32 location; | 294 | u32 location; |
295 | int ret; | 295 | int ret; |
296 | 296 | ||
297 | if (!np) | 297 | ret = of_property_read_u32(np, "efm32,location", &location); |
298 | return 1; | 298 | if (ret) |
299 | 299 | /* fall back to old and (wrongly) generic property "location" */ | |
300 | ret = of_property_read_u32(np, "location", &location); | 300 | ret = of_property_read_u32(np, "location", &location); |
301 | if (!ret) { | 301 | if (!ret) { |
302 | dev_dbg(&pdev->dev, "using location %u\n", location); | 302 | dev_dbg(&pdev->dev, "using location %u\n", location); |
303 | } else { | 303 | } else { |
@@ -308,11 +308,6 @@ static int efm32_spi_probe_dt(struct platform_device *pdev, | |||
308 | } | 308 | } |
309 | 309 | ||
310 | ddata->pdata.location = location; | 310 | ddata->pdata.location = location; |
311 | |||
312 | /* spi core takes care about the bus number using an alias */ | ||
313 | master->bus_num = -1; | ||
314 | |||
315 | return 0; | ||
316 | } | 311 | } |
317 | 312 | ||
318 | static int efm32_spi_probe(struct platform_device *pdev) | 313 | static int efm32_spi_probe(struct platform_device *pdev) |
@@ -322,9 +317,14 @@ static int efm32_spi_probe(struct platform_device *pdev) | |||
322 | int ret; | 317 | int ret; |
323 | struct spi_master *master; | 318 | struct spi_master *master; |
324 | struct device_node *np = pdev->dev.of_node; | 319 | struct device_node *np = pdev->dev.of_node; |
325 | unsigned int num_cs, i; | 320 | int num_cs, i; |
321 | |||
322 | if (!np) | ||
323 | return -EINVAL; | ||
326 | 324 | ||
327 | num_cs = of_gpio_named_count(np, "cs-gpios"); | 325 | num_cs = of_gpio_named_count(np, "cs-gpios"); |
326 | if (num_cs < 0) | ||
327 | return num_cs; | ||
328 | 328 | ||
329 | master = spi_alloc_master(&pdev->dev, | 329 | master = spi_alloc_master(&pdev->dev, |
330 | sizeof(*ddata) + num_cs * sizeof(unsigned)); | 330 | sizeof(*ddata) + num_cs * sizeof(unsigned)); |
@@ -349,6 +349,7 @@ static int efm32_spi_probe(struct platform_device *pdev) | |||
349 | ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs; | 349 | ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs; |
350 | 350 | ||
351 | spin_lock_init(&ddata->lock); | 351 | spin_lock_init(&ddata->lock); |
352 | init_completion(&ddata->done); | ||
352 | 353 | ||
353 | ddata->clk = devm_clk_get(&pdev->dev, NULL); | 354 | ddata->clk = devm_clk_get(&pdev->dev, NULL); |
354 | if (IS_ERR(ddata->clk)) { | 355 | if (IS_ERR(ddata->clk)) { |
@@ -415,23 +416,7 @@ static int efm32_spi_probe(struct platform_device *pdev) | |||
415 | goto err; | 416 | goto err; |
416 | } | 417 | } |
417 | 418 | ||
418 | ret = efm32_spi_probe_dt(pdev, master, ddata); | 419 | efm32_spi_probe_dt(pdev, master, ddata); |
419 | if (ret > 0) { | ||
420 | /* not created by device tree */ | ||
421 | const struct efm32_spi_pdata *pdata = | ||
422 | dev_get_platdata(&pdev->dev); | ||
423 | |||
424 | if (pdata) | ||
425 | ddata->pdata = *pdata; | ||
426 | else | ||
427 | ddata->pdata.location = | ||
428 | efm32_spi_get_configured_location(ddata); | ||
429 | |||
430 | master->bus_num = pdev->id; | ||
431 | |||
432 | } else if (ret < 0) { | ||
433 | goto err_disable_clk; | ||
434 | } | ||
435 | 420 | ||
436 | efm32_spi_write32(ddata, 0, REG_IEN); | 421 | efm32_spi_write32(ddata, 0, REG_IEN); |
437 | efm32_spi_write32(ddata, REG_ROUTE_TXPEN | REG_ROUTE_RXPEN | | 422 | efm32_spi_write32(ddata, REG_ROUTE_TXPEN | REG_ROUTE_RXPEN | |
@@ -487,6 +472,9 @@ static int efm32_spi_remove(struct platform_device *pdev) | |||
487 | 472 | ||
488 | static const struct of_device_id efm32_spi_dt_ids[] = { | 473 | static const struct of_device_id efm32_spi_dt_ids[] = { |
489 | { | 474 | { |
475 | .compatible = "energymicro,efm32-spi", | ||
476 | }, { | ||
477 | /* doesn't follow the "vendor,device" scheme, don't use */ | ||
490 | .compatible = "efm32,spi", | 478 | .compatible = "efm32,spi", |
491 | }, { | 479 | }, { |
492 | /* sentinel */ | 480 | /* sentinel */ |
diff --git a/drivers/spi/spi-ep93xx.c b/drivers/spi/spi-ep93xx.c index 1bfaed6e4073..2f675d32df0e 100644 --- a/drivers/spi/spi-ep93xx.c +++ b/drivers/spi/spi-ep93xx.c | |||
@@ -73,8 +73,6 @@ | |||
73 | * @clk: clock for the controller | 73 | * @clk: clock for the controller |
74 | * @regs_base: pointer to ioremap()'d registers | 74 | * @regs_base: pointer to ioremap()'d registers |
75 | * @sspdr_phys: physical address of the SSPDR register | 75 | * @sspdr_phys: physical address of the SSPDR register |
76 | * @min_rate: minimum clock rate (in Hz) supported by the controller | ||
77 | * @max_rate: maximum clock rate (in Hz) supported by the controller | ||
78 | * @wait: wait here until given transfer is completed | 76 | * @wait: wait here until given transfer is completed |
79 | * @current_msg: message that is currently processed (or %NULL if none) | 77 | * @current_msg: message that is currently processed (or %NULL if none) |
80 | * @tx: current byte in transfer to transmit | 78 | * @tx: current byte in transfer to transmit |
@@ -95,8 +93,6 @@ struct ep93xx_spi { | |||
95 | struct clk *clk; | 93 | struct clk *clk; |
96 | void __iomem *regs_base; | 94 | void __iomem *regs_base; |
97 | unsigned long sspdr_phys; | 95 | unsigned long sspdr_phys; |
98 | unsigned long min_rate; | ||
99 | unsigned long max_rate; | ||
100 | struct completion wait; | 96 | struct completion wait; |
101 | struct spi_message *current_msg; | 97 | struct spi_message *current_msg; |
102 | size_t tx; | 98 | size_t tx; |
@@ -199,9 +195,9 @@ static void ep93xx_spi_disable_interrupts(const struct ep93xx_spi *espi) | |||
199 | * @div_scr: pointer to return the scr divider | 195 | * @div_scr: pointer to return the scr divider |
200 | */ | 196 | */ |
201 | static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi, | 197 | static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi, |
202 | unsigned long rate, | 198 | u32 rate, u8 *div_cpsr, u8 *div_scr) |
203 | u8 *div_cpsr, u8 *div_scr) | ||
204 | { | 199 | { |
200 | struct spi_master *master = platform_get_drvdata(espi->pdev); | ||
205 | unsigned long spi_clk_rate = clk_get_rate(espi->clk); | 201 | unsigned long spi_clk_rate = clk_get_rate(espi->clk); |
206 | int cpsr, scr; | 202 | int cpsr, scr; |
207 | 203 | ||
@@ -210,7 +206,7 @@ static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi, | |||
210 | * controller. Note that minimum value is already checked in | 206 | * controller. Note that minimum value is already checked in |
211 | * ep93xx_spi_transfer_one_message(). | 207 | * ep93xx_spi_transfer_one_message(). |
212 | */ | 208 | */ |
213 | rate = clamp(rate, espi->min_rate, espi->max_rate); | 209 | rate = clamp(rate, master->min_speed_hz, master->max_speed_hz); |
214 | 210 | ||
215 | /* | 211 | /* |
216 | * Calculate divisors so that we can get speed according the | 212 | * Calculate divisors so that we can get speed according the |
@@ -735,13 +731,6 @@ static int ep93xx_spi_transfer_one_message(struct spi_master *master, | |||
735 | struct spi_message *msg) | 731 | struct spi_message *msg) |
736 | { | 732 | { |
737 | struct ep93xx_spi *espi = spi_master_get_devdata(master); | 733 | struct ep93xx_spi *espi = spi_master_get_devdata(master); |
738 | struct spi_transfer *t; | ||
739 | |||
740 | /* first validate each transfer */ | ||
741 | list_for_each_entry(t, &msg->transfers, transfer_list) { | ||
742 | if (t->speed_hz < espi->min_rate) | ||
743 | return -EINVAL; | ||
744 | } | ||
745 | 734 | ||
746 | msg->state = NULL; | 735 | msg->state = NULL; |
747 | msg->status = 0; | 736 | msg->status = 0; |
@@ -917,8 +906,8 @@ static int ep93xx_spi_probe(struct platform_device *pdev) | |||
917 | * Calculate maximum and minimum supported clock rates | 906 | * Calculate maximum and minimum supported clock rates |
918 | * for the controller. | 907 | * for the controller. |
919 | */ | 908 | */ |
920 | espi->max_rate = clk_get_rate(espi->clk) / 2; | 909 | master->max_speed_hz = clk_get_rate(espi->clk) / 2; |
921 | espi->min_rate = clk_get_rate(espi->clk) / (254 * 256); | 910 | master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256); |
922 | espi->pdev = pdev; | 911 | espi->pdev = pdev; |
923 | 912 | ||
924 | espi->sspdr_phys = res->start + SSPDR; | 913 | espi->sspdr_phys = res->start + SSPDR; |
diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c index dd5bd468e962..09965f069a1c 100644 --- a/drivers/spi/spi-falcon.c +++ b/drivers/spi/spi-falcon.c | |||
@@ -312,9 +312,6 @@ static int falcon_sflash_setup(struct spi_device *spi) | |||
312 | unsigned int i; | 312 | unsigned int i; |
313 | unsigned long flags; | 313 | unsigned long flags; |
314 | 314 | ||
315 | if (spi->chip_select > 0) | ||
316 | return -ENODEV; | ||
317 | |||
318 | spin_lock_irqsave(&ebu_lock, flags); | 315 | spin_lock_irqsave(&ebu_lock, flags); |
319 | 316 | ||
320 | if (spi->max_speed_hz >= CLOCK_100M) { | 317 | if (spi->max_speed_hz >= CLOCK_100M) { |
@@ -422,9 +419,7 @@ static int falcon_sflash_probe(struct platform_device *pdev) | |||
422 | priv->master = master; | 419 | priv->master = master; |
423 | 420 | ||
424 | master->mode_bits = SPI_MODE_3; | 421 | master->mode_bits = SPI_MODE_3; |
425 | master->num_chipselect = 1; | ||
426 | master->flags = SPI_MASTER_HALF_DUPLEX; | 422 | master->flags = SPI_MASTER_HALF_DUPLEX; |
427 | master->bus_num = -1; | ||
428 | master->setup = falcon_sflash_setup; | 423 | master->setup = falcon_sflash_setup; |
429 | master->prepare_transfer_hardware = falcon_sflash_prepare_xfer; | 424 | master->prepare_transfer_hardware = falcon_sflash_prepare_xfer; |
430 | master->transfer_one_message = falcon_sflash_xfer_one; | 425 | master->transfer_one_message = falcon_sflash_xfer_one; |
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index ec79f726672a..d565eeee3bd8 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/errno.h> | 19 | #include <linux/errno.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/regmap.h> | ||
21 | #include <linux/sched.h> | 22 | #include <linux/sched.h> |
22 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
23 | #include <linux/io.h> | 24 | #include <linux/io.h> |
@@ -108,11 +109,11 @@ struct fsl_dspi { | |||
108 | struct spi_bitbang bitbang; | 109 | struct spi_bitbang bitbang; |
109 | struct platform_device *pdev; | 110 | struct platform_device *pdev; |
110 | 111 | ||
111 | void __iomem *base; | 112 | struct regmap *regmap; |
112 | int irq; | 113 | int irq; |
113 | struct clk *clk; | 114 | struct clk *clk; |
114 | 115 | ||
115 | struct spi_transfer *cur_transfer; | 116 | struct spi_transfer *cur_transfer; |
116 | struct chip_data *cur_chip; | 117 | struct chip_data *cur_chip; |
117 | size_t len; | 118 | size_t len; |
118 | void *tx; | 119 | void *tx; |
@@ -123,24 +124,17 @@ struct fsl_dspi { | |||
123 | u8 cs; | 124 | u8 cs; |
124 | u16 void_write_data; | 125 | u16 void_write_data; |
125 | 126 | ||
126 | wait_queue_head_t waitq; | 127 | wait_queue_head_t waitq; |
127 | u32 waitflags; | 128 | u32 waitflags; |
128 | }; | 129 | }; |
129 | 130 | ||
130 | static inline int is_double_byte_mode(struct fsl_dspi *dspi) | 131 | static inline int is_double_byte_mode(struct fsl_dspi *dspi) |
131 | { | 132 | { |
132 | return ((readl(dspi->base + SPI_CTAR(dspi->cs)) & SPI_FRAME_BITS_MASK) | 133 | unsigned int val; |
133 | == SPI_FRAME_BITS(8)) ? 0 : 1; | ||
134 | } | ||
135 | 134 | ||
136 | static void set_bit_mode(struct fsl_dspi *dspi, unsigned char bits) | 135 | regmap_read(dspi->regmap, SPI_CTAR(dspi->cs), &val); |
137 | { | ||
138 | u32 temp; | ||
139 | 136 | ||
140 | temp = readl(dspi->base + SPI_CTAR(dspi->cs)); | 137 | return ((val & SPI_FRAME_BITS_MASK) == SPI_FRAME_BITS(8)) ? 0 : 1; |
141 | temp &= ~SPI_FRAME_BITS_MASK; | ||
142 | temp |= SPI_FRAME_BITS(bits); | ||
143 | writel(temp, dspi->base + SPI_CTAR(dspi->cs)); | ||
144 | } | 138 | } |
145 | 139 | ||
146 | static void hz_to_spi_baud(char *pbr, char *br, int speed_hz, | 140 | static void hz_to_spi_baud(char *pbr, char *br, int speed_hz, |
@@ -188,7 +182,8 @@ static int dspi_transfer_write(struct fsl_dspi *dspi) | |||
188 | */ | 182 | */ |
189 | if (tx_word && (dspi->len == 1)) { | 183 | if (tx_word && (dspi->len == 1)) { |
190 | dspi->dataflags |= TRAN_STATE_WORD_ODD_NUM; | 184 | dspi->dataflags |= TRAN_STATE_WORD_ODD_NUM; |
191 | set_bit_mode(dspi, 8); | 185 | regmap_update_bits(dspi->regmap, SPI_CTAR(dspi->cs), |
186 | SPI_FRAME_BITS_MASK, SPI_FRAME_BITS(8)); | ||
192 | tx_word = 0; | 187 | tx_word = 0; |
193 | } | 188 | } |
194 | 189 | ||
@@ -238,7 +233,8 @@ static int dspi_transfer_write(struct fsl_dspi *dspi) | |||
238 | dspi_pushr |= SPI_PUSHR_CTCNT; /* clear counter */ | 233 | dspi_pushr |= SPI_PUSHR_CTCNT; /* clear counter */ |
239 | } | 234 | } |
240 | 235 | ||
241 | writel(dspi_pushr, dspi->base + SPI_PUSHR); | 236 | regmap_write(dspi->regmap, SPI_PUSHR, dspi_pushr); |
237 | |||
242 | tx_count++; | 238 | tx_count++; |
243 | } | 239 | } |
244 | 240 | ||
@@ -253,17 +249,23 @@ static int dspi_transfer_read(struct fsl_dspi *dspi) | |||
253 | while ((dspi->rx < dspi->rx_end) | 249 | while ((dspi->rx < dspi->rx_end) |
254 | && (rx_count < DSPI_FIFO_SIZE)) { | 250 | && (rx_count < DSPI_FIFO_SIZE)) { |
255 | if (rx_word) { | 251 | if (rx_word) { |
252 | unsigned int val; | ||
253 | |||
256 | if ((dspi->rx_end - dspi->rx) == 1) | 254 | if ((dspi->rx_end - dspi->rx) == 1) |
257 | break; | 255 | break; |
258 | 256 | ||
259 | d = SPI_POPR_RXDATA(readl(dspi->base + SPI_POPR)); | 257 | regmap_read(dspi->regmap, SPI_POPR, &val); |
258 | d = SPI_POPR_RXDATA(val); | ||
260 | 259 | ||
261 | if (!(dspi->dataflags & TRAN_STATE_RX_VOID)) | 260 | if (!(dspi->dataflags & TRAN_STATE_RX_VOID)) |
262 | *(u16 *)dspi->rx = d; | 261 | *(u16 *)dspi->rx = d; |
263 | dspi->rx += 2; | 262 | dspi->rx += 2; |
264 | 263 | ||
265 | } else { | 264 | } else { |
266 | d = SPI_POPR_RXDATA(readl(dspi->base + SPI_POPR)); | 265 | unsigned int val; |
266 | |||
267 | regmap_read(dspi->regmap, SPI_POPR, &val); | ||
268 | d = SPI_POPR_RXDATA(val); | ||
267 | if (!(dspi->dataflags & TRAN_STATE_RX_VOID)) | 269 | if (!(dspi->dataflags & TRAN_STATE_RX_VOID)) |
268 | *(u8 *)dspi->rx = d; | 270 | *(u8 *)dspi->rx = d; |
269 | dspi->rx++; | 271 | dspi->rx++; |
@@ -295,13 +297,13 @@ static int dspi_txrx_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
295 | if (!dspi->tx) | 297 | if (!dspi->tx) |
296 | dspi->dataflags |= TRAN_STATE_TX_VOID; | 298 | dspi->dataflags |= TRAN_STATE_TX_VOID; |
297 | 299 | ||
298 | writel(dspi->cur_chip->mcr_val, dspi->base + SPI_MCR); | 300 | regmap_write(dspi->regmap, SPI_MCR, dspi->cur_chip->mcr_val); |
299 | writel(dspi->cur_chip->ctar_val, dspi->base + SPI_CTAR(dspi->cs)); | 301 | regmap_write(dspi->regmap, SPI_CTAR(dspi->cs), dspi->cur_chip->ctar_val); |
300 | writel(SPI_RSER_EOQFE, dspi->base + SPI_RSER); | 302 | regmap_write(dspi->regmap, SPI_RSER, SPI_RSER_EOQFE); |
301 | 303 | ||
302 | if (t->speed_hz) | 304 | if (t->speed_hz) |
303 | writel(dspi->cur_chip->ctar_val, | 305 | regmap_write(dspi->regmap, SPI_CTAR(dspi->cs), |
304 | dspi->base + SPI_CTAR(dspi->cs)); | 306 | dspi->cur_chip->ctar_val); |
305 | 307 | ||
306 | dspi_transfer_write(dspi); | 308 | dspi_transfer_write(dspi); |
307 | 309 | ||
@@ -315,7 +317,9 @@ static int dspi_txrx_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
315 | static void dspi_chipselect(struct spi_device *spi, int value) | 317 | static void dspi_chipselect(struct spi_device *spi, int value) |
316 | { | 318 | { |
317 | struct fsl_dspi *dspi = spi_master_get_devdata(spi->master); | 319 | struct fsl_dspi *dspi = spi_master_get_devdata(spi->master); |
318 | u32 pushr = readl(dspi->base + SPI_PUSHR); | 320 | unsigned int pushr; |
321 | |||
322 | regmap_read(dspi->regmap, SPI_PUSHR, &pushr); | ||
319 | 323 | ||
320 | switch (value) { | 324 | switch (value) { |
321 | case BITBANG_CS_ACTIVE: | 325 | case BITBANG_CS_ACTIVE: |
@@ -326,7 +330,7 @@ static void dspi_chipselect(struct spi_device *spi, int value) | |||
326 | break; | 330 | break; |
327 | } | 331 | } |
328 | 332 | ||
329 | writel(pushr, dspi->base + SPI_PUSHR); | 333 | regmap_write(dspi->regmap, SPI_PUSHR, pushr); |
330 | } | 334 | } |
331 | 335 | ||
332 | static int dspi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | 336 | static int dspi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) |
@@ -338,7 +342,8 @@ static int dspi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
338 | /* Only alloc on first setup */ | 342 | /* Only alloc on first setup */ |
339 | chip = spi_get_ctldata(spi); | 343 | chip = spi_get_ctldata(spi); |
340 | if (chip == NULL) { | 344 | if (chip == NULL) { |
341 | chip = kcalloc(1, sizeof(struct chip_data), GFP_KERNEL); | 345 | chip = devm_kzalloc(&spi->dev, sizeof(struct chip_data), |
346 | GFP_KERNEL); | ||
342 | if (!chip) | 347 | if (!chip) |
343 | return -ENOMEM; | 348 | return -ENOMEM; |
344 | } | 349 | } |
@@ -349,7 +354,6 @@ static int dspi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
349 | fmsz = spi->bits_per_word - 1; | 354 | fmsz = spi->bits_per_word - 1; |
350 | } else { | 355 | } else { |
351 | pr_err("Invalid wordsize\n"); | 356 | pr_err("Invalid wordsize\n"); |
352 | kfree(chip); | ||
353 | return -ENODEV; | 357 | return -ENODEV; |
354 | } | 358 | } |
355 | 359 | ||
@@ -382,13 +386,15 @@ static irqreturn_t dspi_interrupt(int irq, void *dev_id) | |||
382 | { | 386 | { |
383 | struct fsl_dspi *dspi = (struct fsl_dspi *)dev_id; | 387 | struct fsl_dspi *dspi = (struct fsl_dspi *)dev_id; |
384 | 388 | ||
385 | writel(SPI_SR_EOQF, dspi->base + SPI_SR); | 389 | regmap_write(dspi->regmap, SPI_SR, SPI_SR_EOQF); |
386 | 390 | ||
387 | dspi_transfer_read(dspi); | 391 | dspi_transfer_read(dspi); |
388 | 392 | ||
389 | if (!dspi->len) { | 393 | if (!dspi->len) { |
390 | if (dspi->dataflags & TRAN_STATE_WORD_ODD_NUM) | 394 | if (dspi->dataflags & TRAN_STATE_WORD_ODD_NUM) |
391 | set_bit_mode(dspi, 16); | 395 | regmap_update_bits(dspi->regmap, SPI_CTAR(dspi->cs), |
396 | SPI_FRAME_BITS_MASK, SPI_FRAME_BITS(16)); | ||
397 | |||
392 | dspi->waitflags = 1; | 398 | dspi->waitflags = 1; |
393 | wake_up_interruptible(&dspi->waitq); | 399 | wake_up_interruptible(&dspi->waitq); |
394 | } else { | 400 | } else { |
@@ -420,7 +426,6 @@ static int dspi_suspend(struct device *dev) | |||
420 | 426 | ||
421 | static int dspi_resume(struct device *dev) | 427 | static int dspi_resume(struct device *dev) |
422 | { | 428 | { |
423 | |||
424 | struct spi_master *master = dev_get_drvdata(dev); | 429 | struct spi_master *master = dev_get_drvdata(dev); |
425 | struct fsl_dspi *dspi = spi_master_get_devdata(master); | 430 | struct fsl_dspi *dspi = spi_master_get_devdata(master); |
426 | 431 | ||
@@ -431,8 +436,13 @@ static int dspi_resume(struct device *dev) | |||
431 | } | 436 | } |
432 | #endif /* CONFIG_PM_SLEEP */ | 437 | #endif /* CONFIG_PM_SLEEP */ |
433 | 438 | ||
434 | static const struct dev_pm_ops dspi_pm = { | 439 | static SIMPLE_DEV_PM_OPS(dspi_pm, dspi_suspend, dspi_resume); |
435 | SET_SYSTEM_SLEEP_PM_OPS(dspi_suspend, dspi_resume) | 440 | |
441 | static struct regmap_config dspi_regmap_config = { | ||
442 | .reg_bits = 32, | ||
443 | .val_bits = 32, | ||
444 | .reg_stride = 4, | ||
445 | .max_register = 0x88, | ||
436 | }; | 446 | }; |
437 | 447 | ||
438 | static int dspi_probe(struct platform_device *pdev) | 448 | static int dspi_probe(struct platform_device *pdev) |
@@ -441,6 +451,7 @@ static int dspi_probe(struct platform_device *pdev) | |||
441 | struct spi_master *master; | 451 | struct spi_master *master; |
442 | struct fsl_dspi *dspi; | 452 | struct fsl_dspi *dspi; |
443 | struct resource *res; | 453 | struct resource *res; |
454 | void __iomem *base; | ||
444 | int ret = 0, cs_num, bus_num; | 455 | int ret = 0, cs_num, bus_num; |
445 | 456 | ||
446 | master = spi_alloc_master(&pdev->dev, sizeof(struct fsl_dspi)); | 457 | master = spi_alloc_master(&pdev->dev, sizeof(struct fsl_dspi)); |
@@ -475,12 +486,24 @@ static int dspi_probe(struct platform_device *pdev) | |||
475 | master->bus_num = bus_num; | 486 | master->bus_num = bus_num; |
476 | 487 | ||
477 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 488 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
478 | dspi->base = devm_ioremap_resource(&pdev->dev, res); | 489 | base = devm_ioremap_resource(&pdev->dev, res); |
479 | if (IS_ERR(dspi->base)) { | 490 | if (IS_ERR(base)) { |
480 | ret = PTR_ERR(dspi->base); | 491 | ret = PTR_ERR(base); |
481 | goto out_master_put; | 492 | goto out_master_put; |
482 | } | 493 | } |
483 | 494 | ||
495 | dspi_regmap_config.lock_arg = dspi; | ||
496 | dspi_regmap_config.val_format_endian = | ||
497 | of_property_read_bool(np, "big-endian") | ||
498 | ? REGMAP_ENDIAN_BIG : REGMAP_ENDIAN_DEFAULT; | ||
499 | dspi->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "dspi", base, | ||
500 | &dspi_regmap_config); | ||
501 | if (IS_ERR(dspi->regmap)) { | ||
502 | dev_err(&pdev->dev, "failed to init regmap: %ld\n", | ||
503 | PTR_ERR(dspi->regmap)); | ||
504 | return PTR_ERR(dspi->regmap); | ||
505 | } | ||
506 | |||
484 | dspi->irq = platform_get_irq(pdev, 0); | 507 | dspi->irq = platform_get_irq(pdev, 0); |
485 | if (dspi->irq < 0) { | 508 | if (dspi->irq < 0) { |
486 | dev_err(&pdev->dev, "can't get platform irq\n"); | 509 | dev_err(&pdev->dev, "can't get platform irq\n"); |
@@ -504,7 +527,7 @@ static int dspi_probe(struct platform_device *pdev) | |||
504 | clk_prepare_enable(dspi->clk); | 527 | clk_prepare_enable(dspi->clk); |
505 | 528 | ||
506 | init_waitqueue_head(&dspi->waitq); | 529 | init_waitqueue_head(&dspi->waitq); |
507 | platform_set_drvdata(pdev, dspi); | 530 | platform_set_drvdata(pdev, master); |
508 | 531 | ||
509 | ret = spi_bitbang_start(&dspi->bitbang); | 532 | ret = spi_bitbang_start(&dspi->bitbang); |
510 | if (ret != 0) { | 533 | if (ret != 0) { |
@@ -525,7 +548,8 @@ out_master_put: | |||
525 | 548 | ||
526 | static int dspi_remove(struct platform_device *pdev) | 549 | static int dspi_remove(struct platform_device *pdev) |
527 | { | 550 | { |
528 | struct fsl_dspi *dspi = platform_get_drvdata(pdev); | 551 | struct spi_master *master = platform_get_drvdata(pdev); |
552 | struct fsl_dspi *dspi = spi_master_get_devdata(master); | ||
529 | 553 | ||
530 | /* Disconnect from the SPI framework */ | 554 | /* Disconnect from the SPI framework */ |
531 | spi_bitbang_stop(&dspi->bitbang); | 555 | spi_bitbang_stop(&dspi->bitbang); |
diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi-fsl-espi.c index 428dc7a6b62e..6fb2b75df821 100644 --- a/drivers/spi/spi-fsl-espi.c +++ b/drivers/spi/spi-fsl-espi.c | |||
@@ -219,13 +219,8 @@ static int fsl_espi_bufs(struct spi_device *spi, struct spi_transfer *t) | |||
219 | struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master); | 219 | struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master); |
220 | struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base; | 220 | struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base; |
221 | unsigned int len = t->len; | 221 | unsigned int len = t->len; |
222 | u8 bits_per_word; | ||
223 | int ret; | 222 | int ret; |
224 | 223 | ||
225 | bits_per_word = spi->bits_per_word; | ||
226 | if (t->bits_per_word) | ||
227 | bits_per_word = t->bits_per_word; | ||
228 | |||
229 | mpc8xxx_spi->len = t->len; | 224 | mpc8xxx_spi->len = t->len; |
230 | len = roundup(len, 4) / 4; | 225 | len = roundup(len, 4) / 4; |
231 | 226 | ||
diff --git a/drivers/spi/spi-fsl-lib.c b/drivers/spi/spi-fsl-lib.c index 0b75f26158ab..e5d45fca3551 100644 --- a/drivers/spi/spi-fsl-lib.c +++ b/drivers/spi/spi-fsl-lib.c | |||
@@ -200,7 +200,7 @@ int of_mpc8xxx_spi_probe(struct platform_device *ofdev) | |||
200 | const void *prop; | 200 | const void *prop; |
201 | int ret = -ENOMEM; | 201 | int ret = -ENOMEM; |
202 | 202 | ||
203 | pinfo = kzalloc(sizeof(*pinfo), GFP_KERNEL); | 203 | pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL); |
204 | if (!pinfo) | 204 | if (!pinfo) |
205 | return -ENOMEM; | 205 | return -ENOMEM; |
206 | 206 | ||
@@ -215,15 +215,13 @@ int of_mpc8xxx_spi_probe(struct platform_device *ofdev) | |||
215 | pdata->sysclk = get_brgfreq(); | 215 | pdata->sysclk = get_brgfreq(); |
216 | if (pdata->sysclk == -1) { | 216 | if (pdata->sysclk == -1) { |
217 | pdata->sysclk = fsl_get_sys_freq(); | 217 | pdata->sysclk = fsl_get_sys_freq(); |
218 | if (pdata->sysclk == -1) { | 218 | if (pdata->sysclk == -1) |
219 | ret = -ENODEV; | 219 | return -ENODEV; |
220 | goto err; | ||
221 | } | ||
222 | } | 220 | } |
223 | #else | 221 | #else |
224 | ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk); | 222 | ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk); |
225 | if (ret) | 223 | if (ret) |
226 | goto err; | 224 | return ret; |
227 | #endif | 225 | #endif |
228 | 226 | ||
229 | prop = of_get_property(np, "mode", NULL); | 227 | prop = of_get_property(np, "mode", NULL); |
@@ -237,8 +235,4 @@ int of_mpc8xxx_spi_probe(struct platform_device *ofdev) | |||
237 | pdata->flags = SPI_CPM_MODE | SPI_CPM1; | 235 | pdata->flags = SPI_CPM_MODE | SPI_CPM1; |
238 | 236 | ||
239 | return 0; | 237 | return 0; |
240 | |||
241 | err: | ||
242 | kfree(pinfo); | ||
243 | return ret; | ||
244 | } | 238 | } |
diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c index 119f7af94537..f35488ed62a9 100644 --- a/drivers/spi/spi-fsl-spi.c +++ b/drivers/spi/spi-fsl-spi.c | |||
@@ -239,12 +239,6 @@ static int fsl_spi_setup_transfer(struct spi_device *spi, | |||
239 | if (!bits_per_word) | 239 | if (!bits_per_word) |
240 | bits_per_word = spi->bits_per_word; | 240 | bits_per_word = spi->bits_per_word; |
241 | 241 | ||
242 | /* Make sure its a bit width we support [4..16, 32] */ | ||
243 | if ((bits_per_word < 4) | ||
244 | || ((bits_per_word > 16) && (bits_per_word != 32)) | ||
245 | || (bits_per_word > mpc8xxx_spi->max_bits_per_word)) | ||
246 | return -EINVAL; | ||
247 | |||
248 | if (!hz) | 242 | if (!hz) |
249 | hz = spi->max_speed_hz; | 243 | hz = spi->max_speed_hz; |
250 | 244 | ||
@@ -362,18 +356,28 @@ static int fsl_spi_bufs(struct spi_device *spi, struct spi_transfer *t, | |||
362 | static void fsl_spi_do_one_msg(struct spi_message *m) | 356 | static void fsl_spi_do_one_msg(struct spi_message *m) |
363 | { | 357 | { |
364 | struct spi_device *spi = m->spi; | 358 | struct spi_device *spi = m->spi; |
365 | struct spi_transfer *t; | 359 | struct spi_transfer *t, *first; |
366 | unsigned int cs_change; | 360 | unsigned int cs_change; |
367 | const int nsecs = 50; | 361 | const int nsecs = 50; |
368 | int status; | 362 | int status; |
369 | 363 | ||
370 | cs_change = 1; | 364 | /* Don't allow changes if CS is active */ |
371 | status = 0; | 365 | first = list_first_entry(&m->transfers, struct spi_transfer, |
366 | transfer_list); | ||
372 | list_for_each_entry(t, &m->transfers, transfer_list) { | 367 | list_for_each_entry(t, &m->transfers, transfer_list) { |
373 | if (t->bits_per_word || t->speed_hz) { | 368 | if ((first->bits_per_word != t->bits_per_word) || |
374 | /* Don't allow changes if CS is active */ | 369 | (first->speed_hz != t->speed_hz)) { |
375 | status = -EINVAL; | 370 | status = -EINVAL; |
371 | dev_err(&spi->dev, | ||
372 | "bits_per_word/speed_hz should be same for the same SPI transfer\n"); | ||
373 | return; | ||
374 | } | ||
375 | } | ||
376 | 376 | ||
377 | cs_change = 1; | ||
378 | status = -EINVAL; | ||
379 | list_for_each_entry(t, &m->transfers, transfer_list) { | ||
380 | if (t->bits_per_word || t->speed_hz) { | ||
377 | if (cs_change) | 381 | if (cs_change) |
378 | status = fsl_spi_setup_transfer(spi, t); | 382 | status = fsl_spi_setup_transfer(spi, t); |
379 | if (status < 0) | 383 | if (status < 0) |
@@ -641,6 +645,10 @@ static struct spi_master * fsl_spi_probe(struct device *dev, | |||
641 | if (mpc8xxx_spi->type == TYPE_GRLIB) | 645 | if (mpc8xxx_spi->type == TYPE_GRLIB) |
642 | fsl_spi_grlib_probe(dev); | 646 | fsl_spi_grlib_probe(dev); |
643 | 647 | ||
648 | master->bits_per_word_mask = | ||
649 | (SPI_BPW_RANGE_MASK(4, 16) | SPI_BPW_MASK(32)) & | ||
650 | SPI_BPW_RANGE_MASK(1, mpc8xxx_spi->max_bits_per_word); | ||
651 | |||
644 | if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) | 652 | if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) |
645 | mpc8xxx_spi->set_shifts = fsl_spi_qe_cpu_set_shifts; | 653 | mpc8xxx_spi->set_shifts = fsl_spi_qe_cpu_set_shifts; |
646 | 654 | ||
diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c index dd4fe5036220..e97baf2f475c 100644 --- a/drivers/spi/spi-gpio.c +++ b/drivers/spi/spi-gpio.c | |||
@@ -503,13 +503,12 @@ static int spi_gpio_remove(struct platform_device *pdev) | |||
503 | { | 503 | { |
504 | struct spi_gpio *spi_gpio; | 504 | struct spi_gpio *spi_gpio; |
505 | struct spi_gpio_platform_data *pdata; | 505 | struct spi_gpio_platform_data *pdata; |
506 | int status; | ||
507 | 506 | ||
508 | spi_gpio = platform_get_drvdata(pdev); | 507 | spi_gpio = platform_get_drvdata(pdev); |
509 | pdata = dev_get_platdata(&pdev->dev); | 508 | pdata = dev_get_platdata(&pdev->dev); |
510 | 509 | ||
511 | /* stop() unregisters child devices too */ | 510 | /* stop() unregisters child devices too */ |
512 | status = spi_bitbang_stop(&spi_gpio->bitbang); | 511 | spi_bitbang_stop(&spi_gpio->bitbang); |
513 | 512 | ||
514 | if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) | 513 | if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) |
515 | gpio_free(SPI_MISO_GPIO); | 514 | gpio_free(SPI_MISO_GPIO); |
@@ -518,7 +517,7 @@ static int spi_gpio_remove(struct platform_device *pdev) | |||
518 | gpio_free(SPI_SCK_GPIO); | 517 | gpio_free(SPI_SCK_GPIO); |
519 | spi_master_put(spi_gpio->bitbang.master); | 518 | spi_master_put(spi_gpio->bitbang.master); |
520 | 519 | ||
521 | return status; | 520 | return 0; |
522 | } | 521 | } |
523 | 522 | ||
524 | MODULE_ALIAS("platform:" DRIVER_NAME); | 523 | MODULE_ALIAS("platform:" DRIVER_NAME); |
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index a5474ef9d2a0..f52372c403ee 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c | |||
@@ -741,7 +741,7 @@ static int spi_imx_transfer(struct spi_device *spi, | |||
741 | spi_imx->count = transfer->len; | 741 | spi_imx->count = transfer->len; |
742 | spi_imx->txfifo = 0; | 742 | spi_imx->txfifo = 0; |
743 | 743 | ||
744 | init_completion(&spi_imx->xfer_done); | 744 | reinit_completion(&spi_imx->xfer_done); |
745 | 745 | ||
746 | spi_imx_push(spi_imx); | 746 | spi_imx_push(spi_imx); |
747 | 747 | ||
@@ -948,8 +948,8 @@ static int spi_imx_remove(struct platform_device *pdev) | |||
948 | spi_bitbang_stop(&spi_imx->bitbang); | 948 | spi_bitbang_stop(&spi_imx->bitbang); |
949 | 949 | ||
950 | writel(0, spi_imx->base + MXC_CSPICTRL); | 950 | writel(0, spi_imx->base + MXC_CSPICTRL); |
951 | clk_disable_unprepare(spi_imx->clk_ipg); | 951 | clk_unprepare(spi_imx->clk_ipg); |
952 | clk_disable_unprepare(spi_imx->clk_per); | 952 | clk_unprepare(spi_imx->clk_per); |
953 | spi_master_put(master); | 953 | spi_master_put(master); |
954 | 954 | ||
955 | return 0; | 955 | return 0; |
diff --git a/drivers/spi/spi-mpc52xx.c b/drivers/spi/spi-mpc52xx.c index 7c675fe83101..e3d29a56d70a 100644 --- a/drivers/spi/spi-mpc52xx.c +++ b/drivers/spi/spi-mpc52xx.c | |||
@@ -365,9 +365,6 @@ static int mpc52xx_spi_setup(struct spi_device *spi) | |||
365 | if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) | 365 | if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) |
366 | return -EINVAL; | 366 | return -EINVAL; |
367 | 367 | ||
368 | if (spi->chip_select >= spi->master->num_chipselect) | ||
369 | return -EINVAL; | ||
370 | |||
371 | return 0; | 368 | return 0; |
372 | } | 369 | } |
373 | 370 | ||
diff --git a/drivers/spi/spi-nuc900.c b/drivers/spi/spi-nuc900.c index 50406306bc20..bae97ffec4b9 100644 --- a/drivers/spi/spi-nuc900.c +++ b/drivers/spi/spi-nuc900.c | |||
@@ -361,6 +361,8 @@ static int nuc900_spi_probe(struct platform_device *pdev) | |||
361 | init_completion(&hw->done); | 361 | init_completion(&hw->done); |
362 | 362 | ||
363 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; | 363 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; |
364 | if (hw->pdata->lsb) | ||
365 | master->mode_bits |= SPI_LSB_FIRST; | ||
364 | master->num_chipselect = hw->pdata->num_cs; | 366 | master->num_chipselect = hw->pdata->num_cs; |
365 | master->bus_num = hw->pdata->bus_num; | 367 | master->bus_num = hw->pdata->bus_num; |
366 | hw->bitbang.master = hw->master; | 368 | hw->bitbang.master = hw->master; |
diff --git a/drivers/spi/spi-octeon.c b/drivers/spi/spi-octeon.c index 67249a48b391..e31f6d833951 100644 --- a/drivers/spi/spi-octeon.c +++ b/drivers/spi/spi-octeon.c | |||
@@ -257,8 +257,6 @@ static int octeon_spi_probe(struct platform_device *pdev) | |||
257 | p->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start, | 257 | p->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start, |
258 | resource_size(res_mem)); | 258 | resource_size(res_mem)); |
259 | 259 | ||
260 | /* Dynamic bus numbering */ | ||
261 | master->bus_num = -1; | ||
262 | master->num_chipselect = 4; | 260 | master->num_chipselect = 4; |
263 | master->mode_bits = SPI_CPHA | | 261 | master->mode_bits = SPI_CPHA | |
264 | SPI_CPOL | | 262 | SPI_CPOL | |
diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index 9313fd3b413d..8062909b9f5e 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c | |||
@@ -332,12 +332,6 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
332 | 332 | ||
333 | uwire = spi_master_get_devdata(spi->master); | 333 | uwire = spi_master_get_devdata(spi->master); |
334 | 334 | ||
335 | if (spi->chip_select > 3) { | ||
336 | pr_debug("%s: cs%d?\n", dev_name(&spi->dev), spi->chip_select); | ||
337 | status = -ENODEV; | ||
338 | goto done; | ||
339 | } | ||
340 | |||
341 | bits = spi->bits_per_word; | 335 | bits = spi->bits_per_word; |
342 | if (t != NULL && t->bits_per_word) | 336 | if (t != NULL && t->bits_per_word) |
343 | bits = t->bits_per_word; | 337 | bits = t->bits_per_word; |
@@ -539,14 +533,13 @@ static int uwire_probe(struct platform_device *pdev) | |||
539 | static int uwire_remove(struct platform_device *pdev) | 533 | static int uwire_remove(struct platform_device *pdev) |
540 | { | 534 | { |
541 | struct uwire_spi *uwire = platform_get_drvdata(pdev); | 535 | struct uwire_spi *uwire = platform_get_drvdata(pdev); |
542 | int status; | ||
543 | 536 | ||
544 | // FIXME remove all child devices, somewhere ... | 537 | // FIXME remove all child devices, somewhere ... |
545 | 538 | ||
546 | status = spi_bitbang_stop(&uwire->bitbang); | 539 | spi_bitbang_stop(&uwire->bitbang); |
547 | uwire_off(uwire); | 540 | uwire_off(uwire); |
548 | iounmap(uwire_base); | 541 | iounmap(uwire_base); |
549 | return status; | 542 | return 0; |
550 | } | 543 | } |
551 | 544 | ||
552 | /* work with hotplug and coldplug */ | 545 | /* work with hotplug and coldplug */ |
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c index 2789b452e711..3c5b90559bec 100644 --- a/drivers/spi/spi-pl022.c +++ b/drivers/spi/spi-pl022.c | |||
@@ -459,9 +459,8 @@ static void giveback(struct pl022 *pl022) | |||
459 | struct spi_transfer *last_transfer; | 459 | struct spi_transfer *last_transfer; |
460 | pl022->next_msg_cs_active = false; | 460 | pl022->next_msg_cs_active = false; |
461 | 461 | ||
462 | last_transfer = list_entry(pl022->cur_msg->transfers.prev, | 462 | last_transfer = list_last_entry(&pl022->cur_msg->transfers, |
463 | struct spi_transfer, | 463 | struct spi_transfer, transfer_list); |
464 | transfer_list); | ||
465 | 464 | ||
466 | /* Delay if requested before any change in chip select */ | 465 | /* Delay if requested before any change in chip select */ |
467 | if (last_transfer->delay_usecs) | 466 | if (last_transfer->delay_usecs) |
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index c702fc536a77..41185d0557fa 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c | |||
@@ -362,8 +362,7 @@ static void giveback(struct driver_data *drv_data) | |||
362 | drv_data->cur_msg = NULL; | 362 | drv_data->cur_msg = NULL; |
363 | drv_data->cur_transfer = NULL; | 363 | drv_data->cur_transfer = NULL; |
364 | 364 | ||
365 | last_transfer = list_entry(msg->transfers.prev, | 365 | last_transfer = list_last_entry(&msg->transfers, struct spi_transfer, |
366 | struct spi_transfer, | ||
367 | transfer_list); | 366 | transfer_list); |
368 | 367 | ||
369 | /* Delay if requested before any change in chip select */ | 368 | /* Delay if requested before any change in chip select */ |
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index ae907dde1371..25c9bd409a87 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c | |||
@@ -381,7 +381,7 @@ static void s3c64xx_spi_dma_stop(struct s3c64xx_spi_driver_data *sdd, | |||
381 | #else | 381 | #else |
382 | 382 | ||
383 | static void prepare_dma(struct s3c64xx_spi_dma_data *dma, | 383 | static void prepare_dma(struct s3c64xx_spi_dma_data *dma, |
384 | unsigned len, dma_addr_t buf) | 384 | struct sg_table *sgt) |
385 | { | 385 | { |
386 | struct s3c64xx_spi_driver_data *sdd; | 386 | struct s3c64xx_spi_driver_data *sdd; |
387 | struct dma_slave_config config; | 387 | struct dma_slave_config config; |
@@ -407,8 +407,8 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma, | |||
407 | dmaengine_slave_config(dma->ch, &config); | 407 | dmaengine_slave_config(dma->ch, &config); |
408 | } | 408 | } |
409 | 409 | ||
410 | desc = dmaengine_prep_slave_single(dma->ch, buf, len, | 410 | desc = dmaengine_prep_slave_sg(dma->ch, sgt->sgl, sgt->nents, |
411 | dma->direction, DMA_PREP_INTERRUPT); | 411 | dma->direction, DMA_PREP_INTERRUPT); |
412 | 412 | ||
413 | desc->callback = s3c64xx_spi_dmacb; | 413 | desc->callback = s3c64xx_spi_dmacb; |
414 | desc->callback_param = dma; | 414 | desc->callback_param = dma; |
@@ -515,7 +515,11 @@ static void enable_datapath(struct s3c64xx_spi_driver_data *sdd, | |||
515 | chcfg |= S3C64XX_SPI_CH_TXCH_ON; | 515 | chcfg |= S3C64XX_SPI_CH_TXCH_ON; |
516 | if (dma_mode) { | 516 | if (dma_mode) { |
517 | modecfg |= S3C64XX_SPI_MODE_TXDMA_ON; | 517 | modecfg |= S3C64XX_SPI_MODE_TXDMA_ON; |
518 | #ifndef CONFIG_S3C_DMA | ||
519 | prepare_dma(&sdd->tx_dma, &xfer->tx_sg); | ||
520 | #else | ||
518 | prepare_dma(&sdd->tx_dma, xfer->len, xfer->tx_dma); | 521 | prepare_dma(&sdd->tx_dma, xfer->len, xfer->tx_dma); |
522 | #endif | ||
519 | } else { | 523 | } else { |
520 | switch (sdd->cur_bpw) { | 524 | switch (sdd->cur_bpw) { |
521 | case 32: | 525 | case 32: |
@@ -547,7 +551,11 @@ static void enable_datapath(struct s3c64xx_spi_driver_data *sdd, | |||
547 | writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff) | 551 | writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff) |
548 | | S3C64XX_SPI_PACKET_CNT_EN, | 552 | | S3C64XX_SPI_PACKET_CNT_EN, |
549 | regs + S3C64XX_SPI_PACKET_CNT); | 553 | regs + S3C64XX_SPI_PACKET_CNT); |
554 | #ifndef CONFIG_S3C_DMA | ||
555 | prepare_dma(&sdd->rx_dma, &xfer->rx_sg); | ||
556 | #else | ||
550 | prepare_dma(&sdd->rx_dma, xfer->len, xfer->rx_dma); | 557 | prepare_dma(&sdd->rx_dma, xfer->len, xfer->rx_dma); |
558 | #endif | ||
551 | } | 559 | } |
552 | } | 560 | } |
553 | 561 | ||
@@ -555,23 +563,6 @@ static void enable_datapath(struct s3c64xx_spi_driver_data *sdd, | |||
555 | writel(chcfg, regs + S3C64XX_SPI_CH_CFG); | 563 | writel(chcfg, regs + S3C64XX_SPI_CH_CFG); |
556 | } | 564 | } |
557 | 565 | ||
558 | static inline void enable_cs(struct s3c64xx_spi_driver_data *sdd, | ||
559 | struct spi_device *spi) | ||
560 | { | ||
561 | if (sdd->tgl_spi != NULL) { /* If last device toggled after mssg */ | ||
562 | if (sdd->tgl_spi != spi) { /* if last mssg on diff device */ | ||
563 | /* Deselect the last toggled device */ | ||
564 | if (spi->cs_gpio >= 0) | ||
565 | gpio_set_value(spi->cs_gpio, | ||
566 | spi->mode & SPI_CS_HIGH ? 0 : 1); | ||
567 | } | ||
568 | sdd->tgl_spi = NULL; | ||
569 | } | ||
570 | |||
571 | if (spi->cs_gpio >= 0) | ||
572 | gpio_set_value(spi->cs_gpio, spi->mode & SPI_CS_HIGH ? 1 : 0); | ||
573 | } | ||
574 | |||
575 | static u32 s3c64xx_spi_wait_for_timeout(struct s3c64xx_spi_driver_data *sdd, | 566 | static u32 s3c64xx_spi_wait_for_timeout(struct s3c64xx_spi_driver_data *sdd, |
576 | int timeout_ms) | 567 | int timeout_ms) |
577 | { | 568 | { |
@@ -593,112 +584,111 @@ static u32 s3c64xx_spi_wait_for_timeout(struct s3c64xx_spi_driver_data *sdd, | |||
593 | return RX_FIFO_LVL(status, sdd); | 584 | return RX_FIFO_LVL(status, sdd); |
594 | } | 585 | } |
595 | 586 | ||
596 | static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd, | 587 | static int wait_for_dma(struct s3c64xx_spi_driver_data *sdd, |
597 | struct spi_transfer *xfer, int dma_mode) | 588 | struct spi_transfer *xfer) |
598 | { | 589 | { |
599 | void __iomem *regs = sdd->regs; | 590 | void __iomem *regs = sdd->regs; |
600 | unsigned long val; | 591 | unsigned long val; |
592 | u32 status; | ||
601 | int ms; | 593 | int ms; |
602 | 594 | ||
603 | /* millisecs to xfer 'len' bytes @ 'cur_speed' */ | 595 | /* millisecs to xfer 'len' bytes @ 'cur_speed' */ |
604 | ms = xfer->len * 8 * 1000 / sdd->cur_speed; | 596 | ms = xfer->len * 8 * 1000 / sdd->cur_speed; |
605 | ms += 10; /* some tolerance */ | 597 | ms += 10; /* some tolerance */ |
606 | 598 | ||
607 | if (dma_mode) { | 599 | val = msecs_to_jiffies(ms) + 10; |
608 | val = msecs_to_jiffies(ms) + 10; | 600 | val = wait_for_completion_timeout(&sdd->xfer_completion, val); |
609 | val = wait_for_completion_timeout(&sdd->xfer_completion, val); | 601 | |
610 | } else { | 602 | /* |
611 | u32 status; | 603 | * If the previous xfer was completed within timeout, then |
612 | val = msecs_to_loops(ms); | 604 | * proceed further else return -EIO. |
613 | do { | 605 | * DmaTx returns after simply writing data in the FIFO, |
606 | * w/o waiting for real transmission on the bus to finish. | ||
607 | * DmaRx returns only after Dma read data from FIFO which | ||
608 | * needs bus transmission to finish, so we don't worry if | ||
609 | * Xfer involved Rx(with or without Tx). | ||
610 | */ | ||
611 | if (val && !xfer->rx_buf) { | ||
612 | val = msecs_to_loops(10); | ||
613 | status = readl(regs + S3C64XX_SPI_STATUS); | ||
614 | while ((TX_FIFO_LVL(status, sdd) | ||
615 | || !S3C64XX_SPI_ST_TX_DONE(status, sdd)) | ||
616 | && --val) { | ||
617 | cpu_relax(); | ||
614 | status = readl(regs + S3C64XX_SPI_STATUS); | 618 | status = readl(regs + S3C64XX_SPI_STATUS); |
615 | } while (RX_FIFO_LVL(status, sdd) < xfer->len && --val); | 619 | } |
620 | |||
616 | } | 621 | } |
617 | 622 | ||
618 | if (dma_mode) { | 623 | /* If timed out while checking rx/tx status return error */ |
619 | u32 status; | 624 | if (!val) |
620 | 625 | return -EIO; | |
621 | /* | ||
622 | * If the previous xfer was completed within timeout, then | ||
623 | * proceed further else return -EIO. | ||
624 | * DmaTx returns after simply writing data in the FIFO, | ||
625 | * w/o waiting for real transmission on the bus to finish. | ||
626 | * DmaRx returns only after Dma read data from FIFO which | ||
627 | * needs bus transmission to finish, so we don't worry if | ||
628 | * Xfer involved Rx(with or without Tx). | ||
629 | */ | ||
630 | if (val && !xfer->rx_buf) { | ||
631 | val = msecs_to_loops(10); | ||
632 | status = readl(regs + S3C64XX_SPI_STATUS); | ||
633 | while ((TX_FIFO_LVL(status, sdd) | ||
634 | || !S3C64XX_SPI_ST_TX_DONE(status, sdd)) | ||
635 | && --val) { | ||
636 | cpu_relax(); | ||
637 | status = readl(regs + S3C64XX_SPI_STATUS); | ||
638 | } | ||
639 | 626 | ||
640 | } | 627 | return 0; |
628 | } | ||
641 | 629 | ||
642 | /* If timed out while checking rx/tx status return error */ | 630 | static int wait_for_pio(struct s3c64xx_spi_driver_data *sdd, |
643 | if (!val) | 631 | struct spi_transfer *xfer) |
644 | return -EIO; | 632 | { |
645 | } else { | 633 | void __iomem *regs = sdd->regs; |
646 | int loops; | 634 | unsigned long val; |
647 | u32 cpy_len; | 635 | u32 status; |
648 | u8 *buf; | 636 | int loops; |
649 | 637 | u32 cpy_len; | |
650 | /* If it was only Tx */ | 638 | u8 *buf; |
651 | if (!xfer->rx_buf) { | 639 | int ms; |
652 | sdd->state &= ~TXBUSY; | ||
653 | return 0; | ||
654 | } | ||
655 | 640 | ||
656 | /* | 641 | /* millisecs to xfer 'len' bytes @ 'cur_speed' */ |
657 | * If the receive length is bigger than the controller fifo | 642 | ms = xfer->len * 8 * 1000 / sdd->cur_speed; |
658 | * size, calculate the loops and read the fifo as many times. | 643 | ms += 10; /* some tolerance */ |
659 | * loops = length / max fifo size (calculated by using the | ||
660 | * fifo mask). | ||
661 | * For any size less than the fifo size the below code is | ||
662 | * executed atleast once. | ||
663 | */ | ||
664 | loops = xfer->len / ((FIFO_LVL_MASK(sdd) >> 1) + 1); | ||
665 | buf = xfer->rx_buf; | ||
666 | do { | ||
667 | /* wait for data to be received in the fifo */ | ||
668 | cpy_len = s3c64xx_spi_wait_for_timeout(sdd, | ||
669 | (loops ? ms : 0)); | ||
670 | 644 | ||
671 | switch (sdd->cur_bpw) { | 645 | val = msecs_to_loops(ms); |
672 | case 32: | 646 | do { |
673 | ioread32_rep(regs + S3C64XX_SPI_RX_DATA, | 647 | status = readl(regs + S3C64XX_SPI_STATUS); |
674 | buf, cpy_len / 4); | 648 | } while (RX_FIFO_LVL(status, sdd) < xfer->len && --val); |
675 | break; | ||
676 | case 16: | ||
677 | ioread16_rep(regs + S3C64XX_SPI_RX_DATA, | ||
678 | buf, cpy_len / 2); | ||
679 | break; | ||
680 | default: | ||
681 | ioread8_rep(regs + S3C64XX_SPI_RX_DATA, | ||
682 | buf, cpy_len); | ||
683 | break; | ||
684 | } | ||
685 | 649 | ||
686 | buf = buf + cpy_len; | 650 | |
687 | } while (loops--); | 651 | /* If it was only Tx */ |
688 | sdd->state &= ~RXBUSY; | 652 | if (!xfer->rx_buf) { |
653 | sdd->state &= ~TXBUSY; | ||
654 | return 0; | ||
689 | } | 655 | } |
690 | 656 | ||
691 | return 0; | 657 | /* |
692 | } | 658 | * If the receive length is bigger than the controller fifo |
659 | * size, calculate the loops and read the fifo as many times. | ||
660 | * loops = length / max fifo size (calculated by using the | ||
661 | * fifo mask). | ||
662 | * For any size less than the fifo size the below code is | ||
663 | * executed atleast once. | ||
664 | */ | ||
665 | loops = xfer->len / ((FIFO_LVL_MASK(sdd) >> 1) + 1); | ||
666 | buf = xfer->rx_buf; | ||
667 | do { | ||
668 | /* wait for data to be received in the fifo */ | ||
669 | cpy_len = s3c64xx_spi_wait_for_timeout(sdd, | ||
670 | (loops ? ms : 0)); | ||
671 | |||
672 | switch (sdd->cur_bpw) { | ||
673 | case 32: | ||
674 | ioread32_rep(regs + S3C64XX_SPI_RX_DATA, | ||
675 | buf, cpy_len / 4); | ||
676 | break; | ||
677 | case 16: | ||
678 | ioread16_rep(regs + S3C64XX_SPI_RX_DATA, | ||
679 | buf, cpy_len / 2); | ||
680 | break; | ||
681 | default: | ||
682 | ioread8_rep(regs + S3C64XX_SPI_RX_DATA, | ||
683 | buf, cpy_len); | ||
684 | break; | ||
685 | } | ||
693 | 686 | ||
694 | static inline void disable_cs(struct s3c64xx_spi_driver_data *sdd, | 687 | buf = buf + cpy_len; |
695 | struct spi_device *spi) | 688 | } while (loops--); |
696 | { | 689 | sdd->state &= ~RXBUSY; |
697 | if (sdd->tgl_spi == spi) | ||
698 | sdd->tgl_spi = NULL; | ||
699 | 690 | ||
700 | if (spi->cs_gpio >= 0) | 691 | return 0; |
701 | gpio_set_value(spi->cs_gpio, spi->mode & SPI_CS_HIGH ? 0 : 1); | ||
702 | } | 692 | } |
703 | 693 | ||
704 | static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) | 694 | static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) |
@@ -929,7 +919,10 @@ static int s3c64xx_spi_transfer_one(struct spi_master *master, | |||
929 | 919 | ||
930 | spin_unlock_irqrestore(&sdd->lock, flags); | 920 | spin_unlock_irqrestore(&sdd->lock, flags); |
931 | 921 | ||
932 | status = wait_for_xfer(sdd, xfer, use_dma); | 922 | if (use_dma) |
923 | status = wait_for_dma(sdd, xfer); | ||
924 | else | ||
925 | status = wait_for_pio(sdd, xfer); | ||
933 | 926 | ||
934 | if (status) { | 927 | if (status) { |
935 | dev_err(&spi->dev, "I/O Error: rx-%d tx-%d res:rx-%c tx-%c len-%d\n", | 928 | dev_err(&spi->dev, "I/O Error: rx-%d tx-%d res:rx-%c tx-%c len-%d\n", |
@@ -1092,14 +1085,12 @@ static int s3c64xx_spi_setup(struct spi_device *spi) | |||
1092 | 1085 | ||
1093 | pm_runtime_put(&sdd->pdev->dev); | 1086 | pm_runtime_put(&sdd->pdev->dev); |
1094 | writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); | 1087 | writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); |
1095 | disable_cs(sdd, spi); | ||
1096 | return 0; | 1088 | return 0; |
1097 | 1089 | ||
1098 | setup_exit: | 1090 | setup_exit: |
1099 | pm_runtime_put(&sdd->pdev->dev); | 1091 | pm_runtime_put(&sdd->pdev->dev); |
1100 | /* setup() returns with device de-selected */ | 1092 | /* setup() returns with device de-selected */ |
1101 | writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); | 1093 | writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); |
1102 | disable_cs(sdd, spi); | ||
1103 | 1094 | ||
1104 | gpio_free(cs->line); | 1095 | gpio_free(cs->line); |
1105 | spi_set_ctldata(spi, NULL); | 1096 | spi_set_ctldata(spi, NULL); |
diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c index 82d2f922ffa0..755d7cc9e72f 100644 --- a/drivers/spi/spi-sh-hspi.c +++ b/drivers/spi/spi-sh-hspi.c | |||
@@ -298,7 +298,6 @@ static int hspi_probe(struct platform_device *pdev) | |||
298 | 298 | ||
299 | pm_runtime_enable(&pdev->dev); | 299 | pm_runtime_enable(&pdev->dev); |
300 | 300 | ||
301 | master->num_chipselect = 1; | ||
302 | master->bus_num = pdev->id; | 301 | master->bus_num = pdev->id; |
303 | master->setup = hspi_setup; | 302 | master->setup = hspi_setup; |
304 | master->cleanup = hspi_cleanup; | 303 | master->cleanup = hspi_cleanup; |
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 413c71843492..f176ad7b8f16 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c | |||
@@ -172,7 +172,6 @@ struct tegra_spi_data { | |||
172 | void __iomem *base; | 172 | void __iomem *base; |
173 | phys_addr_t phys; | 173 | phys_addr_t phys; |
174 | unsigned irq; | 174 | unsigned irq; |
175 | u32 spi_max_frequency; | ||
176 | u32 cur_speed; | 175 | u32 cur_speed; |
177 | 176 | ||
178 | struct spi_device *cur_spi; | 177 | struct spi_device *cur_spi; |
@@ -761,11 +760,6 @@ static int tegra_spi_setup(struct spi_device *spi) | |||
761 | spi->mode & SPI_CPHA ? "" : "~", | 760 | spi->mode & SPI_CPHA ? "" : "~", |
762 | spi->max_speed_hz); | 761 | spi->max_speed_hz); |
763 | 762 | ||
764 | BUG_ON(spi->chip_select >= MAX_CHIP_SELECT); | ||
765 | |||
766 | /* Set speed to the spi max fequency if spi device has not set */ | ||
767 | spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; | ||
768 | |||
769 | ret = pm_runtime_get_sync(tspi->dev); | 763 | ret = pm_runtime_get_sync(tspi->dev); |
770 | if (ret < 0) { | 764 | if (ret < 0) { |
771 | dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); | 765 | dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); |
@@ -1019,16 +1013,6 @@ static irqreturn_t tegra_spi_isr(int irq, void *context_data) | |||
1019 | return IRQ_WAKE_THREAD; | 1013 | return IRQ_WAKE_THREAD; |
1020 | } | 1014 | } |
1021 | 1015 | ||
1022 | static void tegra_spi_parse_dt(struct platform_device *pdev, | ||
1023 | struct tegra_spi_data *tspi) | ||
1024 | { | ||
1025 | struct device_node *np = pdev->dev.of_node; | ||
1026 | |||
1027 | if (of_property_read_u32(np, "spi-max-frequency", | ||
1028 | &tspi->spi_max_frequency)) | ||
1029 | tspi->spi_max_frequency = 25000000; /* 25MHz */ | ||
1030 | } | ||
1031 | |||
1032 | static struct of_device_id tegra_spi_of_match[] = { | 1016 | static struct of_device_id tegra_spi_of_match[] = { |
1033 | { .compatible = "nvidia,tegra114-spi", }, | 1017 | { .compatible = "nvidia,tegra114-spi", }, |
1034 | {} | 1018 | {} |
@@ -1050,15 +1034,15 @@ static int tegra_spi_probe(struct platform_device *pdev) | |||
1050 | platform_set_drvdata(pdev, master); | 1034 | platform_set_drvdata(pdev, master); |
1051 | tspi = spi_master_get_devdata(master); | 1035 | tspi = spi_master_get_devdata(master); |
1052 | 1036 | ||
1053 | /* Parse DT */ | 1037 | if (of_property_read_u32(pdev->dev.of_node, "spi-max-frequency", |
1054 | tegra_spi_parse_dt(pdev, tspi); | 1038 | &master->max_speed_hz)) |
1039 | master->max_speed_hz = 25000000; /* 25MHz */ | ||
1055 | 1040 | ||
1056 | /* the spi->mode bits understood by this driver: */ | 1041 | /* the spi->mode bits understood by this driver: */ |
1057 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; | 1042 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; |
1058 | master->setup = tegra_spi_setup; | 1043 | master->setup = tegra_spi_setup; |
1059 | master->transfer_one_message = tegra_spi_transfer_one_message; | 1044 | master->transfer_one_message = tegra_spi_transfer_one_message; |
1060 | master->num_chipselect = MAX_CHIP_SELECT; | 1045 | master->num_chipselect = MAX_CHIP_SELECT; |
1061 | master->bus_num = -1; | ||
1062 | master->auto_runtime_pm = true; | 1046 | master->auto_runtime_pm = true; |
1063 | 1047 | ||
1064 | tspi->master = master; | 1048 | tspi->master = master; |
diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c index 08794977f21a..c45135e371b4 100644 --- a/drivers/spi/spi-tegra20-sflash.c +++ b/drivers/spi/spi-tegra20-sflash.c | |||
@@ -121,7 +121,6 @@ struct tegra_sflash_data { | |||
121 | struct reset_control *rst; | 121 | struct reset_control *rst; |
122 | void __iomem *base; | 122 | void __iomem *base; |
123 | unsigned irq; | 123 | unsigned irq; |
124 | u32 spi_max_frequency; | ||
125 | u32 cur_speed; | 124 | u32 cur_speed; |
126 | 125 | ||
127 | struct spi_device *cur_spi; | 126 | struct spi_device *cur_spi; |
@@ -315,15 +314,6 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi, | |||
315 | return tegra_sflash_start_cpu_based_transfer(tsd, t); | 314 | return tegra_sflash_start_cpu_based_transfer(tsd, t); |
316 | } | 315 | } |
317 | 316 | ||
318 | static int tegra_sflash_setup(struct spi_device *spi) | ||
319 | { | ||
320 | struct tegra_sflash_data *tsd = spi_master_get_devdata(spi->master); | ||
321 | |||
322 | /* Set speed to the spi max fequency if spi device has not set */ | ||
323 | spi->max_speed_hz = spi->max_speed_hz ? : tsd->spi_max_frequency; | ||
324 | return 0; | ||
325 | } | ||
326 | |||
327 | static int tegra_sflash_transfer_one_message(struct spi_master *master, | 317 | static int tegra_sflash_transfer_one_message(struct spi_master *master, |
328 | struct spi_message *msg) | 318 | struct spi_message *msg) |
329 | { | 319 | { |
@@ -430,15 +420,6 @@ static irqreturn_t tegra_sflash_isr(int irq, void *context_data) | |||
430 | return handle_cpu_based_xfer(tsd); | 420 | return handle_cpu_based_xfer(tsd); |
431 | } | 421 | } |
432 | 422 | ||
433 | static void tegra_sflash_parse_dt(struct tegra_sflash_data *tsd) | ||
434 | { | ||
435 | struct device_node *np = tsd->dev->of_node; | ||
436 | |||
437 | if (of_property_read_u32(np, "spi-max-frequency", | ||
438 | &tsd->spi_max_frequency)) | ||
439 | tsd->spi_max_frequency = 25000000; /* 25MHz */ | ||
440 | } | ||
441 | |||
442 | static struct of_device_id tegra_sflash_of_match[] = { | 423 | static struct of_device_id tegra_sflash_of_match[] = { |
443 | { .compatible = "nvidia,tegra20-sflash", }, | 424 | { .compatible = "nvidia,tegra20-sflash", }, |
444 | {} | 425 | {} |
@@ -467,11 +448,9 @@ static int tegra_sflash_probe(struct platform_device *pdev) | |||
467 | 448 | ||
468 | /* the spi->mode bits understood by this driver: */ | 449 | /* the spi->mode bits understood by this driver: */ |
469 | master->mode_bits = SPI_CPOL | SPI_CPHA; | 450 | master->mode_bits = SPI_CPOL | SPI_CPHA; |
470 | master->setup = tegra_sflash_setup; | ||
471 | master->transfer_one_message = tegra_sflash_transfer_one_message; | 451 | master->transfer_one_message = tegra_sflash_transfer_one_message; |
472 | master->auto_runtime_pm = true; | 452 | master->auto_runtime_pm = true; |
473 | master->num_chipselect = MAX_CHIP_SELECT; | 453 | master->num_chipselect = MAX_CHIP_SELECT; |
474 | master->bus_num = -1; | ||
475 | 454 | ||
476 | platform_set_drvdata(pdev, master); | 455 | platform_set_drvdata(pdev, master); |
477 | tsd = spi_master_get_devdata(master); | 456 | tsd = spi_master_get_devdata(master); |
@@ -479,7 +458,9 @@ static int tegra_sflash_probe(struct platform_device *pdev) | |||
479 | tsd->dev = &pdev->dev; | 458 | tsd->dev = &pdev->dev; |
480 | spin_lock_init(&tsd->lock); | 459 | spin_lock_init(&tsd->lock); |
481 | 460 | ||
482 | tegra_sflash_parse_dt(tsd); | 461 | if (of_property_read_u32(tsd->dev->of_node, "spi-max-frequency", |
462 | &master->max_speed_hz)) | ||
463 | master->max_speed_hz = 25000000; /* 25MHz */ | ||
483 | 464 | ||
484 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 465 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
485 | tsd->base = devm_ioremap_resource(&pdev->dev, r); | 466 | tsd->base = devm_ioremap_resource(&pdev->dev, r); |
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index be3a069879c3..eb5b771e1575 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c | |||
@@ -171,7 +171,6 @@ struct tegra_slink_data { | |||
171 | void __iomem *base; | 171 | void __iomem *base; |
172 | phys_addr_t phys; | 172 | phys_addr_t phys; |
173 | unsigned irq; | 173 | unsigned irq; |
174 | u32 spi_max_frequency; | ||
175 | u32 cur_speed; | 174 | u32 cur_speed; |
176 | 175 | ||
177 | struct spi_device *cur_spi; | 176 | struct spi_device *cur_spi; |
@@ -761,10 +760,6 @@ static int tegra_slink_setup(struct spi_device *spi) | |||
761 | spi->mode & SPI_CPHA ? "" : "~", | 760 | spi->mode & SPI_CPHA ? "" : "~", |
762 | spi->max_speed_hz); | 761 | spi->max_speed_hz); |
763 | 762 | ||
764 | BUG_ON(spi->chip_select >= MAX_CHIP_SELECT); | ||
765 | |||
766 | /* Set speed to the spi max fequency if spi device has not set */ | ||
767 | spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; | ||
768 | ret = pm_runtime_get_sync(tspi->dev); | 763 | ret = pm_runtime_get_sync(tspi->dev); |
769 | if (ret < 0) { | 764 | if (ret < 0) { |
770 | dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); | 765 | dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); |
@@ -999,15 +994,6 @@ static irqreturn_t tegra_slink_isr(int irq, void *context_data) | |||
999 | return IRQ_WAKE_THREAD; | 994 | return IRQ_WAKE_THREAD; |
1000 | } | 995 | } |
1001 | 996 | ||
1002 | static void tegra_slink_parse_dt(struct tegra_slink_data *tspi) | ||
1003 | { | ||
1004 | struct device_node *np = tspi->dev->of_node; | ||
1005 | |||
1006 | if (of_property_read_u32(np, "spi-max-frequency", | ||
1007 | &tspi->spi_max_frequency)) | ||
1008 | tspi->spi_max_frequency = 25000000; /* 25MHz */ | ||
1009 | } | ||
1010 | |||
1011 | static const struct tegra_slink_chip_data tegra30_spi_cdata = { | 997 | static const struct tegra_slink_chip_data tegra30_spi_cdata = { |
1012 | .cs_hold_time = true, | 998 | .cs_hold_time = true, |
1013 | }; | 999 | }; |
@@ -1053,7 +1039,6 @@ static int tegra_slink_probe(struct platform_device *pdev) | |||
1053 | master->unprepare_message = tegra_slink_unprepare_message; | 1039 | master->unprepare_message = tegra_slink_unprepare_message; |
1054 | master->auto_runtime_pm = true; | 1040 | master->auto_runtime_pm = true; |
1055 | master->num_chipselect = MAX_CHIP_SELECT; | 1041 | master->num_chipselect = MAX_CHIP_SELECT; |
1056 | master->bus_num = -1; | ||
1057 | 1042 | ||
1058 | platform_set_drvdata(pdev, master); | 1043 | platform_set_drvdata(pdev, master); |
1059 | tspi = spi_master_get_devdata(master); | 1044 | tspi = spi_master_get_devdata(master); |
@@ -1062,7 +1047,9 @@ static int tegra_slink_probe(struct platform_device *pdev) | |||
1062 | tspi->chip_data = cdata; | 1047 | tspi->chip_data = cdata; |
1063 | spin_lock_init(&tspi->lock); | 1048 | spin_lock_init(&tspi->lock); |
1064 | 1049 | ||
1065 | tegra_slink_parse_dt(tspi); | 1050 | if (of_property_read_u32(tspi->dev->of_node, "spi-max-frequency", |
1051 | &master->max_speed_hz)) | ||
1052 | master->max_speed_hz = 25000000; /* 25MHz */ | ||
1066 | 1053 | ||
1067 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1054 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1068 | if (!r) { | 1055 | if (!r) { |
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 3d09265b5133..49ddfc7f12b1 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c | |||
@@ -429,13 +429,13 @@ static int ti_qspi_probe(struct platform_device *pdev) | |||
429 | 429 | ||
430 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD; | 430 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD; |
431 | 431 | ||
432 | master->bus_num = -1; | ||
433 | master->flags = SPI_MASTER_HALF_DUPLEX; | 432 | master->flags = SPI_MASTER_HALF_DUPLEX; |
434 | master->setup = ti_qspi_setup; | 433 | master->setup = ti_qspi_setup; |
435 | master->auto_runtime_pm = true; | 434 | master->auto_runtime_pm = true; |
436 | master->transfer_one_message = ti_qspi_start_transfer_one; | 435 | master->transfer_one_message = ti_qspi_start_transfer_one; |
437 | master->dev.of_node = pdev->dev.of_node; | 436 | master->dev.of_node = pdev->dev.of_node; |
438 | master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1); | 437 | master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | |
438 | SPI_BPW_MASK(8); | ||
439 | 439 | ||
440 | if (!of_property_read_u32(np, "num-cs", &num_cs)) | 440 | if (!of_property_read_u32(np, "num-cs", &num_cs)) |
441 | master->num_chipselect = num_cs; | 441 | master->num_chipselect = num_cs; |
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index 2e7f38c7a961..88eb57e858b3 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c | |||
@@ -915,7 +915,7 @@ static void pch_spi_request_dma(struct pch_spi_data *data, int bpw) | |||
915 | /* Set Tx DMA */ | 915 | /* Set Tx DMA */ |
916 | param = &dma->param_tx; | 916 | param = &dma->param_tx; |
917 | param->dma_dev = &dma_dev->dev; | 917 | param->dma_dev = &dma_dev->dev; |
918 | param->chan_id = data->master->bus_num * 2; /* Tx = 0, 2 */ | 918 | param->chan_id = data->ch * 2; /* Tx = 0, 2 */; |
919 | param->tx_reg = data->io_base_addr + PCH_SPDWR; | 919 | param->tx_reg = data->io_base_addr + PCH_SPDWR; |
920 | param->width = width; | 920 | param->width = width; |
921 | chan = dma_request_channel(mask, pch_spi_filter, param); | 921 | chan = dma_request_channel(mask, pch_spi_filter, param); |
@@ -930,7 +930,7 @@ static void pch_spi_request_dma(struct pch_spi_data *data, int bpw) | |||
930 | /* Set Rx DMA */ | 930 | /* Set Rx DMA */ |
931 | param = &dma->param_rx; | 931 | param = &dma->param_rx; |
932 | param->dma_dev = &dma_dev->dev; | 932 | param->dma_dev = &dma_dev->dev; |
933 | param->chan_id = data->master->bus_num * 2 + 1; /* Rx = Tx + 1 */ | 933 | param->chan_id = data->ch * 2 + 1; /* Rx = Tx + 1 */; |
934 | param->rx_reg = data->io_base_addr + PCH_SPDRR; | 934 | param->rx_reg = data->io_base_addr + PCH_SPDRR; |
935 | param->width = width; | 935 | param->width = width; |
936 | chan = dma_request_channel(mask, pch_spi_filter, param); | 936 | chan = dma_request_channel(mask, pch_spi_filter, param); |
@@ -1452,6 +1452,11 @@ static int pch_spi_pd_probe(struct platform_device *plat_dev) | |||
1452 | 1452 | ||
1453 | pch_spi_set_master_mode(master); | 1453 | pch_spi_set_master_mode(master); |
1454 | 1454 | ||
1455 | if (use_dma) { | ||
1456 | dev_info(&plat_dev->dev, "Use DMA for data transfers\n"); | ||
1457 | pch_alloc_dma_buf(board_dat, data); | ||
1458 | } | ||
1459 | |||
1455 | ret = spi_register_master(master); | 1460 | ret = spi_register_master(master); |
1456 | if (ret != 0) { | 1461 | if (ret != 0) { |
1457 | dev_err(&plat_dev->dev, | 1462 | dev_err(&plat_dev->dev, |
@@ -1459,14 +1464,10 @@ static int pch_spi_pd_probe(struct platform_device *plat_dev) | |||
1459 | goto err_spi_register_master; | 1464 | goto err_spi_register_master; |
1460 | } | 1465 | } |
1461 | 1466 | ||
1462 | if (use_dma) { | ||
1463 | dev_info(&plat_dev->dev, "Use DMA for data transfers\n"); | ||
1464 | pch_alloc_dma_buf(board_dat, data); | ||
1465 | } | ||
1466 | |||
1467 | return 0; | 1467 | return 0; |
1468 | 1468 | ||
1469 | err_spi_register_master: | 1469 | err_spi_register_master: |
1470 | pch_free_dma_buf(board_dat, data); | ||
1470 | free_irq(board_dat->pdev->irq, data); | 1471 | free_irq(board_dat->pdev->irq, data); |
1471 | err_request_irq: | 1472 | err_request_irq: |
1472 | pch_spi_free_resources(board_dat, data); | 1473 | pch_spi_free_resources(board_dat, data); |
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 23756b0f9036..ffc1a2ebc4ca 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c | |||
@@ -24,6 +24,8 @@ | |||
24 | #include <linux/device.h> | 24 | #include <linux/device.h> |
25 | #include <linux/init.h> | 25 | #include <linux/init.h> |
26 | #include <linux/cache.h> | 26 | #include <linux/cache.h> |
27 | #include <linux/dma-mapping.h> | ||
28 | #include <linux/dmaengine.h> | ||
27 | #include <linux/mutex.h> | 29 | #include <linux/mutex.h> |
28 | #include <linux/of_device.h> | 30 | #include <linux/of_device.h> |
29 | #include <linux/of_irq.h> | 31 | #include <linux/of_irq.h> |
@@ -255,13 +257,12 @@ EXPORT_SYMBOL_GPL(spi_bus_type); | |||
255 | static int spi_drv_probe(struct device *dev) | 257 | static int spi_drv_probe(struct device *dev) |
256 | { | 258 | { |
257 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | 259 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); |
258 | struct spi_device *spi = to_spi_device(dev); | ||
259 | int ret; | 260 | int ret; |
260 | 261 | ||
261 | acpi_dev_pm_attach(&spi->dev, true); | 262 | acpi_dev_pm_attach(dev, true); |
262 | ret = sdrv->probe(spi); | 263 | ret = sdrv->probe(to_spi_device(dev)); |
263 | if (ret) | 264 | if (ret) |
264 | acpi_dev_pm_detach(&spi->dev, true); | 265 | acpi_dev_pm_detach(dev, true); |
265 | 266 | ||
266 | return ret; | 267 | return ret; |
267 | } | 268 | } |
@@ -269,11 +270,10 @@ static int spi_drv_probe(struct device *dev) | |||
269 | static int spi_drv_remove(struct device *dev) | 270 | static int spi_drv_remove(struct device *dev) |
270 | { | 271 | { |
271 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | 272 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); |
272 | struct spi_device *spi = to_spi_device(dev); | ||
273 | int ret; | 273 | int ret; |
274 | 274 | ||
275 | ret = sdrv->remove(spi); | 275 | ret = sdrv->remove(to_spi_device(dev)); |
276 | acpi_dev_pm_detach(&spi->dev, true); | 276 | acpi_dev_pm_detach(dev, true); |
277 | 277 | ||
278 | return ret; | 278 | return ret; |
279 | } | 279 | } |
@@ -580,6 +580,169 @@ static void spi_set_cs(struct spi_device *spi, bool enable) | |||
580 | spi->master->set_cs(spi, !enable); | 580 | spi->master->set_cs(spi, !enable); |
581 | } | 581 | } |
582 | 582 | ||
583 | static int spi_map_buf(struct spi_master *master, struct device *dev, | ||
584 | struct sg_table *sgt, void *buf, size_t len, | ||
585 | enum dma_data_direction dir) | ||
586 | { | ||
587 | const bool vmalloced_buf = is_vmalloc_addr(buf); | ||
588 | const int desc_len = vmalloced_buf ? PAGE_SIZE : master->max_dma_len; | ||
589 | const int sgs = DIV_ROUND_UP(len, desc_len); | ||
590 | struct page *vm_page; | ||
591 | void *sg_buf; | ||
592 | size_t min; | ||
593 | int i, ret; | ||
594 | |||
595 | ret = sg_alloc_table(sgt, sgs, GFP_KERNEL); | ||
596 | if (ret != 0) | ||
597 | return ret; | ||
598 | |||
599 | for (i = 0; i < sgs; i++) { | ||
600 | min = min_t(size_t, len, desc_len); | ||
601 | |||
602 | if (vmalloced_buf) { | ||
603 | vm_page = vmalloc_to_page(buf); | ||
604 | if (!vm_page) { | ||
605 | sg_free_table(sgt); | ||
606 | return -ENOMEM; | ||
607 | } | ||
608 | sg_buf = page_address(vm_page) + | ||
609 | ((size_t)buf & ~PAGE_MASK); | ||
610 | } else { | ||
611 | sg_buf = buf; | ||
612 | } | ||
613 | |||
614 | sg_set_buf(&sgt->sgl[i], sg_buf, min); | ||
615 | |||
616 | buf += min; | ||
617 | len -= min; | ||
618 | } | ||
619 | |||
620 | ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir); | ||
621 | if (ret < 0) { | ||
622 | sg_free_table(sgt); | ||
623 | return ret; | ||
624 | } | ||
625 | |||
626 | sgt->nents = ret; | ||
627 | |||
628 | return 0; | ||
629 | } | ||
630 | |||
631 | static void spi_unmap_buf(struct spi_master *master, struct device *dev, | ||
632 | struct sg_table *sgt, enum dma_data_direction dir) | ||
633 | { | ||
634 | if (sgt->orig_nents) { | ||
635 | dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir); | ||
636 | sg_free_table(sgt); | ||
637 | } | ||
638 | } | ||
639 | |||
640 | static int spi_map_msg(struct spi_master *master, struct spi_message *msg) | ||
641 | { | ||
642 | struct device *tx_dev, *rx_dev; | ||
643 | struct spi_transfer *xfer; | ||
644 | void *tmp; | ||
645 | unsigned int max_tx, max_rx; | ||
646 | int ret; | ||
647 | |||
648 | if (master->flags & (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX)) { | ||
649 | max_tx = 0; | ||
650 | max_rx = 0; | ||
651 | |||
652 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
653 | if ((master->flags & SPI_MASTER_MUST_TX) && | ||
654 | !xfer->tx_buf) | ||
655 | max_tx = max(xfer->len, max_tx); | ||
656 | if ((master->flags & SPI_MASTER_MUST_RX) && | ||
657 | !xfer->rx_buf) | ||
658 | max_rx = max(xfer->len, max_rx); | ||
659 | } | ||
660 | |||
661 | if (max_tx) { | ||
662 | tmp = krealloc(master->dummy_tx, max_tx, | ||
663 | GFP_KERNEL | GFP_DMA); | ||
664 | if (!tmp) | ||
665 | return -ENOMEM; | ||
666 | master->dummy_tx = tmp; | ||
667 | memset(tmp, 0, max_tx); | ||
668 | } | ||
669 | |||
670 | if (max_rx) { | ||
671 | tmp = krealloc(master->dummy_rx, max_rx, | ||
672 | GFP_KERNEL | GFP_DMA); | ||
673 | if (!tmp) | ||
674 | return -ENOMEM; | ||
675 | master->dummy_rx = tmp; | ||
676 | } | ||
677 | |||
678 | if (max_tx || max_rx) { | ||
679 | list_for_each_entry(xfer, &msg->transfers, | ||
680 | transfer_list) { | ||
681 | if (!xfer->tx_buf) | ||
682 | xfer->tx_buf = master->dummy_tx; | ||
683 | if (!xfer->rx_buf) | ||
684 | xfer->rx_buf = master->dummy_rx; | ||
685 | } | ||
686 | } | ||
687 | } | ||
688 | |||
689 | if (!master->can_dma) | ||
690 | return 0; | ||
691 | |||
692 | tx_dev = &master->dma_tx->dev->device; | ||
693 | rx_dev = &master->dma_rx->dev->device; | ||
694 | |||
695 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
696 | if (!master->can_dma(master, msg->spi, xfer)) | ||
697 | continue; | ||
698 | |||
699 | if (xfer->tx_buf != NULL) { | ||
700 | ret = spi_map_buf(master, tx_dev, &xfer->tx_sg, | ||
701 | (void *)xfer->tx_buf, xfer->len, | ||
702 | DMA_TO_DEVICE); | ||
703 | if (ret != 0) | ||
704 | return ret; | ||
705 | } | ||
706 | |||
707 | if (xfer->rx_buf != NULL) { | ||
708 | ret = spi_map_buf(master, rx_dev, &xfer->rx_sg, | ||
709 | xfer->rx_buf, xfer->len, | ||
710 | DMA_FROM_DEVICE); | ||
711 | if (ret != 0) { | ||
712 | spi_unmap_buf(master, tx_dev, &xfer->tx_sg, | ||
713 | DMA_TO_DEVICE); | ||
714 | return ret; | ||
715 | } | ||
716 | } | ||
717 | } | ||
718 | |||
719 | master->cur_msg_mapped = true; | ||
720 | |||
721 | return 0; | ||
722 | } | ||
723 | |||
724 | static int spi_unmap_msg(struct spi_master *master, struct spi_message *msg) | ||
725 | { | ||
726 | struct spi_transfer *xfer; | ||
727 | struct device *tx_dev, *rx_dev; | ||
728 | |||
729 | if (!master->cur_msg_mapped || !master->can_dma) | ||
730 | return 0; | ||
731 | |||
732 | tx_dev = &master->dma_tx->dev->device; | ||
733 | rx_dev = &master->dma_rx->dev->device; | ||
734 | |||
735 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
736 | if (!master->can_dma(master, msg->spi, xfer)) | ||
737 | continue; | ||
738 | |||
739 | spi_unmap_buf(master, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE); | ||
740 | spi_unmap_buf(master, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE); | ||
741 | } | ||
742 | |||
743 | return 0; | ||
744 | } | ||
745 | |||
583 | /* | 746 | /* |
584 | * spi_transfer_one_message - Default implementation of transfer_one_message() | 747 | * spi_transfer_one_message - Default implementation of transfer_one_message() |
585 | * | 748 | * |
@@ -591,7 +754,6 @@ static int spi_transfer_one_message(struct spi_master *master, | |||
591 | struct spi_message *msg) | 754 | struct spi_message *msg) |
592 | { | 755 | { |
593 | struct spi_transfer *xfer; | 756 | struct spi_transfer *xfer; |
594 | bool cur_cs = true; | ||
595 | bool keep_cs = false; | 757 | bool keep_cs = false; |
596 | int ret = 0; | 758 | int ret = 0; |
597 | 759 | ||
@@ -627,8 +789,9 @@ static int spi_transfer_one_message(struct spi_master *master, | |||
627 | &msg->transfers)) { | 789 | &msg->transfers)) { |
628 | keep_cs = true; | 790 | keep_cs = true; |
629 | } else { | 791 | } else { |
630 | cur_cs = !cur_cs; | 792 | spi_set_cs(msg->spi, false); |
631 | spi_set_cs(msg->spi, cur_cs); | 793 | udelay(10); |
794 | spi_set_cs(msg->spi, true); | ||
632 | } | 795 | } |
633 | } | 796 | } |
634 | 797 | ||
@@ -686,6 +849,10 @@ static void spi_pump_messages(struct kthread_work *work) | |||
686 | } | 849 | } |
687 | master->busy = false; | 850 | master->busy = false; |
688 | spin_unlock_irqrestore(&master->queue_lock, flags); | 851 | spin_unlock_irqrestore(&master->queue_lock, flags); |
852 | kfree(master->dummy_rx); | ||
853 | master->dummy_rx = NULL; | ||
854 | kfree(master->dummy_tx); | ||
855 | master->dummy_tx = NULL; | ||
689 | if (master->unprepare_transfer_hardware && | 856 | if (master->unprepare_transfer_hardware && |
690 | master->unprepare_transfer_hardware(master)) | 857 | master->unprepare_transfer_hardware(master)) |
691 | dev_err(&master->dev, | 858 | dev_err(&master->dev, |
@@ -752,14 +919,19 @@ static void spi_pump_messages(struct kthread_work *work) | |||
752 | master->cur_msg_prepared = true; | 919 | master->cur_msg_prepared = true; |
753 | } | 920 | } |
754 | 921 | ||
755 | ret = master->transfer_one_message(master, master->cur_msg); | 922 | ret = spi_map_msg(master, master->cur_msg); |
756 | if (ret) { | 923 | if (ret) { |
757 | dev_err(&master->dev, | ||
758 | "failed to transfer one message from queue: %d\n", ret); | ||
759 | master->cur_msg->status = ret; | 924 | master->cur_msg->status = ret; |
760 | spi_finalize_current_message(master); | 925 | spi_finalize_current_message(master); |
761 | return; | 926 | return; |
762 | } | 927 | } |
928 | |||
929 | ret = master->transfer_one_message(master, master->cur_msg); | ||
930 | if (ret) { | ||
931 | dev_err(&master->dev, | ||
932 | "failed to transfer one message from queue\n"); | ||
933 | return; | ||
934 | } | ||
763 | } | 935 | } |
764 | 936 | ||
765 | static int spi_init_queue(struct spi_master *master) | 937 | static int spi_init_queue(struct spi_master *master) |
@@ -841,6 +1013,8 @@ void spi_finalize_current_message(struct spi_master *master) | |||
841 | queue_kthread_work(&master->kworker, &master->pump_messages); | 1013 | queue_kthread_work(&master->kworker, &master->pump_messages); |
842 | spin_unlock_irqrestore(&master->queue_lock, flags); | 1014 | spin_unlock_irqrestore(&master->queue_lock, flags); |
843 | 1015 | ||
1016 | spi_unmap_msg(master, mesg); | ||
1017 | |||
844 | if (master->cur_msg_prepared && master->unprepare_message) { | 1018 | if (master->cur_msg_prepared && master->unprepare_message) { |
845 | ret = master->unprepare_message(master, mesg); | 1019 | ret = master->unprepare_message(master, mesg); |
846 | if (ret) { | 1020 | if (ret) { |
@@ -894,7 +1068,7 @@ static int spi_stop_queue(struct spi_master *master) | |||
894 | */ | 1068 | */ |
895 | while ((!list_empty(&master->queue) || master->busy) && limit--) { | 1069 | while ((!list_empty(&master->queue) || master->busy) && limit--) { |
896 | spin_unlock_irqrestore(&master->queue_lock, flags); | 1070 | spin_unlock_irqrestore(&master->queue_lock, flags); |
897 | msleep(10); | 1071 | usleep_range(10000, 11000); |
898 | spin_lock_irqsave(&master->queue_lock, flags); | 1072 | spin_lock_irqsave(&master->queue_lock, flags); |
899 | } | 1073 | } |
900 | 1074 | ||
@@ -1374,6 +1548,8 @@ int spi_register_master(struct spi_master *master) | |||
1374 | mutex_init(&master->bus_lock_mutex); | 1548 | mutex_init(&master->bus_lock_mutex); |
1375 | master->bus_lock_flag = 0; | 1549 | master->bus_lock_flag = 0; |
1376 | init_completion(&master->xfer_completion); | 1550 | init_completion(&master->xfer_completion); |
1551 | if (!master->max_dma_len) | ||
1552 | master->max_dma_len = INT_MAX; | ||
1377 | 1553 | ||
1378 | /* register the device, then userspace will see it. | 1554 | /* register the device, then userspace will see it. |
1379 | * registration fails if the bus ID is in use. | 1555 | * registration fails if the bus ID is in use. |
@@ -1599,6 +1775,9 @@ int spi_setup(struct spi_device *spi) | |||
1599 | if (!spi->bits_per_word) | 1775 | if (!spi->bits_per_word) |
1600 | spi->bits_per_word = 8; | 1776 | spi->bits_per_word = 8; |
1601 | 1777 | ||
1778 | if (!spi->max_speed_hz) | ||
1779 | spi->max_speed_hz = spi->master->max_speed_hz; | ||
1780 | |||
1602 | if (spi->master->setup) | 1781 | if (spi->master->setup) |
1603 | status = spi->master->setup(spi); | 1782 | status = spi->master->setup(spi); |
1604 | 1783 | ||
@@ -1619,11 +1798,10 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message) | |||
1619 | { | 1798 | { |
1620 | struct spi_master *master = spi->master; | 1799 | struct spi_master *master = spi->master; |
1621 | struct spi_transfer *xfer; | 1800 | struct spi_transfer *xfer; |
1801 | int w_size; | ||
1622 | 1802 | ||
1623 | if (list_empty(&message->transfers)) | 1803 | if (list_empty(&message->transfers)) |
1624 | return -EINVAL; | 1804 | return -EINVAL; |
1625 | if (!message->complete) | ||
1626 | return -EINVAL; | ||
1627 | 1805 | ||
1628 | /* Half-duplex links include original MicroWire, and ones with | 1806 | /* Half-duplex links include original MicroWire, and ones with |
1629 | * only one data pin like SPI_3WIRE (switches direction) or where | 1807 | * only one data pin like SPI_3WIRE (switches direction) or where |
@@ -1654,12 +1832,13 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message) | |||
1654 | message->frame_length += xfer->len; | 1832 | message->frame_length += xfer->len; |
1655 | if (!xfer->bits_per_word) | 1833 | if (!xfer->bits_per_word) |
1656 | xfer->bits_per_word = spi->bits_per_word; | 1834 | xfer->bits_per_word = spi->bits_per_word; |
1657 | if (!xfer->speed_hz) { | 1835 | |
1836 | if (!xfer->speed_hz) | ||
1658 | xfer->speed_hz = spi->max_speed_hz; | 1837 | xfer->speed_hz = spi->max_speed_hz; |
1659 | if (master->max_speed_hz && | 1838 | |
1660 | xfer->speed_hz > master->max_speed_hz) | 1839 | if (master->max_speed_hz && |
1661 | xfer->speed_hz = master->max_speed_hz; | 1840 | xfer->speed_hz > master->max_speed_hz) |
1662 | } | 1841 | xfer->speed_hz = master->max_speed_hz; |
1663 | 1842 | ||
1664 | if (master->bits_per_word_mask) { | 1843 | if (master->bits_per_word_mask) { |
1665 | /* Only 32 bits fit in the mask */ | 1844 | /* Only 32 bits fit in the mask */ |
@@ -1670,12 +1849,24 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message) | |||
1670 | return -EINVAL; | 1849 | return -EINVAL; |
1671 | } | 1850 | } |
1672 | 1851 | ||
1852 | /* | ||
1853 | * SPI transfer length should be multiple of SPI word size | ||
1854 | * where SPI word size should be power-of-two multiple | ||
1855 | */ | ||
1856 | if (xfer->bits_per_word <= 8) | ||
1857 | w_size = 1; | ||
1858 | else if (xfer->bits_per_word <= 16) | ||
1859 | w_size = 2; | ||
1860 | else | ||
1861 | w_size = 4; | ||
1862 | |||
1863 | /* No partial transfers accepted */ | ||
1864 | if (xfer->len % w_size) | ||
1865 | return -EINVAL; | ||
1866 | |||
1673 | if (xfer->speed_hz && master->min_speed_hz && | 1867 | if (xfer->speed_hz && master->min_speed_hz && |
1674 | xfer->speed_hz < master->min_speed_hz) | 1868 | xfer->speed_hz < master->min_speed_hz) |
1675 | return -EINVAL; | 1869 | return -EINVAL; |
1676 | if (xfer->speed_hz && master->max_speed_hz && | ||
1677 | xfer->speed_hz > master->max_speed_hz) | ||
1678 | return -EINVAL; | ||
1679 | 1870 | ||
1680 | if (xfer->tx_buf && !xfer->tx_nbits) | 1871 | if (xfer->tx_buf && !xfer->tx_nbits) |
1681 | xfer->tx_nbits = SPI_NBITS_SINGLE; | 1872 | xfer->tx_nbits = SPI_NBITS_SINGLE; |