diff options
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/spi_bfin5xx.c | 30 |
1 files changed, 19 insertions, 11 deletions
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c index 4dc7e6749322..a85bcb306590 100644 --- a/drivers/spi/spi_bfin5xx.c +++ b/drivers/spi/spi_bfin5xx.c | |||
@@ -231,13 +231,13 @@ static int restore_state(struct driver_data *drv_data) | |||
231 | dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n"); | 231 | dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n"); |
232 | 232 | ||
233 | /* Load the registers */ | 233 | /* Load the registers */ |
234 | cs_deactive(drv_data, chip); | ||
235 | write_BAUD(drv_data, chip->baud); | 234 | write_BAUD(drv_data, chip->baud); |
236 | chip->ctl_reg &= (~BIT_CTL_TIMOD); | 235 | chip->ctl_reg &= (~BIT_CTL_TIMOD); |
237 | chip->ctl_reg |= (chip->width << 8); | 236 | chip->ctl_reg |= (chip->width << 8); |
238 | write_CTRL(drv_data, chip->ctl_reg); | 237 | write_CTRL(drv_data, chip->ctl_reg); |
239 | 238 | ||
240 | bfin_spi_enable(drv_data); | 239 | bfin_spi_enable(drv_data); |
240 | cs_active(drv_data, chip); | ||
241 | 241 | ||
242 | if (ret) | 242 | if (ret) |
243 | dev_dbg(&drv_data->pdev->dev, | 243 | dev_dbg(&drv_data->pdev->dev, |
@@ -767,6 +767,7 @@ static void pump_transfers(unsigned long data) | |||
767 | 767 | ||
768 | disable_dma(drv_data->dma_channel); | 768 | disable_dma(drv_data->dma_channel); |
769 | clear_dma_irqstat(drv_data->dma_channel); | 769 | clear_dma_irqstat(drv_data->dma_channel); |
770 | bfin_spi_disable(drv_data); | ||
770 | 771 | ||
771 | /* config dma channel */ | 772 | /* config dma channel */ |
772 | dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n"); | 773 | dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n"); |
@@ -789,9 +790,6 @@ static void pump_transfers(unsigned long data) | |||
789 | dev_dbg(&drv_data->pdev->dev, | 790 | dev_dbg(&drv_data->pdev->dev, |
790 | "doing autobuffer DMA out.\n"); | 791 | "doing autobuffer DMA out.\n"); |
791 | 792 | ||
792 | /* set SPI transfer mode */ | ||
793 | write_CTRL(drv_data, (cr | CFG_SPI_DMAWRITE)); | ||
794 | |||
795 | /* no irq in autobuffer mode */ | 793 | /* no irq in autobuffer mode */ |
796 | dma_config = | 794 | dma_config = |
797 | (DMAFLOW_AUTO | RESTART | dma_width | DI_EN); | 795 | (DMAFLOW_AUTO | RESTART | dma_width | DI_EN); |
@@ -800,7 +798,13 @@ static void pump_transfers(unsigned long data) | |||
800 | (unsigned long)drv_data->tx); | 798 | (unsigned long)drv_data->tx); |
801 | enable_dma(drv_data->dma_channel); | 799 | enable_dma(drv_data->dma_channel); |
802 | 800 | ||
803 | /* just return here, there can only be one transfer in this mode */ | 801 | /* start SPI transfer */ |
802 | write_CTRL(drv_data, | ||
803 | (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE)); | ||
804 | |||
805 | /* just return here, there can only be one transfer | ||
806 | * in this mode | ||
807 | */ | ||
804 | message->status = 0; | 808 | message->status = 0; |
805 | giveback(drv_data); | 809 | giveback(drv_data); |
806 | return; | 810 | return; |
@@ -811,9 +815,6 @@ static void pump_transfers(unsigned long data) | |||
811 | /* set transfer mode, and enable SPI */ | 815 | /* set transfer mode, and enable SPI */ |
812 | dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); | 816 | dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); |
813 | 817 | ||
814 | /* set SPI transfer mode */ | ||
815 | write_CTRL(drv_data, (cr | CFG_SPI_DMAREAD)); | ||
816 | |||
817 | /* clear tx reg soformer data is not shifted out */ | 818 | /* clear tx reg soformer data is not shifted out */ |
818 | write_TDBR(drv_data, 0xFFFF); | 819 | write_TDBR(drv_data, 0xFFFF); |
819 | 820 | ||
@@ -827,12 +828,13 @@ static void pump_transfers(unsigned long data) | |||
827 | (unsigned long)drv_data->rx); | 828 | (unsigned long)drv_data->rx); |
828 | enable_dma(drv_data->dma_channel); | 829 | enable_dma(drv_data->dma_channel); |
829 | 830 | ||
831 | /* start SPI transfer */ | ||
832 | write_CTRL(drv_data, | ||
833 | (cr | CFG_SPI_DMAREAD | BIT_CTL_ENABLE)); | ||
834 | |||
830 | } else if (drv_data->tx != NULL) { | 835 | } else if (drv_data->tx != NULL) { |
831 | dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); | 836 | dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); |
832 | 837 | ||
833 | /* set SPI transfer mode */ | ||
834 | write_CTRL(drv_data, (cr | CFG_SPI_DMAWRITE)); | ||
835 | |||
836 | /* start dma */ | 838 | /* start dma */ |
837 | dma_enable_irq(drv_data->dma_channel); | 839 | dma_enable_irq(drv_data->dma_channel); |
838 | dma_config = (RESTART | dma_width | DI_EN); | 840 | dma_config = (RESTART | dma_width | DI_EN); |
@@ -840,6 +842,10 @@ static void pump_transfers(unsigned long data) | |||
840 | set_dma_start_addr(drv_data->dma_channel, | 842 | set_dma_start_addr(drv_data->dma_channel, |
841 | (unsigned long)drv_data->tx); | 843 | (unsigned long)drv_data->tx); |
842 | enable_dma(drv_data->dma_channel); | 844 | enable_dma(drv_data->dma_channel); |
845 | |||
846 | /* start SPI transfer */ | ||
847 | write_CTRL(drv_data, | ||
848 | (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE)); | ||
843 | } | 849 | } |
844 | } else { | 850 | } else { |
845 | /* IO mode write then read */ | 851 | /* IO mode write then read */ |
@@ -1142,6 +1148,8 @@ static int setup(struct spi_device *spi) | |||
1142 | peripheral_request(ssel[spi->master->bus_num] | 1148 | peripheral_request(ssel[spi->master->bus_num] |
1143 | [chip->chip_select_num-1], DRV_NAME); | 1149 | [chip->chip_select_num-1], DRV_NAME); |
1144 | 1150 | ||
1151 | cs_deactive(drv_data, chip); | ||
1152 | |||
1145 | return 0; | 1153 | return 0; |
1146 | } | 1154 | } |
1147 | 1155 | ||