aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/spi
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/davinci_spi.c58
1 files changed, 23 insertions, 35 deletions
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index a47947da17a3..6094e3a07853 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -118,9 +118,6 @@ struct davinci_spi_dma {
118 int dma_rx_channel; 118 int dma_rx_channel;
119 int dummy_param_slot; 119 int dummy_param_slot;
120 enum dma_event_q eventq; 120 enum dma_event_q eventq;
121
122 struct completion dma_tx_completion;
123 struct completion dma_rx_completion;
124}; 121};
125 122
126/* SPI Controller driver's private data. */ 123/* SPI Controller driver's private data. */
@@ -386,32 +383,6 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
386 return 0; 383 return 0;
387} 384}
388 385
389static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
390{
391 struct davinci_spi *davinci_spi = data;
392 struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
393
394 edma_stop(davinci_spi_dma->dma_rx_channel);
395
396 if (ch_status == DMA_COMPLETE)
397 davinci_spi->rcount = 0;
398
399 complete(&davinci_spi_dma->dma_rx_completion);
400}
401
402static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
403{
404 struct davinci_spi *davinci_spi = data;
405 struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
406
407 edma_stop(davinci_spi_dma->dma_tx_channel);
408
409 if (ch_status == DMA_COMPLETE)
410 davinci_spi->wcount = 0;
411
412 complete(&davinci_spi_dma->dma_tx_completion);
413}
414
415/** 386/**
416 * davinci_spi_setup - This functions will set default transfer method 387 * davinci_spi_setup - This functions will set default transfer method
417 * @spi: spi device on which data transfer to be done 388 * @spi: spi device on which data transfer to be done
@@ -630,6 +601,25 @@ static irqreturn_t davinci_spi_irq(s32 irq, void *context_data)
630 return IRQ_HANDLED; 601 return IRQ_HANDLED;
631} 602}
632 603
604static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
605{
606 struct davinci_spi *davinci_spi = data;
607 struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
608
609 edma_stop(lch);
610
611 if (status == DMA_COMPLETE) {
612 if (lch == davinci_spi_dma->dma_rx_channel)
613 davinci_spi->rcount = 0;
614 if (lch == davinci_spi_dma->dma_tx_channel)
615 davinci_spi->wcount = 0;
616 }
617
618 if ((!davinci_spi->wcount && !davinci_spi->rcount) ||
619 (status != DMA_COMPLETE))
620 complete(&davinci_spi->done);
621}
622
633static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) 623static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
634{ 624{
635 struct davinci_spi *davinci_spi; 625 struct davinci_spi *davinci_spi;
@@ -660,8 +650,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
660 davinci_spi->wcount = t->len / data_type; 650 davinci_spi->wcount = t->len / data_type;
661 davinci_spi->rcount = davinci_spi->wcount; 651 davinci_spi->rcount = davinci_spi->wcount;
662 652
663 init_completion(&davinci_spi_dma->dma_rx_completion); 653 INIT_COMPLETION(davinci_spi->done);
664 init_completion(&davinci_spi_dma->dma_tx_completion);
665 654
666 /* disable all interrupts for dma transfers */ 655 /* disable all interrupts for dma transfers */
667 clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); 656 clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
@@ -752,8 +741,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
752 edma_start(davinci_spi_dma->dma_tx_channel); 741 edma_start(davinci_spi_dma->dma_tx_channel);
753 set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); 742 set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
754 743
755 wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion); 744 wait_for_completion_interruptible(&davinci_spi->done);
756 wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion);
757 745
758 if (t->tx_buf) 746 if (t->tx_buf)
759 dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, 747 dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
@@ -787,7 +775,7 @@ static int davinci_spi_request_dma(struct davinci_spi *davinci_spi)
787 struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; 775 struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
788 776
789 r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel, 777 r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel,
790 davinci_spi_dma_rx_callback, davinci_spi, 778 davinci_spi_dma_callback, davinci_spi,
791 davinci_spi_dma->eventq); 779 davinci_spi_dma->eventq);
792 if (r < 0) { 780 if (r < 0) {
793 pr_err("Unable to request DMA channel for SPI RX\n"); 781 pr_err("Unable to request DMA channel for SPI RX\n");
@@ -796,7 +784,7 @@ static int davinci_spi_request_dma(struct davinci_spi *davinci_spi)
796 } 784 }
797 785
798 r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel, 786 r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel,
799 davinci_spi_dma_tx_callback, davinci_spi, 787 davinci_spi_dma_callback, davinci_spi,
800 davinci_spi_dma->eventq); 788 davinci_spi_dma->eventq);
801 if (r < 0) { 789 if (r < 0) {
802 pr_err("Unable to request DMA channel for SPI TX\n"); 790 pr_err("Unable to request DMA channel for SPI TX\n");