diff options
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/spi_imx.c | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index 60a52d173d8f..23db9840b9ae 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c | |||
@@ -56,7 +56,7 @@ struct spi_imx_config { | |||
56 | unsigned int speed_hz; | 56 | unsigned int speed_hz; |
57 | unsigned int bpw; | 57 | unsigned int bpw; |
58 | unsigned int mode; | 58 | unsigned int mode; |
59 | int cs; | 59 | u8 cs; |
60 | }; | 60 | }; |
61 | 61 | ||
62 | enum spi_imx_devtype { | 62 | enum spi_imx_devtype { |
@@ -218,6 +218,7 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx, | |||
218 | struct spi_imx_config *config) | 218 | struct spi_imx_config *config) |
219 | { | 219 | { |
220 | unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; | 220 | unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; |
221 | int cs = spi_imx->chipselect[config->cs]; | ||
221 | 222 | ||
222 | reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << | 223 | reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << |
223 | MX31_CSPICTRL_DR_SHIFT; | 224 | MX31_CSPICTRL_DR_SHIFT; |
@@ -230,9 +231,8 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx, | |||
230 | reg |= MX31_CSPICTRL_POL; | 231 | reg |= MX31_CSPICTRL_POL; |
231 | if (config->mode & SPI_CS_HIGH) | 232 | if (config->mode & SPI_CS_HIGH) |
232 | reg |= MX31_CSPICTRL_SSPOL; | 233 | reg |= MX31_CSPICTRL_SSPOL; |
233 | if (config->cs < 0) { | 234 | if (cs < 0) |
234 | reg |= (config->cs + 32) << MX31_CSPICTRL_CS_SHIFT; | 235 | reg |= (cs + 32) << MX31_CSPICTRL_CS_SHIFT; |
235 | } | ||
236 | 236 | ||
237 | writel(reg, spi_imx->base + MXC_CSPICTRL); | 237 | writel(reg, spi_imx->base + MXC_CSPICTRL); |
238 | 238 | ||
@@ -243,6 +243,7 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx, | |||
243 | struct spi_imx_config *config) | 243 | struct spi_imx_config *config) |
244 | { | 244 | { |
245 | unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; | 245 | unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; |
246 | int cs = spi_imx->chipselect[config->cs]; | ||
246 | 247 | ||
247 | reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << | 248 | reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << |
248 | MX31_CSPICTRL_DR_SHIFT; | 249 | MX31_CSPICTRL_DR_SHIFT; |
@@ -256,8 +257,8 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx, | |||
256 | reg |= MX31_CSPICTRL_POL; | 257 | reg |= MX31_CSPICTRL_POL; |
257 | if (config->mode & SPI_CS_HIGH) | 258 | if (config->mode & SPI_CS_HIGH) |
258 | reg |= MX31_CSPICTRL_SSPOL; | 259 | reg |= MX31_CSPICTRL_SSPOL; |
259 | if (config->cs < 0) | 260 | if (cs < 0) |
260 | reg |= (config->cs + 32) << MX35_CSPICTRL_CS_SHIFT; | 261 | reg |= (cs + 32) << MX35_CSPICTRL_CS_SHIFT; |
261 | 262 | ||
262 | writel(reg, spi_imx->base + MXC_CSPICTRL); | 263 | writel(reg, spi_imx->base + MXC_CSPICTRL); |
263 | 264 | ||
@@ -314,6 +315,7 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx, | |||
314 | struct spi_imx_config *config) | 315 | struct spi_imx_config *config) |
315 | { | 316 | { |
316 | unsigned int reg = MX27_CSPICTRL_ENABLE | MX27_CSPICTRL_MASTER; | 317 | unsigned int reg = MX27_CSPICTRL_ENABLE | MX27_CSPICTRL_MASTER; |
318 | int cs = spi_imx->chipselect[config->cs]; | ||
317 | 319 | ||
318 | reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) << | 320 | reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) << |
319 | MX27_CSPICTRL_DR_SHIFT; | 321 | MX27_CSPICTRL_DR_SHIFT; |
@@ -325,8 +327,8 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx, | |||
325 | reg |= MX27_CSPICTRL_POL; | 327 | reg |= MX27_CSPICTRL_POL; |
326 | if (config->mode & SPI_CS_HIGH) | 328 | if (config->mode & SPI_CS_HIGH) |
327 | reg |= MX27_CSPICTRL_SSPOL; | 329 | reg |= MX27_CSPICTRL_SSPOL; |
328 | if (config->cs < 0) | 330 | if (cs < 0) |
329 | reg |= (config->cs + 32) << MX27_CSPICTRL_CS_SHIFT; | 331 | reg |= (cs + 32) << MX27_CSPICTRL_CS_SHIFT; |
330 | 332 | ||
331 | writel(reg, spi_imx->base + MXC_CSPICTRL); | 333 | writel(reg, spi_imx->base + MXC_CSPICTRL); |
332 | 334 | ||
@@ -510,7 +512,7 @@ static int spi_imx_setupxfer(struct spi_device *spi, | |||
510 | config.bpw = t ? t->bits_per_word : spi->bits_per_word; | 512 | config.bpw = t ? t->bits_per_word : spi->bits_per_word; |
511 | config.speed_hz = t ? t->speed_hz : spi->max_speed_hz; | 513 | config.speed_hz = t ? t->speed_hz : spi->max_speed_hz; |
512 | config.mode = spi->mode; | 514 | config.mode = spi->mode; |
513 | config.cs = spi_imx->chipselect[spi->chip_select]; | 515 | config.cs = spi->chip_select; |
514 | 516 | ||
515 | if (!config.speed_hz) | 517 | if (!config.speed_hz) |
516 | config.speed_hz = spi->max_speed_hz; | 518 | config.speed_hz = spi->max_speed_hz; |