1 files changed, 193 insertions, 185 deletions

diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 46b8c5c2f45e..1b47363cb73f 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -14,22 +14,20 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
-#include <linux/platform_device.h>
-
-#include <linux/of_platform.h>
-#include <linux/of_device.h>
-#include <linux/of_spi.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/spi_bitbang.h>
 #include <linux/io.h>
 
+#include "xilinx_spi.h"
+#include <linux/spi/xilinx_spi.h>
+
 #define XILINX_SPI_NAME "xilinx_spi"
 
 /* Register definitions as per "OPB Serial Peripheral Interface (SPI) (v1.00e)
  * Product Specification", DS464
  */
-#define XSPI_CR_OFFSET          0x62    /* 16-bit Control Register */
+#define XSPI_CR_OFFSET          0x60    /* Control Register */
 
 #define XSPI_CR_ENABLE          0x02
 #define XSPI_CR_MASTER_MODE     0x04
@@ -40,8 +38,9 @@
 #define XSPI_CR_RXFIFO_RESET    0x40
 #define XSPI_CR_MANUAL_SSELECT  0x80
 #define XSPI_CR_TRANS_INHIBIT   0x100
+#define XSPI_CR_LSB_FIRST       0x200
 
-#define XSPI_SR_OFFSET          0x67    /* 8-bit Status Register */
+#define XSPI_SR_OFFSET          0x64    /* Status Register */
 
 #define XSPI_SR_RX_EMPTY_MASK   0x01    /* Receive FIFO is empty */
 #define XSPI_SR_RX_FULL_MASK    0x02    /* Receive FIFO is full */
@@ -49,8 +48,8 @@
 #define XSPI_SR_TX_FULL_MASK    0x08    /* Transmit FIFO is full */
 #define XSPI_SR_MODE_FAULT_MASK 0x10    /* Mode fault error */
 
-#define XSPI_TXD_OFFSET         0x6b    /* 8-bit Data Transmit Register */
-#define XSPI_RXD_OFFSET         0x6f    /* 8-bit Data Receive Register */
+#define XSPI_TXD_OFFSET         0x68    /* Data Transmit Register */
+#define XSPI_RXD_OFFSET         0x6c    /* Data Receive Register */
 
 #define XSPI_SSR_OFFSET         0x70    /* 32-bit Slave Select Register */
 
@@ -70,6 +69,7 @@
 #define XSPI_INTR_TX_UNDERRUN           0x08    /* TxFIFO was underrun */
 #define XSPI_INTR_RX_FULL               0x10    /* RxFIFO is full */
 #define XSPI_INTR_RX_OVERRUN            0x20    /* RxFIFO was overrun */
+#define XSPI_INTR_TX_HALF_EMPTY         0x40    /* TxFIFO is half empty */
 
 #define XIPIF_V123B_RESETR_OFFSET       0x40    /* IPIF reset register */
 #define XIPIF_V123B_RESET_MASK          0x0a    /* the value to write */
@@ -78,35 +78,105 @@ struct xilinx_spi {
         /* bitbang has to be first */
         struct spi_bitbang bitbang;
         struct completion done;
-
+        struct resource mem; /* phys mem */
         void __iomem    *regs;  /* virt. address of the control registers */
 
         u32             irq;
 
-        u32             speed_hz; /* SCK has a fixed frequency of speed_hz Hz */
-
         u8 *rx_ptr;             /* pointer in the Tx buffer */
         const u8 *tx_ptr;       /* pointer in the Rx buffer */
         int remaining_bytes;    /* the number of bytes left to transfer */
+        u8 bits_per_word;
+        unsigned int (*read_fn) (void __iomem *);
+        void (*write_fn) (u32, void __iomem *);
+        void (*tx_fn) (struct xilinx_spi *);
+        void (*rx_fn) (struct xilinx_spi *);
 };
 
-static void xspi_init_hw(void __iomem *regs_base)
+static void xspi_write32(u32 val, void __iomem *addr)
+{
+        iowrite32(val, addr);
+}
+
+static unsigned int xspi_read32(void __iomem *addr)
+{
+        return ioread32(addr);
+}
+
+static void xspi_write32_be(u32 val, void __iomem *addr)
 {
+        iowrite32be(val, addr);
+}
+
+static unsigned int xspi_read32_be(void __iomem *addr)
+{
+        return ioread32be(addr);
+}
+
+static void xspi_tx8(struct xilinx_spi *xspi)
+{
+        xspi->write_fn(*xspi->tx_ptr, xspi->regs + XSPI_TXD_OFFSET);
+        xspi->tx_ptr++;
+}
+
+static void xspi_tx16(struct xilinx_spi *xspi)
+{
+        xspi->write_fn(*(u16 *)(xspi->tx_ptr), xspi->regs + XSPI_TXD_OFFSET);
+        xspi->tx_ptr += 2;
+}
+
+static void xspi_tx32(struct xilinx_spi *xspi)
+{
+        xspi->write_fn(*(u32 *)(xspi->tx_ptr), xspi->regs + XSPI_TXD_OFFSET);
+        xspi->tx_ptr += 4;
+}
+
+static void xspi_rx8(struct xilinx_spi *xspi)
+{
+        u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET);
+        if (xspi->rx_ptr) {
+                *xspi->rx_ptr = data & 0xff;
+                xspi->rx_ptr++;
+        }
+}
+
+static void xspi_rx16(struct xilinx_spi *xspi)
+{
+        u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET);
+        if (xspi->rx_ptr) {
+                *(u16 *)(xspi->rx_ptr) = data & 0xffff;
+                xspi->rx_ptr += 2;
+        }
+}
+
+static void xspi_rx32(struct xilinx_spi *xspi)
+{
+        u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET);
+        if (xspi->rx_ptr) {
+                *(u32 *)(xspi->rx_ptr) = data;
+                xspi->rx_ptr += 4;
+        }
+}
+
+static void xspi_init_hw(struct xilinx_spi *xspi)
+{
+        void __iomem *regs_base = xspi->regs;
+
         /* Reset the SPI device */
-        out_be32(regs_base + XIPIF_V123B_RESETR_OFFSET,
-                 XIPIF_V123B_RESET_MASK);
+        xspi->write_fn(XIPIF_V123B_RESET_MASK,
+                regs_base + XIPIF_V123B_RESETR_OFFSET);
         /* Disable all the interrupts just in case */
-        out_be32(regs_base + XIPIF_V123B_IIER_OFFSET, 0);
+        xspi->write_fn(0, regs_base + XIPIF_V123B_IIER_OFFSET);
         /* Enable the global IPIF interrupt */
-        out_be32(regs_base + XIPIF_V123B_DGIER_OFFSET,
-                 XIPIF_V123B_GINTR_ENABLE);
+        xspi->write_fn(XIPIF_V123B_GINTR_ENABLE,
+                regs_base + XIPIF_V123B_DGIER_OFFSET);
         /* Deselect the slave on the SPI bus */
-        out_be32(regs_base + XSPI_SSR_OFFSET, 0xffff);
+        xspi->write_fn(0xffff, regs_base + XSPI_SSR_OFFSET);
         /* Disable the transmitter, enable Manual Slave Select Assertion,
          * put SPI controller into master mode, and enable it */
-        out_be16(regs_base + XSPI_CR_OFFSET,
-                 XSPI_CR_TRANS_INHIBIT | XSPI_CR_MANUAL_SSELECT
-                 | XSPI_CR_MASTER_MODE | XSPI_CR_ENABLE);
+        xspi->write_fn(XSPI_CR_TRANS_INHIBIT | XSPI_CR_MANUAL_SSELECT |
+                XSPI_CR_MASTER_MODE | XSPI_CR_ENABLE | XSPI_CR_TXFIFO_RESET |
+                XSPI_CR_RXFIFO_RESET, regs_base + XSPI_CR_OFFSET);
 }
 
 static void xilinx_spi_chipselect(struct spi_device *spi, int is_on)
@@ -115,16 +185,16 @@ static void xilinx_spi_chipselect(struct spi_device *spi, int is_on)
 
         if (is_on == BITBANG_CS_INACTIVE) {
                 /* Deselect the slave on the SPI bus */
-                out_be32(xspi->regs + XSPI_SSR_OFFSET, 0xffff);
+                xspi->write_fn(0xffff, xspi->regs + XSPI_SSR_OFFSET);
         } else if (is_on == BITBANG_CS_ACTIVE) {
                 /* Set the SPI clock phase and polarity */
-                u16 cr = in_be16(xspi->regs + XSPI_CR_OFFSET)
+                u16 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET)
                          & ~XSPI_CR_MODE_MASK;
                 if (spi->mode & SPI_CPHA)
                         cr |= XSPI_CR_CPHA;
                 if (spi->mode & SPI_CPOL)
                         cr |= XSPI_CR_CPOL;
-                out_be16(xspi->regs + XSPI_CR_OFFSET, cr);
+                xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
 
                 /* We do not check spi->max_speed_hz here as the SPI clock
                  * frequency is not software programmable (the IP block design
@@ -132,24 +202,27 @@ static void xilinx_spi_chipselect(struct spi_device *spi, int is_on)
                  */
 
                 /* Activate the chip select */
-                out_be32(xspi->regs + XSPI_SSR_OFFSET,
-                         ~(0x0001 << spi->chip_select));
+                xspi->write_fn(~(0x0001 << spi->chip_select),
+                        xspi->regs + XSPI_SSR_OFFSET);
         }
 }
 
 /* spi_bitbang requires custom setup_transfer() to be defined if there is a
  * custom txrx_bufs(). We have nothing to setup here as the SPI IP block
- * supports just 8 bits per word, and SPI clock can't be changed in software.
- * Check for 8 bits per word. Chip select delay calculations could be
+ * supports 8 or 16 bits per word which cannot be changed in software.
+ * SPI clock can't be changed in software either.
+ * Check for correct bits per word. Chip select delay calculations could be
  * added here as soon as bitbang_work() can be made aware of the delay value.
  */
 static int xilinx_spi_setup_transfer(struct spi_device *spi,
                 struct spi_transfer *t)
 {
+        struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
         u8 bits_per_word;
 
-        bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word;
-        if (bits_per_word != 8) {
+        bits_per_word = (t && t->bits_per_word)
+                         ? t->bits_per_word : spi->bits_per_word;
+        if (bits_per_word != xspi->bits_per_word) {
                 dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
                         __func__, bits_per_word);
                 return -EINVAL;
@@ -160,17 +233,16 @@ static int xilinx_spi_setup_transfer(struct spi_device *spi,
 
 static int xilinx_spi_setup(struct spi_device *spi)
 {
-        struct spi_bitbang *bitbang;
-        struct xilinx_spi *xspi;
-        int retval;
-
-        xspi = spi_master_get_devdata(spi->master);
-        bitbang = &xspi->bitbang;
-
-        retval = xilinx_spi_setup_transfer(spi, NULL);
-        if (retval < 0)
-                return retval;
-
+        /* always return 0, we can not check the number of bits.
+         * There are cases when SPI setup is called before any driver is
+         * there, in that case the SPI core defaults to 8 bits, which we
+         * do not support in some cases. But if we return an error, the
+         * SPI device would not be registered and no driver can get hold of it
+         * When the driver is there, it will call SPI setup again with the
+         * correct number of bits per transfer.
+         * If a driver setups with the wrong bit number, it will fail when
+         * it tries to do a transfer
+         */
         return 0;
 }
 
@@ -179,15 +251,14 @@ static void xilinx_spi_fill_tx_fifo(struct xilinx_spi *xspi)
         u8 sr;
 
         /* Fill the Tx FIFO with as many bytes as possible */
-        sr = in_8(xspi->regs + XSPI_SR_OFFSET);
+        sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
         while ((sr & XSPI_SR_TX_FULL_MASK) == 0 && xspi->remaining_bytes > 0) {
-                if (xspi->tx_ptr) {
-                        out_8(xspi->regs + XSPI_TXD_OFFSET, *xspi->tx_ptr++);
-                } else {
-                        out_8(xspi->regs + XSPI_TXD_OFFSET, 0);
-                }
-                xspi->remaining_bytes--;
-                sr = in_8(xspi->regs + XSPI_SR_OFFSET);
+                if (xspi->tx_ptr)
+                        xspi->tx_fn(xspi);
+                else
+                        xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET);
+                xspi->remaining_bytes -= xspi->bits_per_word / 8;
+                sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
         }
 }
 
@@ -209,18 +280,19 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
         /* Enable the transmit empty interrupt, which we use to determine
          * progress on the transmission.
          */
-        ipif_ier = in_be32(xspi->regs + XIPIF_V123B_IIER_OFFSET);
-        out_be32(xspi->regs + XIPIF_V123B_IIER_OFFSET,
-                 ipif_ier | XSPI_INTR_TX_EMPTY);
+        ipif_ier = xspi->read_fn(xspi->regs + XIPIF_V123B_IIER_OFFSET);
+        xspi->write_fn(ipif_ier | XSPI_INTR_TX_EMPTY,
+                xspi->regs + XIPIF_V123B_IIER_OFFSET);
 
         /* Start the transfer by not inhibiting the transmitter any longer */
-        cr = in_be16(xspi->regs + XSPI_CR_OFFSET) & ~XSPI_CR_TRANS_INHIBIT;
-        out_be16(xspi->regs + XSPI_CR_OFFSET, cr);
+        cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) &
+                ~XSPI_CR_TRANS_INHIBIT;
+        xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
 
         wait_for_completion(&xspi->done);
 
         /* Disable the transmit empty interrupt */
-        out_be32(xspi->regs + XIPIF_V123B_IIER_OFFSET, ipif_ier);
+        xspi->write_fn(ipif_ier, xspi->regs + XIPIF_V123B_IIER_OFFSET);
 
         return t->len - xspi->remaining_bytes;
 }
@@ -237,8 +309,8 @@ static irqreturn_t xilinx_spi_irq(int irq, void *dev_id)
         u32 ipif_isr;
 
         /* Get the IPIF interrupts, and clear them immediately */
-        ipif_isr = in_be32(xspi->regs + XIPIF_V123B_IISR_OFFSET);
-        out_be32(xspi->regs + XIPIF_V123B_IISR_OFFSET, ipif_isr);
+        ipif_isr = xspi->read_fn(xspi->regs + XIPIF_V123B_IISR_OFFSET);
+        xspi->write_fn(ipif_isr, xspi->regs + XIPIF_V123B_IISR_OFFSET);
 
         if (ipif_isr & XSPI_INTR_TX_EMPTY) {    /* Transmission completed */
                 u16 cr;
@@ -249,20 +321,15 @@ static irqreturn_t xilinx_spi_irq(int irq, void *dev_id)
                  * transmitter while the Isr refills the transmit register/FIFO,
                  * or make sure it is stopped if we're done.
                  */
-                cr = in_be16(xspi->regs + XSPI_CR_OFFSET);
-                out_be16(xspi->regs + XSPI_CR_OFFSET,
-                         cr | XSPI_CR_TRANS_INHIBIT);
+                cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
+                xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
+                        xspi->regs + XSPI_CR_OFFSET);
 
                 /* Read out all the data from the Rx FIFO */
-                sr = in_8(xspi->regs + XSPI_SR_OFFSET);
+                sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
                 while ((sr & XSPI_SR_RX_EMPTY_MASK) == 0) {
-                        u8 data;
-
-                        data = in_8(xspi->regs + XSPI_RXD_OFFSET);
-                        if (xspi->rx_ptr) {
-                                *xspi->rx_ptr++ = data;
-                        }
-                        sr = in_8(xspi->regs + XSPI_SR_OFFSET);
+                        xspi->rx_fn(xspi);
+                        sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
                 }
 
                 /* See if there is more data to send */
@@ -271,7 +338,7 @@ static irqreturn_t xilinx_spi_irq(int irq, void *dev_id)
                         /* Start the transfer by not inhibiting the
                          * transmitter any longer
                          */
-                        out_be16(xspi->regs + XSPI_CR_OFFSET, cr);
+                        xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
                 } else {
                         /* No more data to send.
                          * Indicate the transfer is completed.
@@ -283,40 +350,22 @@ static irqreturn_t xilinx_spi_irq(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static int __init xilinx_spi_of_probe(struct of_device *ofdev,
-                                        const struct of_device_id *match)
+struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
+        u32 irq, s16 bus_num)
 {
         struct spi_master *master;
         struct xilinx_spi *xspi;
-        struct resource r_irq_struct;
-        struct resource r_mem_struct;
-
-        struct resource *r_irq = &r_irq_struct;
-        struct resource *r_mem = &r_mem_struct;
-        int rc = 0;
-        const u32 *prop;
-        int len;
-
-        /* Get resources(memory, IRQ) associated with the device */
-        master = spi_alloc_master(&ofdev->dev, sizeof(struct xilinx_spi));
+        struct xspi_platform_data *pdata = dev->platform_data;
+        int ret;
 
-        if (master == NULL) {
-                return -ENOMEM;
+        if (!pdata) {
+                dev_err(dev, "No platform data attached\n");
+                return NULL;
         }
 
-        dev_set_drvdata(&ofdev->dev, master);
-
-        rc = of_address_to_resource(ofdev->node, 0, r_mem);
-        if (rc) {
-                dev_warn(&ofdev->dev, "invalid address\n");
-                goto put_master;
-        }
-
-        rc = of_irq_to_resource(ofdev->node, 0, r_irq);
-        if (rc == NO_IRQ) {
-                dev_warn(&ofdev->dev, "no IRQ found\n");
-                goto put_master;
-        }
+        master = spi_alloc_master(dev, sizeof(struct xilinx_spi));
+        if (!master)
+                return NULL;
 
         /* the spi->mode bits understood by this driver: */
         master->mode_bits = SPI_CPOL | SPI_CPHA;
@@ -329,128 +378,87 @@ static int __init xilinx_spi_of_probe(struct of_device *ofdev,
         xspi->bitbang.master->setup = xilinx_spi_setup;
         init_completion(&xspi->done);
 
-        xspi->irq = r_irq->start;
-
-        if (!request_mem_region(r_mem->start,
-                        r_mem->end - r_mem->start + 1, XILINX_SPI_NAME)) {
-                rc = -ENXIO;
-                dev_warn(&ofdev->dev, "memory request failure\n");
+        if (!request_mem_region(mem->start, resource_size(mem),
+                XILINX_SPI_NAME))
                 goto put_master;
-        }
 
-        xspi->regs = ioremap(r_mem->start, r_mem->end - r_mem->start + 1);
+        xspi->regs = ioremap(mem->start, resource_size(mem));
         if (xspi->regs == NULL) {
-                rc = -ENOMEM;
-                dev_warn(&ofdev->dev, "ioremap failure\n");
-                goto release_mem;
+                dev_warn(dev, "ioremap failure\n");
+                goto map_failed;
         }
-        xspi->irq = r_irq->start;
-
-        /* dynamic bus assignment */
-        master->bus_num = -1;
 
-        /* number of slave select bits is required */
-        prop = of_get_property(ofdev->node, "xlnx,num-ss-bits", &len);
-        if (!prop || len < sizeof(*prop)) {
-                dev_warn(&ofdev->dev, "no 'xlnx,num-ss-bits' property\n");
-                goto unmap_io;
+        master->bus_num = bus_num;
+        master->num_chipselect = pdata->num_chipselect;
+
+        xspi->mem = *mem;
+        xspi->irq = irq;
+        if (pdata->little_endian) {
+                xspi->read_fn = xspi_read32;
+                xspi->write_fn = xspi_write32;
+        } else {
+                xspi->read_fn = xspi_read32_be;
+                xspi->write_fn = xspi_write32_be;
         }
-        master->num_chipselect = *prop;
+        xspi->bits_per_word = pdata->bits_per_word;
+        if (xspi->bits_per_word == 8) {
+                xspi->tx_fn = xspi_tx8;
+                xspi->rx_fn = xspi_rx8;
+        } else if (xspi->bits_per_word == 16) {
+                xspi->tx_fn = xspi_tx16;
+                xspi->rx_fn = xspi_rx16;
+        } else if (xspi->bits_per_word == 32) {
+                xspi->tx_fn = xspi_tx32;
+                xspi->rx_fn = xspi_rx32;
+        } else
+                goto unmap_io;
+
 
         /* SPI controller initializations */
-        xspi_init_hw(xspi->regs);
+        xspi_init_hw(xspi);
 
         /* Register for SPI Interrupt */
-        rc = request_irq(xspi->irq, xilinx_spi_irq, 0, XILINX_SPI_NAME, xspi);
-        if (rc != 0) {
-                dev_warn(&ofdev->dev, "irq request failure: %d\n", xspi->irq);
+        ret = request_irq(xspi->irq, xilinx_spi_irq, 0, XILINX_SPI_NAME, xspi);
+        if (ret)
                 goto unmap_io;
-        }
 
-        rc = spi_bitbang_start(&xspi->bitbang);
-        if (rc != 0) {
-                dev_err(&ofdev->dev, "spi_bitbang_start FAILED\n");
+        ret = spi_bitbang_start(&xspi->bitbang);
+        if (ret) {
+                dev_err(dev, "spi_bitbang_start FAILED\n");
                 goto free_irq;
         }
 
-        dev_info(&ofdev->dev, "at 0x%08X mapped to 0x%08X, irq=%d\n",
-                        (unsigned int)r_mem->start, (u32)xspi->regs, xspi->irq);
-
-        /* Add any subnodes on the SPI bus */
-        of_register_spi_devices(master, ofdev->node);
-
-        return rc;
+        dev_info(dev, "at 0x%08llX mapped to 0x%p, irq=%d\n",
+                (unsigned long long)mem->start, xspi->regs, xspi->irq);
+        return master;
 
 free_irq:
         free_irq(xspi->irq, xspi);
 unmap_io:
         iounmap(xspi->regs);
-release_mem:
-        release_mem_region(r_mem->start, resource_size(r_mem));
+map_failed:
+        release_mem_region(mem->start, resource_size(mem));
 put_master:
         spi_master_put(master);
-        return rc;
+        return NULL;
 }
+EXPORT_SYMBOL(xilinx_spi_init);
 
-static int __devexit xilinx_spi_remove(struct of_device *ofdev)
+void xilinx_spi_deinit(struct spi_master *master)
 {
         struct xilinx_spi *xspi;
-        struct spi_master *master;
-        struct resource r_mem;
 
-        master = platform_get_drvdata(ofdev);
         xspi = spi_master_get_devdata(master);
 
         spi_bitbang_stop(&xspi->bitbang);
         free_irq(xspi->irq, xspi);
         iounmap(xspi->regs);
-        if (!of_address_to_resource(ofdev->node, 0, &r_mem))
-                release_mem_region(r_mem.start, resource_size(&r_mem));
-        dev_set_drvdata(&ofdev->dev, 0);
-        spi_master_put(xspi->bitbang.master);
-
-        return 0;
-}
-
-/* work with hotplug and coldplug */
-MODULE_ALIAS("platform:" XILINX_SPI_NAME);
-
-static int __exit xilinx_spi_of_remove(struct of_device *op)
-{
-        return xilinx_spi_remove(op);
-}
-
-static struct of_device_id xilinx_spi_of_match[] = {
-        { .compatible = "xlnx,xps-spi-2.00.a", },
-        { .compatible = "xlnx,xps-spi-2.00.b", },
-        {}
-};
-
-MODULE_DEVICE_TABLE(of, xilinx_spi_of_match);
-
-static struct of_platform_driver xilinx_spi_of_driver = {
-        .owner = THIS_MODULE,
-        .name = "xilinx-xps-spi",
-        .match_table = xilinx_spi_of_match,
-        .probe = xilinx_spi_of_probe,
-        .remove = __exit_p(xilinx_spi_of_remove),
-        .driver = {
-                .name = "xilinx-xps-spi",
-                .owner = THIS_MODULE,
-        },
-};
 
-static int __init xilinx_spi_init(void)
-{
-        return of_register_platform_driver(&xilinx_spi_of_driver);
+        release_mem_region(xspi->mem.start, resource_size(&xspi->mem));
+        spi_master_put(xspi->bitbang.master);
 }
-module_init(xilinx_spi_init);
+EXPORT_SYMBOL(xilinx_spi_deinit);
 
-static void __exit xilinx_spi_exit(void)
-{
-        of_unregister_platform_driver(&xilinx_spi_of_driver);
-}
-module_exit(xilinx_spi_exit);
 MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
 MODULE_DESCRIPTION("Xilinx SPI driver");
 MODULE_LICENSE("GPL");