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path: root/drivers/spi/spi_imx.c
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Diffstat (limited to 'drivers/spi/spi_imx.c')
-rw-r--r--drivers/spi/spi_imx.c24
1 files changed, 9 insertions, 15 deletions
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
index 656be4a5094a..aee9ad6f633c 100644
--- a/drivers/spi/spi_imx.c
+++ b/drivers/spi/spi_imx.c
@@ -1163,6 +1163,9 @@ msg_rejected:
1163 return -EINVAL; 1163 return -EINVAL;
1164} 1164}
1165 1165
1166/* the spi->mode bits understood by this driver: */
1167#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH)
1168
1166/* On first setup bad values must free chip_data memory since will cause 1169/* On first setup bad values must free chip_data memory since will cause
1167 spi_new_device to fail. Bad value setup from protocol driver are simply not 1170 spi_new_device to fail. Bad value setup from protocol driver are simply not
1168 applied and notified to the calling driver. */ 1171 applied and notified to the calling driver. */
@@ -1174,6 +1177,12 @@ static int setup(struct spi_device *spi)
1174 u32 tmp; 1177 u32 tmp;
1175 int status = 0; 1178 int status = 0;
1176 1179
1180 if (spi->mode & ~MODEBITS) {
1181 dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n",
1182 spi->mode & ~MODEBITS);
1183 return -EINVAL;
1184 }
1185
1177 /* Get controller data */ 1186 /* Get controller data */
1178 chip_info = spi->controller_data; 1187 chip_info = spi->controller_data;
1179 1188
@@ -1245,21 +1254,6 @@ static int setup(struct spi_device *spi)
1245 1254
1246 /* SPI mode */ 1255 /* SPI mode */
1247 tmp = spi->mode; 1256 tmp = spi->mode;
1248 if (tmp & SPI_LSB_FIRST) {
1249 status = -EINVAL;
1250 if (first_setup) {
1251 dev_err(&spi->dev,
1252 "setup - "
1253 "HW doesn't support LSB first transfer\n");
1254 goto err_first_setup;
1255 } else {
1256 dev_err(&spi->dev,
1257 "setup - "
1258 "HW doesn't support LSB first transfer, "
1259 "default to MSB first\n");
1260 spi->mode &= ~SPI_LSB_FIRST;
1261 }
1262 }
1263 if (tmp & SPI_CS_HIGH) { 1257 if (tmp & SPI_CS_HIGH) {
1264 u32_EDIT(chip->control, 1258 u32_EDIT(chip->control,
1265 SPI_CONTROL_SSPOL, SPI_CONTROL_SSPOL_ACT_HIGH); 1259 SPI_CONTROL_SSPOL, SPI_CONTROL_SSPOL_ACT_HIGH);